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GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)

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lai
2026-09-06 03:52:57 +08:00
commit b1928b41c0
21813 changed files with 4413081 additions and 0 deletions
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source/bootloader/product/driver/vo/Makefile
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ccflags-y += -I$(srctree)/product/driver/include
ccflags-y += -I$(srctree)/product/driver/vo/hal
ccflags-y += -I$(srctree)/product/driver/vo/hal/$(CHIPARCH)
ccflags-y += -I$(srctree)/product/driver/vo/hal/$(CHIPARCH)/disp
ccflags-y += -I$(srctree)/product/driver/vo/hal/$(CHIPARCH)/gamma
ccflags-y += -I$(srctree)/product/driver/vo/hal/$(CHIPARCH)/csc
ccflags-y += -I$(srctree)/product/driver/vo/hal/$(CHIPARCH)/clock
ccflags-y += -I$(srctree)/product/driver/vo/hal/$(CHIPARCH)/intf
ccflags-y += -I$(srctree)/product/driver/vo/hal/include
ccflags-y += -I$(srctree)/product/driver/vo/include
ccflags-y += -I$(srctree)/product/driver/vo/common
ccflags-y += -I$(srctree)/product/driver/vo/common/xmfalcon
obj-y += cmd_vo.o
obj-y += common/$(CHIPARCH)/sys_hal.o
obj-y += common/$(CHIPARCH)/sys_drv.o
obj-y += common/drv_sys.o
obj-y += hal/$(CHIPARCH)/clock/hal_vo_clock.o
obj-y += hal/$(CHIPARCH)/csc/hal_vo_csc.o
obj-y += hal/$(CHIPARCH)/disp/hal_vo_disp.o
obj-y += hal/$(CHIPARCH)/gamma/hal_vo_gamma.o
obj-y += hal/$(CHIPARCH)/hal_vo.o
obj-y += hal/$(CHIPARCH)/hal_vo_chip_cfg.o
obj-y += hal/$(CHIPARCH)/hal_vo_reg.o
obj-y += hal/$(CHIPARCH)/intf/hal_vo_intf.o
obj-y += drv_vo.o
EXTRA_CFLAGS += -DVO_BOOT
EXTRA_CFLAGS += -D$(CHIPARCH)
source/bootloader/product/driver/vo/cmd_vo.c
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#include <common.h>
#include <command.h>
#include "drv_vo.h"
#include "xmedia_vo.h"
#ifndef CFG_MAXARGS
#define CFG_MAXARGS 10
#endif
#define CFG_MAXARGS_SETVOBG 3
#define CFG_MAXARGS_STARTVO 4
#define CFG_MAXARGS_STOPVO 2
#define CFG_MAXARGS_STARTVL 8
#define CFG_MAXARGS_STOPVL 2
#define CFG_MAXARGS_STARTGX 9
#define CFG_MAXARGS_STOPGX 2
#define CMD_VO_ARGS_BASE10 10
#define CMD_VO_ARGS_BASE16 16
#define CMD_VO_ARGS_BASE_ALL 0
extern int init_vo(xmedia_void);
extern int deinit_vo(xmedia_void);
extern int set_vobg(unsigned int dev, unsigned int rgb);
extern int start_vo(unsigned int dev, xmedia_s32 screen_type);
extern int stop_vo(unsigned int dev);
extern int start_videolayer(unsigned int layer, unsigned long addr, unsigned int strd, xmedia_video_rect layer_rect);
extern int stop_videolayer(unsigned int layer);
extern int start_gx(unsigned int layer, unsigned long addr, unsigned int strd, xmedia_video_rect gx_rect);
extern int stop_gx(unsigned int layer);
extern int check_vo_support(unsigned int dev, xmedia_s32 screen_type);
static int do_initvo(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
init_vo();
return 0;
}
static int do_deinitvo(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
deinit_vo();
return 0;
}
static int do_startvo(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
xmedia_vo_dev dev = 0;
xmedia_s32 screen_type;
if (argc < 3) {
printf("insufficient parameter!\n");
printf("usage:\n%s\n", cmdtp->usage);
return -1;
}
dev = (unsigned int)simple_strtoul(argv[1], NULL, CMD_VO_ARGS_BASE10);
screen_type = (unsigned int)simple_strtoul(argv[2], NULL, CMD_VO_ARGS_BASE10);
if (check_vo_support(dev, screen_type)) {
printf("unsupported parameter!\n");
return -1;
}
start_vo(dev, screen_type);
return 0;
}
static int do_stopvo(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
xmedia_vo_dev dev = 0;
if (argc < 2) {
printf("insufficient parameter!\n");
printf("usage:\n%s\n", cmdtp->usage);
return -1;
}
dev = (unsigned int)simple_strtoul(argv[1], NULL, CMD_VO_ARGS_BASE10);
stop_vo(dev);
return 0;
}
static int start_layer_parse(char *const argv[], unsigned int *layer,
unsigned long *addr, unsigned int *strd, xmedia_video_rect *layer_rect)
{
int ret;
unsigned long layer_tmp, addr_tmp, strd_tmp, x_tmp, y_tmp, width_tmp, height_tmp;
ret = strict_strtoul(argv[1], CMD_VO_ARGS_BASE10, &layer_tmp); /* 1st arg */
if (ret != 0) {
printf("parse layer failed.\n");
return -1;
}
ret = strict_strtoul(argv[2], CMD_VO_ARGS_BASE16, &addr_tmp); /* 2nd arg */
if (ret != 0) {
printf("parse addr failed.\n");
return -1;
}
ret = strict_strtoul(argv[3], CMD_VO_ARGS_BASE10, &strd_tmp); /* 3rd arg */
if (ret != 0) {
printf("parse strd failed.\n");
return -1;
}
ret = strict_strtoul(argv[4], CMD_VO_ARGS_BASE10, &x_tmp); /* 4th arg */
if (ret != 0) {
printf("parse x failed.\n");
return -1;
}
ret = strict_strtoul(argv[5], CMD_VO_ARGS_BASE10, &y_tmp); /* 5th arg */
if (ret != 0) {
printf("parse y failed.\n");
return -1;
}
ret = strict_strtoul(argv[6], CMD_VO_ARGS_BASE10, &width_tmp); /* 6th arg */
if (ret != 0) {
printf("parse width failed.\n");
return -1;
}
ret = strict_strtoul(argv[7], CMD_VO_ARGS_BASE10, &height_tmp); /* 7th arg */
if (ret != 0) {
printf("parse height failed.\n");
return -1;
}
*layer = (unsigned int)layer_tmp;
*addr = addr_tmp;
*strd = (unsigned int)strd_tmp;
layer_rect->x = (unsigned int)x_tmp;
layer_rect->y = (unsigned int)y_tmp;
layer_rect->width = (unsigned int)width_tmp;
layer_rect->height = (unsigned int)height_tmp;
return 0;
}
static int do_startvl(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
int ret;
unsigned int layer, strd;
unsigned long addr;
xmedia_video_rect layer_rect;
if (argc < 8) { /* max 8 args */
printf("insufficient parameter!\n");
printf("usage:\n%s\n", cmdtp->usage);
return -1;
}
ret = start_layer_parse(argv, &layer, &addr, &strd, &layer_rect);
if (ret != 0) {
printf("insufficient parameter!\n");
return -1;
}
ret = start_videolayer(layer, addr, strd, layer_rect);
if (ret != 0) {
printf("start_videolayer error!\n");
return -1;
}
printf("video layer %u opened!\n", layer);
return 0;
}
static int do_stopvl(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
int ret;
unsigned long layer_tmp;
if (argc < 2) { /* max 8 args */
printf("insufficient parameter!\n");
printf("usage:\n%s\n", cmdtp->usage);
return -1;
}
ret = strict_strtoul(argv[1], CMD_VO_ARGS_BASE10, &layer_tmp); /* 1st arg */
if (ret != 0) {
printf("strict_strtoul error\n");
return -1;
}
stop_videolayer(layer_tmp);
return 0;
}
static int do_startgx(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
//todo
return 0;
}
static int do_stopgx(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
//todo
return 0;
}
U_BOOT_CMD(initvo, CFG_MAXARGS, 1, do_initvo,
"initvo", "initvo");
U_BOOT_CMD(deinitvo, CFG_MAXARGS, 1, do_deinitvo,
"deinitvo", "deinitvo");
U_BOOT_CMD(startvo, CFG_MAXARGS, 1, do_startvo,
"startvo - open vo device with a certain output interface.\n"
"\t- startvo [dev screen_type]",
"\nargs: [dev screen_type]\n"
"\t-<dev> : 0: DHD0, 1: DHD1\n"
"\t-<screen_type>: 0:MICROTECH_MTF050_LCD_800X480\n"
"\t-<screen_type>: 1:SATOZ_SAT935_MIPI_800X1280_RGB8888_24BIT\n"
"\t-<screen_type>: 2:SIL9024_BT1120_1920X1080P60\n"
"\t-<screen_type>: 3:MICROTECH_MTF101_FT01_LVDS_800X1280_RGB666_18BIT\n"
"\t-<screen_type>: 4:MICROTECH_MTF101_FS16_LVDS_1280X800_RGB888_24BIT\n"
"\t- ....");
U_BOOT_CMD(stopvo, CFG_MAXARGS, 1, do_stopvo,
"stopvo - close interface of vo device.\n"
"\t- stopvo [dev]",
"\nargs: [dev]\n"
"\t-<dev> : 0(HD0), 1: DHD1\n");
U_BOOT_CMD(startvl, CFG_MAXARGS, 1, do_startvl,
"startvl - open video layer.\n"
"\t- startvl [layer addr stride x y w h]\n",
"\nargs: [layer, addr, stride, x, y, w, h]\n"
"\t-<layer> : 0(V0)\n"
"\t-<addr> : picture address\n"
"\t-<stride> : picture stride\n"
"\t-<x,y,w,h> : display area\n");
U_BOOT_CMD(stopvl, CFG_MAXARGS, 1, do_stopvl,
"stopvl - close video layer.\n"
"\t- stopvl [layer]",
"\nargs: [layer]\n"
"\t-<layer> : 0(V0) 1(V1)\n");
U_BOOT_CMD(startgx, CFG_MAXARGS, 1, do_startgx,
"startgx - open graphics layer.\n"
"\t- startgx [layer addr stride x y w h]\n",
"\nargs: [layer, addr, stride, x, y, w, h]\n"
"\t-<layer> : 0(G0)\n"
"\t-<addr> : picture address\n"
"\t-<stride> : picture stride\n"
"\t-<x,y,w,h> : display area\n");
U_BOOT_CMD(stopgx, CFG_MAXARGS, 1, do_stopgx,
"stopgx - close graphics layer.\n"
"\t- stopgx [layer]",
"\nargs: [layer]\n"
"\t-<layer> : 0(G0)\n");
source/bootloader/product/driver/vo/common/drv_sys.c
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#include "drv_sys.h"
#include "sys_drv.h"
#include "sys_hal.h"
xmedia_s32 drv_sys_mod_ctrl(xmedia_chn_info *chn_info, sys_func_id func_id, xmedia_void *io_args)
{
xmedia_s32 ret = XMEDIA_FAILURE;
ret = sys_mod_ctrl(chn_info, func_id, io_args);
return ret;
}
source/bootloader/product/driver/vo/common/drv_sys.h
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef DRV_SYS_H
#define DRV_SYS_H
#include "drv_vo_comm.h"
#ifdef __cplusplus
extern "C" {
#endif /* End of #ifdef __cplusplus */
typedef enum {
SYS_VO_VOU_HD_CKSEL,
SYS_VO_VOU_PPC_CKSEL,
SYS_VO_LVDS_POR_SRST,
SYS_VO_MIPITX_PLL_REF_CKSEL,
SYS_VO_LVDS_CKSEL,
SYS_VO_LCD_DIV_CFG,
SYS_VO_PLL_DIV_CFG,
SYS_VO_VOU_HD_CKEN,
SYS_VO_VOU_SRST_REQ,
SYS_VO_VOU_SRST_GET,
SYS_VO_LCD_DIV_CKEN,
SYS_VO_PLL_DIV_CKEN,
SYS_VO_BT_HD_CKSEL,
SYS_VO_LCD_HD_CKSEL,
SYS_VO_MIPITX_HD_CKSEL,
SYS_VO_LVDSTX_HD_CKSEL,
SYS_VO_BT_PCTRL,
SYS_VO_LCD_PCTRL,
SYS_VO_MIPITX_PCTRL,
SYS_VO_LVDSTX_PCTRL,
SYS_VO_BT_CKEN,
SYS_VO_LCD_CKEN,
SYS_VO_MIPITX_CKEN,
SYS_VO_LVDSTX_CKEN,
SYS_MAX
} sys_func_id;
#ifndef xmedia_chn_info
typedef struct {
xmedia_mod_id mod_id;
xmedia_s32 dev_id;
xmedia_s32 chn_id;
} xmedia_chn_info;
#endif
xmedia_s32 drv_sys_mod_init(xmedia_void);
xmedia_void drv_sys_mod_exit(xmedia_void);
xmedia_s32 drv_sys_mod_ctrl(xmedia_chn_info *chn_info, sys_func_id func_id, xmedia_void *io_args);
#ifdef __cplusplus
}
#endif /* End of #ifdef __cplusplus */
#endif /* DRV_SYS_H */
source/bootloader/product/driver/vo/common/drv_sys_comm.h
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef __DRV_VO_SYS_H__
#define __DRV_VO_SYS_H__
#ifdef __cplusplus
extern "C" {
#endif
typedef unsigned char xmedia_uchar;
typedef unsigned char xmedia_u8;
typedef unsigned short xmedia_u16;
typedef unsigned int xmedia_u32;
typedef unsigned long long xmedia_u64;
typedef unsigned long xmedia_ulong;
typedef char xmedia_char;
typedef signed char xmedia_s8;
typedef short xmedia_s16;
typedef int xmedia_s32;
typedef long long xmedia_s64;
typedef long xmedia_slong;
typedef float xmedia_float;
typedef double xmedia_double;
typedef void xmedia_void;
typedef xmedia_u32 xmedia_handle;
typedef xmedia_ulong xmedia_uintptr_t;
typedef xmedia_slong xmedia_intptr_t;
typedef enum {
XMEDIA_FALSE = 0,
XMEDIA_TRUE = 1,
} xmedia_bool;
#define XMEDIA_NULL 0L
#define XMEDIA_SUCCESS 0
#define XMEDIA_FAILURE (-1)
#define XMEDIA_INVALID_HANDLE (0xffffffff)
#define XMEDIA_UNUSED(x) ((x) = (x))
#define XMEDIA_ERRCODE_INVALID_PARAM (xmedia_s32)(0x80010001)
#define XMEDIA_ERRCODE_NULL_PTR (xmedia_s32)(0x80010002)
#define XMEDIA_ERRCODE_NOT_ENOUGH_MEMORY (xmedia_s32)(0x80010003) // memory allocation fails
#define XMEDIA_ERRCODE_NOT_INIT (xmedia_s32)(0x80010004)
#define XMEDIA_ERRCODE_NOT_SUPPORT (xmedia_s32)(0x80010005)
#define XMEDIA_ERRCODE_TIMEOUT (xmedia_s32)(0x80010006)
#define XMEDIA_ERRCODE_BAD_ADDRESS (xmedia_s32)(0x80010007)
#define XMEDIA_ERRCODE_OPEN_FAILED (xmedia_s32)(0x80010008)
#define XMEDIA_ERRCODE_CLOSE_FAILED (xmedia_s32)(0x80010009)
#define XMEDIA_ERRCODE_CREATE_FAILED (xmedia_s32)(0x8001000A)
#define XMEDIA_ERRCODE_DESTROY_FAILED (xmedia_s32)(0x8001000B)
#define XMEDIA_ERRCODE_BUFFER_EMPTY (xmedia_s32)(0x8001000C)
#define XMEDIA_ERRCODE_BUFFER_FULL (xmedia_s32)(0x8001000D)
#define XMEDIA_ERRCODE_NO_BUFFER_FREE (xmedia_s32)(0x8001000E)
#define XMEDIA_ERRCODE_NOT_PERMITTED (xmedia_s32)(0x8001000F) // Operation not permitted
#define XMEDIA_ERRCODE_EXIST (xmedia_s32)(0x80010010) // Target exists
#define XMEDIA_ERRCODE_NOT_EXIST (xmedia_s32)(0x80010011) // Target does not exist
#define XMEDIA_ERRCODE_NOT_READY (xmedia_s32)(0x80010012) // Target not ready
#define XMEDIA_ERRCODE_BUSY (xmedia_s32)(0x80010013) // Device or resource busy
#define XMEDIA_ERRCODE_COPY_DATA_ERROR (xmedia_s32)(0x80010014)
#define XMEDIA_ERRCODE_TYPE_ERROR (xmedia_s32)(0x80010015)
#define XMEDIA_ERRCODE_CHN_FULL (xmedia_s32)(0x80010016)
#define XMEDIA_ERRCODE_INVALID_CHN_ID (xmedia_s32)(0x80010017)
#define XMEDIA_ERRCODE_INVALID_DEV_ID (xmedia_s32)(0x80010018)
#define XMEDIA_ERRCODE_INVALID_PIPE_ID (xmedia_s32)(0x80010019)
#define XMEDIA_ERRCODE_INVALID_GRP_ID (xmedia_s32)(0x8001001A)
#define XMEDIA_ERRCODE_NOT_CONFIG (xmedia_s32)(0x8001001B)
#define XMEDIA_ERRCODE_NOT_ENABLE (xmedia_s32)(0x8001001C)
#define XMEDIA_ERRCODE_NOT_DISABLE (xmedia_s32)(0x8001001D)
#define XMEDIA_ERRCODE_NOT_BIND (xmedia_s32)(0x8001001E)
#define XMEDIA_ERRCODE_BINDED (xmedia_s32)(0x8001001F)
#define MODULE_DBG_EMERG 0
#define MODULE_DBG_ALERT 1
#define MODULE_DBG_CRIT 2
#define MODULE_DBG_ERR 3
#define MODULE_DBG_WARN 4
#define MODULE_DBG_NOTICE 5
#define MODULE_DBG_INFO 6
#define MODULE_DBG_DEBUG 7
#define ALIGN_NUM 4
#define MODULE_USR_DEFAULT_DBG MODULE_DBG_ERR // 用户态日志管理初始化失败时各模块的打印等级
#define ATTRIBUTE __attribute__((aligned (ALIGN_NUM)))
typedef enum {
MOD_ID_VB = 0,
MOD_ID_SYS = 1,
MOD_ID_LOG = 2,
MOD_ID_RGN = 3,
MOD_ID_CHNL = 4,
MOD_ID_VI = 5,
MOD_ID_VO = 6,
MOD_ID_DIS = 7,
MOD_ID_AVS = 8,
MOD_ID_VPSS = 9,
MOD_ID_ISP = 10,
MOD_ID_FB = 11,
MOD_ID_GDC = 12,
MOD_ID_TDE = 13,
MOD_ID_VGS = 14,
MOD_ID_MCF = 15,
MOD_ID_HDMI = 16,
MOD_ID_VDEC = 17,
MOD_ID_VENC = 18,
MOD_ID_VPU = 19,
MOD_ID_VALG = 20,
MOD_ID_RC = 21,
MOD_ID_JPEGE = 22,
MOD_ID_JPEGD = 23,
MOD_ID_H264E = 24,
MOD_ID_H264D = 25,
MOD_ID_H265E = 26,
MOD_ID_AIO = 29,
MOD_ID_AI = 30,
MOD_ID_AO = 31,
MOD_ID_AENC = 32,
MOD_ID_ADEC = 33,
MOD_ID_ACOMM = 34,
MOD_ID_NPU = 35,
MOD_ID_IVE = 36,
MOD_ID_USER = 37,
MOD_ID_PM = 38,
MOD_ID_GYRODIS = 39,
MOD_ID_IR = 40,
MOD_ID_NPU_SVP = 41,
MOD_ID_DDR_OST_QOS = 42,
MOD_ID_CIPHER = 43,
MOD_ID_MAX,
} xmedia_mod_id;
typedef struct {
xmedia_u32 width;
xmedia_u32 height;
} xmedia_video_size;
typedef struct {
xmedia_s32 x;
xmedia_s32 y;
xmedia_u32 width;
xmedia_u32 height;
} xmedia_video_rect;
typedef enum {
/* Semi-Planner */
XMEDIA_VIDEO_PIXEL_FMT_YUV_SEMIPLANAR_420 = 0,
XMEDIA_VIDEO_PIXEL_FMT_YVU_SEMIPLANAR_420,
XMEDIA_VIDEO_PIXEL_FMT_YUV_SEMIPLANAR_422,
XMEDIA_VIDEO_PIXEL_FMT_YVU_SEMIPLANAR_422,
XMEDIA_VIDEO_PIXEL_FMT_YUV_SEMIPLANAR_444,
XMEDIA_VIDEO_PIXEL_FMT_YVU_SEMIPLANAR_444,
/* Package */
XMEDIA_VIDEO_PIXEL_FMT_YUYV_PACKAGE_422 = 0x40,
XMEDIA_VIDEO_PIXEL_FMT_YVYU_PACKAGE_422,
XMEDIA_VIDEO_PIXEL_FMT_UYVY_PACKAGE_422,
XMEDIA_VIDEO_PIXEL_FMT_VYUY_PACKAGE_422,
XMEDIA_VIDEO_PIXEL_FMT_YYUV_PACKAGE_422,
XMEDIA_VIDEO_PIXEL_FMT_YYVU_PACKAGE_422,
XMEDIA_VIDEO_PIXEL_FMT_UVYY_PACKAGE_422,
XMEDIA_VIDEO_PIXEL_FMT_VUYY_PACKAGE_422,
XMEDIA_VIDEO_PIXEL_FMT_VY1UY0_PACKAGE_422,
/*yuv 400 */
XMEDIA_VIDEO_PIXEL_FMT_YUV_400 = 0x90,
/*RGB*/
XMEDIA_VIDEO_PIXEL_FMT_ARGB_1555 = 0xC0,
XMEDIA_VIDEO_PIXEL_FMT_ARGB_4444,
XMEDIA_VIDEO_PIXEL_FMT_ARGB_8888,
XMEDIA_VIDEO_PIXEL_FMT_ABGR_1555,
XMEDIA_VIDEO_PIXEL_FMT_ABGR_4444,
XMEDIA_VIDEO_PIXEL_FMT_ABGR_8888,
XMEDIA_VIDEO_PIXEL_FMT_RGBA_1555,
XMEDIA_VIDEO_PIXEL_FMT_RGBA_4444,
XMEDIA_VIDEO_PIXEL_FMT_RGBA_8888,
XMEDIA_VIDEO_PIXEL_FMT_BGRA_1555,
XMEDIA_VIDEO_PIXEL_FMT_BGRA_4444,
XMEDIA_VIDEO_PIXEL_FMT_BGRA_8888,
XMEDIA_VIDEO_PIXEL_FMT_RGB_565,
XMEDIA_VIDEO_PIXEL_FMT_RGB_888,
XMEDIA_VIDEO_PIXEL_FMT_BGR_565,
XMEDIA_VIDEO_PIXEL_FMT_BGR_888,
/*CLUT*/
XMEDIA_VIDEO_PIXEL_FMT_CLUT2 = 0x100,
XMEDIA_VIDEO_PIXEL_FMT_CLUT4,
XMEDIA_VIDEO_PIXEL_FMT_CLUT8,
/*RAW*/
XMEDIA_VIDEO_PIXEL_FMT_RAW = 0x110,
XMEDIA_VIDEO_PIXEL_FMT_MAX = 0x120
} xmedia_video_pixel_format;
typedef enum {
XMEDIA_VIDEO_FMT_LINEAR = 0x0,
XMEDIA_VIDEO_FMT_TILE_16x4,
XMEDIA_VIDEO_FMT_TILE_32x4,
XMEDIA_VIDEO_FMT_TILE_64x4,
XMEDIA_VIDEO_FMT_TILE_64x64,
XMEDIA_VIDEO_FMT_MAX
} xmedia_video_format;
/*维度：
*yuv、RGB、RAW
*有损/无损,
*行、帧、段紧凑、段非紧凑
*/
typedef enum {
XMEDIA_VIDEO_COMPRESS_MODE_NONE = 0x0,
XMEDIA_VIDEO_COMPRESS_MODE_LINE, // 3DNR 使用行压缩
XMEDIA_VIDEO_COMPRESS_MODE_FRAME,
XMEDIA_VIDEO_COMPRESS_MODE_SEG,
XMEDIA_VIDEO_COMPRESS_MODE_TILE,
XMEDIA_VIDEO_COMPRESS_MODE_SLICE,
XMEDIA_VIDEO_COMPRESS_MODE_MAX
} xmedia_video_compress_mode;
typedef enum {
XMEDIA_VIDEO_COLOR_SPACE_YUV = 0x0,
XMEDIA_VIDEO_COLOR_SPACE_RGB,
XMEDIA_VIDEO_COLOR_SPACE_MAX
} xmedia_video_color_space;
typedef enum {
XMEDIA_VIDEO_COLOR_GAMUT_BT601 = 0x0,
XMEDIA_VIDEO_COLOR_GAMUT_BT709,
XMEDIA_VIDEO_COLOR_GAMUT_BT2020,
XMEDIA_VIDEO_COLOR_GAMUT_USER,
XMEDIA_VIDEO_COLOR_GAMUT_MAX
} xmedia_video_color_gamut;
typedef enum {
XMEDIA_VIDEO_COLOR_LIMITED_RANGE = 0x0,
XMEDIA_VIDEO_COLOR_FULL_RANGE,
XMEDIA_VIDEO_COLOR_RANGE_MAX
} xmedia_video_color_quantify_range;
typedef struct {
xmedia_video_color_space color_space;
xmedia_video_color_gamut color_gamut;
xmedia_video_color_quantify_range quantify_range;
} xmedia_video_color_descript;
typedef enum {
XMEDIA_VIDEO_DYNAMIC_RANGE_SDR = 0x0,
XMEDIA_VIDEO_DYNAMIC_RANGE_HDR10,
XMEDIA_VIDEO_DYNAMIC_RANGE_HLG,
XMEDIA_VIDEO_DYNAMIC_RANGE_MAX
} xmedia_video_dynamic_range;
typedef enum {
XMEDIA_VIDEO_DATA_WIDTH_8 = 0x0,
XMEDIA_VIDEO_DATA_WIDTH_10,
XMEDIA_VIDEO_DATA_WIDTH_12,
XMEDIA_VIDEO_DATA_WIDTH_14,
XMEDIA_VIDEO_DATA_WIDTH_16,
XMEDIA_VIDEO_DATA_WIDTH_MAX
} xmedia_video_data_width;
typedef struct {
xmedia_u64 isp_info_phy_addr;
xmedia_u64 lowdelay_info_phy_addr;
xmedia_u64 vdec_info_phy_addr;
xmedia_void *ATTRIBUTE isp_info_vir_addr;
xmedia_void *ATTRIBUTE lowdelay_info_vir_addr;
xmedia_void *ATTRIBUTE vdec_info_vir_addr;
} xmedia_video_private_info;
typedef struct {
xmedia_u64 y_head_phy_addr;
xmedia_u64 c_head_phy_addr;
xmedia_u64 y_phy_addr;
xmedia_u64 c_phy_addr;
// xmedia_u64 y_buf_phy_addr; // luma buffer start phy addr
// xmedia_u64 c_buf_phy_addr; // chroma buffer start phy addr
// xmedia_u32 y_size; // luma buffer size
// xmedia_u32 c_size; // chroma buffer size
} xmedia_video_frame_address;
typedef struct {
xmedia_u32 y_head_stride;
xmedia_u32 c_head_stride;
xmedia_u32 y_stride;
xmedia_u32 c_stride;
} xmedia_video_frame_stride;
typedef struct {
xmedia_u32 index;
xmedia_u32 width;
xmedia_u32 height;
xmedia_video_frame_address addr;
xmedia_video_frame_stride stride;
xmedia_video_data_width bit_width;
xmedia_video_pixel_format pixel_fmt;
xmedia_video_compress_mode compress_mode;
xmedia_video_format video_fmt;
xmedia_video_dynamic_range dynamic_range;
xmedia_video_color_descript color_info;
xmedia_u64 pts;
xmedia_u32 time_ref;
xmedia_u32 frame_flag;
xmedia_video_private_info priv_info;
} xmedia_video_frame;
typedef struct {
xmedia_video_frame frame;
xmedia_u32 pool_id;
xmedia_mod_id mod_id;
} xmedia_video_frame_info;
typedef enum {
XMEDIA_INTF_MIPI_CSI_DATA_TYPE_RAW_8BIT = 0,
XMEDIA_INTF_MIPI_CSI_DATA_TYPE_RAW_10BIT,
XMEDIA_INTF_MIPI_CSI_DATA_TYPE_RAW_12BIT,
XMEDIA_INTF_MIPI_CSI_DATA_TYPE_RAW_14BIT,
XMEDIA_INTF_MIPI_CSI_DATA_TYPE_RAW_16BIT,
XMEDIA_INTF_MIPI_CSI_DATA_TYPE_RAW_20BIT,
XMEDIA_INTF_MIPI_CSI_DATA_TYPE_RAW_24BIT,
XMEDIA_INTF_MIPI_CSI_DATA_TYPE_YUV420_8BIT,
XMEDIA_INTF_MIPI_CSI_DATA_TYPE_YUV420_LEGACY_8BIT,
XMEDIA_INTF_MIPI_CSI_DATA_TYPE_YUV422_8BIT,
XMEDIA_INTF_MIPI_CSI_DATA_TYPE_MAX
} xmedia_intf_mipi_csi_data_type;
typedef enum {
XMEDIA_INTF_MIPI_DSI_DATA_TYPE_YUV422_16BIT = 0,
XMEDIA_INTF_MIPI_DSI_DATA_TYPE_RGB666_18BIT,
XMEDIA_INTF_MIPI_DSI_DATA_TYPE_RGB888_24BIT,
XMEDIA_INTF_MIPI_DSI_DATA_TYPE_MAX
} xmedia_intf_mipi_dsi_data_type;
typedef enum {
XMEDIA_INTF_BT_DATA_TYPE_YUV422_8BIT = 0,
XMEDIA_INTF_BT_DATA_TYPE_YUV422_10BIT,
XMEDIA_INTF_BT_DATA_TYPE_MAX
} xmedia_intf_bt_data_type;
typedef enum {
XMEDIA_INTF_LCD_DATA_TYPE_RGB565_16BIT = 0,
XMEDIA_INTF_LCD_DATA_TYPE_RGB666_18BIT,
XMEDIA_INTF_LCD_DATA_TYPE_RGB888_24BIT,
XMEDIA_INTF_LCD_DATA_TYPE_MAX
} xmedia_intf_lcd_data_type;
typedef enum {
XMEDIA_INTF_LVDS_DATA_TYPE_RGB666_18BIT = 0,
XMEDIA_INTF_LVDS_DATA_TYPE_RGB666_36BIT,
XMEDIA_INTF_LVDS_DATA_TYPE_RGB888_24BIT,
XMEDIA_INTF_LVDS_DATA_TYPE_RGB888_48BIT,
XMEDIA_INTF_LVDS_DATA_TYPE_MAX
} xmedia_intf_lvds_data_type;
typedef enum {
XMEDIA_INTF_DC_DATA_TYPE_RAW_8BIT = 0,
XMEDIA_INTF_DC_DATA_TYPE_RAW_10BIT,
XMEDIA_INTF_DC_DATA_TYPE_RAW_12BIT,
XMEDIA_INTF_DC_DATA_TYPE_RAW_14BIT,
XMEDIA_INTF_DC_DATA_TYPE_RAW_16BIT,
XMEDIA_INTF_DC_DATA_TYPE_MAX
} xmedia_intf_dc_data_type;
typedef enum {
XMEDIA_INTF_TYPE_BT601 = 0,
XMEDIA_INTF_TYPE_BT656,
XMEDIA_INTF_TYPE_BT1120,
XMEDIA_INTF_TYPE_MIPI_CSI,
XMEDIA_INTF_TYPE_MIPI_DSI,
XMEDIA_INTF_TYPE_LCD,
XMEDIA_INTF_TYPE_LVDS,
XMEDIA_INTF_TYPE_DC,
XMEDIA_INTF_TYPE_MCU,
XMEDIA_INTF_TYPE_MAX
} xmedia_intf_type;
/* bt601&bt656 */
typedef enum {
XMEDIA_INTF_BT601_BT656_DATA_SEQ_UYVY = 0,
XMEDIA_INTF_BT601_BT656_DATA_SEQ_VYUY,
XMEDIA_INTF_BT601_BT656_DATA_SEQ_YUYV,
XMEDIA_INTF_BT601_BT656_DATA_SEQ_YVYU,
XMEDIA_INTF_BT601_BT656_DATA_SEQ_MAX
} xmedia_intf_bt601_bt656_data_seq;
typedef enum {
XMEDIA_INTF_BT1120_DATA_SEQ_VUVU = 0,
XMEDIA_INTF_BT1120_DATA_SEQ_UVUV,
XMEDIA_INTF_BT1120_DATA_SEQ_MAX,
} xmedia_intf_bt1120_data_seq;
typedef enum {
XMEDIA_INTF_LCD_DATA_SEQ_RGB = 0,
XMEDIA_INTF_LCD_DATA_SEQ_RBG,
XMEDIA_INTF_LCD_DATA_SEQ_GRB,
XMEDIA_INTF_LCD_DATA_SEQ_GBR,
XMEDIA_INTF_LCD_DATA_SEQ_BRG,
XMEDIA_INTF_LCD_DATA_SEQ_BGR,
XMEDIA_INTF_LCD_DATA_SEQ_MAX,
} xmedia_intf_lcd_data_seq;
typedef enum {
XMEDIA_INTF_LVDS_FORMAT_VESA = 0,
XMEDIA_INTF_LVDS_FORMAT_JEIDA,
XMEDIA_INTF_LVDS_FORMAT_MAX
} xmedia_intf_lvds_format;
#ifdef __cplusplus
}
#endif
#endif
source/bootloader/product/driver/vo/common/drv_vo_comm.h
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef __DRV_VO_COMMON_H__
#define __DRV_VO_COMMON_H__
#include <net.h>
#include <exports.h>
#include <serial.h>
#include <xyzModem.h>
#include "xmedia_vo.h"
#ifdef __cplusplus
extern "C" {
#endif
#define VO_MIN_CHN_WIDTH 32
#define VO_MIN_CHN_HEIGHT 32
#define VO_MAX_ZOOM_RATIO 1000
#define VO_MAX_DEV_NUM 4
#define VO_MAX_LAYER_NUM 4
#define VO_MAX_CHN_NUM 4
#define VO_MIN_TOLERATE 1
#define VO_MAX_TOLERATE 100000
#define VO_INVALID_CHN_ID VO_MAX_CHN_NUM
#define VO_INVALID_NODE_INDEX 0
#ifdef xmorca
#define XMEDIA_VO_REAL_DEV_NUM XMEDIA_VO_DEV_1
#define XMEDIA_VO_REAL_LAYER_NUM XMEDIA_VO_LAYER_V1
#define XMEDIA_VO_VIRT_DEV_NUM 1
#define XMEDIA_VO_VIRT_LAYER_NUM 1
#endif
#ifdef xmfalcon
#define XMEDIA_VO_REAL_DEV_NUM XMEDIA_VO_DEV_VIRT_0
#define XMEDIA_VO_REAL_LAYER_NUM XMEDIA_VO_LAYER_VIRT_V0
#define XMEDIA_VO_VIRT_DEV_NUM 2
#define XMEDIA_VO_VIRT_LAYER_NUM 2
#endif
#define VO_CHECK_VAILD_DEV(dev) ((((dev) >= (XMEDIA_VO_DEV_0)) && ((dev) < (XMEDIA_VO_REAL_DEV_NUM))) || \
(((dev) >= (XMEDIA_VO_DEV_VIRT_0)) && ((dev) < ((XMEDIA_VO_DEV_VIRT_0) + (XMEDIA_VO_VIRT_DEV_NUM)))))
#define VO_CHECK_REAL_DEV(dev) (((dev) >= (XMEDIA_VO_DEV_0)) && ((dev) < (XMEDIA_VO_REAL_DEV_NUM)))
#define VO_CHECK_VIRT_DEV(dev) (((dev) >= XMEDIA_VO_DEV_VIRT_0) && \
((dev) < ((XMEDIA_VO_DEV_VIRT_0) + (XMEDIA_VO_VIRT_DEV_NUM))))
#define VO_CHECK_VAILD_LAYER(layer) ((((layer) >= (XMEDIA_VO_LAYER_V0)) && ((layer) < (XMEDIA_VO_REAL_LAYER_NUM))) || \
(((layer) >= (XMEDIA_VO_LAYER_VIRT_V0)) && ((layer) < ((XMEDIA_VO_LAYER_VIRT_V0) + (XMEDIA_VO_VIRT_LAYER_NUM)))))
#define VO_TRACE(level, fmt, ...) \
do { \
if (level <= MODULE_DBG_ERR) { \
printf("[Func]:%s [Line]:%d [Info]:" fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__); \
} \
} while (0)
#define CHECK_VO_PTR_RETURN(pointer) \
do { \
if ((pointer) == XMEDIA_NULL) { \
VO_TRACE(MODULE_DBG_ERR,"vo para is null ptr.\n"); \
return XMEDIA_ERRCODE_NULL_PTR; \
} \
} while (0)
#define CHECK_VO_DEV_ID_RETURN(dev) \
do { \
if (dev >= XMEDIA_VO_DEV_MAX) { \
VO_TRACE(MODULE_DBG_ERR,"vo dev %d is invalid.\n",dev); \
return XMEDIA_ERRCODE_INVALID_DEV_ID; \
} \
} while (0)
#define CHECK_VO_DEV_ID(dev) \
do { \
if (dev >= XMEDIA_VO_DEV_MAX) { \
VO_TRACE(MODULE_DBG_ERR,"vo dev %d is invalid.\n",dev); \
return; \
} \
} while (0)
#define CHECK_VO_LAYER_ID_RETURN(layer) \
do { \
if (layer >= XMEDIA_VO_LAYER_MAX){ \
VO_TRACE(MODULE_DBG_ERR,"vo layer %d is invalid.\n",layer); \
return XMEDIA_ERRCODE_INVALID_GRP_ID; \
} \
} while (0)
#define CHECK_VO_CHN_ID_RETURN(chn) \
do { \
if ((chn < 0) || (chn >= VO_MAX_CHN_NUM)) { \
VO_TRACE(MODULE_DBG_ERR,"vo chn %d is invalid.\n",chn); \
return XMEDIA_ERRCODE_INVALID_CHN_ID; \
} \
} while (0)
#define CHECK_VO_ZERO_RETURN(value) \
do { \
if (value == 0) { \
VO_TRACE(MODULE_DBG_ERR,"a denominator of 0 is illegal\n"); \
return XMEDIA_ERRCODE_NOT_PERMITTED; \
} \
} while (0)
#define IS_ALIGN(x, bitw) (((x % bitw) == 0) ? XMEDIA_TRUE : XMEDIA_FALSE)
#define osal_memset(ptr, value, len) memset(ptr, value, len)
#define osal_mdelay(msecs) mdelay(msecs)
#define osal_memcpy(dst, src, size) memcpy(dst, src, size)
#define osal_udelay(usecs) udelay(usecs)
#define osal_vmalloc(size) malloc(size)
#define osal_vfree(addr) free(addr)
typedef enum {
VO_ISR_INTERRUPT_TYPE = 0,
VO_ISR_INTERRUPT_TYPE_DHD0_VTT0 = 0x1,
VO_ISR_INTERRUPT_TYPE_DHD0_VTT1 = 0x2,
VO_ISR_INTERRUPT_TYPE_DHD0_VTT2 = 0x4,
VO_ISR_INTERRUPT_TYPE_DHD0_VTT3 = 0x8,
VO_ISR_INTERRUPT_TYPE_DHD0_UFINT = 0x10000, //low band width
VO_ISR_INTERRUPT_TYPE_DHD1_VTT0 = 0x10,
VO_ISR_INTERRUPT_TYPE_DHD1_VTT1 = 0x20,
VO_ISR_INTERRUPT_TYPE_DHD1_VTT2 = 0x40,
VO_ISR_INTERRUPT_TYPE_DHD1_VTT3 = 0x80,
VO_ISR_INTERRUPT_TYPE_DHD1_UFINT = 0x20000,
VO_ISR_INTERRUPT_TYPE_LOW_DELAY_CERR = 0x100000,
VO_ISR_INTERRUPT_TYPE_LOW_DELAY_YERR = 0x200000,
VO_ISR_INTERRUPT_TYPE_BUSR_ERR = 0x1000000,
VO_ISR_INTERRUPT_TYPE_BUSW_ERR = 0x2000000,
VO_ISR_INTERRUPT_TYPE_ALL = 0xffffffff,
} vo_isr_interrupt_type;
typedef enum {
VO_ISR_FIELD_FLAG_FRAME = 0,
VO_ISR_FIELD_FLAG_TOP,
VO_ISR_FIELD_FLAG_BOTTOM,
VO_ISR_FIELD_FLAG_TOP_BOTTOM,
VO_ISR_FIELD_FLAG_MAX
} vo_isr_field_flag;
#ifdef xmorca
typedef enum {
VO_CSC_YUV2RGB_601_LIMIT2FULL = 0,
VO_CSC_YUV2RGB_709_LIMIT2FULL,
VO_CSC_YUV2RGB_601_FULL2LIMIT,
VO_CSC_YUV2RGB_709_FULL2LIMIT,
VO_CSC_YUV2RGB_601_FULL2FULL,
VO_CSC_YUV2RGB_709_FULL2FULL,
VO_CSC_YUV2RGB_601_LIMIT2LIMIT,
VO_CSC_YUV2RGB_709_LIMIT2LIMIT,
VO_CSC_YUV2YUV_601_601_LIMIT2LIMIT = 8,
VO_CSC_YUV2YUV_601_709_LIMIT2LIMIT,
VO_CSC_YUV2YUV_709_601_LIMIT2LIMIT,
VO_CSC_YUV2YUV_709_709_LIMIT2LIMIT,
VO_CSC_YUV2YUV_601_601_FULL2FULL = 12,
VO_CSC_YUV2YUV_601_709_FULL2FULL,
VO_CSC_YUV2YUV_709_601_FULL2FULL,
VO_CSC_YUV2YUV_709_709_FULL2FULL,
VO_CSC_YUV2YUV_601_601_LIMIT2FULL = 16,
VO_CSC_YUV2YUV_601_709_LIMIT2FULL,
VO_CSC_YUV2YUV_709_601_LIMIT2FULL,
VO_CSC_YUV2YUV_709_709_LIMIT2FULL,
VO_CSC_YUV2YUV_601_601_FULL2LIMIT = 20,
VO_CSC_YUV2YUV_601_709_FULL2LIMIT,
VO_CSC_YUV2YUV_709_601_FULL2LIMIT,
VO_CSC_YUV2YUV_709_709_FULL2LIMIT,
VO_CSC_MAX
} vo_csc_type;
#endif
#ifdef xmfalcon
typedef enum {
VO_CSC_YUV2RGB_601_LIMIT2FULL = 0,
VO_CSC_YUV2RGB_709_LIMIT2FULL,
VO_CSC_YUV2RGB_2020_LIMIT2FULL,
VO_CSC_YUV2RGB_601_FULL2LIMIT,
VO_CSC_YUV2RGB_709_FULL2LIMIT,
VO_CSC_YUV2RGB_2020_FULL2LIMIT,
VO_CSC_YUV2RGB_601_FULL2FULL,
VO_CSC_YUV2RGB_709_FULL2FULL,
VO_CSC_YUV2RGB_2020_FULL2FULL,
VO_CSC_YUV2RGB_601_LIMIT2LIMIT,
VO_CSC_YUV2RGB_709_LIMIT2LIMIT,
VO_CSC_YUV2RGB_2020_LIMIT2LIMIT,
VO_CSC_RGB2YUV_601_LIMIT2FULL = 12,
VO_CSC_RGB2YUV_709_LIMIT2FULL,
VO_CSC_RGB2YUV_2020_LIMIT2FULL,
VO_CSC_RGB2YUV_601_FULL2LIMIT,
VO_CSC_RGB2YUV_709_FULL2LIMIT,
VO_CSC_RGB2YUV_2020_FULL2LIMIT,
VO_CSC_RGB2YUV_601_FULL2FULL,
VO_CSC_RGB2YUV_709_FULL2FULL,
VO_CSC_RGB2YUV_2020_FULL2FULL,
VO_CSC_RGB2YUV_601_LIMIT2LIMIT,
VO_CSC_RGB2YUV_709_LIMIT2LIMIT,
VO_CSC_RGB2YUV_2020_LIMIT2LIMIT,
VO_CSC_YUV2YUV_601_601_LIMIT2LIMIT = 24,
VO_CSC_YUV2YUV_601_709_LIMIT2LIMIT,
VO_CSC_YUV2YUV_601_2020_LIMIT2LIMIT,
VO_CSC_YUV2YUV_709_601_LIMIT2LIMIT,
VO_CSC_YUV2YUV_709_709_LIMIT2LIMIT,
VO_CSC_YUV2YUV_709_2020_LIMIT2LIMIT,
VO_CSC_YUV2YUV_2020_601_LIMIT2LIMIT,
VO_CSC_YUV2YUV_2020_709_LIMIT2LIMIT,
VO_CSC_YUV2YUV_2020_2020_LIMIT2LIMIT,
VO_CSC_YUV2YUV_601_601_FULL2FULL = 33,
VO_CSC_YUV2YUV_601_709_FULL2FULL,
VO_CSC_YUV2YUV_601_2020_FULL2FULL,
VO_CSC_YUV2YUV_709_601_FULL2FULL,
VO_CSC_YUV2YUV_709_709_FULL2FULL,
VO_CSC_YUV2YUV_709_2020_FULL2FULL,
VO_CSC_YUV2YUV_2020_601_FULL2FULL,
VO_CSC_YUV2YUV_2020_709_FULL2FULL,
VO_CSC_YUV2YUV_2020_2020_FULL2FULL,
VO_CSC_YUV2YUV_601_601_LIMIT2FULL = 42,
VO_CSC_YUV2YUV_601_709_LIMIT2FULL,
VO_CSC_YUV2YUV_601_2020_LIMIT2FULL,
VO_CSC_YUV2YUV_709_601_LIMIT2FULL,
VO_CSC_YUV2YUV_709_709_LIMIT2FULL,
VO_CSC_YUV2YUV_709_2020_LIMIT2FULL,
VO_CSC_YUV2YUV_2020_601_LIMIT2FULL,
VO_CSC_YUV2YUV_2020_709_LIMIT2FULL,
VO_CSC_YUV2YUV_2020_2020_LIMIT2FULL,
VO_CSC_YUV2YUV_601_601_FULL2LIMIT = 51,
VO_CSC_YUV2YUV_601_709_FULL2LIMIT,
VO_CSC_YUV2YUV_601_2020_FULL2LIMIT,
VO_CSC_YUV2YUV_709_601_FULL2LIMIT,
VO_CSC_YUV2YUV_709_709_FULL2LIMIT,
VO_CSC_YUV2YUV_709_2020_FULL2LIMIT,
VO_CSC_YUV2YUV_2020_601_FULL2LIMIT,
VO_CSC_YUV2YUV_2020_709_FULL2LIMIT,
VO_CSC_YUV2YUV_2020_2020_FULL2LIMIT,
VO_CSC_RGB2RGB_LIMIT2LIMIT = 60,
VO_CSC_RGB2RGB_FULL2FULL,
VO_CSC_RGB2RGB_FULL2LIMIT,
VO_CSC_RGB2RGB_LIMIT2FULL,
VO_CSC_MAX
} vo_csc_type;
#endif
typedef struct {
vo_csc_type csc_type;
xmedia_u32 luma;
xmedia_u32 contrast;
xmedia_u32 hue;
xmedia_u32 saturation;
} vo_pic_info;
typedef struct {
xmedia_u64 lum_addr;
xmedia_u64 chm_addr;
xmedia_u32 lum_stride;
xmedia_u32 chm_stride;
} vo_addr;
typedef struct {
xmedia_bool config;
xmedia_bool enable;
xmedia_u32 chn; //硬件region区域 所对应的软件chn号
xmedia_video_rect src_rect;
xmedia_video_rect dst_rect;
xmedia_video_rect lba_rect;
xmedia_u32 lba_color;
vo_addr region_addr;
} vo_region_info;
typedef struct {
xmedia_bool mute_en;
xmedia_video_rect frame_rect; //真实内容 相对于显示窗口的rect
xmedia_video_rect video_rect; //层 相对于显示窗口的rect
xmedia_video_rect lba_rect;
xmedia_u32 lba_color;
vo_addr frame_addr;
} vo_layer_single_cfg;
typedef struct {
xmedia_video_rect reso_rect;
xmedia_video_rect disp_rect;
xmedia_u32 region_id;
xmedia_bool region_overlap;
xmedia_u32 overlap_id;
xmedia_u32 region_sort;
vo_region_info region[VO_MAX_CHN_NUM]; //硬件region区域配置
} vo_layer_multi_cfg;
typedef struct {
xmedia_bool bt656_intf_en;
xmedia_bool bt1120_intf_en;
xmedia_bool lcd_intf_en;
xmedia_bool mipi_intf_en;
xmedia_bool lvds_intf_en;
xmedia_vo_dev dev;
} vo_dev_intf_type_mux;
#ifdef __cplusplus
}
#endif
#endif
source/bootloader/product/driver/vo/common/xmfalcon/drv_reg_crg.h
Executable
+22
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef DRV_REG_CRG_H
#define DRV_REG_CRG_H
#define CRG_REGS_ADDR 0x12010000
#define CRG_REGS_SIZE 0X10000
#define CRG_PERCTL0_ADDR (CRG_REGS_ADDR + 0x0)
#define CRG_PERCTL1_ADDR (CRG_REGS_ADDR + 0x4)
#define CRG_PERCTL2_ADDR (CRG_REGS_ADDR + 0x8)
#define CRG_PERCTL50_ADDR (CRG_REGS_ADDR + 0xc8)
#define CRG_PERCTL65_ADDR (CRG_REGS_ADDR + 0x104)
#define CRG_PERCTL66_ADDR (CRG_REGS_ADDR + 0x108)
#define CRG_PERCTL67_ADDR (CRG_REGS_ADDR + 0x10c)
#define CRG_PERCTL121_ADDR (CRG_REGS_ADDR + 0x1e4)
#endif
source/bootloader/product/driver/vo/common/xmfalcon/drv_reg_sys.h
Executable
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef DRV_REG_SYS_H
#define DRV_REG_SYS_H
#define SYS_REGS_ADDR 0x12020000
#define SYS_REGS_SIZE 0x8000
#define MISC_REGS_ADDR 0x12028000
#define MISC_REGS_SIZE 0x8000
#endif
source/bootloader/product/driver/vo/common/xmfalcon/sys_drv.c
Executable
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#include "common.h"
#include "sys_drv.h"
#include "sys_hal.h"
#include "drv_sys.h"
#include "xmedia_vo.h"
#include "drv_vo_comm.h"
#ifdef __cplusplus
extern "C" {
#endif /* End of #ifdef __cplusplus */
#define PHASE 32
#define SYS_MULTI_V 1048576
#define SYS_MULTI_H 1048576
xmedia_s32 sys_mod_init(xmedia_void)
{
xmedia_s32 ret;
ret = sys_hal_init();
return ret;
}
xmedia_s32 sys_mod_exit(xmedia_void)
{
sys_hal_exit();
return XMEDIA_SUCCESS;
}
xmedia_s32 sys_mod_ctrl(xmedia_chn_info *chn_info, sys_func_id func_id, xmedia_void *io_args)
{
xmedia_s32 dev;
dev = chn_info->dev_id;
switch (func_id) {
case SYS_VO_VOU_HD_CKSEL:{
xmedia_u32 *vou_hd_sel = XMEDIA_NULL;
vou_hd_sel = (xmedia_u32 *)io_args;
sys_hal_vo_vou_hd_sel(dev, *vou_hd_sel);
break;
}
case SYS_VO_VOU_PPC_CKSEL: {
xmedia_u32 *vou_ppc_cksel = XMEDIA_NULL;
vou_ppc_cksel = (xmedia_u32 *)io_args;
sys_hal_vo_vou_ppc_cksel(*vou_ppc_cksel);
break;
}
case SYS_VO_LVDS_POR_SRST: {
xmedia_bool *lvd_por_srst = XMEDIA_NULL;
lvd_por_srst = (xmedia_bool *)io_args;
sys_hal_vo_lvds_por_srst(*lvd_por_srst);
break;
}
case SYS_VO_MIPITX_PLL_REF_CKSEL: {
xmedia_bool *mipitx_pll_ref_cksel = XMEDIA_NULL;
mipitx_pll_ref_cksel = (xmedia_bool *)io_args;
sys_hal_vo_mipitx_pll_ref_cksel(*mipitx_pll_ref_cksel);
break;
}
case SYS_VO_LVDS_CKSEL:{
xmedia_bool *lvds_cksel = XMEDIA_NULL;
lvds_cksel = (xmedia_bool *)io_args;
sys_hal_vo_lvds_cksel(dev, *lvds_cksel);
break;
}
case SYS_VO_LCD_DIV_CFG:{
xmedia_u32 *lcd_div_cfg = XMEDIA_NULL;
lcd_div_cfg = (xmedia_u32 *)io_args;
sys_hal_vo_lcd_div_cfg(*lcd_div_cfg);
break;
}
case SYS_VO_PLL_DIV_CFG:{
xmedia_u32 *pll_div_cfg = XMEDIA_NULL;
pll_div_cfg = (xmedia_u32 *)io_args;
if(sys_hal_vo_pll_div_cfg(*pll_div_cfg) != XMEDIA_SUCCESS) {
return XMEDIA_FAILURE;
}
break;
}
case SYS_VO_VOU_HD_CKEN:{
xmedia_bool *vou_hd_cken = XMEDIA_NULL;
vou_hd_cken = (xmedia_bool *)io_args;
sys_hal_vo_vou_hd_cken(dev, *vou_hd_cken);
break;
}
case SYS_VO_VOU_SRST_REQ:{
xmedia_bool *vou_srst_req = XMEDIA_NULL;
vou_srst_req = (xmedia_bool *)io_args;
sys_hal_vo_vou_srst_req(*vou_srst_req);
break;
}
case SYS_VO_VOU_SRST_GET:{
xmedia_bool *vou_srst = XMEDIA_NULL;
vou_srst = (xmedia_bool *)io_args;
sys_hal_vo_vou_srst_get(vou_srst);
break;
}
case SYS_VO_LCD_DIV_CKEN:{
xmedia_bool *lcd_div_cken = XMEDIA_NULL;
lcd_div_cken = (xmedia_bool *)io_args;
sys_hal_vo_lcd_div_cken(*lcd_div_cken);
break;
}
case SYS_VO_PLL_DIV_CKEN:{
xmedia_bool *pll_div_cken = XMEDIA_NULL;
pll_div_cken = (xmedia_bool *)io_args;
sys_hal_vo_pll_div_cken(*pll_div_cken);
break;
}
case SYS_VO_BT_HD_CKSEL:{
xmedia_bool *bt_hd_cksel = XMEDIA_NULL;
bt_hd_cksel = (xmedia_bool *)io_args;
sys_hal_vo_bt_hd_cksel(*bt_hd_cksel);
break;
}
case SYS_VO_LCD_HD_CKSEL:{
xmedia_bool *lcd_hd_cksel = XMEDIA_NULL;
lcd_hd_cksel = (xmedia_bool *)io_args;
sys_hal_vo_lcd_hd_cksel(*lcd_hd_cksel);
break;
}
case SYS_VO_MIPITX_HD_CKSEL:{
xmedia_bool *mipitx_hd_cksel = XMEDIA_NULL;
mipitx_hd_cksel = (xmedia_bool *)io_args;
sys_hal_vo_mipitx_hd_cksel(*mipitx_hd_cksel);
break;
}
case SYS_VO_LVDSTX_HD_CKSEL:{
xmedia_bool *lvdstx_hd_cksel = XMEDIA_NULL;
lvdstx_hd_cksel = (xmedia_bool *)io_args;
sys_hal_vo_lvdstx_hd_cksel(*lvdstx_hd_cksel);
break;
}
case SYS_VO_BT_PCTRL:{
xmedia_bool *bt_pctrl = XMEDIA_NULL;
bt_pctrl = (xmedia_bool *)io_args;
sys_hal_vo_bt_pctrl(*bt_pctrl);
break;
}
case SYS_VO_LCD_PCTRL:{
xmedia_bool *lcd_pctrl = XMEDIA_NULL;
lcd_pctrl = (xmedia_bool *)io_args;
sys_hal_vo_lcd_pctrl(*lcd_pctrl);
break;
}
case SYS_VO_MIPITX_PCTRL:{
xmedia_bool *mipitx_pctrl = XMEDIA_NULL;
mipitx_pctrl = (xmedia_bool *)io_args;
sys_hal_vo_mipitx_pctrl(*mipitx_pctrl);
break;
}
case SYS_VO_LVDSTX_PCTRL:{
xmedia_bool *lvdstx_pctrl = XMEDIA_NULL;
lvdstx_pctrl = (xmedia_bool *)io_args;
sys_hal_vo_lvdstx_pctrl(*lvdstx_pctrl);
break;
}
case SYS_VO_BT_CKEN:{
xmedia_bool *bt_cken = XMEDIA_NULL;
bt_cken = (xmedia_bool *)io_args;
sys_hal_vo_bt_cken(*bt_cken);
break;
}
case SYS_VO_LCD_CKEN:{
xmedia_bool *lcd_cken = XMEDIA_NULL;
lcd_cken = (xmedia_bool *)io_args;
sys_hal_vo_lcd_cken(*lcd_cken);
break;
}
case SYS_VO_MIPITX_CKEN:{
xmedia_bool *mipitx_cken = XMEDIA_NULL;
mipitx_cken = (xmedia_bool *)io_args;
sys_hal_vo_mipitx_cken(*mipitx_cken);
break;
}
case SYS_VO_LVDSTX_CKEN:{
xmedia_bool *lvdstx_cken = XMEDIA_NULL;
lvdstx_cken = (xmedia_bool *)io_args;
sys_hal_vo_lvdstx_cken(*lvdstx_cken);
break;
}
default: {
return XMEDIA_FAILURE;
}
}
return XMEDIA_SUCCESS;
}
#ifdef __cplusplus
}
#endif /* End of #ifdef __cplusplus */
source/bootloader/product/driver/vo/common/xmfalcon/sys_drv.h
Executable
+28
View File
@@ -0,0 +1,28 @@
/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef SYS_DRV_H
#define SYS_DRV_H
#include "drv_sys.h"
#ifdef __cplusplus
extern "C" {
#endif /* End of #ifdef __cplusplus */
/*
* End : Segment compress parameter data definition.
*/
xmedia_s32 sys_mod_init(xmedia_void);
xmedia_s32 sys_mod_exit(xmedia_void);
xmedia_s32 sys_mod_ctrl(xmedia_chn_info *chn_info, sys_func_id func_id, xmedia_void *io_args);
#ifdef __cplusplus
}
#endif /* End of #ifdef __cplusplus */
#endif /* End of #ifndef SYS_DRV_H */
source/bootloader/product/driver/vo/common/xmfalcon/sys_hal.c
Executable
+452
View File
@@ -0,0 +1,452 @@
/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#include "drv_reg_crg.h"
#include "drv_reg_sys.h"
#include "sys_hal.h"
#include "xmedia_vo.h"
#include "drv_vo_comm.h"
#ifdef __cplusplus
extern "C" {
#endif /* End of #ifdef __cplusplus */
#define DDRC0_REG_ADDR 0x120d0000 /* base addr of DDRCB */
#define DDRC_REGS_SIZE 0x10000
#define SCT_REGS_ADDR 0x12050000 /* base addr of syscnt */
#define SCT_REGS_SIZE 0x100
#define OTP_REGS_ADDR 0x100A0000
#define OTP_REGS_SIZE 0X10000
#define APLL_VO_VCO_MAX 3700
#define APLL_VO_VCO_MIN 1000
void *g_reg_crg_base_va = (void *)CRG_REGS_ADDR;
void *g_reg_sys_base_va = (void *)SYS_REGS_ADDR;
void *g_reg_ddr0_base_va = (void *)DDRC0_REG_ADDR;
void *g_reg_misc_base_va = (void *)MISC_REGS_ADDR;
void *g_reg_otp_base_va = (void *)OTP_REGS_ADDR;
void *g_sct_addr = (void *)SCT_REGS_ADDR;
xmedia_u32 g_sys_efuse_addr = 0;
xmedia_u32 g_sys_chip_addr = 0;
#define IO_CRG_ADDRESS(x) ((uintptr_t)g_reg_crg_base_va + ((x) - (CRG_REGS_ADDR)))
#define IO_SYS_ADDRESS(x) ((uintptr_t)g_reg_sys_base_va + ((x) - (SYS_REGS_ADDR)))
#define IO_DDR0_ADDRESS(x) ((uintptr_t)g_reg_ddr0_base_va + ((x) - (DDRC0_REG_ADDR)))
#define IO_MISC_ADDRESS(x) ((uintptr_t)g_reg_misc_base_va + ((x) - (MISC_REGS_ADDR)))
static xmedia_u32 hal_vo_sys_reg_read(volatile xmedia_uintptr_t addr)
{
return *(volatile xmedia_u32 *)(addr);
}
static xmedia_void hal_vo_sys_reg_write(volatile xmedia_uintptr_t addr, xmedia_u32 val)
{
*(volatile xmedia_u32 *)(addr) = val;
return;
}
static inline void sys_reg_set_bit(unsigned long value, unsigned long offset, unsigned long addr)
{
unsigned long t, mask;
mask = 1 << offset;
t = hal_vo_sys_reg_read((xmedia_uintptr_t)addr);
t &= ~mask;
t |= (value << offset) & mask;
hal_vo_sys_reg_write ( (xmedia_uintptr_t)addr, t);
}
static inline void sys_reg_write_32(unsigned long value, unsigned long mask, unsigned long addr)
{
unsigned long t;
t = hal_vo_sys_reg_read((xmedia_uintptr_t)addr);
t &= ~mask;
t |= value & mask;
hal_vo_sys_reg_write((xmedia_uintptr_t)addr, t);
}
static inline void sys_reg_read(unsigned int *pvalue, unsigned long addr)
{
*pvalue = hal_vo_sys_reg_read((uintptr_t)addr);
}
xmedia_s32 sys_hal_usrdef_slv_enable(xmedia_bool enable)
{
if (enable == XMEDIA_TRUE) {
sys_reg_set_bit(1, 1, IO_CRG_ADDRESS(CRG_PERCTL50_ADDR)); // 打开时钟
sys_reg_set_bit(0, 0, IO_CRG_ADDRESS(CRG_PERCTL50_ADDR)); // 撤消复位
} else if (enable == XMEDIA_FALSE) {
sys_reg_set_bit(0, 1, IO_CRG_ADDRESS(CRG_PERCTL50_ADDR)); // 关闭时钟
} else {
return XMEDIA_FAILURE;
}
return XMEDIA_SUCCESS;
}
xmedia_void sys_hal_vo_vou_hd_sel(xmedia_s32 vo_dev, xmedia_u32 vou_hd_sel)
{
if(vo_dev == 0) {
sys_reg_write_32(vou_hd_sel << 1 , 0xf << 1, IO_CRG_ADDRESS(CRG_PERCTL67_ADDR));
} else if (vo_dev == 1) {
sys_reg_write_32(vou_hd_sel << 13 , 0xf << 13, IO_CRG_ADDRESS(CRG_PERCTL67_ADDR));
} else {
}
}
xmedia_void sys_hal_vo_vou_ppc_cksel(xmedia_u32 vou_ppc_cksel)
{
sys_reg_write_32(vou_ppc_cksel << 24 , 0x3 << 24, IO_CRG_ADDRESS(CRG_PERCTL67_ADDR));
}
xmedia_void sys_hal_vo_lvds_por_srst(xmedia_bool lvd_por_srst)
{
xmedia_u32 tmp = (lvd_por_srst == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 21, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_mipitx_pll_ref_cksel(xmedia_bool mipitx_pll_ref_cksel)
{
xmedia_u32 tmp = (mipitx_pll_ref_cksel == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 20, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
static inline xmedia_u64 vo_div64_u64(xmedia_u64 dividend, xmedia_u64 divisor)
{
return dividend / divisor;
}
xmedia_void sys_hal_vo_lcd_div_cfg(xmedia_u32 lcd_div_cfg)
{
xmedia_u32 lcd_clk_div = (xmedia_u32)vo_div64_u64(vo_div64_u64((xmedia_u64)lcd_div_cfg , 1375) * (1 << 27),
1000*1000);
sys_reg_set_bit(0, 28, IO_CRG_ADDRESS(CRG_PERCTL65_ADDR));
sys_reg_write_32(lcd_clk_div, 0x7ffffff, IO_CRG_ADDRESS(CRG_PERCTL65_ADDR));
}
static xmedia_s32 hal_vo_find_fout_div(xmedia_u32 *fout0_div, xmedia_u32 *fout1_div, xmedia_u32 pll_div,
xmedia_u32 *pll_vco){
xmedia_u32 fout0;
xmedia_u32 fout1;
xmedia_u32 vco;
//fout0 fout1 取值范围都是0 - 15
for(fout0 = 0;fout0 < 16;fout0++) {
for(fout1 = 0;fout1 < 16;fout1++) {
vco = pll_div * (fout0 + 1) * (fout1 + 1);
//vco的取值范围是950 - 3800，但ic要求不要取临近值，所以这里使用1000 - 3700
if((vco > (APLL_VO_VCO_MIN * 1000)) && (vco < (APLL_VO_VCO_MAX * 1000))) {
*fout0_div = fout0;
*fout1_div = fout1;
*pll_vco = vco;
return XMEDIA_SUCCESS;
}
}
}
return XMEDIA_FAILURE;
}
xmedia_s32 sys_hal_vo_pll_div_cfg(xmedia_u32 pll_div_cfg)
{
xmedia_u32 apll_frac;
xmedia_u32 apll_fbdiv;
xmedia_u32 fout0_div;
xmedia_u32 fout1_div;
xmedia_u32 vco;
xmedia_u32 pll_div;
//为避免超出u32范围 对1000取整计算
pll_div = pll_div_cfg / 1000;
//理论不会存在获取不到分频因子的情况
if(hal_vo_find_fout_div(&fout0_div, &fout1_div, pll_div, &vco) != XMEDIA_SUCCESS){
return XMEDIA_FAILURE;
}
//apll倍频整数部分
apll_fbdiv = (vco / 24) / 1000;
//apll倍频小数部分
apll_frac = (vco / 24) % 1000;
apll_frac = (apll_frac * ((1 << 24) / 1000));
sys_reg_write_32(apll_frac, 0xffffff, IO_CRG_ADDRESS(CRG_PERCTL0_ADDR));
// apll 小数/整数分频控制 默认为0 小数分频
sys_reg_set_bit(0, 23, IO_CRG_ADDRESS(CRG_PERCTL1_ADDR));
//除了fout1 fout0 其他都bypass
sys_reg_write_32(0xc << 18, 0xf << 18, IO_CRG_ADDRESS(CRG_PERCTL1_ADDR));
//参考时钟分频系数默认设置为1 apll参考时钟则为24mhz
sys_reg_write_32(0x1 << 12, 0x3f << 12, IO_CRG_ADDRESS(CRG_PERCTL1_ADDR));
sys_reg_write_32(apll_fbdiv, 0xfff, IO_CRG_ADDRESS(CRG_PERCTL1_ADDR));
//APLL 配置fout0 fout1 分频因子
sys_reg_write_32(fout0_div | (fout1_div << 4), 0xffff, IO_CRG_ADDRESS(CRG_PERCTL2_ADDR));
return XMEDIA_SUCCESS;
}
xmedia_void sys_hal_vo_lvds_cksel(xmedia_s32 vo_dev, xmedia_bool lvds_cksel)
{
xmedia_u32 tmp = (lvds_cksel == XMEDIA_TRUE) ? 1 : 0;
if(vo_dev == 0) {
sys_reg_set_bit(tmp, 22, IO_CRG_ADDRESS(CRG_PERCTL67_ADDR));
} else if (vo_dev == 1){
sys_reg_set_bit(tmp, 23, IO_CRG_ADDRESS(CRG_PERCTL67_ADDR));
} else {
}
}
xmedia_void sys_hal_vo_vou_hd_cken(xmedia_s32 vo_dev, xmedia_bool vou_hd_cken)
{
xmedia_u32 tmp = (vou_hd_cken == XMEDIA_TRUE) ? 1 : 0;
if(vo_dev == 0) {
sys_reg_set_bit(tmp, 0, IO_CRG_ADDRESS(CRG_PERCTL67_ADDR));
} else if (vo_dev == 1){
sys_reg_set_bit(tmp, 12, IO_CRG_ADDRESS(CRG_PERCTL67_ADDR));
} else {
}
}
xmedia_void sys_hal_vo_vou_srst_req(xmedia_bool vou_srst_req)
{
xmedia_u32 tmp = (vou_srst_req == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 28, IO_CRG_ADDRESS(CRG_PERCTL67_ADDR));
}
xmedia_s32 sys_hal_vo_vou_srst_get(xmedia_bool* vou_srst)
{
xmedia_u32 reg;
if (vou_srst == XMEDIA_NULL) {
return XMEDIA_FAILURE;
}
sys_reg_read(&reg, IO_CRG_ADDRESS(CRG_PERCTL121_ADDR));
*vou_srst = (reg & 0x1); // bit[0]: vou reset state
return XMEDIA_SUCCESS;
}
xmedia_void sys_hal_vo_lcd_div_cken(xmedia_bool lcd_div_cken)
{
xmedia_u32 tmp = (lcd_div_cken == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 27, IO_CRG_ADDRESS(CRG_PERCTL65_ADDR));
}
xmedia_void sys_hal_vo_pll_div_cken(xmedia_bool pll_div_cken)
{
//0表示输出时钟,只使能或去使能fout1 fout0
xmedia_u32 apll_foutpostdivpd = ((!pll_div_cken) << 1) | ((!pll_div_cken) << 0);
sys_reg_write_32(apll_foutpostdivpd << 24, 0xf << 24, IO_CRG_ADDRESS(CRG_PERCTL1_ADDR));
//APLL Power Down控制
sys_reg_set_bit(!pll_div_cken, 29, IO_CRG_ADDRESS(CRG_PERCTL1_ADDR));
//APLL VCO输出Power Down控制
sys_reg_set_bit(!pll_div_cken, 28, IO_CRG_ADDRESS(CRG_PERCTL1_ADDR));
//APLL 测试信号控制
sys_reg_set_bit(!pll_div_cken, 22, IO_CRG_ADDRESS(CRG_PERCTL1_ADDR));
}
xmedia_void sys_hal_vo_bt_hd_cksel(xmedia_bool bt_hd_cksel)
{
xmedia_u32 tmp = (bt_hd_cksel == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 17, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_lcd_hd_cksel(xmedia_bool lcd_hd_cksel)
{
xmedia_u32 tmp = (lcd_hd_cksel == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 16, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_mipitx_hd_cksel(xmedia_bool mipitx_hd_cksel)
{
xmedia_u32 tmp = (mipitx_hd_cksel == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 19, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_lvdstx_hd_cksel(xmedia_bool lvdstx_hd_cksel)
{
xmedia_u32 tmp = (lvdstx_hd_cksel == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 18, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_bt_pctrl(xmedia_bool bt_pctrl)
{
xmedia_u32 tmp = (bt_pctrl == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 9, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_lcd_pctrl(xmedia_bool lcd_pctrl)
{
xmedia_u32 tmp = (lcd_pctrl == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 8, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_mipitx_pctrl(xmedia_bool mipitx_pctrl)
{
xmedia_u32 tmp = (mipitx_pctrl == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 11, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_lvdstx_pctrl(xmedia_bool lvdstx_pctrl)
{
xmedia_u32 tmp = (lvdstx_pctrl == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 10, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_bt_cken(xmedia_bool bt_cken)
{
xmedia_u32 tmp = (bt_cken == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 1, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_lcd_cken(xmedia_bool lcd_cken)
{
xmedia_u32 tmp = (lcd_cken == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 0, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_mipitx_cken(xmedia_bool mipitx_cken)
{
xmedia_u32 tmp = (mipitx_cken == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 3, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_lvdstx_cken(xmedia_bool lvdstx_cken)
{
xmedia_u32 tmp = (lvdstx_cken == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 2, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_s32 sys_hal_init(xmedia_void)
{
#ifdef VO_KERNEL
if (osal_spin_lock_init(&g_crg_spin_lock) < 0) {
osal_printk("spinlock init fail, line: %d. \n", __LINE__);
return -1;
}
if (g_reg_crg_base_va == XMEDIA_NULL) {
g_reg_crg_base_va = (void *)osal_ioremap(CRG_REGS_ADDR, (xmedia_u32)CRG_REGS_SIZE);
if (g_reg_crg_base_va == XMEDIA_NULL) {
osal_printk("remap crg reg fail, line: %d. \n", __LINE__);
goto fail;
}
}
if (g_reg_sys_base_va == XMEDIA_NULL) {
g_reg_sys_base_va = (void *)osal_ioremap(SYS_REGS_ADDR, (xmedia_u32)SYS_REGS_SIZE);
if (g_reg_sys_base_va == XMEDIA_NULL) {
osal_printk("remap sys reg fail, line: %d. \n", __LINE__);
goto fail;
}
}
if (g_reg_ddr0_base_va == XMEDIA_NULL) {
g_reg_ddr0_base_va = (void *)osal_ioremap(DDRC0_REG_ADDR, (xmedia_u32)DDRC_REGS_SIZE);
if (g_reg_ddr0_base_va == XMEDIA_NULL) {
osal_printk("remap ddr0 reg fail, line: %d. \n", __LINE__);
goto fail;
}
}
if (g_reg_misc_base_va == XMEDIA_NULL) {
g_reg_misc_base_va = (void *)osal_ioremap(MISC_REGS_ADDR, (xmedia_u32)MISC_REGS_SIZE);
if (g_reg_misc_base_va == XMEDIA_NULL) {
osal_printk("remap MISC reg fail, line: %d. \n", __LINE__);
goto fail;
}
}
/* version_id与性能限制相关，为了避免通过修改osal_ioremap来更改version_id,使用特殊的iomap函数 */
if (g_reg_otp_base_va == XMEDIA_NULL) {
#ifdef VO_KERNEL
g_reg_otp_base_va = (void *)osal_ioremap(OTP_REGS_ADDR, (xmedia_u32)OTP_REGS_SIZE);
#else
g_reg_otp_base_va = sys_hal_zonediv(OTP_REGS_ADDR, (xmedia_u32)OTP_REGS_SIZE);
#endif
if (g_reg_otp_base_va == XMEDIA_NULL) {
osal_printk("remap OTP reg fail, line: %d. \n", __LINE__);
goto fail;
}
}
if (g_sct_addr == XMEDIA_NULL) {
g_sct_addr = (void *)osal_ioremap(SCT_REGS_ADDR, (xmedia_u32)SCT_REGS_SIZE);
if(g_sct_addr == XMEDIA_NULL) {
osal_printk("remap SCT reg fail, line: %d. \n", __LINE__);
goto fail;
}
}
return 0;
fail:
sys_hal_exit();
return -1;
#endif
return 0;
}
xmedia_void sys_hal_exit(xmedia_void)
{
#ifdef VO_KERNEL
if (g_reg_crg_base_va != XMEDIA_NULL) {
osal_iounmap(g_reg_crg_base_va);
g_reg_crg_base_va = XMEDIA_NULL;
}
if (g_reg_sys_base_va != XMEDIA_NULL) {
osal_iounmap(g_reg_sys_base_va);
g_reg_sys_base_va = XMEDIA_NULL;
}
if (g_reg_ddr0_base_va != XMEDIA_NULL) {
osal_iounmap(g_reg_ddr0_base_va);
g_reg_ddr0_base_va = XMEDIA_NULL;
}
if (g_reg_misc_base_va != XMEDIA_NULL) {
osal_iounmap(g_reg_misc_base_va);
g_reg_misc_base_va = XMEDIA_NULL;
}
if (g_reg_otp_base_va != XMEDIA_NULL) {
#ifdef VO_KERNEL
osal_iounmap(g_reg_otp_base_va);
#else
sys_hal_atmos(g_reg_otp_base_va);
#endif
g_reg_otp_base_va = XMEDIA_NULL;
}
if (g_sct_addr != XMEDIA_NULL) {
osal_iounmap(g_sct_addr);
g_sct_addr = XMEDIA_NULL;
}
osal_spin_lock_destroy(&g_crg_spin_lock);
return;
#endif
return;
}
#ifdef __cplusplus
}
#endif /* End of #ifdef __cplusplus */
source/bootloader/product/driver/vo/common/xmfalcon/sys_hal.h
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef SYS_HAL_H
#define SYS_HAL_H
#include "drv_vo_comm.h"
#ifdef __cplusplus
extern "C" {
#endif /* End of #ifdef __cplusplus */
xmedia_s32 sys_hal_init(xmedia_void);
xmedia_void sys_hal_exit(xmedia_void);
xmedia_void sys_hal_vo_vou_hd_sel(xmedia_s32 vo_dev, xmedia_u32 vou_hd_sel);
xmedia_void sys_hal_vo_vou_ppc_cksel(xmedia_u32 vou_ppc_cksel);
xmedia_void sys_hal_vo_lvds_por_srst(xmedia_bool lvd_por_srst);
xmedia_void sys_hal_vo_mipitx_pll_ref_cksel(xmedia_bool mipitx_pll_ref_cksel);
xmedia_void sys_hal_vo_lvds_cksel(xmedia_s32 vo_dev, xmedia_bool lvds_cksel);
xmedia_void sys_hal_vo_lcd_div_cfg(xmedia_u32 lcd_div_cfg);
xmedia_s32 sys_hal_vo_pll_div_cfg(xmedia_u32 pll_div_cfg);
xmedia_void sys_hal_vo_vou_hd_cken(xmedia_s32 vo_dev, xmedia_bool vou_hd_cken);
xmedia_void sys_hal_vo_vou_srst_req(xmedia_bool vou_srst_req);
xmedia_s32 sys_hal_vo_vou_srst_get(xmedia_bool* vou_srst_req);
xmedia_void sys_hal_vo_lcd_div_cken(xmedia_bool lcd_div_cken);
xmedia_void sys_hal_vo_pll_div_cken(xmedia_bool pll_div_cken);
xmedia_void sys_hal_vo_bt_hd_cksel(xmedia_bool bt_hd_cksel);
xmedia_void sys_hal_vo_lcd_hd_cksel(xmedia_bool lcd_hd_cksel);
xmedia_void sys_hal_vo_mipitx_hd_cksel(xmedia_bool mipitx_hd_cksel);
xmedia_void sys_hal_vo_lvdstx_hd_cksel(xmedia_bool lvdstx_hd_cksel);
xmedia_void sys_hal_vo_bt_pctrl(xmedia_bool bt_pctrl);
xmedia_void sys_hal_vo_lcd_pctrl(xmedia_bool lcd_pctrl);
xmedia_void sys_hal_vo_mipitx_pctrl(xmedia_bool mipitx_pctrl);
xmedia_void sys_hal_vo_lvdstx_pctrl(xmedia_bool lvdstx_pctrl);
xmedia_void sys_hal_vo_bt_cken(xmedia_bool bt_cken);
xmedia_void sys_hal_vo_lcd_cken(xmedia_bool lcd_cken);
xmedia_void sys_hal_vo_mipitx_cken(xmedia_bool mipitx_cken);
xmedia_void sys_hal_vo_lvdstx_cken(xmedia_bool lvdstx_cken);
#ifdef __cplusplus
}
#endif /* End of #ifdef __cplusplus */
#endif /* End of #ifndef SYS_HAL_H */
source/bootloader/product/driver/vo/common/xmorca/drv_reg_crg.h
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef DRV_REG_CRG_H
#define DRV_REG_CRG_H
#define CRG_REGS_ADDR 0x12010000
#define CRG_REGS_SIZE 0X10000
#define CRG_PERCTL0_ADDR (CRG_REGS_ADDR + 0x0)
#define CRG_PERCTL1_ADDR (CRG_REGS_ADDR + 0x4)
#define CRG_PERCTL2_ADDR (CRG_REGS_ADDR + 0x8)
#define CRG_PERCTL50_ADDR (CRG_REGS_ADDR + 0xc8)
#define CRG_PERCTL65_ADDR (CRG_REGS_ADDR + 0x104)
#define CRG_PERCTL66_ADDR (CRG_REGS_ADDR + 0x108)
#define CRG_PERCTL67_ADDR (CRG_REGS_ADDR + 0x10c)
#define CRG_PERCTL121_ADDR (CRG_REGS_ADDR + 0x1e4)
#endif
source/bootloader/product/driver/vo/common/xmorca/drv_reg_sys.h
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef DRV_REG_SYS_H
#define DRV_REG_SYS_H
#define SYS_REGS_ADDR 0x12020000
#define SYS_REGS_SIZE 0x8000
#define MISC_REGS_ADDR 0x12028000
#define MISC_REGS_SIZE 0x8000
#endif
source/bootloader/product/driver/vo/common/xmorca/sys_drv.c
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#include "common.h"
#include "sys_drv.h"
#include "sys_hal.h"
#include "drv_sys.h"
#include "xmedia_vo.h"
#include "drv_vo_comm.h"
#ifdef __cplusplus
extern "C" {
#endif /* End of #ifdef __cplusplus */
#define PHASE 32
#define SYS_MULTI_V 1048576
#define SYS_MULTI_H 1048576
xmedia_s32 sys_mod_init(xmedia_void)
{
xmedia_s32 ret;
ret = sys_hal_init();
return ret;
}
xmedia_s32 sys_mod_exit(xmedia_void)
{
sys_hal_exit();
return XMEDIA_SUCCESS;
}
xmedia_s32 sys_mod_ctrl(xmedia_chn_info *chn_info, sys_func_id func_id, xmedia_void *io_args)
{
xmedia_s32 dev;
dev = chn_info->dev_id;
switch (func_id) {
case SYS_VO_VOU_HD_CKSEL:{
xmedia_u32 *vou_hd_sel = XMEDIA_NULL;
vou_hd_sel = (xmedia_u32 *)io_args;
sys_hal_vo_vou_hd_sel(dev, *vou_hd_sel);
break;
}
case SYS_VO_VOU_PPC_CKSEL: {
xmedia_u32 *vou_ppc_cksel = XMEDIA_NULL;
vou_ppc_cksel = (xmedia_u32 *)io_args;
sys_hal_vo_vou_ppc_cksel(*vou_ppc_cksel);
break;
}
case SYS_VO_LVDS_POR_SRST: {
xmedia_bool *lvd_por_srst = XMEDIA_NULL;
lvd_por_srst = (xmedia_bool *)io_args;
sys_hal_vo_lvds_por_srst(*lvd_por_srst);
break;
}
case SYS_VO_MIPITX_PLL_REF_CKSEL: {
xmedia_bool *mipitx_pll_ref_cksel = XMEDIA_NULL;
mipitx_pll_ref_cksel = (xmedia_bool *)io_args;
sys_hal_vo_mipitx_pll_ref_cksel(*mipitx_pll_ref_cksel);
break;
}
case SYS_VO_LVDS_CKSEL:{
xmedia_bool *lvds_cksel = XMEDIA_NULL;
lvds_cksel = (xmedia_bool *)io_args;
sys_hal_vo_lvds_cksel(dev, *lvds_cksel);
break;
}
case SYS_VO_LCD_DIV_CFG:{
xmedia_u32 *lcd_div_cfg = XMEDIA_NULL;
lcd_div_cfg = (xmedia_u32 *)io_args;
sys_hal_vo_lcd_div_cfg(*lcd_div_cfg);
break;
}
case SYS_VO_PLL_DIV_CFG:{
xmedia_u32 *pll_div_cfg = XMEDIA_NULL;
pll_div_cfg = (xmedia_u32 *)io_args;
if(sys_hal_vo_pll_div_cfg(*pll_div_cfg) != XMEDIA_SUCCESS) {
return XMEDIA_FAILURE;
}
break;
}
case SYS_VO_VOU_HD_CKEN:{
xmedia_bool *vou_hd_cken = XMEDIA_NULL;
vou_hd_cken = (xmedia_bool *)io_args;
sys_hal_vo_vou_hd_cken(dev, *vou_hd_cken);
break;
}
case SYS_VO_VOU_SRST_REQ:{
xmedia_bool *vou_srst_req = XMEDIA_NULL;
vou_srst_req = (xmedia_bool *)io_args;
sys_hal_vo_vou_srst_req(*vou_srst_req);
break;
}
case SYS_VO_VOU_SRST_GET:{
xmedia_bool *vou_srst = XMEDIA_NULL;
vou_srst = (xmedia_bool *)io_args;
sys_hal_vo_vou_srst_get(vou_srst);
break;
}
case SYS_VO_LCD_DIV_CKEN:{
xmedia_bool *lcd_div_cken = XMEDIA_NULL;
lcd_div_cken = (xmedia_bool *)io_args;
sys_hal_vo_lcd_div_cken(*lcd_div_cken);
break;
}
case SYS_VO_PLL_DIV_CKEN:{
xmedia_bool *pll_div_cken = XMEDIA_NULL;
pll_div_cken = (xmedia_bool *)io_args;
sys_hal_vo_pll_div_cken(*pll_div_cken);
break;
}
case SYS_VO_BT_HD_CKSEL:{
xmedia_bool *bt_hd_cksel = XMEDIA_NULL;
bt_hd_cksel = (xmedia_bool *)io_args;
sys_hal_vo_bt_hd_cksel(*bt_hd_cksel);
break;
}
case SYS_VO_LCD_HD_CKSEL:{
xmedia_bool *lcd_hd_cksel = XMEDIA_NULL;
lcd_hd_cksel = (xmedia_bool *)io_args;
sys_hal_vo_lcd_hd_cksel(*lcd_hd_cksel);
break;
}
case SYS_VO_MIPITX_HD_CKSEL:{
xmedia_bool *mipitx_hd_cksel = XMEDIA_NULL;
mipitx_hd_cksel = (xmedia_bool *)io_args;
sys_hal_vo_mipitx_hd_cksel(*mipitx_hd_cksel);
break;
}
case SYS_VO_LVDSTX_HD_CKSEL:{
xmedia_bool *lvdstx_hd_cksel = XMEDIA_NULL;
lvdstx_hd_cksel = (xmedia_bool *)io_args;
sys_hal_vo_lvdstx_hd_cksel(*lvdstx_hd_cksel);
break;
}
case SYS_VO_BT_PCTRL:{
xmedia_bool *bt_pctrl = XMEDIA_NULL;
bt_pctrl = (xmedia_bool *)io_args;
sys_hal_vo_bt_pctrl(*bt_pctrl);
break;
}
case SYS_VO_LCD_PCTRL:{
xmedia_bool *lcd_pctrl = XMEDIA_NULL;
lcd_pctrl = (xmedia_bool *)io_args;
sys_hal_vo_lcd_pctrl(*lcd_pctrl);
break;
}
case SYS_VO_MIPITX_PCTRL:{
xmedia_bool *mipitx_pctrl = XMEDIA_NULL;
mipitx_pctrl = (xmedia_bool *)io_args;
sys_hal_vo_mipitx_pctrl(*mipitx_pctrl);
break;
}
case SYS_VO_LVDSTX_PCTRL:{
xmedia_bool *lvdstx_pctrl = XMEDIA_NULL;
lvdstx_pctrl = (xmedia_bool *)io_args;
sys_hal_vo_lvdstx_pctrl(*lvdstx_pctrl);
break;
}
case SYS_VO_BT_CKEN:{
xmedia_bool *bt_cken = XMEDIA_NULL;
bt_cken = (xmedia_bool *)io_args;
sys_hal_vo_bt_cken(*bt_cken);
break;
}
case SYS_VO_LCD_CKEN:{
xmedia_bool *lcd_cken = XMEDIA_NULL;
lcd_cken = (xmedia_bool *)io_args;
sys_hal_vo_lcd_cken(*lcd_cken);
break;
}
case SYS_VO_MIPITX_CKEN:{
xmedia_bool *mipitx_cken = XMEDIA_NULL;
mipitx_cken = (xmedia_bool *)io_args;
sys_hal_vo_mipitx_cken(*mipitx_cken);
break;
}
case SYS_VO_LVDSTX_CKEN:{
xmedia_bool *lvdstx_cken = XMEDIA_NULL;
lvdstx_cken = (xmedia_bool *)io_args;
sys_hal_vo_lvdstx_cken(*lvdstx_cken);
break;
}
default: {
return XMEDIA_FAILURE;
}
}
return XMEDIA_SUCCESS;
}
#ifdef __cplusplus
}
#endif /* End of #ifdef __cplusplus */
source/bootloader/product/driver/vo/common/xmorca/sys_drv.h
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef SYS_DRV_H
#define SYS_DRV_H
#include "drv_sys.h"
#ifdef __cplusplus
extern "C" {
#endif /* End of #ifdef __cplusplus */
/*
* End : Segment compress parameter data definition.
*/
xmedia_s32 sys_mod_init(xmedia_void);
xmedia_s32 sys_mod_exit(xmedia_void);
xmedia_s32 sys_mod_ctrl(xmedia_chn_info *chn_info, sys_func_id func_id, xmedia_void *io_args);
#ifdef __cplusplus
}
#endif /* End of #ifdef __cplusplus */
#endif /* End of #ifndef SYS_DRV_H */
source/bootloader/product/driver/vo/common/xmorca/sys_hal.c
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#include "drv_reg_crg.h"
#include "drv_reg_sys.h"
#include "sys_hal.h"
#include "xmedia_vo.h"
#include "drv_vo_comm.h"
#ifdef __cplusplus
extern "C" {
#endif /* End of #ifdef __cplusplus */
#define DDRC0_REG_ADDR 0x120d0000 /* base addr of DDRCB */
#define DDRC_REGS_SIZE 0x10000
#define SCT_REGS_ADDR 0x12050000 /* base addr of syscnt */
#define SCT_REGS_SIZE 0x100
#define OTP_REGS_ADDR 0x100A0000
#define OTP_REGS_SIZE 0X10000
#define APLL_VO_VCO_MAX 3700
#define APLL_VO_VCO_MIN 1000
#define VO_LCD_DIV_SRC 1188
void *g_reg_crg_base_va = (void *)CRG_REGS_ADDR;
void *g_reg_sys_base_va = (void *)SYS_REGS_ADDR;
void *g_reg_ddr0_base_va = (void *)DDRC0_REG_ADDR;
void *g_reg_misc_base_va = (void *)MISC_REGS_ADDR;
void *g_reg_otp_base_va = (void *)OTP_REGS_ADDR;
void *g_sct_addr = (void *)SCT_REGS_ADDR;
xmedia_u32 g_sys_efuse_addr = 0;
xmedia_u32 g_sys_chip_addr = 0;
#define IO_CRG_ADDRESS(x) ((uintptr_t)g_reg_crg_base_va + ((x) - (CRG_REGS_ADDR)))
#define IO_SYS_ADDRESS(x) ((uintptr_t)g_reg_sys_base_va + ((x) - (SYS_REGS_ADDR)))
#define IO_DDR0_ADDRESS(x) ((uintptr_t)g_reg_ddr0_base_va + ((x) - (DDRC0_REG_ADDR)))
#define IO_MISC_ADDRESS(x) ((uintptr_t)g_reg_misc_base_va + ((x) - (MISC_REGS_ADDR)))
static xmedia_u32 hal_vo_sys_reg_read(volatile xmedia_uintptr_t addr)
{
return *(volatile xmedia_u32 *)(addr);
}
static xmedia_void hal_vo_sys_reg_write(volatile xmedia_uintptr_t addr, xmedia_u32 val)
{
*(volatile xmedia_u32 *)(addr) = val;
return;
}
static inline void sys_reg_set_bit(unsigned long value, unsigned long offset, unsigned long addr)
{
unsigned long t, mask;
mask = 1 << offset;
t = hal_vo_sys_reg_read((xmedia_uintptr_t)addr);
t &= ~mask;
t |= (value << offset) & mask;
hal_vo_sys_reg_write ( (xmedia_uintptr_t)addr, t);
}
static inline void sys_reg_write_32(unsigned long value, unsigned long mask, unsigned long addr)
{
unsigned long t;
t = hal_vo_sys_reg_read((xmedia_uintptr_t)addr);
t &= ~mask;
t |= value & mask;
hal_vo_sys_reg_write((xmedia_uintptr_t)addr, t);
}
static inline void sys_reg_read(unsigned int *pvalue, unsigned long addr)
{
*pvalue = hal_vo_sys_reg_read((uintptr_t)addr);
}
xmedia_s32 sys_hal_usrdef_slv_enable(xmedia_bool enable)
{
if (enable == XMEDIA_TRUE) {
sys_reg_set_bit(1, 1, IO_CRG_ADDRESS(CRG_PERCTL50_ADDR)); // 打开时钟
sys_reg_set_bit(0, 0, IO_CRG_ADDRESS(CRG_PERCTL50_ADDR)); // 撤消复位
} else if (enable == XMEDIA_FALSE) {
sys_reg_set_bit(0, 1, IO_CRG_ADDRESS(CRG_PERCTL50_ADDR)); // 关闭时钟
} else {
return XMEDIA_FAILURE;
}
return XMEDIA_SUCCESS;
}
xmedia_void sys_hal_vo_vou_hd_sel(xmedia_s32 vo_dev, xmedia_u32 vou_hd_sel)
{
if(vo_dev == 0) {
sys_reg_write_32(vou_hd_sel << 1 , 0xf << 1, IO_CRG_ADDRESS(CRG_PERCTL67_ADDR));
} else if (vo_dev == 1) {
sys_reg_write_32(vou_hd_sel << 13 , 0xf << 13, IO_CRG_ADDRESS(CRG_PERCTL67_ADDR));
} else {
}
}
xmedia_void sys_hal_vo_vou_ppc_cksel(xmedia_u32 vou_ppc_cksel)
{
sys_reg_write_32(vou_ppc_cksel << 24 , 0x3 << 24, IO_CRG_ADDRESS(CRG_PERCTL67_ADDR));
}
xmedia_void sys_hal_vo_lvds_por_srst(xmedia_bool lvd_por_srst)
{
xmedia_u32 tmp = (lvd_por_srst == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 21, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_mipitx_pll_ref_cksel(xmedia_bool mipitx_pll_ref_cksel)
{
xmedia_u32 tmp = (mipitx_pll_ref_cksel == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 20, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
static inline xmedia_u64 vo_div64_u64(xmedia_u64 dividend, xmedia_u64 divisor)
{
return dividend / divisor;
}
xmedia_void sys_hal_vo_lcd_div_cfg(xmedia_u32 lcd_div_cfg)
{
xmedia_u32 lcd_clk_div = (xmedia_u32)vo_div64_u64(vo_div64_u64((xmedia_u64)lcd_div_cfg , VO_LCD_DIV_SRC) * (1 << 27),
1000*1000);
sys_reg_set_bit(0, 28, IO_CRG_ADDRESS(CRG_PERCTL65_ADDR));
sys_reg_write_32(lcd_clk_div, 0x7ffffff, IO_CRG_ADDRESS(CRG_PERCTL65_ADDR));
}
static xmedia_s32 hal_vo_find_fout_div(xmedia_u32 *fout0_div, xmedia_u32 *fout1_div, xmedia_u32 pll_div,
xmedia_u32 *pll_vco){
xmedia_u32 fout0;
xmedia_u32 fout1;
xmedia_u32 vco;
//fout0 fout1 取值范围都是0 - 15
for(fout0 = 0;fout0 < 16;fout0++) {
for(fout1 = 0;fout1 < 16;fout1++) {
vco = pll_div * (fout0 + 1) * (fout1 + 1);
//vco的取值范围是950 - 3800，但ic要求不要取临近值，所以这里使用1000 - 3700
if((vco > (APLL_VO_VCO_MIN * 1000)) && (vco < (APLL_VO_VCO_MAX * 1000))) {
*fout0_div = fout0;
*fout1_div = fout1;
*pll_vco = vco;
return XMEDIA_SUCCESS;
}
}
}
return XMEDIA_FAILURE;
}
xmedia_s32 sys_hal_vo_pll_div_cfg(xmedia_u32 pll_div_cfg)
{
xmedia_u32 apll_frac;
xmedia_u32 apll_fbdiv;
xmedia_u32 fout0_div;
xmedia_u32 fout1_div;
xmedia_u32 vco;
xmedia_u32 pll_div;
//为避免超出u32范围 对1000取整计算
pll_div = pll_div_cfg / 1000;
//理论不会存在获取不到分频因子的情况
if(hal_vo_find_fout_div(&fout0_div, &fout1_div, pll_div, &vco) != XMEDIA_SUCCESS){
return XMEDIA_FAILURE;
}
//apll倍频整数部分
apll_fbdiv = (vco / 24) / 1000;
//apll倍频小数部分
apll_frac = (vco / 24) % 1000;
apll_frac = (apll_frac * ((1 << 24) / 1000));
sys_reg_write_32(apll_frac, 0xffffff, IO_CRG_ADDRESS(CRG_PERCTL0_ADDR));
// apll 小数/整数分频控制 默认为0 小数分频
sys_reg_set_bit(0, 23, IO_CRG_ADDRESS(CRG_PERCTL1_ADDR));
//除了fout1 fout0 其他都bypass
sys_reg_write_32(0xc << 18, 0xf << 18, IO_CRG_ADDRESS(CRG_PERCTL1_ADDR));
//参考时钟分频系数默认设置为1 apll参考时钟则为24mhz
sys_reg_write_32(0x1 << 12, 0x3f << 12, IO_CRG_ADDRESS(CRG_PERCTL1_ADDR));
sys_reg_write_32(apll_fbdiv, 0xfff, IO_CRG_ADDRESS(CRG_PERCTL1_ADDR));
//APLL 配置fout0 fout1 分频因子
sys_reg_write_32(fout0_div | (fout1_div << 4), 0xffff, IO_CRG_ADDRESS(CRG_PERCTL2_ADDR));
return XMEDIA_SUCCESS;
}
xmedia_void sys_hal_vo_lvds_cksel(xmedia_s32 vo_dev, xmedia_bool lvds_cksel)
{
xmedia_u32 tmp = (lvds_cksel == XMEDIA_TRUE) ? 1 : 0;
if(vo_dev == 0) {
sys_reg_set_bit(tmp, 22, IO_CRG_ADDRESS(CRG_PERCTL67_ADDR));
} else if (vo_dev == 1){
sys_reg_set_bit(tmp, 23, IO_CRG_ADDRESS(CRG_PERCTL67_ADDR));
} else {
}
}
xmedia_void sys_hal_vo_vou_hd_cken(xmedia_s32 vo_dev, xmedia_bool vou_hd_cken)
{
xmedia_u32 tmp = (vou_hd_cken == XMEDIA_TRUE) ? 1 : 0;
if(vo_dev == 0) {
sys_reg_set_bit(tmp, 0, IO_CRG_ADDRESS(CRG_PERCTL67_ADDR));
} else if (vo_dev == 1){
sys_reg_set_bit(tmp, 12, IO_CRG_ADDRESS(CRG_PERCTL67_ADDR));
} else {
}
}
xmedia_void sys_hal_vo_vou_srst_req(xmedia_bool vou_srst_req)
{
xmedia_u32 tmp = (vou_srst_req == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 28, IO_CRG_ADDRESS(CRG_PERCTL67_ADDR));
}
xmedia_s32 sys_hal_vo_vou_srst_get(xmedia_bool* vou_srst)
{
xmedia_u32 reg;
if (vou_srst == XMEDIA_NULL) {
return XMEDIA_FAILURE;
}
sys_reg_read(&reg, IO_CRG_ADDRESS(CRG_PERCTL121_ADDR));
*vou_srst = (reg & 0x1); // bit[0]: vou reset state
return XMEDIA_SUCCESS;
}
xmedia_void sys_hal_vo_lcd_div_cken(xmedia_bool lcd_div_cken)
{
xmedia_u32 tmp = (lcd_div_cken == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 27, IO_CRG_ADDRESS(CRG_PERCTL65_ADDR));
}
xmedia_void sys_hal_vo_pll_div_cken(xmedia_bool pll_div_cken)
{
//0表示输出时钟,只使能或去使能fout1 fout0
xmedia_u32 apll_foutpostdivpd = ((!pll_div_cken) << 1) | ((!pll_div_cken) << 0);
sys_reg_write_32(apll_foutpostdivpd << 24, 0xf << 24, IO_CRG_ADDRESS(CRG_PERCTL1_ADDR));
//APLL Power Down控制
sys_reg_set_bit(!pll_div_cken, 29, IO_CRG_ADDRESS(CRG_PERCTL1_ADDR));
//APLL VCO输出Power Down控制
sys_reg_set_bit(!pll_div_cken, 28, IO_CRG_ADDRESS(CRG_PERCTL1_ADDR));
//APLL 测试信号控制
sys_reg_set_bit(!pll_div_cken, 22, IO_CRG_ADDRESS(CRG_PERCTL1_ADDR));
}
xmedia_void sys_hal_vo_bt_hd_cksel(xmedia_bool bt_hd_cksel)
{
xmedia_u32 tmp = (bt_hd_cksel == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 17, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_lcd_hd_cksel(xmedia_bool lcd_hd_cksel)
{
xmedia_u32 tmp = (lcd_hd_cksel == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 16, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_mipitx_hd_cksel(xmedia_bool mipitx_hd_cksel)
{
xmedia_u32 tmp = (mipitx_hd_cksel == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 19, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_lvdstx_hd_cksel(xmedia_bool lvdstx_hd_cksel)
{
xmedia_u32 tmp = (lvdstx_hd_cksel == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 18, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_bt_pctrl(xmedia_bool bt_pctrl)
{
xmedia_u32 tmp = (bt_pctrl == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 9, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_lcd_pctrl(xmedia_bool lcd_pctrl)
{
xmedia_u32 tmp = (lcd_pctrl == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 8, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_mipitx_pctrl(xmedia_bool mipitx_pctrl)
{
xmedia_u32 tmp = (mipitx_pctrl == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 11, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_lvdstx_pctrl(xmedia_bool lvdstx_pctrl)
{
xmedia_u32 tmp = (lvdstx_pctrl == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 10, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_bt_cken(xmedia_bool bt_cken)
{
xmedia_u32 tmp = (bt_cken == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 1, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_lcd_cken(xmedia_bool lcd_cken)
{
xmedia_u32 tmp = (lcd_cken == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 0, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_mipitx_cken(xmedia_bool mipitx_cken)
{
xmedia_u32 tmp = (mipitx_cken == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 3, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_void sys_hal_vo_lvdstx_cken(xmedia_bool lvdstx_cken)
{
xmedia_u32 tmp = (lvdstx_cken == XMEDIA_TRUE) ? 1 : 0;
sys_reg_set_bit(tmp, 2, IO_CRG_ADDRESS(CRG_PERCTL66_ADDR));
}
xmedia_s32 sys_hal_init(xmedia_void)
{
#ifdef VO_KERNEL
if (osal_spin_lock_init(&g_crg_spin_lock) < 0) {
osal_printk("spinlock init fail, line: %d. \n", __LINE__);
return -1;
}
if (g_reg_crg_base_va == XMEDIA_NULL) {
g_reg_crg_base_va = (void *)osal_ioremap(CRG_REGS_ADDR, (xmedia_u32)CRG_REGS_SIZE);
if (g_reg_crg_base_va == XMEDIA_NULL) {
osal_printk("remap crg reg fail, line: %d. \n", __LINE__);
goto fail;
}
}
if (g_reg_sys_base_va == XMEDIA_NULL) {
g_reg_sys_base_va = (void *)osal_ioremap(SYS_REGS_ADDR, (xmedia_u32)SYS_REGS_SIZE);
if (g_reg_sys_base_va == XMEDIA_NULL) {
osal_printk("remap sys reg fail, line: %d. \n", __LINE__);
goto fail;
}
}
if (g_reg_ddr0_base_va == XMEDIA_NULL) {
g_reg_ddr0_base_va = (void *)osal_ioremap(DDRC0_REG_ADDR, (xmedia_u32)DDRC_REGS_SIZE);
if (g_reg_ddr0_base_va == XMEDIA_NULL) {
osal_printk("remap ddr0 reg fail, line: %d. \n", __LINE__);
goto fail;
}
}
if (g_reg_misc_base_va == XMEDIA_NULL) {
g_reg_misc_base_va = (void *)osal_ioremap(MISC_REGS_ADDR, (xmedia_u32)MISC_REGS_SIZE);
if (g_reg_misc_base_va == XMEDIA_NULL) {
osal_printk("remap MISC reg fail, line: %d. \n", __LINE__);
goto fail;
}
}
/* version_id与性能限制相关，为了避免通过修改osal_ioremap来更改version_id,使用特殊的iomap函数 */
if (g_reg_otp_base_va == XMEDIA_NULL) {
#ifdef VO_KERNEL
g_reg_otp_base_va = (void *)osal_ioremap(OTP_REGS_ADDR, (xmedia_u32)OTP_REGS_SIZE);
#else
g_reg_otp_base_va = sys_hal_zonediv(OTP_REGS_ADDR, (xmedia_u32)OTP_REGS_SIZE);
#endif
if (g_reg_otp_base_va == XMEDIA_NULL) {
osal_printk("remap OTP reg fail, line: %d. \n", __LINE__);
goto fail;
}
}
if (g_sct_addr == XMEDIA_NULL) {
g_sct_addr = (void *)osal_ioremap(SCT_REGS_ADDR, (xmedia_u32)SCT_REGS_SIZE);
if(g_sct_addr == XMEDIA_NULL) {
osal_printk("remap SCT reg fail, line: %d. \n", __LINE__);
goto fail;
}
}
return 0;
fail:
sys_hal_exit();
return -1;
#endif
return 0;
}
xmedia_void sys_hal_exit(xmedia_void)
{
#ifdef VO_KERNEL
if (g_reg_crg_base_va != XMEDIA_NULL) {
osal_iounmap(g_reg_crg_base_va);
g_reg_crg_base_va = XMEDIA_NULL;
}
if (g_reg_sys_base_va != XMEDIA_NULL) {
osal_iounmap(g_reg_sys_base_va);
g_reg_sys_base_va = XMEDIA_NULL;
}
if (g_reg_ddr0_base_va != XMEDIA_NULL) {
osal_iounmap(g_reg_ddr0_base_va);
g_reg_ddr0_base_va = XMEDIA_NULL;
}
if (g_reg_misc_base_va != XMEDIA_NULL) {
osal_iounmap(g_reg_misc_base_va);
g_reg_misc_base_va = XMEDIA_NULL;
}
if (g_reg_otp_base_va != XMEDIA_NULL) {
#ifdef VO_KERNEL
osal_iounmap(g_reg_otp_base_va);
#else
sys_hal_atmos(g_reg_otp_base_va);
#endif
g_reg_otp_base_va = XMEDIA_NULL;
}
if (g_sct_addr != XMEDIA_NULL) {
osal_iounmap(g_sct_addr);
g_sct_addr = XMEDIA_NULL;
}
osal_spin_lock_destroy(&g_crg_spin_lock);
return;
#endif
return;
}
#ifdef __cplusplus
}
#endif /* End of #ifdef __cplusplus */
source/bootloader/product/driver/vo/common/xmorca/sys_hal.h
Executable
+45
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@@ -0,0 +1,45 @@
/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef SYS_HAL_H
#define SYS_HAL_H
#include "drv_vo_comm.h"
#ifdef __cplusplus
extern "C" {
#endif /* End of #ifdef __cplusplus */
xmedia_s32 sys_hal_init(xmedia_void);
xmedia_void sys_hal_exit(xmedia_void);
xmedia_void sys_hal_vo_vou_hd_sel(xmedia_s32 vo_dev, xmedia_u32 vou_hd_sel);
xmedia_void sys_hal_vo_vou_ppc_cksel(xmedia_u32 vou_ppc_cksel);
xmedia_void sys_hal_vo_lvds_por_srst(xmedia_bool lvd_por_srst);
xmedia_void sys_hal_vo_mipitx_pll_ref_cksel(xmedia_bool mipitx_pll_ref_cksel);
xmedia_void sys_hal_vo_lvds_cksel(xmedia_s32 vo_dev, xmedia_bool lvds_cksel);
xmedia_void sys_hal_vo_lcd_div_cfg(xmedia_u32 lcd_div_cfg);
xmedia_s32 sys_hal_vo_pll_div_cfg(xmedia_u32 pll_div_cfg);
xmedia_void sys_hal_vo_vou_hd_cken(xmedia_s32 vo_dev, xmedia_bool vou_hd_cken);
xmedia_void sys_hal_vo_vou_srst_req(xmedia_bool vou_srst_req);
xmedia_s32 sys_hal_vo_vou_srst_get(xmedia_bool* vou_srst_req);
xmedia_void sys_hal_vo_lcd_div_cken(xmedia_bool lcd_div_cken);
xmedia_void sys_hal_vo_pll_div_cken(xmedia_bool pll_div_cken);
xmedia_void sys_hal_vo_bt_hd_cksel(xmedia_bool bt_hd_cksel);
xmedia_void sys_hal_vo_lcd_hd_cksel(xmedia_bool lcd_hd_cksel);
xmedia_void sys_hal_vo_mipitx_hd_cksel(xmedia_bool mipitx_hd_cksel);
xmedia_void sys_hal_vo_lvdstx_hd_cksel(xmedia_bool lvdstx_hd_cksel);
xmedia_void sys_hal_vo_bt_pctrl(xmedia_bool bt_pctrl);
xmedia_void sys_hal_vo_lcd_pctrl(xmedia_bool lcd_pctrl);
xmedia_void sys_hal_vo_mipitx_pctrl(xmedia_bool mipitx_pctrl);
xmedia_void sys_hal_vo_lvdstx_pctrl(xmedia_bool lvdstx_pctrl);
xmedia_void sys_hal_vo_bt_cken(xmedia_bool bt_cken);
xmedia_void sys_hal_vo_lcd_cken(xmedia_bool lcd_cken);
xmedia_void sys_hal_vo_mipitx_cken(xmedia_bool mipitx_cken);
xmedia_void sys_hal_vo_lvdstx_cken(xmedia_bool lvdstx_cken);
#ifdef __cplusplus
}
#endif /* End of #ifdef __cplusplus */
#endif /* End of #ifndef SYS_HAL_H */
source/bootloader/product/driver/vo/drv_vo.c
+1912
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File diff suppressed because it is too large Load Diff
source/bootloader/product/driver/vo/drv_vo.h
Executable
+13
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@@ -0,0 +1,13 @@
#ifndef __DRV_VO_H__
#define __DRV_VO_H__
#include "drv_vo_comm.h"
int init_vo(xmedia_void);
int deinit_vo(xmedia_void);
int start_vo(unsigned int dev, xmedia_s32 screen_type);
int stop_vo(unsigned int dev);
int start_videolayer(unsigned int layer, unsigned long addr, unsigned int strd, xmedia_video_rect layer_rect);
int stop_videolayer(unsigned int layer);
int start_gx(unsigned int layer, unsigned long addr, unsigned int strd, xmedia_video_rect gx_rect);
int stop_gx(unsigned int layer);
#endif
source/bootloader/product/driver/vo/hal/include/hal_vo.h
Executable
+178
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@@ -0,0 +1,178 @@
/* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef __HAL_VO_H__
#define __HAL_VO_H__
#include "drv_vo_comm.h"
#include "hal_vo_chip_cfg.h"
#include "hal_vo_disp.h"
#include "hal_vo_intf.h"
#include "hal_vo_clock.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
VO_INT_STATE_TYPE_MASK = 0,
VO_INT_STATE_TYPE_UNMASK,
VO_INT_STATE_TYPE_MAX,
} vo_int_state_type;
typedef enum {
VO_FIELD_FRAME = 0,
VO_FIELD_TOP,
VO_FIELD_BOTTOM,
VO_FIELD_TOP_BOTTOM,
VO_FIELD_MAX
} vo_field_mode;
typedef enum {
VO_PATTERN_MODE_FULLCOLOR = 0,
VO_PATTERN_MODE_CHECKER,
VO_PATTERN_MODE_COLORBAR,
VO_PATTERN_MODE_BLACKBOARD,
VO_PATTERN_MODE_MAX
} vo_pattern_mode;
typedef enum {
VO_PATTERN_DATA_MODE_DYNAMAIC = 0,
VO_PATTERN_DATA_MODE_VIDEO,
VO_PATTERN_DATA_MODE_MAX
} vo_pattern_data_mode;
typedef enum {
VO_PATTERN_POSTION_VIDEO = 0,
VO_PATTERN_POSTION_INTF,
VO_PATTERN_POSTION_MAX
} vo_pattern_postion;
typedef struct {
xmedia_vo_intf_sync intf_sync;
xmedia_vo_user_sync_timing sync_timing;
xmedia_bool clk_reverse_en;
} vo_intf_timing;
//定义固定分频相关属性
typedef struct {
vo_intf_special_timing special_timing[XMEDIA_VO_DEV_MAX];//固定频点 和 实际需求频点 纠正得到的特殊时序
#ifdef xmfalcon
mipi_phy_config mipi_phy_cfg;
#endif
vo_clock_config clock_config; //hal层vo时钟配置
} vo_hal_context;
typedef struct {
vo_pattern_postion pos;
vo_pattern_mode pattern_mode;
vo_pattern_data_mode data_mode;
xmedia_bool pattern_en;
xmedia_bool rgb;
xmedia_u32 color;
xmedia_u32 width;
xmedia_u32 height;
} vo_pattern_info;
//初始化和去初始化
xmedia_s32 hal_vo_init(xmedia_void);
xmedia_void hal_vo_deinit(xmedia_void);
vo_base_cap* hal_vo_get_capacity(xmedia_void);
vo_layer_cap* hal_get_layer_capacity(xmedia_u32 layer);
vo_dev_cap* hal_get_dev_capacity(xmedia_vo_dev dev);
xmedia_void hal_vo_set_mipi_htotal_adjust_value(xmedia_s32 htotal_adjust_value);
xmedia_void hal_vo_set_mipi_vsync_adjust_value(xmedia_s32 vsync_adjust_value);
//时钟和寄存器生效
xmedia_void hal_vo_set_clock_gate_enable(xmedia_bool clk_en);
xmedia_void hal_vo_set_top_regup_enable(xmedia_bool enable);
xmedia_bool hal_vo_get_top_regup_enable(xmedia_void);
xmedia_void hal_vo_set_dev_intf_regup_enable(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_bool hal_vo_get_dev_intf_regup_state(xmedia_vo_dev dev);
xmedia_void hal_vo_set_layer_regup_enable(xmedia_vo_layer layer, xmedia_bool enable);
xmedia_bool hal_vo_get_layer_regup_enable(xmedia_vo_layer layer);
// 中断相关:state表示中断的状态，比如vtt1,vvt2
xmedia_void hal_vo_get_interrupt_state(vo_int_state_type type, xmedia_u32 *state);
xmedia_void hal_vo_clean_interrupt_state(vo_int_state_type type, xmedia_u32 state);
xmedia_void hal_vo_set_interrupt_enable(vo_isr_interrupt_type int_type, xmedia_bool enable);
xmedia_void hal_vo_set_int_mode(xmedia_vo_dev dev, xmedia_u32 vtt_id, vo_isr_field_flag int_mode);
xmedia_void hal_vo_set_dev_thd(xmedia_vo_dev dev, xmedia_u32 vtt_id, xmedia_u32 thd);
xmedia_void hal_vo_get_dev_state(xmedia_vo_dev dev, xmedia_bool *btm, xmedia_u16 *vcnt, xmedia_u8 *vstate);
xmedia_void hal_vo_set_dev_mixer_prio(xmedia_vo_dev dev, vo_mix_prio prio_id);
xmedia_void hal_vo_set_dev_bgcolor(xmedia_vo_dev dev, xmedia_u32 bgcolor);
xmedia_void hal_vo_get_dev_bgcolor(xmedia_vo_dev dev, xmedia_u32 *bgcolor);
xmedia_void hal_vo_set_dev_csc_en(xmedia_vo_dev dev, xmedia_bool csc_en);
xmedia_void hal_vo_get_dev_csc_en(xmedia_vo_dev dev, xmedia_bool *csc_en);
xmedia_s32 hal_vo_set_dev_csc_coef(xmedia_vo_dev dev, vo_pic_info* pic_info);
//设备接口时序包含相关时钟配置
xmedia_void hal_vo_set_crg_clock_reset(xmedia_bool reset_en);
xmedia_bool hal_vo_get_crg_clock_reset_state(xmedia_void);
xmedia_s32 hal_vo_set_crg_clock(xmedia_vo_dev dev, xmedia_u32 clk_hz, xmedia_bool clk_reverse_en,
xmedia_intf_type intf_type);
xmedia_void hal_vo_set_crg_clock_enable(xmedia_vo_dev dev, xmedia_intf_type intf_type, xmedia_bool clk_en);
xmedia_void hal_vo_set_crg_intf_detach_dev(xmedia_vo_dev dev, xmedia_intf_type intf_type);
xmedia_void hal_vo_set_dev_intf_timing(xmedia_vo_dev dev, xmedia_u32 frame_rate,
xmedia_vo_intf_config *intf_config, xmedia_vo_user_sync_timing *sync_timing);
xmedia_void hal_vo_set_clock_sel_priority(xmedia_vo_dev dev, vo_clock_priority_sel vo_lcd_divider_priority);
vo_hal_context* hal_vo_get_hal_context(xmedia_void);
xmedia_void hal_vo_set_dev_intf_enable(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_get_dev_intf_enable(xmedia_vo_dev dev, xmedia_bool *enable);
xmedia_s32 hal_vo_enable_dev_phy_cfg(xmedia_vo_dev dev, xmedia_u32 clk_hz, xmedia_u32 frame_rate,
xmedia_vo_user_sync_timing *sync_timing, xmedia_intf_type intf_type);
xmedia_void hal_vo_disable_dev_phy_cfg(xmedia_intf_type intf_type);
xmedia_s32 vo_calc_dev_phy_clk_cfg(xmedia_vo_dev dev, xmedia_u32 clk_hz, xmedia_vo_intf_config *intf_config);
//视频层相关配置
xmedia_void hal_vo_set_layer_enable(xmedia_vo_layer layer, xmedia_bool enable);
xmedia_void hal_vo_get_layer_enable(xmedia_vo_layer layer, xmedia_bool *enable);
xmedia_void hal_vo_set_layer_bg_color(xmedia_vo_layer layer, xmedia_u32 bgcolor);
xmedia_void hal_vo_set_layer_mute_enable(xmedia_vo_layer layer, xmedia_bool enable);
xmedia_void hal_vo_set_layer_mute_color(xmedia_vo_layer layer, xmedia_u32 bgcolor);
xmedia_void hal_vo_set_layer_csc_en(xmedia_vo_layer layer, xmedia_bool csc_en);
xmedia_s32 hal_vo_set_layer_csc_coef(xmedia_vo_layer layer, vo_pic_info* pic_info);
//设置输出的宽和高
xmedia_void hal_vo_set_layer_disp_rect(xmedia_vo_layer layer, xmedia_video_rect *disp_rect);
xmedia_void hal_vo_get_layer_disp_rect(xmedia_vo_layer layer, xmedia_video_rect *disp_rect);
xmedia_void hal_vo_set_layer_reso_rect(xmedia_vo_layer layer, xmedia_video_rect *reso_rect);
xmedia_void hal_vo_get_layer_reso_rect(xmedia_vo_layer layer, xmedia_video_rect *reso_rect);
xmedia_void hal_vo_set_layer_pixel_format(xmedia_vo_layer layer, xmedia_video_pixel_format pix_format);
//单区域和多区域控制
xmedia_void hal_vo_set_layer_multi_enable(xmedia_vo_layer layer, xmedia_bool enable);
xmedia_void hal_vo_get_layer_multi_enable(xmedia_vo_layer layer, xmedia_bool *enable);
xmedia_void hal_vo_set_layer_region_enable(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_bool enable);
xmedia_void hal_vo_get_layer_region_enable(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_bool *enable);
xmedia_void hal_vo_set_layer_region_mrg_enable(xmedia_vo_layer layer, xmedia_u32 region_id,
xmedia_bool enable);
xmedia_void hal_vo_set_layer_region_mute_color(xmedia_vo_layer layer, xmedia_u32 region_id,
xmedia_u32 bgcolor);
xmedia_void hal_vo_set_layer_single_region_cfg(xmedia_vo_layer layer, vo_layer_single_cfg *single_cfg);
xmedia_void hal_vo_set_layer_multi_region_cfg(xmedia_vo_layer layer, vo_layer_multi_cfg *multi_cfg);
xmedia_void hal_vo_set_dev_debug_pattern(xmedia_vo_dev dev, vo_pattern_info *pattern_info);
xmedia_void hal_vo_set_layer_debug_pattern(xmedia_vo_layer layer, vo_pattern_info *pattern_info);
xmedia_void hal_vo_set_debug_ink(xmedia_vo_dev dev, vo_csc_ink_info *ink_info);
xmedia_void hal_vo_set_debug_mask(xmedia_vo_dev dev, vo_mix_prio mix_pro);
xmedia_void hal_vo_get_debug_checksum(xmedia_vo_dev dev, xmedia_u32 *y, xmedia_u32 *u, xmedia_u32 *v);
xmedia_void hal_vo_set_gamma_addr(xmedia_vo_dev dev);
xmedia_void hal_vo_set_gamma_enable(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_set_gamma_table(xmedia_vo_dev dev, xmedia_vo_gamma_table *gamma_table);
xmedia_void hal_vo_get_gamma_table(xmedia_vo_dev dev, xmedia_vo_gamma_table *gamma_table);
xmedia_s32 hal_vo_gamma_init(xmedia_vo_dev dev);
xmedia_s32 hal_vo_gamma_deinit(xmedia_vo_dev dev);
xmedia_s32 hal_vo_reg_record(xmedia_void);
xmedia_s32 hal_vo_reg_restore(xmedia_void);
xmedia_u32 hal_vo_get_cyc_pre_pixel(xmedia_vo_intf_config *intf_config);
#ifdef __cplusplus
}
#endif
#endif /* __HAL_VO_H__ */
source/bootloader/product/driver/vo/hal/xmfalcon/clock/hal_vo_clock.c
Executable
+429
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@@ -0,0 +1,429 @@
/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#include <string.h>
#include "hal_vo.h"
#include "hal_vo_disp.h"
#include "hal_vo_reg.h"
#include "sys_drv.h"
#include "hal_vo_clock.h"
#include "xmedia_vo.h"
extern s_vout_regs_type *g_p_vout_reg;
xmedia_u64 g_vo_mipi_lcd_clk;
xmedia_void hal_vo_clock_init(vo_clock_config * vo_clock)
{
xmedia_u32 i;
memset(vo_clock, 0, sizeof(vo_clock_config));
for(i = XMEDIA_VO_DEV_0;i < XMEDIA_VO_DEV_MAX; i++) {
vo_clock->dev_clock_info[i].clock_sel = VO_CLOCK_SRC_SEL_MAX;
}
for(i = VO_CRG_CLOCK_TYPE_MIPI;i < VO_CRG_CLOCK_TYPE_MAX; i++) {
vo_clock->intf_clock_info[i].intf_sel_dev = XMEDIA_VO_DEV_MAX;
}
}
xmedia_void hal_vo_clock_deinit(xmedia_void)
{
return;
}
//vo top 门控使能
xmedia_void hal_vo_set_clock_gate(vo_clock_config * vo_clock, xmedia_bool enable)
{
hal_vout_set_cfg_ck_dyn_gt_en_dma(g_p_vout_reg, enable);
hal_vout_set_cfg_ck_dyn_gt_en(g_p_vout_reg, enable);
vo_clock->vo_top_clock_gate = enable;
return;
}
static vo_clock_src_sel vo_fix_clk_sel(vo_clock_config * vo_clock, xmedia_vo_dev dev, xmedia_u32 clk_hz)
{
if ((0 < clk_hz) && (clk_hz <= VO_CLOCK_SRC_13_5MHZ)) {
vo_clock->dev_clock_info[dev].fixed_clock_hz = VO_CLOCK_SRC_13_5MHZ;
return VO_CLOCK_SRC_SEL_13_5MHZ;
} else if ((VO_CLOCK_SRC_13_5MHZ < clk_hz) && (clk_hz <= VO_CLOCK_SRC_27MHZ)) {
vo_clock->dev_clock_info[dev].fixed_clock_hz = VO_CLOCK_SRC_27MHZ;
return VO_CLOCK_SRC_SEL_27MHZ;
} else if ((VO_CLOCK_SRC_27MHZ < clk_hz) && (clk_hz <= VO_CLOCK_SRC_37_125MHZ)) {
vo_clock->dev_clock_info[dev].fixed_clock_hz = VO_CLOCK_SRC_37_125MHZ;
return VO_CLOCK_SRC_SEL_37_125MHZ;
} else if ((VO_CLOCK_SRC_37_125MHZ < clk_hz) && (clk_hz <= VO_CLOCK_SRC_74_25MHZ)) {
vo_clock->dev_clock_info[dev].fixed_clock_hz = VO_CLOCK_SRC_74_25MHZ;
return VO_CLOCK_SRC_SEL_74_25MHZ;
} else if ((VO_CLOCK_SRC_74_25MHZ < clk_hz) && (clk_hz <= VO_CLOCK_SRC_148_5MHZ)) {
vo_clock->dev_clock_info[dev].fixed_clock_hz = VO_CLOCK_SRC_148_5MHZ;
return VO_CLOCK_SRC_SEL_148_5MHZ;
} else if ((VO_CLOCK_SRC_148_5MHZ < clk_hz) && (clk_hz <= VO_CLOCK_SRC_297MHZ)) {
vo_clock->dev_clock_info[dev].fixed_clock_hz = VO_CLOCK_SRC_297MHZ;
return VO_CLOCK_SRC_SEL_297MHZ;
} else if ((VO_CLOCK_SRC_297MHZ < clk_hz) && (clk_hz <= VO_CLOCK_SRC_343_75MHZ)) {
vo_clock->dev_clock_info[dev].fixed_clock_hz = VO_CLOCK_SRC_343_75MHZ;
return VO_CLOCK_SRC_SEL_297MHZ;
} else {
VO_TRACE(MODULE_DBG_DEBUG, "not match normal Hz! Use LCD or PLL Hz!\n");
return VO_CLOCK_SRC_SEL_MAX;
}
}
static vo_clock_ppc_sel vo_get_ppc_clock(vo_clock_config *vo_clock, xmedia_u32 clk_hz)
{
xmedia_u32 i;
for(i = XMEDIA_VO_DEV_0;i < XMEDIA_VO_DEV_MAX; i++) {
clk_hz = (clk_hz > vo_clock->dev_clock_info[i].clock_hz) ? clk_hz : vo_clock->dev_clock_info[i].clock_hz;
}
if (clk_hz <= 74250000) {
return VO_CLOCK_SRC_PPC_SEL_74_25MHZ;
} else if (clk_hz <= 148500000) {
return VO_CLOCK_SRC_PPC_SEL_148_5MHZ;
} else if (clk_hz <= 297000000) {
return VO_CLOCK_SRC_PPC_SEL_297MHZ;
} else if (clk_hz <= 343000000) {
return VO_CLOCK_SRC_PPC_SEL_343MHZ;
} else {
return VO_CLOCK_SRC_PPC_SEL_MAX;
}
}
static vo_clock_src_sel vo_div_clk_sel(vo_clock_config *vo_clock, xmedia_vo_dev dev,
xmedia_u32 clk_hz)
{
xmedia_bool lcd_use_flag = XMEDIA_TRUE;
xmedia_u32 i;
//判断lcd分频能否使用
if (clk_hz <= LCD_FREQUENCY_DIVIDER_MAX) {
for(i = XMEDIA_VO_DEV_0;i < XMEDIA_VO_DEV_MAX; i++) {
//lcd分频已使能&&不是本dev使用&&分频频率不同 则无法使用lcd分频
if ((vo_clock->dev_clock_info[i].clock_sel == VO_CLOCK_SRC_SEL_LCD) &&
(i != dev) && (vo_clock->dev_clock_info[i].freq_clock[VO_DIV_CLOCK_TYPE_LCD].div_clock_hz != clk_hz)) {
lcd_use_flag = XMEDIA_FALSE;
}
}
//配置lcd分频
if (lcd_use_flag == XMEDIA_TRUE) {
return VO_CLOCK_SRC_SEL_LCD;
}
}
return VO_CLOCK_SRC_SEL_MAX;
}
static vo_div_clock_type vo_clk_sel_to_div_type(vo_clock_src_sel clk_sel)
{
switch (clk_sel) {
case VO_CLOCK_SRC_SEL_LCD:
return VO_DIV_CLOCK_TYPE_LCD;
default :
return VO_DIV_CLOCK_TYPE_MAX;
}
}
//crg 分频时钟配置
xmedia_s32 hal_vo_set_dev_div_clock(vo_clock_config * vo_clock, xmedia_vo_dev dev, xmedia_u32 clk_hz,
xmedia_bool *vo_special_timing_sel, xmedia_bool vo_lcd_divider_priority)
{
vo_clock_src_sel clk_sel;
vo_clock_ppc_sel vo_ppc_sel;
vo_div_clock_type div_type;
xmedia_chn_info vo_chn_info = {0};
vo_chn_info.mod_id = MOD_ID_VO;
vo_chn_info.dev_id = dev;
vo_chn_info.chn_id = 0;
//debug状态位检测，优先使用lcd分频器 or 优先使用固定频点
if (vo_lcd_divider_priority == XMEDIA_TRUE) {
clk_sel = vo_div_clk_sel(vo_clock, dev, clk_hz);
if (clk_sel == VO_CLOCK_SRC_SEL_MAX) {
//分频器无法使用，尝试使用固定频点
clk_sel = vo_fix_clk_sel(vo_clock, dev, clk_hz);
if (clk_sel == VO_CLOCK_SRC_SEL_MAX) {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
vo_clock->dev_clock_info[dev].clock_sel = clk_sel;
} else {
div_type = vo_clk_sel_to_div_type(clk_sel);
if (div_type == VO_DIV_CLOCK_TYPE_MAX) {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
//使用lcd分频器
vo_clock->dev_clock_info[dev].clock_sel = clk_sel;
vo_clock->dev_clock_info[dev].fixed_clock_hz = 0;
vo_clock->dev_clock_info[dev].freq_clock[div_type].div_clock_hz = clk_hz;
if (g_vo_mipi_lcd_clk != 0) {
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LCD_DIV_CFG, &g_vo_mipi_lcd_clk);
} else {
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LCD_DIV_CFG, &clk_hz);
}
}
} else {
clk_sel = vo_fix_clk_sel(vo_clock, dev, clk_hz);
if (clk_sel != VO_CLOCK_SRC_SEL_MAX) {
//使用固定频点
vo_clock->dev_clock_info[dev].clock_sel = clk_sel;
} else {
clk_sel = vo_div_clk_sel(vo_clock, dev, clk_hz);
if (clk_sel == VO_CLOCK_SRC_SEL_MAX) {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
div_type = vo_clk_sel_to_div_type(clk_sel);
if (div_type == VO_DIV_CLOCK_TYPE_MAX) {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
//使用lcd分频
vo_clock->dev_clock_info[dev].clock_sel = clk_sel;
vo_clock->dev_clock_info[dev].fixed_clock_hz = 0;
vo_clock->dev_clock_info[dev].freq_clock[div_type].div_clock_hz = clk_hz;
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LCD_DIV_CFG, &clk_hz);
}
}
//都使用校正后的特殊时序,不同的是依照 分频器时钟值/固定频点值 计算出不同的矫正时序
*vo_special_timing_sel = XMEDIA_TRUE;
//时钟源选择配置
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_VOU_HD_CKSEL, &vo_clock->dev_clock_info[dev].clock_sel);
vo_clock->dev_clock_info[dev].clock_hz = clk_hz;
//ppc 时钟配置
vo_ppc_sel = vo_get_ppc_clock(vo_clock, clk_hz);
if (vo_ppc_sel != VO_CLOCK_SRC_PPC_SEL_MAX) {
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_VOU_PPC_CKSEL, &vo_ppc_sel);
}else {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
return XMEDIA_SUCCESS;
}
//crg时钟 分频器使能
xmedia_void hal_vo_set_dev_div_clock_enable(vo_clock_config * vo_clock,
xmedia_vo_dev dev, xmedia_bool clk_en)
{
xmedia_bool lcd_div_freq_en = XMEDIA_FALSE;
xmedia_u32 i;
xmedia_chn_info vo_chn_info = {0};
vo_chn_info.mod_id = MOD_ID_VO;
vo_chn_info.dev_id = dev;
vo_chn_info.chn_id = 0;
if (vo_clock->dev_clock_info[dev].clock_sel == VO_CLOCK_SRC_SEL_LCD) {
vo_clock->dev_clock_info[dev].freq_clock[VO_DIV_CLOCK_TYPE_LCD].div_clock_en = clk_en;
}
//有可能两个dev用同一个分屏器的频点，判断是否是所有dev分频器的使能状态
for(i = XMEDIA_VO_DEV_0;i < XMEDIA_VO_DEV_MAX; i++) {
lcd_div_freq_en |= vo_clock->dev_clock_info[i].freq_clock[VO_DIV_CLOCK_TYPE_LCD].div_clock_en;
}
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LCD_DIV_CKEN, &lcd_div_freq_en);
return;
}
//crg时钟 vou软复位请求
xmedia_void hal_vo_set_clock_reset_enable(vo_clock_config * vo_clock, xmedia_bool reset_en)
{
xmedia_chn_info vo_chn_info = {0};
vo_chn_info.mod_id = MOD_ID_VO;
vo_chn_info.dev_id = 0;
vo_chn_info.chn_id = 0;
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_VOU_SRST_REQ, &reset_en);
//软复位 暂定状态将会改变 其他配置呢 div配置及门控使能 intf门控使能等????
vo_clock->dev_clock_info[XMEDIA_VO_DEV_0].dev_clock_gate = XMEDIA_FALSE;
vo_clock->dev_clock_info[XMEDIA_VO_DEV_1].dev_clock_gate = XMEDIA_FALSE;
}
xmedia_bool hal_vo_get_clock_reset_sta(xmedia_void)
{
xmedia_bool state;
xmedia_chn_info vo_chn_info = {0};
vo_chn_info.mod_id = MOD_ID_VO;
vo_chn_info.dev_id = 0;
vo_chn_info.chn_id = 0;
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_VOU_SRST_GET, &state);
return state;
}
//crg时钟 vou dev0/dev1门控使能
xmedia_void hal_vo_set_dev_clock_enable(vo_clock_config * vo_clock,
xmedia_vo_dev dev, xmedia_bool clk_en)
{
xmedia_chn_info vo_chn_info = {0};
vo_chn_info.mod_id = MOD_ID_VO;
vo_chn_info.dev_id = dev;
vo_chn_info.chn_id = 0;
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_VOU_HD_CKEN, &clk_en);
vo_clock->dev_clock_info[dev].dev_clock_gate = clk_en;
return;
}
xmedia_bool vo_check_intf_sel_dev(vo_clock_config * vo_clock,
vo_crg_intf_type crg_int_type, xmedia_vo_dev dev)
{
xmedia_u32 i;
for(i = VO_CRG_CLOCK_TYPE_MIPI;i < VO_CRG_CLOCK_TYPE_MAX; i++) {
//dev是否已经被其他intf选定了
if ((vo_clock->intf_clock_info[i].intf_sel_dev == dev) && (crg_int_type != i)) {
return XMEDIA_FAILURE;
}
}
return XMEDIA_SUCCESS;
}
static vo_crg_intf_type hal_vo_swap_intf_type(xmedia_intf_type intf_type)
{
switch(intf_type) {
case XMEDIA_INTF_TYPE_BT656:
case XMEDIA_INTF_TYPE_BT1120:
return VO_CRG_CLOCK_TYPE_BT;
case XMEDIA_INTF_TYPE_LCD:
return VO_CRG_CLOCK_TYPE_LCD;
case XMEDIA_INTF_TYPE_MIPI_DSI:
return VO_CRG_CLOCK_TYPE_MIPI;
case XMEDIA_INTF_TYPE_LVDS:
return VO_CRG_CLOCK_TYPE_LVDS;
default:
return VO_CRG_CLOCK_TYPE_MAX;
}
}
xmedia_void hal_vo_set_intf_detach_dev(vo_clock_config * vo_clock,
xmedia_vo_dev dev, xmedia_intf_type intf_type)
{
xmedia_u32 i;
for(i = VO_CRG_CLOCK_TYPE_MIPI;i < VO_CRG_CLOCK_TYPE_MAX; i++) {
if ((vo_clock->intf_clock_info[i].intf_sel_dev == dev) && (hal_vo_swap_intf_type(intf_type) == i)) {
vo_clock->intf_clock_info[i].intf_sel_dev = XMEDIA_VO_DEV_MAX;
}
}
return;
}
//crg intf 时钟 通道选择
xmedia_s32 hal_vo_set_intf_clock(vo_clock_config * vo_clock,
xmedia_vo_dev dev, xmedia_bool clk_reverse_en, xmedia_intf_type intf_type)
{
xmedia_chn_info vo_chn_info = {0};
xmedia_bool vo_lvds_por_srst = XMEDIA_TRUE;
xmedia_bool vo_mipitx_pll_ref_cksel = VO_MIPI_PLL_FREF;
vo_chn_info.mod_id = MOD_ID_VO;
vo_chn_info.dev_id = dev;
vo_chn_info.chn_id = 0;
if (intf_type == XMEDIA_INTF_TYPE_LVDS) {
//lvds 使用LVDS TXPHY PLL_CLKOUT 不需要配置分频
vo_clock->dev_clock_info[dev].vo_lvds_sel = XMEDIA_TRUE;
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LVDS_POR_SRST, &vo_lvds_por_srst);//lvds por 软复位
vo_lvds_por_srst = XMEDIA_FALSE;
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LVDS_POR_SRST, &vo_lvds_por_srst);
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LVDS_CKSEL, &vo_clock->dev_clock_info[dev].vo_lvds_sel);
} else {
vo_clock->dev_clock_info[dev].vo_lvds_sel = XMEDIA_FALSE;
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LVDS_CKSEL, &vo_clock->dev_clock_info[dev].vo_lvds_sel);
}
//mipitx_pll_ref_cksel 配置为0 表示使用24Mh 时钟源
if (intf_type == XMEDIA_INTF_TYPE_MIPI_DSI) {
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_MIPITX_PLL_REF_CKSEL, &vo_mipitx_pll_ref_cksel);
}
switch(intf_type) {
case XMEDIA_INTF_TYPE_BT656:
case XMEDIA_INTF_TYPE_BT1120:
if (vo_check_intf_sel_dev(vo_clock, VO_CRG_CLOCK_TYPE_BT, dev) == XMEDIA_SUCCESS) {
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_BT_HD_CKSEL, &dev); //bt接口时钟通道选择 hd0 hd1
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_BT_PCTRL, &clk_reverse_en); //bt接口时钟反向
vo_clock->intf_clock_info[VO_CRG_CLOCK_TYPE_BT].intf_sel_dev = dev;
vo_clock->intf_clock_info[VO_CRG_CLOCK_TYPE_BT].intf_reverse_en = clk_reverse_en;
break;
} else {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
case XMEDIA_INTF_TYPE_LCD:
if (vo_check_intf_sel_dev(vo_clock, VO_CRG_CLOCK_TYPE_LCD, dev) == XMEDIA_SUCCESS) {
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LCD_HD_CKSEL, &dev); //lcd接口时钟通道选择 hd0 hd1
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LCD_PCTRL, &clk_reverse_en); //lcd接口时钟反向
vo_clock->intf_clock_info[VO_CRG_CLOCK_TYPE_LCD].intf_sel_dev = dev;
vo_clock->intf_clock_info[VO_CRG_CLOCK_TYPE_LCD].intf_reverse_en = clk_reverse_en;
break;
} else {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
case XMEDIA_INTF_TYPE_MIPI_DSI:
if (vo_check_intf_sel_dev(vo_clock, VO_CRG_CLOCK_TYPE_MIPI, dev) == XMEDIA_SUCCESS) {
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_MIPITX_HD_CKSEL, &dev); //mipi接口时钟通道选择 hd0 hd1
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_MIPITX_PCTRL, &clk_reverse_en); //mipi接口时钟反向
vo_clock->intf_clock_info[VO_CRG_CLOCK_TYPE_MIPI].intf_sel_dev = dev;
vo_clock->intf_clock_info[VO_CRG_CLOCK_TYPE_MIPI].intf_reverse_en = clk_reverse_en;
break;
} else {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
case XMEDIA_INTF_TYPE_LVDS:
if (vo_check_intf_sel_dev(vo_clock, VO_CRG_CLOCK_TYPE_LVDS, dev) == XMEDIA_SUCCESS) {
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LVDSTX_HD_CKSEL, &dev); //lvds接口时钟通道选择 hd0 hd1
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LVDSTX_PCTRL, &clk_reverse_en); //lvds接口时钟反向
vo_clock->intf_clock_info[VO_CRG_CLOCK_TYPE_LVDS].intf_sel_dev = dev;
vo_clock->intf_clock_info[VO_CRG_CLOCK_TYPE_LVDS].intf_reverse_en = clk_reverse_en;
break;
} else {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
default:
VO_TRACE(MODULE_DBG_ERR, "intf type error!\n");
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
return XMEDIA_SUCCESS;
}
//crg intf 接口时钟门控使能
xmedia_void hal_vo_set_intf_clock_enable(vo_clock_config * vo_clock,
xmedia_intf_type intf_type, xmedia_bool clock_enable)
{
xmedia_chn_info vo_chn_info = {0};
vo_chn_info.mod_id = MOD_ID_VO;
vo_chn_info.dev_id = 0;
vo_chn_info.chn_id = 0;
switch(intf_type) {
case XMEDIA_INTF_TYPE_BT656:
case XMEDIA_INTF_TYPE_BT1120:
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_BT_CKEN, &clock_enable); //bt时钟使能
break;
case XMEDIA_INTF_TYPE_LCD:
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LCD_CKEN, &clock_enable); //lcd时钟使能
break;
case XMEDIA_INTF_TYPE_MIPI_DSI:
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_MIPITX_CKEN, &clock_enable); //mipi时钟使能
break;
case XMEDIA_INTF_TYPE_LVDS:
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LVDSTX_CKEN, &clock_enable); //lvds时钟使能
break;
default:
VO_TRACE(MODULE_DBG_ERR, "intf type error!\n");
return;
}
vo_clock->intf_clock_info[hal_vo_swap_intf_type(intf_type)].intf_clock_gate = clock_enable;
return;
}
//获取接口实际配置时钟
xmedia_s32 hal_vo_get_intf_clock(vo_clock_config * vo_clock, xmedia_vo_dev dev, xmedia_u32 *clock_hz)
{
vo_div_clock_type div_type;
if (vo_clock->dev_clock_info[dev].clock_sel == VO_CLOCK_SRC_SEL_MAX) {
VO_TRACE(MODULE_DBG_ERR, "clock_sel error!\n");
return XMEDIA_FAILURE;
}
if (vo_clock->dev_clock_info[dev].clock_sel != VO_CLOCK_SRC_SEL_LCD) {
*clock_hz = vo_clock->dev_clock_info[dev].fixed_clock_hz;
} else {
div_type = vo_clk_sel_to_div_type(vo_clock->dev_clock_info[dev].clock_sel);
*clock_hz = vo_clock->dev_clock_info[dev].freq_clock[div_type].div_clock_hz;
}
return XMEDIA_SUCCESS;
}
source/bootloader/product/driver/vo/hal/xmfalcon/clock/hal_vo_clock.h
Executable
+129
View File
@@ -0,0 +1,129 @@
/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef __HAL_VO_CLOCK_H__
#define __HAL_VO_CLOCK_H__
#include "drv_vo_comm.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
VO_MIPITX_PLL_REF_CKSEL_24M = 0,
VO_MIPITX_PLL_REF_CKSEL_36M,
VO_MIPITX_PLL_REF_CKSEL_MAX
} vo_mipitx_pll_ref_cksel;
#define LCD_FREQUENCY_DIVIDER_MAX (148.5 * 1000 * 1000)
#define PLL_FREQUENCY_DIVIDER_MAX (297 * 1000 * 1000)
#define LCD_DIV_2_POWER_27 (1 << 27) //2的27次方
#define LCD_DIV_2_POWER_24 (1 << 24) //2的24次方
#define LCD_DIV_SORCE_FRE (1375*1000*1000) //lcd源频率
#define VO_CLOCK_SRC_13_5MHZ 13500000
#define VO_CLOCK_SRC_27MHZ 27000000
#define VO_CLOCK_SRC_37_125MHZ 37125000
#define VO_CLOCK_SRC_74_25MHZ 74250000
#define VO_CLOCK_SRC_148_5MHZ 148500000
#define VO_CLOCK_SRC_297MHZ 297000000
#define VO_CLOCK_SRC_343_75MHZ 343750000
typedef enum {
VO_CLOCK_SRC_SEL_297MHZ,
VO_CLOCK_SRC_SEL_148_5MHZ,
VO_CLOCK_SRC_SEL_74_25MHZ,
VO_CLOCK_SRC_SEL_37_125MHZ,
VO_CLOCK_SRC_SEL_27MHZ,
VO_CLOCK_SRC_SEL_13_5MHZ,
VO_CLOCK_SRC_SEL_LCD,
VO_CLOCK_SRC_SEL_APLL_FOUT1,
VO_CLOCK_SRC_SEL_343_75MHZ,
VO_CLOCK_SRC_SEL_MAX,
}vo_clock_src_sel;
typedef enum {
VO_CLOCK_SRC_PPC_SEL_343MHZ,
VO_CLOCK_SRC_PPC_SEL_297MHZ,
VO_CLOCK_SRC_PPC_SEL_148_5MHZ,
VO_CLOCK_SRC_PPC_SEL_74_25MHZ,
VO_CLOCK_SRC_PPC_SEL_MAX,
}vo_clock_ppc_sel;
typedef enum {
VO_DIV_CLOCK_TYPE_LCD,
VO_DIV_CLOCK_TYPE_MAX,
} vo_div_clock_type;
typedef enum {
VO_CRG_CLOCK_TYPE_MIPI,
VO_CRG_CLOCK_TYPE_LVDS,
VO_CRG_CLOCK_TYPE_BT,
VO_CRG_CLOCK_TYPE_LCD,
VO_CRG_CLOCK_TYPE_MAX,
} vo_crg_intf_type;
typedef enum {
VO_CLOCK_PRIORITY_SEL_NORMAL,
VO_CLOCK_PRIORITY_SEL_LCD,
VO_CLOCK_PRIORITY_SEL_FIX,
VO_CLOCK_PRIORITY_SEL_MAX,
} vo_clock_priority_sel;
typedef struct {
xmedia_bool div_clock_en; //分频器使能状态 dev0 dev1 共用同一分频器时 需判断两个dev的使能状态来使能分频器
xmedia_u32 div_clock_hz; //分频器频率
} vo_div_clock_info;
typedef struct {
vo_clock_src_sel clock_sel; //dev 时钟源选择
xmedia_bool vo_lvds_sel; //lvds时需要配1 选择LVDS TXPHY PLL_CLKOUT，否则配0 选择SOC时钟
xmedia_u32 clock_hz;
xmedia_u32 fixed_clock_hz; //固定频点时钟
vo_div_clock_info freq_clock[VO_DIV_CLOCK_TYPE_MAX];//dev 分频器信息
xmedia_bool dev_clock_gate; //dev时钟门控
} vo_dev_clock_info;
typedef struct {
xmedia_bool intf_clock_gate; //intf时钟门控
xmedia_vo_dev intf_sel_dev; //接口时钟通道选择
xmedia_bool intf_reverse_en;
} vo_intf_clock_info;
typedef struct {
xmedia_bool vo_top_clock_gate; //vo top层动态时钟门控
vo_dev_clock_info dev_clock_info[XMEDIA_VO_DEV_MAX]; //dev时钟信息
vo_intf_clock_info intf_clock_info[VO_CRG_CLOCK_TYPE_MAX]; //intf时钟信息
} vo_clock_config;
#define VO_MIPI_PLL_FREF VO_MIPITX_PLL_REF_CKSEL_24M //24MHz pll原始频率
xmedia_void hal_vo_clock_init(vo_clock_config * vo_clock);
xmedia_void hal_vo_clock_deinit(xmedia_void);
xmedia_void hal_vo_set_clock_gate(vo_clock_config * vo_clock, xmedia_bool enable);
xmedia_s32 hal_vo_set_dev_div_clock(vo_clock_config * vo_clock, xmedia_vo_dev dev, xmedia_u32 clk_hz,
xmedia_bool *vo_special_timing_sel, xmedia_bool vo_lcd_divider_priority);
xmedia_void hal_vo_set_dev_div_clock_enable(vo_clock_config * vo_clock, xmedia_vo_dev dev,
xmedia_bool clk_en);
xmedia_void hal_vo_set_clock_reset_enable(vo_clock_config * vo_clock, xmedia_bool reset_en);
xmedia_bool hal_vo_get_clock_reset_sta(xmedia_void);
xmedia_void hal_vo_set_dev_clock_enable(vo_clock_config * vo_clock, xmedia_vo_dev dev,
xmedia_bool clk_en);
xmedia_s32 hal_vo_set_intf_clock(vo_clock_config * vo_clock, xmedia_vo_dev dev, xmedia_bool clk_reverse_en,
xmedia_intf_type intf_type);
xmedia_void hal_vo_set_intf_clock_enable(vo_clock_config * vo_clock, xmedia_intf_type intf_type,
xmedia_bool clock_enable);
xmedia_void hal_vo_set_intf_detach_dev(vo_clock_config * vo_clock, xmedia_vo_dev dev,
xmedia_intf_type intf_type);
xmedia_s32 hal_vo_get_intf_clock(vo_clock_config * vo_clock, xmedia_vo_dev dev, xmedia_u32 *clock_hz);
#ifdef __cplusplus
}
#endif
#endif /* __HAL_VO_IP_CSC_H__ */
source/bootloader/product/driver/vo/hal/xmfalcon/csc/hal_vo_csc.c
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#include "hal_vo_csc.h"
#define VO_CSC_TABLE_MAX 61
typedef struct{
vo_csc_type type;
const vo_csc_coef *matrix;
} vo_csc_type_matrix;
const vo_csc_coef g_csc_yuv601limit_to_yuv601limit = {
1024, 0, 0, 0, 1024, 0, 0, 0, 1024,
-16, -128, -128,
16, 128, 128,
};
const vo_csc_coef g_csc_yuv601full_to_yuv601limit = {
880, 0, 0, 0, 899, 0, 0, 0, 899,
0, -128, -128,
16, 128, 128,
};
const vo_csc_coef g_csc_yuv709limit_to_yuv601limit = {
1024, 102, 196, 0, 1014, -113, 0, -74, 1007,
-16, -128, -128,
-16, 128, 128,
};
const vo_csc_coef g_csc_yuv709full_to_yuv601limit = {
880, 90, 173, 0, 891, -99, 0, -65, 864,
0, -128, -128,
16, 128, 128,
};
const vo_csc_coef g_csc_yuv601limit_to_yuv709limit = {
1024, -118, -213, 0, 1043, 117, 0, 77, 1050,
-16, -128, -128,
16, 128, 128,
};
const vo_csc_coef g_csc_yuv601full_to_yuv709limit = {
880, -103, -187, 0, 916, 102, 0, 67, 922,
0, -128, -128,
16, 128, 128,
};
const vo_csc_coef g_csc_yuv709limit_to_yuv709limit = {
1024, 0, 0, 0, 1024, 0, 0, 0, 1024,
-16, -128, -128,
16, 128, 128,
};
const vo_csc_coef g_csc_yuv709full_to_yuv709limit = {
880, 0, 0, 0, 899, 0, 0, 0, 899,
0, -128, -128,
16, 128, 128,
};
const vo_csc_coef g_csc_yuv601limit_to_yuv601full = {
1192, 0, 0, 0, 1165, 0, 0, 0, 1165,
-16, -128, -128,
0, 128, 128,
};
const vo_csc_coef g_csc_yuv601full_to_yuv601full = {
1024, 0, 0, 0, 1024, 0, 0, 0, 1024,
0, -128, -128,
0, 128, 128,
};
const vo_csc_coef g_csc_yuv709limit_to_yuv601full = {
1192, 117, 222, 0, 1154, -128, 0, -84, 1146,
-16, -128, -128,
0, 128, 128,
};
const vo_csc_coef g_csc_yuv709full_to_yuv601full = {
1024, 102, 196, 0, 1014, -113, 0, -74, 1007,
0, -128, -128,
0, 128, 128,
};
const vo_csc_coef g_csc_yuv601limit_to_yuv709full = {
1192, -137, -248, 0, 1188, 133, 0, 87, 1194,
-16, -128, -128,
0, 128, 128,
};
const vo_csc_coef g_csc_yuv601full_to_yuv709full = {
1024, -118, -213, 0, 1043, 117, 0, 77, 1050,
0, -128, -128,
0, 128, 128,
};
const vo_csc_coef g_csc_yuv709limit_to_yuv709full = {
1192, 0, 0, 0, 1165, 0, 0, 0, 1165,
-16, -128, -128,
0, 128, 128,
};
const vo_csc_coef g_csc_yuv709full_to_yuv709full = {
1024, 0, 0, 0, 1024, 0, 0, 0, 1024,
0, -128, -128,
0, 128, 128,
};
const vo_csc_coef g_csc_yuv601limit_to_rgbfull = {
1192, 0, 1634, 1192, -400, -833, 1192, 2066, 0,
-16, -128, -128,
0, 0, 0,
};
const vo_csc_coef g_csc_yuv601full_to_rgbfull = {
1024, 0, 1040, 1024, -344, -706, 1024, 1774, 0,
0, -128, -128,
0, 0, 0,
};
const vo_csc_coef g_csc_yuv709limit_to_rgbfull = {
1192, 0, 1836, 1192, -218, -547, 1192, 2166, 0,
-16, -128, -128,
0, 0, 0,
};
const vo_csc_coef g_csc_yuv709full_to_rgbfull = {
1024, 0, 1577, 1024, -187, -470, 1024, 1860, 0,
0, -128, -128,
0, 0, 0,
};
const vo_csc_coef g_csc_yuv601limit_to_rgblimit = {
1024, 0, 1404, 1024, -344, -716, 1024, 1775, 0,
-16, -128, -128,
16, 16, 16,
};
const vo_csc_coef g_csc_yuv601full_to_rgblimit = {
880, 0, 1233, 880, -302, -629, 880, 1559, 0,
0, -128, -128,
16, 16, 16,
};
const vo_csc_coef g_csc_yuv709limit_to_rgblimit = {
1024, 0, 1578, 1024, -187, -470, 1024, 1861, 0,
-16, -128, -128,
16, 16, 16,
};
const vo_csc_coef g_csc_yuv709full_to_rgblimit = {
880, 0, 1385, 880, -164, -413, 880, 1634, 0,
0, -128, -128,
16, 16, 16,
};
const int g_sin_table[VO_CSC_TABLE_MAX] = {
-500, -485, -469, -454, -438, -422, -407, -391, -374, -358,
-342, -325, -309, -292, -276, -259, -242, -225, -208, -191,
-174, -156, -139, -122, -104, -87, -70, -52, -35, -17,
0, 17, 35, 52, 70, 87, 104, 122, 139, 156,
174, 191, 208, 225, 242, 259, 276, 292, 309, 325,
342, 358, 374, 391, 407, 422, 438, 454, 469, 485,
500
};
const int g_cos_table[VO_CSC_TABLE_MAX] = {
866, 875, 883, 891, 899, 906, 914, 921, 927, 934,
940, 946, 951, 956, 961, 966, 970, 974, 978, 982,
985, 988, 990, 993, 995, 996, 998, 999, 999, 1000,
1000, 1000, 999, 999, 998, 996, 995, 993, 990, 988,
985, 982, 978, 974, 970, 966, 961, 956, 951, 946,
940, 934, 927, 921, 914, 906, 899, 891, 883, 875,
866
};
//后面需要根据算法提供的参数进行更新
static vo_csc_type_matrix g_type_to_matrix[VO_CSC_MAX] = {
{ VO_CSC_YUV2RGB_601_LIMIT2FULL, &g_csc_yuv601limit_to_rgbfull },
{ VO_CSC_YUV2RGB_709_LIMIT2FULL, &g_csc_yuv709limit_to_rgbfull },
{ VO_CSC_YUV2RGB_601_FULL2LIMIT, &g_csc_yuv601full_to_rgblimit },
{ VO_CSC_YUV2RGB_709_FULL2LIMIT, &g_csc_yuv709full_to_rgblimit },
{ VO_CSC_YUV2RGB_601_FULL2FULL, &g_csc_yuv601full_to_rgbfull },
{ VO_CSC_YUV2RGB_709_FULL2FULL, &g_csc_yuv709full_to_rgbfull },
{ VO_CSC_YUV2RGB_601_LIMIT2LIMIT, &g_csc_yuv601limit_to_rgblimit },
{ VO_CSC_YUV2RGB_709_LIMIT2LIMIT, &g_csc_yuv709limit_to_rgblimit },
{ VO_CSC_YUV2YUV_601_601_LIMIT2LIMIT, &g_csc_yuv601limit_to_yuv601limit },
{ VO_CSC_YUV2YUV_601_709_LIMIT2LIMIT, &g_csc_yuv601limit_to_yuv709limit },
{ VO_CSC_YUV2YUV_709_601_LIMIT2LIMIT, &g_csc_yuv709limit_to_yuv601limit },
{ VO_CSC_YUV2YUV_709_709_LIMIT2LIMIT, &g_csc_yuv709limit_to_yuv709limit },
{ VO_CSC_YUV2YUV_601_601_FULL2FULL, &g_csc_yuv601full_to_yuv601full },
{ VO_CSC_YUV2YUV_601_709_FULL2FULL, &g_csc_yuv601full_to_yuv709full },
{ VO_CSC_YUV2YUV_709_601_FULL2FULL, &g_csc_yuv709full_to_yuv601full },
{ VO_CSC_YUV2YUV_709_709_FULL2FULL, &g_csc_yuv709full_to_yuv709full },
{ VO_CSC_YUV2YUV_601_601_LIMIT2FULL, &g_csc_yuv601limit_to_yuv601full },
{ VO_CSC_YUV2YUV_601_709_LIMIT2FULL, &g_csc_yuv601limit_to_yuv709full },
{ VO_CSC_YUV2YUV_709_601_LIMIT2FULL, &g_csc_yuv709limit_to_yuv601full },
{ VO_CSC_YUV2YUV_709_709_LIMIT2FULL, &g_csc_yuv709limit_to_yuv709full },
{ VO_CSC_YUV2YUV_601_601_FULL2LIMIT, &g_csc_yuv601full_to_yuv601limit },
{ VO_CSC_YUV2YUV_601_709_FULL2LIMIT, &g_csc_yuv601full_to_yuv709limit },
{ VO_CSC_YUV2YUV_709_601_FULL2LIMIT, &g_csc_yuv709full_to_yuv601limit },
{ VO_CSC_YUV2YUV_709_709_FULL2LIMIT, &g_csc_yuv709full_to_yuv709limit },
};
static xmedia_s32 vo_get_base_matrix_by_type(vo_csc_type csc_type, const vo_csc_coef **csc_tmp)
{
xmedia_u32 loop;
xmedia_u32 len;
len = sizeof(g_type_to_matrix) / sizeof(vo_csc_type_matrix);
for (loop = 0; loop < len; loop++) {
if (g_type_to_matrix[loop].type == csc_type) {
if (g_type_to_matrix[loop].matrix != XMEDIA_NULL) {
*csc_tmp = g_type_to_matrix[loop].matrix;
} else {
break;
}
return XMEDIA_SUCCESS;
}
}
return XMEDIA_FAILURE;
};
static xmedia_bool vo_check_csc_type(vo_csc_type type)
{
if ((type >= VO_CSC_YUV2RGB_601_LIMIT2FULL) && (type <= VO_CSC_YUV2RGB_709_LIMIT2LIMIT)) {
return XMEDIA_TRUE;
}
return XMEDIA_FALSE;
}
xmedia_s32 hal_vo_csc_coef_convert(vo_pic_info *src_pic_info, vo_csc_coef *pst_csc_matrix)
{
xmedia_s32 luma = 0;
xmedia_s32 contrast = 0;
xmedia_s32 hue = 0;
xmedia_s32 satu = 0;
const vo_csc_coef *base_csc_matrix = XMEDIA_NULL;
luma = (xmedia_s32)src_pic_info->luma * 64 / 100 - 32;
contrast = ((xmedia_s32)src_pic_info->contrast - 50) * 2 + 100;
hue = (xmedia_s32)src_pic_info->hue * 60 / 100;
satu = ((xmedia_s32)src_pic_info->saturation - 50) * 2 + 100;
if (hue >= VO_CSC_TABLE_MAX) {
VO_TRACE(MODULE_DBG_ERR,"hue %d error!\n", hue);
return XMEDIA_FAILURE;
}
if (vo_get_base_matrix_by_type(src_pic_info->csc_type, &base_csc_matrix) != XMEDIA_SUCCESS) {
VO_TRACE(MODULE_DBG_ERR,"vo_get_base_matrix_by_type error!\n");
return XMEDIA_FAILURE;
}
pst_csc_matrix->csc_offset_in0 = base_csc_matrix->csc_offset_in0;
pst_csc_matrix->csc_offset_in1 = base_csc_matrix->csc_offset_in1;
pst_csc_matrix->csc_offset_in2 = base_csc_matrix->csc_offset_in2;
pst_csc_matrix->csc_offset_out0 = base_csc_matrix->csc_offset_out0;
pst_csc_matrix->csc_offset_out1 = base_csc_matrix->csc_offset_out1;
pst_csc_matrix->csc_offset_out2 = base_csc_matrix->csc_offset_out2;
/* C_ratio的调节范围一般是0～1.99, C_ratio=s32Contrast/100
* S的调节范围一般为0~1.99,S=s32Satu/100
* 色调调节参数的范围一般为-30°~30°,通过查表法求得COS和SIN值并/1000
*/
if (vo_check_csc_type(src_pic_info->csc_type) == XMEDIA_TRUE) {
/* 此公式仅用于YUV->RGB转换，RGB->YUV转换不可用此公式 */
pst_csc_matrix->csc_coef0 = (contrast * base_csc_matrix->csc_coef0) / 100;
pst_csc_matrix->csc_coef1 = (contrast * satu * ((base_csc_matrix->csc_coef1 * g_cos_table[hue] -
base_csc_matrix->csc_coef2 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef2 = (contrast * satu * ((base_csc_matrix->csc_coef1 * g_sin_table[hue] +
base_csc_matrix->csc_coef2 * g_cos_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef3 = (contrast * base_csc_matrix->csc_coef3) / 100;
pst_csc_matrix->csc_coef4 = (contrast * satu * ((base_csc_matrix->csc_coef4 * g_cos_table[hue] -
base_csc_matrix->csc_coef5 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef5 = (contrast * satu * ((base_csc_matrix->csc_coef4 * g_sin_table[hue] +
base_csc_matrix->csc_coef5 * g_cos_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef6 = (contrast * base_csc_matrix->csc_coef6) / 100;
pst_csc_matrix->csc_coef7 = (contrast * satu * ((base_csc_matrix->csc_coef7 * g_cos_table[hue] -
base_csc_matrix->csc_coef8 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef8 = (contrast * satu * ((base_csc_matrix->csc_coef7 * g_sin_table[hue] +
base_csc_matrix->csc_coef8 * g_cos_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_offset_in0 += (contrast != 0) ? (luma * 100 / contrast) : luma * 100;
} else {
/* 此公式仅用于RGB->YUV转换，YUV->RGB转换不可用此公式，
* YUV->YUV仅调节图像效果可用此公式，因为常量矩阵为单位矩阵 */
pst_csc_matrix->csc_coef0 = (contrast * base_csc_matrix->csc_coef0) / 100;
pst_csc_matrix->csc_coef1 = (contrast * base_csc_matrix->csc_coef1) / 100;
pst_csc_matrix->csc_coef2 = (contrast * base_csc_matrix->csc_coef2) / 100;
pst_csc_matrix->csc_coef3 = (contrast * satu * ((base_csc_matrix->csc_coef3 * g_cos_table[hue] +
base_csc_matrix->csc_coef3 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef4 = (contrast * satu * ((base_csc_matrix->csc_coef4 * g_cos_table[hue] +
base_csc_matrix->csc_coef4 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef5 = (contrast * satu * ((base_csc_matrix->csc_coef5 * g_cos_table[hue] +
base_csc_matrix->csc_coef5 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef6 = (contrast * satu * ((base_csc_matrix->csc_coef6 * g_cos_table[hue] -
base_csc_matrix->csc_coef6 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef7 = (contrast * satu * ((base_csc_matrix->csc_coef7 * g_cos_table[hue] -
base_csc_matrix->csc_coef7 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef8 = (contrast * satu * ((base_csc_matrix->csc_coef8 * g_cos_table[hue] -
base_csc_matrix->csc_coef8 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_offset_out0 += luma;
}
return XMEDIA_SUCCESS;
}
source/bootloader/product/driver/vo/hal/xmfalcon/csc/hal_vo_csc.h
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef __HAL_VO_CSC_H__
#define __HAL_VO_CSC_H__
#include "drv_vo_comm.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef struct {
xmedia_s32 csc_coef0;
xmedia_s32 csc_coef1;
xmedia_s32 csc_coef2;
xmedia_s32 csc_coef3;
xmedia_s32 csc_coef4;
xmedia_s32 csc_coef5;
xmedia_s32 csc_coef6;
xmedia_s32 csc_coef7;
xmedia_s32 csc_coef8;
xmedia_s32 csc_offset_in0;
xmedia_s32 csc_offset_in1;
xmedia_s32 csc_offset_in2;
xmedia_s32 csc_offset_out0;
xmedia_s32 csc_offset_out1;
xmedia_s32 csc_offset_out2;
} vo_csc_coef;
xmedia_s32 hal_vo_csc_coef_convert(vo_pic_info *src_pic_info, vo_csc_coef *pst_csc_matrix);
#ifdef __cplusplus
}
#endif
#endif /* __HAL_VO_IP_CSC_H__ */
source/bootloader/product/driver/vo/hal/xmfalcon/disp/hal_vo_disp.c
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source/bootloader/product/driver/vo/hal/xmfalcon/disp/hal_vo_disp.h
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef __HAL_VO_DISP_H__
#define __HAL_VO_DISP_H__
#include "hal_vo_csc.h"
#include "drv_vo_comm.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
VO_MRG_MIX_PRIO_RDMA0 = 0,
VO_MRG_MIX_PRIO_RDMA1,
VO_MRG_MIX_PRIO_MAX,
} vo_mrg_mix_prio;
typedef enum {
VO_MIX_PRIO_VIDEO = 0,
VO_MIX_PRIO_GFX,
VO_MIX_PRIO_MAX,
} vo_mix_prio;
typedef enum {
VO_PIXEL_FMT_YUV_400 = 0,
VO_PIXEL_FMT_YUV_420,
VO_PIXEL_FMT_YUV_422,
VO_PIXEL_FMT_YUV_MAX
} vo_pixel_format;
typedef struct {
xmedia_bool vcus_mode;
xmedia_bool hcus_mode;
xmedia_u8 hcus_coef0;
xmedia_u8 hcus_coef1;
xmedia_u8 hcus_coef2;
xmedia_u8 hcus_coef3;
xmedia_u8 vcus_coef0;
xmedia_u8 vcus_coef1;
xmedia_u8 vcus_coef2;
xmedia_u8 vcus_coef3;
} vo_video_cus;
xmedia_void hal_vo_set_top_regup(xmedia_bool enable);
xmedia_void hal_vo_get_top_regup(xmedia_bool *enable);
xmedia_void hal_vo_get_video_regup(xmedia_vo_layer layer, xmedia_bool *enable);
xmedia_void hal_vo_get_intf_regup(xmedia_vo_dev dev, xmedia_bool *enable);
xmedia_void hal_vo_get_version0(xmedia_u32 *version);
xmedia_void hal_vo_get_version1(xmedia_u32 *version);
xmedia_void hal_vo_set_mem_ctrl(xmedia_u32 speed);
xmedia_u32 hal_vo_get_mask_interrupt_state(xmedia_void);
xmedia_void hal_vo_clear_mask_interrupt_state(vo_isr_interrupt_type int_mask);
xmedia_void hal_vo_set_mask_interrupt_enable(vo_isr_interrupt_type int_mask,xmedia_bool enable);
xmedia_u32 hal_vo_get_unmask_interrupt_state(xmedia_void);
xmedia_void hal_vo_clear_lowband_state(xmedia_bool enable);
xmedia_void hal_vo_set_cbm_mixer_prio(xmedia_vo_dev dev, vo_mix_prio prio_id);
xmedia_void hal_vo_set_cbm_bgcolor(xmedia_vo_dev dev, xmedia_u32 bgcolor);
xmedia_void hal_vo_get_cbm_bgcolor(xmedia_vo_dev dev, xmedia_u32 *bgcolor);
xmedia_void hal_vo_set_dma_standing(xmedia_vo_dev dev, xmedia_u8 value);
xmedia_u8 hal_vo_get_dma_standing(xmedia_void);
xmedia_void hal_vo_set_enable(xmedia_vo_layer layer, xmedia_bool enable);
xmedia_void hal_vo_get_enable(xmedia_vo_layer layer, xmedia_bool *enable);
//两个及时寄存器
xmedia_void hal_vo_set_regup_mode(xmedia_vo_layer layer, xmedia_bool filed_en);
xmedia_void hal_vo_set_regup_field(xmedia_vo_layer layer, xmedia_bool bottom_en);
xmedia_void hal_vo_set_alpha(xmedia_vo_layer layer, xmedia_u8 alpha);
xmedia_void hal_vo_set_alpha_enable(xmedia_vo_layer layer, xmedia_bool alpha_en);
xmedia_void hal_vo_set_alpha_blend_mode(xmedia_vo_layer layer, xmedia_bool alpha_blend_en);
xmedia_void hal_vo_set_src_pixel_format(xmedia_vo_layer layer, vo_pixel_format format, xmedia_bool uv_order);
xmedia_void hal_vo_set_multi_enable(xmedia_vo_layer layer, xmedia_bool enable);
xmedia_void hal_vo_get_multi_enable(xmedia_vo_layer layer, xmedia_bool *enable);
xmedia_void hal_vo_set_bgcolor(xmedia_vo_layer layer, xmedia_u32 bgcolor);
xmedia_void hal_vo_get_bgcolor(xmedia_vo_layer layer, xmedia_u32 *bgcolor);
xmedia_void hal_vo_set_mute_enable(xmedia_vo_layer layer, xmedia_bool enable);
xmedia_void hal_vo_get_mute_enable(xmedia_vo_layer layer, xmedia_bool *enable);
xmedia_void hal_vo_set_video_regup_enable(xmedia_vo_layer layer, xmedia_bool enable);
xmedia_void hal_vo_set_mute_color(xmedia_vo_layer layer, xmedia_u32 bgcolor);
xmedia_void hal_vo_set_mute_pattern_mode(xmedia_vo_layer layer, xmedia_bool value);
xmedia_void hal_vo_set_mute_data_mode(xmedia_vo_layer layer, xmedia_bool value);
xmedia_void hal_vo_set_checkbar_size(xmedia_vo_layer layer, xmedia_u8 width, xmedia_u8 height);
xmedia_void hal_vo_set_disp_rect (xmedia_vo_layer layer, xmedia_video_rect *disp_rect);
xmedia_void hal_vo_get_disp_rect (xmedia_vo_layer layer, xmedia_video_rect *disp_rect);
xmedia_void hal_vo_set_src_rect (xmedia_vo_layer layer, xmedia_video_rect *src_rect);
xmedia_void hal_vo_get_src_rect (xmedia_vo_layer layer, xmedia_video_rect *src_rect);
xmedia_void hal_vo_set_dst_rect (xmedia_vo_layer layer, xmedia_video_rect *dst_rect);
xmedia_void hal_vo_set_addr (xmedia_vo_layer layer, vo_addr *addr);
xmedia_void hal_vo_set_mrg_mixer_prio(xmedia_vo_layer layer, vo_mrg_mix_prio prio_id);
xmedia_void hal_vo_set_mrg_rdma1_link(xmedia_vo_layer layer, xmedia_u8 rgion_id);
xmedia_void hal_vo_set_mrg_rdma1_en(xmedia_vo_layer layer, xmedia_bool enable);
xmedia_void hal_vo_set_mrg_enable(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_bool enable);
xmedia_void hal_vo_set_mrg_mute_enable(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_bool enable);
xmedia_void hal_vo_get_mrg_enable(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_bool *enable);
xmedia_void hal_vo_set_mrg_sort(xmedia_vo_layer layer, xmedia_u16 sort);
xmedia_void hal_vo_set_mrg_src_rect (xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_video_rect *src_rect);
xmedia_void hal_vo_set_mrg_dst_rect (xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_video_rect *dst_rect);
xmedia_void hal_vo_set_mrg0_addr(xmedia_vo_layer layer, vo_addr *addr);
xmedia_void hal_vo_set_mrg1_addr(xmedia_vo_layer layer, vo_addr *addr);
xmedia_void hal_vo_set_mrg2_addr(xmedia_vo_layer layer, vo_addr *addr);
xmedia_void hal_vo_set_mrg3_addr(xmedia_vo_layer layer, vo_addr *addr);
xmedia_void hal_vo_set_mrg_addr(xmedia_vo_layer layer, xmedia_u32 region_id,vo_addr *addr);
xmedia_void hal_vo_set_mrg_mute_color(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_u32 bgcolor);
xmedia_void hal_vo_set_cus(xmedia_vo_layer layer, vo_video_cus *cus);
xmedia_void hal_vo_set_csc_en(xmedia_vo_layer layer, xmedia_bool enable);
xmedia_void hal_vo_set_csc(xmedia_vo_layer layer,vo_csc_coef *csc);
xmedia_void hal_vo_set_mrg0_csc(xmedia_vo_layer layer,vo_csc_coef *csc);
xmedia_void hal_vo_set_mrg1_csc(xmedia_vo_layer layer,vo_csc_coef *csc);
xmedia_void hal_vo_set_mrg2_csc(xmedia_vo_layer layer,vo_csc_coef *csc);
xmedia_void hal_vo_set_mrg3_csc(xmedia_vo_layer layer,vo_csc_coef *csc);
xmedia_void hal_vo_set_mrg_csc(xmedia_vo_layer layer, xmedia_u32 region_id, vo_csc_coef *csc);
#ifdef __cplusplus
}
#endif
#endif
source/bootloader/product/driver/vo/hal/xmfalcon/gamma/hal_vo_gamma.c
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#include "hal_vo_reg.h"
#include "hal_vo_gamma.h"
extern s_vout_regs_type *g_p_vout_reg;
xmedia_void hal_vo_gamma_enable(xmedia_vo_dev dev, xmedia_bool enable)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_vout_set_cfg_gamma_en(g_p_vout_reg, enable);
} else if (dev == XMEDIA_VO_DEV_1) {
hal_vout_set_voutintf1_cfg_gamma_en(g_p_vout_reg, enable);
} else {
;
}
return;
}
xmedia_s32 hal_vo_gamma_get_table_size(xmedia_void)
{
return VO_GAMMA_MAP_SIZE * sizeof(xmedia_u8);
}
xmedia_void hal_vo_gamma_set_table(xmedia_vo_dev dev, xmedia_void *gamma_virtual_addr,
xmedia_u32 gamma_mem_len, xmedia_vo_gamma_table *gamma_table)
{
xmedia_s32 i;
for (i = 0;i < VO_GAMMA_MAP_SIZE; i++) {
((xmedia_u8 *)gamma_virtual_addr)[i] = gamma_table->gamma_table[i];
}
if (dev == XMEDIA_VO_DEV_0) {
hal_vout_set_cfg_para_2_update(g_p_vout_reg, XMEDIA_TRUE);
} else if (dev == XMEDIA_VO_DEV_1) {
hal_vout_set_cfg_para_3_update(g_p_vout_reg, XMEDIA_TRUE);
} else {
;
}
return;
}
xmedia_void hal_vo_gamma_get_table(xmedia_vo_dev dev, xmedia_void *gamma_virtual_addr,
xmedia_u32 gamma_mem_len, xmedia_vo_gamma_table *gamma_table)
{
xmedia_s32 i;
for (i = 0;i < VO_GAMMA_MAP_SIZE; i++) {
gamma_table->gamma_table[i] = ((xmedia_u8 *)gamma_virtual_addr)[i];
}
return;
}
xmedia_void hal_vo_gamma_set_addr(xmedia_vo_dev dev, xmedia_u64 addr)
{
xmedia_u32 addr_l = addr & 0xFFFFFFFF;
xmedia_u32 addr_h = (addr & 0xFFFFFFFF00000000) >> 32;
if (dev == XMEDIA_VO_DEV_0) {
hal_vout_set_cfg_para_2_addr_h(g_p_vout_reg, addr_h);
hal_vout_set_cfg_para_2_addr_l(g_p_vout_reg, addr_l);
} else if (dev == XMEDIA_VO_DEV_1) {
hal_vout_set_cfg_para_3_addr_h(g_p_vout_reg, addr_h);
hal_vout_set_cfg_para_3_addr_l(g_p_vout_reg, addr_l);
} else {
;
}
return;
}
source/bootloader/product/driver/vo/hal/xmfalcon/gamma/hal_vo_gamma.h
Executable
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef __HAL_VO_GAMMA_H__
#define __HAL_VO_GAMMA_H__
#include "drv_vo_comm.h"
#include "xmedia_vo.h"
#ifdef __cplusplus
extern "C" {
#endif
xmedia_void hal_vo_gamma_enable(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_s32 hal_vo_gamma_get_table_size(xmedia_void);
xmedia_void hal_vo_gamma_set_table(xmedia_vo_dev dev, xmedia_void *gamma_virtual_addr,
xmedia_u32 gamma_mem_len, xmedia_vo_gamma_table *gamma_table);
xmedia_void hal_vo_gamma_get_table(xmedia_vo_dev dev, xmedia_void *gamma_virtual_addr,
xmedia_u32 gamma_mem_len, xmedia_vo_gamma_table *gamma_table);
xmedia_void hal_vo_gamma_set_addr(xmedia_vo_dev dev, xmedia_u64 addr);
#ifdef __cplusplus
}
#endif
#endif /* __HAL_VO_IP_CSC_H__ */
source/bootloader/product/driver/vo/hal/xmfalcon/hal_vo.c
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#include <string.h>
#include "hal_vo.h"
#include "hal_vo_chip_cfg.h"
#include "hal_vo_reg.h"
#include "hal_vo_disp.h"
#include "hal_vo_intf.h"
#include "hal_vo_clock.h"
#include "hal_vo_gamma.h"
#include "drv_vo_comm.h"
static xmedia_s32 vo_mipi_htotal_adjust_value = 0;
static xmedia_s32 vo_mipi_vsync_adjust_value = 0;
xmedia_void hal_vo_set_mipi_htotal_adjust_value(xmedia_s32 htotal_adjust_value)
{
vo_mipi_htotal_adjust_value = htotal_adjust_value;
}
xmedia_void hal_vo_set_mipi_vsync_adjust_value(xmedia_s32 vsync_adjust_value)
{
vo_mipi_vsync_adjust_value = vsync_adjust_value;
}
vo_hal_context vo_hal_ctx;
vo_hal_context *hal_vo_get_hal_context(xmedia_void)
{
return &vo_hal_ctx;
}
#define vo_reg_addr_offset(REG) ((xmedia_ulong) & (((s_vout_regs_type *)0)->REG))
#define OFFSET_ELE_NUM 2
#ifdef VO_KERNEL
static xmedia_ulong g_vo_reg_offset[][OFFSET_ELE_NUM] = {
{ vo_reg_addr_offset(vout_top_ctrl), 0x320 },
{ vo_reg_addr_offset(vout_lvds_phy_update), 0x50 },
{ vo_reg_addr_offset(vout_v0_ctrl), 0x300 },
{ vo_reg_addr_offset(vout_intf_ctrl), 0x230 },
{ vo_reg_addr_offset(vout_intf_csc_offset_in), 0x70 },
{ vo_reg_addr_offset(vout_v1_ctrl), 0x300 },
{ vo_reg_addr_offset(vout_intf1_ctrl), 0x230 },
{ vo_reg_addr_offset(vout_intf1_csc_offset_in), 0x70 },
};
#endif
#ifdef VO_KERNEL
static xmedia_u8 *g_vo_reg_record = XMEDIA_NULL;
#endif
typedef struct {
xmedia_u64 gamma_phy_addr;
xmedia_void *gamma_virtual_addr;
xmedia_u32 gamma_mem_len;
} vo_dev_gamma_buf;
#define VO_BASE_ADDR 0x11280000
#define VO_MIPI_TX_CTRL_BASE 0x11960000
#define VO_MIPI_TX_PHY_BASE 0x11970000
s_vout_regs_type *g_p_vout_reg = (s_vout_regs_type *)VO_BASE_ADDR;
void *g_p_vout_mipi_tx_ctrl = (void *)VO_MIPI_TX_CTRL_BASE;
void *g_p_vout_mipi_tx_phy = (void *)VO_MIPI_TX_PHY_BASE;
#define VO_MIPI_TX_PHY_SIZE 0x1000
#define VO_FIFO_DEPTH 1919
#define VO_MMZ_NAME_SIZE 128
#ifdef VO_KERNEL
static vo_dev_gamma_buf g_vo_gamma_buf[XMEDIA_VO_DEV_MAX];
#endif
static xmedia_s32 vo_reg_map(xmedia_void)
{
#ifdef VO_KERNEL
if (g_p_vout_reg == XMEDIA_NULL) {
g_p_vout_reg = (s_vout_regs_type *)osal_ioremap_nocache(VO_BASE_ADDR, sizeof(s_vout_regs_type));
if (g_p_vout_reg == XMEDIA_NULL) {
return XMEDIA_FAILURE;
}
}
if (g_p_vout_mipi_tx_phy == XMEDIA_NULL) {
g_p_vout_mipi_tx_phy = osal_ioremap_nocache(VO_MIPI_TX_PHY_BASE, VO_MIPI_TX_PHY_SIZE);
if (g_p_vout_mipi_tx_phy == XMEDIA_NULL) {
osal_iounmap((xmedia_void *)g_p_vout_reg);
g_p_vout_reg = XMEDIA_NULL;
return XMEDIA_FAILURE;
}
}
if (g_p_vout_mipi_tx_phy_2 == XMEDIA_NULL) {
g_p_vout_mipi_tx_phy_2 = osal_ioremap_nocache(VO_MIPI_TX_PHY_BASE_2, VO_MIPI_TX_PHY_SIZE);
if (g_p_vout_mipi_tx_phy_2 == XMEDIA_NULL) {
osal_iounmap((xmedia_void *)g_p_vout_reg);
osal_iounmap((xmedia_void *)g_p_vout_mipi_tx_phy);
g_p_vout_reg = XMEDIA_NULL;
g_p_vout_mipi_tx_phy = XMEDIA_NULL;
return XMEDIA_FAILURE;
}
}
#endif
return XMEDIA_SUCCESS;
}
static xmedia_void vo_reg_unmap(xmedia_void)
{
#ifdef VO_KERNEL
if (g_p_vout_reg != XMEDIA_NULL) {
osal_iounmap((xmedia_void *)g_p_vout_reg);
g_p_vout_reg = XMEDIA_NULL;
}
if (g_p_vout_mipi_tx_phy != XMEDIA_NULL) {
osal_iounmap(g_p_vout_mipi_tx_phy);
g_p_vout_mipi_tx_phy = XMEDIA_NULL;
}
if (g_p_vout_mipi_tx_phy_2 != XMEDIA_NULL) {
osal_iounmap(g_p_vout_mipi_tx_phy_2);
g_p_vout_mipi_tx_phy_2 = XMEDIA_NULL;
}
#endif
return;
}
xmedia_s32 hal_vo_gamma_init(xmedia_vo_dev dev)
{
#ifdef VO_KERNEL
xmedia_char mmz_user_name[VO_MMZ_NAME_SIZE];
xmedia_vo_gamma_table gamma_table;
g_vo_gamma_buf[dev].gamma_mem_len = hal_vo_gamma_get_table_size();
osal_snprintf(mmz_user_name, sizeof(mmz_user_name), "vo_gamma_dev%u", dev);
g_vo_gamma_buf[dev].gamma_phy_addr = drv_vo_mmz_alloc(mmz_user_name,
g_vo_gamma_buf[dev].gamma_mem_len, XMEDIA_NULL);
if (g_vo_gamma_buf[dev].gamma_phy_addr == XMEDIA_NULL) {
VO_TRACE(MODULE_DBG_ERR,"drv_vo_mmz_alloc error!\n");
goto err_out;
}
g_vo_gamma_buf[dev].gamma_virtual_addr = drv_vo_mmz_map(g_vo_gamma_buf[dev].gamma_phy_addr,
g_vo_gamma_buf[dev].gamma_mem_len);
if (g_vo_gamma_buf[dev].gamma_virtual_addr == XMEDIA_NULL) {
drv_vo_mmz_free(g_vo_gamma_buf[dev].gamma_phy_addr);
g_vo_gamma_buf[dev].gamma_phy_addr = XMEDIA_NULL;
VO_TRACE(MODULE_DBG_ERR,"drv_vo_mmz_map return NULL!\n");
goto err_out;
}
gamma_table.gamma_table[dev] = dev;
hal_vo_set_gamma_table(dev, &gamma_table);
return XMEDIA_SUCCESS;
err_out:
if (g_vo_gamma_buf[dev].gamma_virtual_addr != XMEDIA_NULL) {
drv_vo_mmz_unmap(g_vo_gamma_buf[dev].gamma_virtual_addr);
g_vo_gamma_buf[dev].gamma_virtual_addr = XMEDIA_NULL;
}
if (g_vo_gamma_buf[dev].gamma_phy_addr != XMEDIA_NULL) {
drv_vo_mmz_free(g_vo_gamma_buf[dev].gamma_phy_addr);
g_vo_gamma_buf[dev].gamma_phy_addr = XMEDIA_NULL;
}
#endif
return XMEDIA_FAILURE;
}
xmedia_s32 hal_vo_gamma_deinit(xmedia_vo_dev dev)
{
#ifdef VO_KERNEL
if (g_vo_gamma_buf[dev].gamma_virtual_addr != XMEDIA_NULL) {
drv_vo_mmz_unmap(g_vo_gamma_buf[dev].gamma_virtual_addr);
g_vo_gamma_buf[dev].gamma_virtual_addr = XMEDIA_NULL;
}
if (g_vo_gamma_buf[dev].gamma_phy_addr != XMEDIA_NULL) {
drv_vo_mmz_free(g_vo_gamma_buf[dev].gamma_phy_addr);
g_vo_gamma_buf[dev].gamma_phy_addr = XMEDIA_NULL;
}
#endif
return XMEDIA_SUCCESS;
}
xmedia_s32 hal_vo_init(xmedia_void)
{
xmedia_u32 ret;
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
memset(hal_ctx, 0, sizeof(vo_hal_context));
hal_vo_init_chip_capaciblity();
ret = vo_reg_map();
if (ret != XMEDIA_SUCCESS) {
return ret;
}
hal_vo_clock_init(&hal_ctx->clock_config);
return XMEDIA_SUCCESS;
}
xmedia_void hal_vo_deinit(xmedia_void)
{
//关闭所有的时钟todo
hal_vo_clock_deinit();
vo_reg_unmap();
return;
}
vo_base_cap* hal_vo_get_capacity(xmedia_void)
{
return hal_vo_get_chip_capacity();
}
vo_layer_cap* hal_get_layer_capacity(xmedia_u32 layer)
{
return hal_get_layer_chip_capacity(layer);
}
vo_dev_cap* hal_get_dev_capacity(xmedia_vo_dev dev)
{
return hal_get_dev_chip_capacity(dev);
}
xmedia_void hal_vo_set_clock_gate_enable(xmedia_bool clk_en)
{
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
hal_vo_set_clock_gate(&hal_ctx->clock_config, clk_en);
}
xmedia_void hal_vo_set_crg_clock_reset(xmedia_bool reset_en)
{
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
hal_vo_set_clock_reset_enable(&hal_ctx->clock_config, reset_en);
}
xmedia_bool hal_vo_get_crg_clock_reset_state(xmedia_void)
{
return hal_vo_get_clock_reset_sta();
}
xmedia_void hal_vo_set_clock_sel_priority(xmedia_vo_dev dev, vo_clock_priority_sel vo_clock_priority_sel)
{
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
hal_ctx->special_timing[dev].vo_clock_priority_sel = vo_clock_priority_sel;
}
xmedia_s32 hal_vo_set_crg_clock(xmedia_vo_dev dev, xmedia_u32 clk_hz, xmedia_bool clk_reverse_en,
xmedia_intf_type intf_type)
{
xmedia_bool vo_lcd_divider_priority = XMEDIA_FALSE;
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
xmedia_s32 ret = XMEDIA_SUCCESS;
//根据时钟判断是否需要使用特殊时序配置
if (hal_ctx->special_timing[dev].vo_clock_priority_sel == VO_CLOCK_PRIORITY_SEL_LCD) {
vo_lcd_divider_priority = XMEDIA_TRUE;
} else if (hal_ctx->special_timing[dev].vo_clock_priority_sel == VO_CLOCK_PRIORITY_SEL_FIX) {
vo_lcd_divider_priority = XMEDIA_FALSE;
} else {
//debug没有设置lcd分频器时，对接口类型做二次判断，lcd/lvds优先使用LCD分频器
if (intf_type == XMEDIA_INTF_TYPE_LCD || intf_type == XMEDIA_INTF_TYPE_LVDS) {
vo_lcd_divider_priority = XMEDIA_TRUE;
}
}
ret = hal_vo_set_dev_div_clock(&hal_ctx->clock_config, dev, clk_hz,
&hal_ctx->special_timing[dev].vo_special_timing_sel, vo_lcd_divider_priority);
if (ret != XMEDIA_SUCCESS) {
return ret;
}
ret = hal_vo_set_intf_clock(&hal_ctx->clock_config, dev, clk_reverse_en, intf_type);
return ret;
}
xmedia_void hal_vo_set_crg_clock_enable(xmedia_vo_dev dev, xmedia_intf_type intf_type, xmedia_bool clk_en)
{
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
hal_vo_set_dev_div_clock_enable(&hal_ctx->clock_config, dev, clk_en);
hal_vo_set_dev_clock_enable(&hal_ctx->clock_config, dev, clk_en);
hal_vo_set_intf_clock_enable(&hal_ctx->clock_config, intf_type, clk_en);
return;
}
xmedia_void hal_vo_set_crg_intf_detach_dev(xmedia_vo_dev dev, xmedia_intf_type intf_type)
{
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
hal_vo_set_intf_detach_dev(&hal_ctx->clock_config, dev, intf_type);
}
xmedia_void hal_vo_set_top_regup_enable(xmedia_bool enable)
{
hal_vo_set_top_regup(enable);
return;
}
xmedia_bool hal_vo_get_top_regup_enable(xmedia_void)
{
xmedia_bool enable = XMEDIA_FALSE;
hal_vo_get_top_regup(&enable);
return enable;
}
xmedia_void hal_vo_set_dev_intf_regup_enable(xmedia_vo_dev dev, xmedia_bool enable)
{
hal_vo_set_intf_regup(dev, enable);
return;
}
xmedia_bool hal_vo_get_dev_intf_regup_state(xmedia_vo_dev dev)
{
xmedia_bool state = XMEDIA_FALSE;
hal_vo_get_intf_regup(dev, &state);
return state;
}
xmedia_void hal_vo_set_layer_regup_enable(xmedia_vo_layer layer, xmedia_bool enable)
{
hal_vo_set_video_regup_enable(layer, enable);
return;
}
xmedia_bool hal_vo_get_layer_regup_enable(xmedia_vo_layer layer)
{
xmedia_bool enable = XMEDIA_FALSE;
hal_vo_get_video_regup(layer, &enable);
return enable;
}
xmedia_void hal_vo_get_interrupt_state(vo_int_state_type type, xmedia_u32 *state)
{
if (type == VO_INT_STATE_TYPE_MASK) {
*state = hal_vo_get_mask_interrupt_state();
} else if (type == VO_INT_STATE_TYPE_UNMASK) {
*state = hal_vo_get_unmask_interrupt_state();
} else {
*state = hal_vo_get_mask_interrupt_state();
}
return;
}
xmedia_void hal_vo_clean_interrupt_state(vo_int_state_type type, vo_isr_interrupt_type state)
{
if (type == VO_INT_STATE_TYPE_UNMASK) {
hal_vo_clear_lowband_state(XMEDIA_TRUE);
} else {
hal_vo_clear_mask_interrupt_state(state);
}
return;
}
xmedia_void hal_vo_set_interrupt_enable(vo_isr_interrupt_type int_type, xmedia_bool enable)
{
hal_vo_set_mask_interrupt_enable(int_type, enable);
return;
}
xmedia_void hal_vo_set_int_mode(xmedia_vo_dev dev, xmedia_u32 vtt_id, vo_isr_field_flag int_mode)
{
xmedia_bool frame_mode;
if ((int_mode == VO_ISR_FIELD_FLAG_TOP) || (int_mode == VO_ISR_FIELD_FLAG_BOTTOM) ||
(int_mode == VO_ISR_FIELD_FLAG_TOP_BOTTOM)) {
frame_mode = XMEDIA_TRUE;
} else {
frame_mode = XMEDIA_FALSE;
}
hal_vo_set_intf_vtt_mode(dev, vtt_id, frame_mode);
return;
}
xmedia_void hal_vo_set_dev_thd(xmedia_vo_dev dev, xmedia_u32 vtt_id, xmedia_u32 thd)
{
//设置中断有效区计数
hal_vo_set_intf_vtt_sel(dev, vtt_id, 1);
hal_vo_set_intf_vtt_thd(dev, vtt_id, thd);
return;
}
xmedia_void hal_vo_get_dev_state(xmedia_vo_dev dev, xmedia_bool *btm, xmedia_u16 *vcnt, xmedia_u8 *vstate)
{
hal_vo_get_intf_state(dev, btm, vcnt, vstate);
return;
}
xmedia_void hal_vo_set_dev_mixer_prio(xmedia_vo_dev dev, vo_mix_prio prio_id)
{
hal_vo_set_cbm_mixer_prio(dev, prio_id);
return;
}
xmedia_void hal_vo_set_dev_bgcolor(xmedia_vo_dev dev, xmedia_u32 bgcolor)
{
hal_vo_set_cbm_bgcolor(dev, bgcolor);
return;
}
xmedia_void hal_vo_get_dev_bgcolor(xmedia_vo_dev dev, xmedia_u32 *bgcolor)
{
xmedia_u32 color;
hal_vo_get_cbm_bgcolor(dev, &color);
*bgcolor = color;
return;
}
xmedia_void hal_vo_set_dev_csc_en(xmedia_vo_dev dev, xmedia_bool csc_en)
{
hal_vo_set_intf_csc_en(dev, csc_en);
return;
}
xmedia_void hal_vo_get_dev_csc_en(xmedia_vo_dev dev, xmedia_bool *csc_en)
{
hal_vo_get_intf_csc_en(dev, csc_en);
return;
}
xmedia_s32 hal_vo_set_dev_csc_coef(xmedia_vo_dev dev, vo_pic_info* pic_info)
{
vo_csc_coef csc_matrix;
if (hal_vo_csc_coef_convert(pic_info, &csc_matrix) != XMEDIA_SUCCESS) {
return XMEDIA_FAILURE;
}
hal_vo_set_intf_csc(dev, &csc_matrix);
return XMEDIA_SUCCESS;
}
/*以下关于特殊时序计算均参考 “VOUT_MIPI 时序配置说明.excel”,
*以下计算得到的值都是非-1 计算，而excel中的寄存器值都是-1运算
*/
static xmedia_void hal_vo_calc_special_timing(xmedia_vo_dev dev, xmedia_u32 frame_rate,
xmedia_vo_intf_config *intf_config, xmedia_vo_user_sync_timing *sync_timing, mipi_phy_config *mipi_phy_cfg)
{
xmedia_s32 cycle_n = 0;
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
vo_intf_special_timing * special_timing = &hal_ctx->special_timing[dev];
xmedia_u32 fixed_clock_hz;
xmedia_s32 htotal_adjust_value;
xmedia_s32 vsync_adjust_value;
switch(intf_config->intf_type) {
case XMEDIA_INTF_TYPE_BT656:
case XMEDIA_INTF_TYPE_BT1120:
case XMEDIA_INTF_TYPE_LVDS:
case XMEDIA_INTF_TYPE_LCD:
//cycle_n表示单个像素时钟倍数，lcd串行配置为3，并行为1，bt656并行yuv为2
if ((intf_config->intf_type == XMEDIA_INTF_TYPE_LCD) &&
(intf_config->lcd_attr.data_mode == XMEDIA_VO_LCD_DATA_MODE_SERIAL)) {
cycle_n = 3;
} else if (intf_config->intf_type == XMEDIA_INTF_TYPE_BT656) {
cycle_n = 2;
} else {
cycle_n = 1;
}
if (hal_vo_get_intf_clock(&hal_ctx->clock_config, dev, &fixed_clock_hz) != XMEDIA_SUCCESS) {
return;
}
/* =INT(1/I4/(I9+I10+I11+I12)/(1/(I26/I23)/10^6))
* (1/(frame_rate * (vbb + vfb + vact))) / (1/((fixed_clock_Mz/cycle_n) * 10^6))
* ((fixed_clock_Mz/cycle_n) * 10^6) / (frame_rate * (vbb + vfb + vact))
* (fixed_clock_hz/cycle_n) / (frame_rate * (vbb + vfb + vact))
*/
special_timing->fixed_clk_htotal = (fixed_clock_hz / cycle_n) / (frame_rate * (sync_timing->vbb +
sync_timing->vfb + sync_timing->vact));
/* (I27-I31-1)/2-1
* (special_timing->fixed_clk_htotal - sync_timing->hact) / 2
* 表格运算会出现小数，和逻辑沟通，向下取整忽略小数部分
*/
special_timing->fixed_clk_hbb = (special_timing->fixed_clk_htotal - sync_timing->hact) / 2;
/* I27-(I31+1)-(I29+1)-1
* fixed_clk_hfb - hact - hbb
*/
special_timing->fixed_clk_hfb = special_timing->fixed_clk_htotal - sync_timing->hact -
special_timing->fixed_clk_hbb;
special_timing->vs_st_v_filed = sync_timing->vfb;
special_timing->vs_end_v_filed = special_timing->vs_st_v_filed + sync_timing->vpw;
VO_TRACE(MODULE_DBG_DEBUG,
"fixed_clk_htotal %d fixed_clock_hz %d fixed_clk_hbb %d fixed_clk_hfb %d\n",
special_timing->fixed_clk_htotal, fixed_clock_hz,
special_timing->fixed_clk_hbb, special_timing->fixed_clk_hfb);
VO_TRACE(MODULE_DBG_DEBUG, "vs_st_v_filed %d vs_end_v_filed %d\n",
special_timing->vs_st_v_filed, special_timing->vs_end_v_filed);
break;
case XMEDIA_INTF_TYPE_MIPI_DSI:
if (hal_vo_get_intf_clock(&hal_ctx->clock_config, dev, &fixed_clock_hz) != XMEDIA_SUCCESS) {
return;
}
htotal_adjust_value = (vo_mipi_htotal_adjust_value != 0) ? vo_mipi_htotal_adjust_value :
mipi_phy_cfg->phy_htotal_adjust;
vsync_adjust_value = (vo_mipi_vsync_adjust_value != 0) ? vo_mipi_vsync_adjust_value :
mipi_phy_cfg->phy_vsync_adjust;
/*
* INT(D20/D15*D26) + FIXCLOCK_HTOTAL_AJUST_VALUE
* hal_ctx->mipi_phy_cfg.phy_vid_hline_time * fixed_clock_Mhz / phy_lanebyte_clock_hzMhz + AJUST
* hal_ctx->mipi_phy_cfg.phy_vid_hline_time * fixed_clock_hz / phy_lanebyte_clock_hzhz + AJUST
* hal_ctx->mipi_phy_cfg.phy_vid_hline_time * (fixed_clock_hz/1000) / (phy_lanebyte_clock_hzhz/1000) + AJUST
*/
special_timing->fixed_clk_htotal = (hal_ctx->mipi_phy_cfg.phy_vid_hline_time * (fixed_clock_hz/1000)) /
(hal_ctx->mipi_phy_cfg.phy_lanebyte_clock_hz/1000) + htotal_adjust_value;
// = D7 => hbp => hbb - hpw
special_timing->fixed_clk_hbb = sync_timing->hbb - sync_timing->hpw;
// D29-(D33+1)-(D31+1) => fixed_clk_htotal - vact - fixed_clk_hbb
special_timing->fixed_clk_hfb = special_timing->fixed_clk_htotal - sync_timing->hact -
special_timing->fixed_clk_hbb;
// D34 + 1 + D28 => vfb + 1 + FIXCLOCK_VSYNC_AJUST_VALUE
special_timing->vs_st_v_filed = sync_timing->vfb + 1 + vsync_adjust_value - 1;
// D39 + D21 => vs_st_v_filed + vpw
special_timing->vs_end_v_filed = special_timing->vs_st_v_filed + sync_timing->vpw;
VO_TRACE(MODULE_DBG_DEBUG,
"fixed_clk_htotal %d phy_vid_hline_time %d fixed_clock_hz %d phy_lanebyte_clock_hz %d! fixed_clk_hbb %d fixed_clk_hfb %d\n",
special_timing->fixed_clk_htotal, hal_ctx->mipi_phy_cfg.phy_vid_hline_time, fixed_clock_hz,
hal_ctx->mipi_phy_cfg.phy_lanebyte_clock_hz, special_timing->fixed_clk_hbb, special_timing->fixed_clk_hfb);
VO_TRACE(MODULE_DBG_DEBUG, "vs_st_v_filed %d vs_end_v_filed %d\n",
special_timing->vs_st_v_filed, special_timing->vs_end_v_filed);
break;
default:
break;
}
}
xmedia_void hal_vo_set_dev_intf_timing(xmedia_vo_dev dev, xmedia_u32 frame_rate,
xmedia_vo_intf_config *intf_config, xmedia_vo_user_sync_timing *sync_timing)
{
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
#ifdef VO_KERNEL
ddr_ost_info ost_value;
#endif
hal_vo_set_intf_cnt_pos(dev);
if (hal_ctx->special_timing[dev].vo_special_timing_sel) {
hal_vo_calc_special_timing(dev, frame_rate, intf_config, sync_timing, &hal_ctx->mipi_phy_cfg);
}
hal_vo_set_intf_timing(dev, frame_rate, intf_config, sync_timing, &hal_ctx->special_timing[dev]);
hal_vo_set_intf_fifo(dev, VO_FIFO_DEPTH);
#ifdef VO_KERNEL
drv_ddr_get_ost(XMEDIA_MOD_ID_VO, &ost_value);
#endif
hal_vo_set_dma_standing(dev, 8);
switch(intf_config->intf_type){
case XMEDIA_INTF_TYPE_BT656:
hal_vo_set_bt656_intf_cfg(dev, &(intf_config->bt656_attr));
break;
case XMEDIA_INTF_TYPE_BT1120:
hal_vo_set_bt1120_intf_cfg(dev, &(intf_config->bt1120_attr));
break;
case XMEDIA_INTF_TYPE_LCD:
hal_vo_set_lcd_intf_cfg(dev, &(intf_config->lcd_attr));
break;
case XMEDIA_INTF_TYPE_MIPI_DSI:
hal_vo_set_mipi_intf_cfg(dev, &(intf_config->mipi_attr));
break;
case XMEDIA_INTF_TYPE_LVDS:
hal_vo_set_lvds_intf_cfg(dev, &(intf_config->lvds_attr));
break;
default:
break;
}
//intf 时钟相关绑定及门控 在前级set crg中做了
return;
}
xmedia_void hal_vo_set_dev_intf_enable(xmedia_vo_dev dev, xmedia_bool enable)
{
xmedia_bool intf_en[XMEDIA_VO_DEV_MAX];
xmedia_vo_dev i;
hal_vo_set_intf_enable(dev, enable);
for (i = 0; i < XMEDIA_VO_DEV_MAX; i++) {
hal_vo_get_intf_enable(i, &intf_en[i]);
}
return;
}
xmedia_void hal_vo_get_dev_intf_enable(xmedia_vo_dev dev, xmedia_bool *enable)
{
hal_vo_get_intf_enable(dev, enable);
return;
}
xmedia_void hal_vo_set_layer_enable(xmedia_vo_layer layer, xmedia_bool enable)
{
hal_vo_set_enable(layer, enable);
return;
}
xmedia_void hal_vo_get_layer_enable(xmedia_vo_layer layer, xmedia_bool *enable)
{
hal_vo_get_enable(layer,enable);
return;
}
xmedia_void hal_vo_set_layer_bg_color(xmedia_vo_layer layer, xmedia_u32 bgcolor)
{
hal_vo_set_bgcolor(layer, bgcolor);
return;
}
xmedia_void hal_vo_set_layer_mute_enable(xmedia_vo_layer layer, xmedia_bool enable)
{
hal_vo_set_mute_enable(layer, enable);
return;
}
xmedia_void hal_vo_set_layer_mute_color(xmedia_vo_layer layer, xmedia_u32 bgcolor)
{
hal_vo_set_mute_enable(layer, bgcolor);
return;
}
xmedia_void hal_vo_set_layer_csc_en(xmedia_vo_layer layer, xmedia_bool csc_en)
{
hal_vo_set_csc_en(layer, csc_en);
return;
}
xmedia_s32 hal_vo_set_layer_csc_coef(xmedia_vo_layer layer, vo_pic_info* pic_info)
{
vo_csc_coef csc_matrix;
xmedia_bool multi_en;
hal_vo_set_alpha(layer, 0xFF);
if (hal_vo_csc_coef_convert(pic_info, &csc_matrix) != XMEDIA_SUCCESS) {
return XMEDIA_FAILURE;
}
hal_vo_get_multi_enable(layer, &multi_en);
if (multi_en == XMEDIA_TRUE) {
hal_vo_set_mrg0_csc(layer, &csc_matrix);
hal_vo_set_mrg1_csc(layer, &csc_matrix);
hal_vo_set_mrg2_csc(layer, &csc_matrix);
hal_vo_set_mrg3_csc(layer, &csc_matrix);
} else {
//单区域的csc复用多区域0的csc
hal_vo_set_csc(layer, &csc_matrix);
}
return XMEDIA_SUCCESS;
}
xmedia_void hal_vo_set_layer_disp_rect(xmedia_vo_layer layer, xmedia_video_rect *disp_rect)
{
hal_vo_set_disp_rect(layer, disp_rect);
return;
}
xmedia_void hal_vo_get_layer_disp_rect(xmedia_vo_layer layer, xmedia_video_rect *disp_rect)
{
hal_vo_get_disp_rect(layer, disp_rect);
return;
}
//单区域模式 设定真实内容相对于层的rect
xmedia_void hal_vo_set_layer_reso_rect(xmedia_vo_layer layer, xmedia_video_rect *reso_rect)
{
hal_vo_set_src_rect(layer, reso_rect);
return;
}
xmedia_void hal_vo_get_layer_reso_rect(xmedia_vo_layer layer, xmedia_video_rect *reso_rect)
{
hal_vo_get_src_rect(layer, reso_rect);
return;
}
xmedia_void hal_vo_set_layer_pixel_format(xmedia_vo_layer layer, xmedia_video_pixel_format pix_format)
{
vo_pixel_format format = VO_PIXEL_FMT_YUV_420;
xmedia_bool uv_order = 0;
//注意下逻辑的排序与应用理解的UV是方向的
if (pix_format == XMEDIA_VIDEO_PIXEL_FMT_YUV_SEMIPLANAR_420) {
format = VO_PIXEL_FMT_YUV_420;
uv_order = 1;
} else if (pix_format == XMEDIA_VIDEO_PIXEL_FMT_YVU_SEMIPLANAR_420) {
format = VO_PIXEL_FMT_YUV_420;
uv_order = 0;
} else if (pix_format == XMEDIA_VIDEO_PIXEL_FMT_YUV_SEMIPLANAR_422) {
format = VO_PIXEL_FMT_YUV_422;
uv_order = 1;
} else if (pix_format == XMEDIA_VIDEO_PIXEL_FMT_YVU_SEMIPLANAR_422) {
format = VO_PIXEL_FMT_YUV_422;
uv_order = 0;
} else if (pix_format == XMEDIA_VIDEO_PIXEL_FMT_YUV_400) {
format = VO_PIXEL_FMT_YUV_400;
uv_order = 0;
} else {
format = VO_PIXEL_FMT_YUV_420;
uv_order = 1;
}
hal_vo_set_src_pixel_format(layer, format, uv_order);
return;
}
//单区域和多区域控制
xmedia_void hal_vo_set_layer_multi_enable(xmedia_vo_layer layer, xmedia_bool enable)
{
hal_vo_set_multi_enable(layer, enable);
return;
}
xmedia_void hal_vo_get_layer_multi_enable(xmedia_vo_layer layer, xmedia_bool *enable)
{
hal_vo_get_multi_enable(layer, enable);
return;
}
xmedia_void hal_vo_set_layer_region_enable(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_bool enable)
{
hal_vo_set_mrg_enable(layer, region_id, enable);
return;
}
xmedia_void hal_vo_get_layer_region_enable(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_bool *enable)
{
hal_vo_get_mrg_enable(layer, region_id, enable);
return;
}
xmedia_void hal_vo_set_layer_region_mrg_enable(xmedia_vo_layer layer, xmedia_u32 region_id,
xmedia_bool enable)
{
hal_vo_set_mrg_enable(layer, region_id, enable);
return;
}
xmedia_void hal_vo_set_layer_region_mute_color(xmedia_vo_layer layer, xmedia_u32 region_id,
xmedia_u32 bgcolor)
{
hal_vo_set_mrg_mute_color(layer, region_id, bgcolor);
return;
}
xmedia_void hal_vo_set_layer_single_region_cfg(xmedia_vo_layer layer, vo_layer_single_cfg *single_cfg)
{
//真实内容 相对于显示窗口的rect
hal_vo_set_src_rect(layer, &(single_cfg->frame_rect));
//层 相对于显示窗口的rect
hal_vo_set_dst_rect(layer, &(single_cfg->video_rect));
hal_vo_set_addr(layer, &(single_cfg->frame_addr));
hal_vo_set_mute_enable(layer, single_cfg->mute_en);
hal_vo_set_mrg_rdma1_en(layer, XMEDIA_FALSE);
return;
}
xmedia_void hal_vo_set_layer_multi_region_cfg(xmedia_vo_layer layer, vo_layer_multi_cfg *multi_cfg)
{
xmedia_u32 id;
id = multi_cfg->region_id;
hal_vo_set_mrg_enable(layer, id, multi_cfg->region[id].enable);
hal_vo_set_mrg_src_rect(layer,id, &(multi_cfg->region[id].src_rect));
hal_vo_set_mrg_dst_rect(layer,id, &(multi_cfg->region[id].dst_rect));
hal_vo_set_mrg_addr(layer,id, &(multi_cfg->region[id].region_addr));
if (multi_cfg->region_overlap) {
hal_vo_set_mrg_rdma1_en(layer, XMEDIA_TRUE);
//rdma0+rdma1 rdma1绑定优先级最高的
hal_vo_set_mrg_mixer_prio(layer, VO_MRG_MIX_PRIO_RDMA0);
hal_vo_set_mrg_rdma1_link(layer, multi_cfg->overlap_id);
} else {
hal_vo_set_mrg_rdma1_en(layer, XMEDIA_FALSE);
hal_vo_set_mrg_mixer_prio(layer, VO_MRG_MIX_PRIO_RDMA0);
}
//sort的配置会影响画面的输出
hal_vo_set_mrg_sort(layer, multi_cfg->region_sort);
return;
}
xmedia_void hal_vo_set_dev_debug_pattern(xmedia_vo_dev dev, vo_pattern_info *pattern_info)
{
hal_vo_set_intf_mute_enable(dev, pattern_info->pattern_en);
hal_vo_set_intf_mute_pattern_mode(dev, pattern_info->pattern_mode);
hal_vo_set_intf_mute_data_mode(dev, pattern_info->data_mode);
hal_vo_set_intf_mute_color(dev, pattern_info->color, pattern_info->color);
hal_vo_set_intf_cbar_sel(dev, pattern_info->rgb);
if (pattern_info->pattern_mode == VO_PATTERN_MODE_CHECKER) {
hal_vo_set_intf_checkbar_size(dev, pattern_info->width, pattern_info->height);
hal_vo_set_intf_mute_color(dev, pattern_info->color, !(pattern_info->color));
}
return;
}
xmedia_void hal_vo_set_layer_debug_pattern(xmedia_vo_layer layer, vo_pattern_info *pattern_info)
{
vo_pattern_mode mode = VO_PATTERN_MODE_FULLCOLOR;
mode = pattern_info->pattern_mode;
if ((mode != VO_PATTERN_MODE_FULLCOLOR) && (mode != VO_PATTERN_MODE_CHECKER)) {
mode = VO_PATTERN_MODE_FULLCOLOR;
}
hal_vo_set_mute_enable(layer, pattern_info->pattern_en);
hal_vo_set_mute_pattern_mode(layer, pattern_info->pattern_mode);
hal_vo_set_mute_data_mode(layer, pattern_info->data_mode);
hal_vo_set_mute_color(layer, pattern_info->color);
if (mode == VO_PATTERN_MODE_CHECKER) {
hal_vo_set_checkbar_size(layer, pattern_info->width, pattern_info->height);
}
return;
}
xmedia_void hal_vo_set_debug_ink(xmedia_vo_dev dev, vo_csc_ink_info *ink_info)
{
hal_vo_set_intf_ink(dev, ink_info);
return;
}
xmedia_void hal_vo_get_debug_checksum(xmedia_vo_dev dev, xmedia_u32 *y, xmedia_u32 *u, xmedia_u32 *v)
{
hal_vo_get_intf_checksum_value(dev, y, u,v);
return;
}
xmedia_s32 hal_vo_enable_dev_phy_cfg(xmedia_vo_dev dev, xmedia_u32 clk_hz, xmedia_u32 frame_rate,
xmedia_vo_user_sync_timing *sync_timing,
xmedia_intf_type intf_type)
{
xmedia_s32 ret = XMEDIA_SUCCESS;
vo_hal_context * hal_ctx = hal_vo_get_hal_context();
switch(intf_type){
case XMEDIA_INTF_TYPE_MIPI_DSI:
ret = hal_vo_set_mipi_tx_phy_cfg(dev, frame_rate, sync_timing, &hal_ctx->mipi_phy_cfg,
hal_ctx->special_timing[dev].vo_special_timing_sel);
break;
case XMEDIA_INTF_TYPE_LVDS:
ret = hal_vo_enable_lvds_phy_cfg(clk_hz);
break;
case XMEDIA_INTF_TYPE_BT656:
case XMEDIA_INTF_TYPE_BT1120:
case XMEDIA_INTF_TYPE_LCD:
default:
break;
}
return ret;
}
xmedia_void hal_vo_disable_dev_phy_cfg(xmedia_intf_type intf_type)
{
switch(intf_type){
case XMEDIA_INTF_TYPE_MIPI_DSI:
hal_vo_set_mipi_tx_phy_reset();
break;
case XMEDIA_INTF_TYPE_LVDS:
hal_vo_disable_lvds_phy_cfg();
break;
case XMEDIA_INTF_TYPE_BT656:
case XMEDIA_INTF_TYPE_BT1120:
case XMEDIA_INTF_TYPE_LCD:
default:
break;
}
return;
}
xmedia_s32 vo_calc_dev_phy_clk_cfg(xmedia_vo_dev dev, xmedia_u32 clk_hz, xmedia_vo_intf_config *intf_config)
{
xmedia_s32 ret = XMEDIA_SUCCESS;
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
switch(intf_config->intf_type){
case XMEDIA_INTF_TYPE_MIPI_DSI:
ret = vo_calculate_mipi_phy_cfg(dev, clk_hz, &intf_config->mipi_attr, &hal_ctx->mipi_phy_cfg);
break;
case XMEDIA_INTF_TYPE_LVDS:
case XMEDIA_INTF_TYPE_BT656:
case XMEDIA_INTF_TYPE_BT1120:
case XMEDIA_INTF_TYPE_LCD:
default:
break;
}
return ret;
}
#ifdef VO_KERNEL
xmedia_void hal_vo_set_gamma_addr(xmedia_vo_dev dev)
{
hal_vo_gamma_set_addr(dev, g_vo_gamma_buf[dev].gamma_phy_addr);
}
xmedia_void hal_vo_set_gamma_enable(xmedia_vo_dev dev, xmedia_bool enable)
{
hal_vo_gamma_enable(dev, enable);
}
xmedia_void hal_vo_set_gamma_table(xmedia_vo_dev dev, xmedia_vo_gamma_table *gamma_table)
{
hal_vo_gamma_set_table(dev, g_vo_gamma_buf[dev].gamma_virtual_addr, g_vo_gamma_buf[dev].gamma_mem_len, gamma_table);
}
xmedia_void hal_vo_get_gamma_table(xmedia_vo_dev dev, xmedia_vo_gamma_table *gamma_table)
{
hal_vo_gamma_get_table(dev, g_vo_gamma_buf[dev].gamma_virtual_addr, g_vo_gamma_buf[dev].gamma_mem_len, gamma_table);
}
xmedia_s32 hal_vo_reg_record(xmedia_void)
{
xmedia_u32 idx, section_num;
xmedia_ulong offset = 0;
xmedia_u32 malloc_size = 0;
section_num = sizeof(g_vo_reg_offset) / sizeof(xmedia_ulong) / OFFSET_ELE_NUM;
for (idx = 0; idx < section_num; idx++) {
malloc_size += g_vo_reg_offset[idx][1];
}
if (g_vo_reg_record != XMEDIA_NULL) {
VO_TRACE(MODULE_DBG_ERR,"g_vo_reg_record is not null,please check!\n");
return XMEDIA_FAILURE;
} else {
g_vo_reg_record = (xmedia_u8 *)osal_kmalloc(malloc_size, osal_gfp_kernel);
}
for (idx = 0; idx < section_num; idx++) {
osal_memcpy((xmedia_void *)((xmedia_uintptr_t)g_vo_reg_record + offset),
(xmedia_void *)((xmedia_uintptr_t)g_p_vout_reg + g_vo_reg_offset[idx][0]), g_vo_reg_offset[idx][1]);
offset += g_vo_reg_offset[idx][1];
}
return XMEDIA_SUCCESS;
}
xmedia_s32 hal_vo_reg_restore(xmedia_void)
{
xmedia_u32 idx;
xmedia_u32 section_num;
xmedia_ulong offset = 0;
if (g_vo_reg_record == XMEDIA_NULL) {
VO_TRACE(MODULE_DBG_ERR,"g_vo_reg_record is null,please check!\n");
return XMEDIA_FAILURE;
}
section_num = sizeof(g_vo_reg_offset) / sizeof(xmedia_ulong) / OFFSET_ELE_NUM;
for (idx = 0; idx < section_num; idx++) {
osal_memcpy((xmedia_void *)(xmedia_uintptr_t)((xmedia_ulong)(xmedia_uintptr_t)g_p_vout_reg + g_vo_reg_offset[idx][0]),
(xmedia_void *)(xmedia_uintptr_t)((xmedia_ulong)(xmedia_uintptr_t)g_vo_reg_record + offset),
g_vo_reg_offset[idx][1]);
offset += g_vo_reg_offset[idx][1];
}
osal_kfree(g_vo_reg_record);
g_vo_reg_record = XMEDIA_NULL;
return XMEDIA_SUCCESS;
}
#endif
source/bootloader/product/driver/vo/hal/xmfalcon/hal_vo_chip_cfg.c
Executable
+619
View File
@@ -0,0 +1,619 @@
/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#include "hal_vo_chip_cfg.h"
#define VO_IRQ_NAME "intr_vo"
#define VO_INTF_NOT_MIPI_MAX_WHIDTH 1920
#define VO_INTF_NOT_MIPI_MAX_CLK 148500000
#define VO_INTF_MIPI_MAX_CLK 297000000
#define VO_IRQ_NUM_7606V1 47
xmedia_s32 g_vo_irq = VO_IRQ_NUM_7606V1;
static vo_base_cap g_vo_cap;
static xmedia_bool g_vo_cap_is_inited = XMEDIA_FALSE;
static vo_layer_cap g_layer_capability[XMEDIA_VO_LAYER_MAX];
static vo_dev_cap g_dev_capability[XMEDIA_VO_DEV_MAX];
static xmedia_void vo_init_chip_capacity(xmedia_void)
{
g_vo_cap.irq_name = VO_IRQ_NAME;
g_vo_cap.irq_num = g_vo_irq;
g_vo_cap.irq_cpumask = 0;
g_vo_cap.vo_phy_addr = 0x11420000;
g_vo_cap.chip_name = "xm7606v1";
g_vo_cap.chip_revision = 0;
g_vo_cap.chip_type = 0;
g_vo_cap.board_id =0;
return;
}
static xmedia_void vo_init_chip_dev_capacity(xmedia_void)
{
int i = 0;
for (i = 0; i < XMEDIA_VO_DEV_MAX; i++) {
g_dev_capability[i].support_video_layer_num = 1;
g_dev_capability[i].support_gfx_layer_num = 1;
g_dev_capability[i].support_max_layer_num = 2;
g_dev_capability[i].support_intf_num = 1;
g_dev_capability[i].support_csc_num = 3;
if(i == XMEDIA_VO_DEV_1) {
g_dev_capability[i].max_size.width = 1920;
g_dev_capability[i].max_size.height = 1080;
} else {
g_dev_capability[i].max_size.width = 3840;
g_dev_capability[i].max_size.height = 2160;
}
g_dev_capability[i].max_frame_rate = 60;
g_dev_capability[i].support_ink = XMEDIA_TRUE;
g_dev_capability[i].support_attach_layer = XMEDIA_FALSE;
}
return;
}
static xmedia_void vo_init_chip_layer_capacity(xmedia_void)
{
int i = 0;
for (i = 0; i < XMEDIA_VO_LAYER_MAX; i++) {
g_layer_capability[i].support_hdr = XMEDIA_FALSE;
g_layer_capability[i].support_flip = XMEDIA_FALSE;
g_layer_capability[i].support_mirror = XMEDIA_FALSE;
g_layer_capability[i].support_zme = XMEDIA_FALSE;
g_layer_capability[i].support_dcmp = XMEDIA_FALSE;
g_layer_capability[i].support_region = XMEDIA_TRUE;
g_layer_capability[i].region_num = 4;
if(i == XMEDIA_VO_DEV_1) {
g_layer_capability[i].max_read_size.width = 1920;
g_layer_capability[i].max_read_size.height = 1080;
} else {
g_layer_capability[i].max_read_size.width = 3840;
g_layer_capability[i].max_read_size.height = 2160;
}
g_layer_capability[i].min_out_size.width = 32;
g_layer_capability[i].min_out_size.height = 32;
g_layer_capability[i].support_max_bit_width = 8;
g_layer_capability[i].support_pixformat_num = 5;
}
return;
}
static xmedia_s32 vo_check_bt656_attr(xmedia_vo_dev dev, xmedia_vo_bt656_attr *bt656_attr,
xmedia_vo_intf_sync intf_sync)
{
if (bt656_attr->data_type != XMEDIA_INTF_BT_DATA_TYPE_YUV422_8BIT) {
VO_TRACE(MODULE_DBG_ERR,"dev %d bt656 intf not support data_type(%d) !\n", dev, bt656_attr->data_type);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((bt656_attr->data_seq != XMEDIA_INTF_BT601_BT656_DATA_SEQ_UYVY) &&
(bt656_attr->data_seq != XMEDIA_INTF_BT601_BT656_DATA_SEQ_VYUY) &&
(bt656_attr->data_seq != XMEDIA_INTF_BT601_BT656_DATA_SEQ_YUYV) &&
(bt656_attr->data_seq != XMEDIA_INTF_BT601_BT656_DATA_SEQ_YVYU)){
VO_TRACE(MODULE_DBG_ERR,"dev %d bt656 intf not support data_seq(%d) !\n", dev, bt656_attr->data_seq);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((intf_sync != XMEDIA_VO_INTF_SYNC_USER) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_PAL) && (intf_sync != XMEDIA_VO_INTF_SYNC_NTSC) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_960H_PAL) && (intf_sync != XMEDIA_VO_INTF_SYNC_960H_NTSC)) {
VO_TRACE(MODULE_DBG_ERR,"dev %d bt656 intf, intfsync %d illegal!\n", dev, intf_sync);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
return XMEDIA_SUCCESS;
}
static xmedia_s32 vo_check_bt1120_attr(xmedia_vo_dev dev, xmedia_vo_bt1120_attr *bt1120_attr,
xmedia_vo_intf_sync intf_sync)
{
if (bt1120_attr->data_type != XMEDIA_INTF_BT_DATA_TYPE_YUV422_8BIT) {
VO_TRACE(MODULE_DBG_ERR,"dev %d bt1120 intf not support data_type(%d) !\n", dev, bt1120_attr->data_type);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((bt1120_attr->data_seq != XMEDIA_INTF_BT1120_DATA_SEQ_UVUV) &&
(bt1120_attr->data_seq != XMEDIA_INTF_BT1120_DATA_SEQ_VUVU)){
VO_TRACE(MODULE_DBG_ERR,"dev %d bt1120 intf not support data_seq(%d) !\n", dev, bt1120_attr->data_seq);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((intf_sync != XMEDIA_VO_INTF_SYNC_USER) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_1080P24) && (intf_sync != XMEDIA_VO_INTF_SYNC_1080P25) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_1080P30) && (intf_sync != XMEDIA_VO_INTF_SYNC_1080I50) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_1080I60) && (intf_sync != XMEDIA_VO_INTF_SYNC_1080P50) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_1080P60) && (intf_sync != XMEDIA_VO_INTF_SYNC_720P50) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_720P60) && (intf_sync != XMEDIA_VO_INTF_SYNC_576P50) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_480P60) && (intf_sync != XMEDIA_VO_INTF_SYNC_960H_PAL) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_960H_NTSC)) {
VO_TRACE(MODULE_DBG_ERR,"dev %d bt1120 intf, intfsync %d illegal!\n", dev, intf_sync);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
return XMEDIA_SUCCESS;
}
static xmedia_s32 vo_check_lcd_sync(xmedia_vo_dev dev, xmedia_vo_lcd_attr *lcd_attr,
xmedia_vo_intf_sync intf_sync)
{
xmedia_intf_lcd_data_type data_type = lcd_attr->data_type;
xmedia_vo_lcd_data_mode data_mode = lcd_attr->data_mode;
//XMEDIA_VO_INTF_SYNC_USER lcd 用户自定义时序 是否会有问题????
if ((data_mode == XMEDIA_VO_LCD_DATA_MODE_SERIAL) && (data_type == XMEDIA_INTF_LCD_DATA_TYPE_RGB666_18BIT)) {
if ((intf_sync != XMEDIA_VO_INTF_SYNC_320x240_50) && (intf_sync != XMEDIA_VO_INTF_SYNC_240x320_50) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_USER)) {
VO_TRACE(MODULE_DBG_ERR,"For LCD 6bit intface,dev %d intfsync %d illegal!\n", dev, intf_sync);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
if ((data_mode == XMEDIA_VO_LCD_DATA_MODE_SERIAL) && (data_type == XMEDIA_INTF_LCD_DATA_TYPE_RGB888_24BIT)) {
if ((intf_sync != XMEDIA_VO_INTF_SYNC_320x240_60) && (intf_sync != XMEDIA_VO_INTF_SYNC_USER)) {
VO_TRACE(MODULE_DBG_ERR,"For LCD 8bit intface,dev %d intfsync %d illegal!\n", dev, intf_sync);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
if ((data_mode == XMEDIA_VO_LCD_DATA_MODE_PARA) && (data_type == XMEDIA_INTF_LCD_DATA_TYPE_RGB565_16BIT)) {
if ((intf_sync != XMEDIA_VO_INTF_SYNC_240x320_60) && (intf_sync != XMEDIA_VO_INTF_SYNC_640x480_60) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_USER)) {
VO_TRACE(MODULE_DBG_ERR,"For LCD 16bit intface,dev %d intfsync %d illegal!\n", dev, intf_sync);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
if ((data_mode == XMEDIA_VO_LCD_DATA_MODE_PARA) && (data_type == XMEDIA_INTF_LCD_DATA_TYPE_RGB666_18BIT)) {
if ((intf_sync != XMEDIA_VO_INTF_SYNC_240x320_60) && (intf_sync != XMEDIA_VO_INTF_SYNC_640x480_60) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_USER)) {
VO_TRACE(MODULE_DBG_ERR,"For LCD 18bit intface,dev %d intfsync %d illegal!\n", dev, intf_sync);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
if ((data_mode == XMEDIA_VO_LCD_DATA_MODE_PARA) && (data_type == XMEDIA_INTF_LCD_DATA_TYPE_RGB888_24BIT)) {
if ((intf_sync != XMEDIA_VO_INTF_SYNC_240x320_60) && (intf_sync != XMEDIA_VO_INTF_SYNC_640x480_60) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_800x480_50) && (intf_sync != XMEDIA_VO_INTF_SYNC_USER)) {
VO_TRACE(MODULE_DBG_ERR,"For LCD 24bit intface,dev %d intfsync %d illegal!\n", dev, intf_sync);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
return XMEDIA_SUCCESS;
}
static xmedia_s32 vo_check_lcd_attr(xmedia_vo_dev dev, xmedia_vo_lcd_attr *lcd_attr,
xmedia_vo_intf_sync intf_sync)
{
xmedia_intf_lcd_data_type data_type = lcd_attr->data_type;
xmedia_vo_lcd_data_mode data_mode = lcd_attr->data_mode;
if ((data_type != XMEDIA_INTF_LCD_DATA_TYPE_RGB565_16BIT) && (data_type != XMEDIA_INTF_LCD_DATA_TYPE_RGB666_18BIT) &&
(data_type != XMEDIA_INTF_LCD_DATA_TYPE_RGB888_24BIT)) {
VO_TRACE(MODULE_DBG_ERR,"dev %d lcd intf not support data_type(%d) !\n", dev, data_type);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((data_mode != XMEDIA_VO_LCD_DATA_MODE_SERIAL) && (data_mode != XMEDIA_VO_LCD_DATA_MODE_PARA)) {
VO_TRACE(MODULE_DBG_ERR,"dev %d lcd intf not support data_mode(%d) !\n", dev, data_mode);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((lcd_attr->data_seq != XMEDIA_INTF_LCD_DATA_SEQ_RGB) && (lcd_attr->data_seq != XMEDIA_INTF_LCD_DATA_SEQ_RBG) &&
(lcd_attr->data_seq != XMEDIA_INTF_LCD_DATA_SEQ_GRB) && (lcd_attr->data_seq != XMEDIA_INTF_LCD_DATA_SEQ_GBR) &&
(lcd_attr->data_seq != XMEDIA_INTF_LCD_DATA_SEQ_BRG) && (lcd_attr->data_seq != XMEDIA_INTF_LCD_DATA_SEQ_BGR)) {
VO_TRACE(MODULE_DBG_ERR,"dev %d lcd intf not support data_seq(%d) !\n", dev, lcd_attr->data_seq);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if (data_mode == XMEDIA_VO_LCD_DATA_MODE_SERIAL) {
if ((data_type != XMEDIA_INTF_LCD_DATA_TYPE_RGB666_18BIT) && (data_type != XMEDIA_INTF_LCD_DATA_TYPE_RGB888_24BIT)) {
VO_TRACE(MODULE_DBG_ERR,"dev %d lcd intf support 18&24 bit in serial mode(%d) !\n", dev, data_type);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
return vo_check_lcd_sync(dev, lcd_attr, intf_sync);
}
static xmedia_s32 vo_check_mipi_attr(xmedia_vo_dev dev, xmedia_vo_mipi_attr *mipi_attr,
xmedia_vo_intf_sync intf_sync)
{
#ifdef VO_KERNEL
if (!(CHIP_ONLY_SUPPORT_MIPITX() || CHIP_BOTH_SUPPORT_MIPITX_LVDSTX())) {
VO_TRACE(MODULE_DBG_ERR,"dev %d mipi intf not support, CHIP_TYPE err!\n", dev);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
#endif
xmedia_s32 i, j;
for (i = XMEDIA_VO_MIPI_LANE_DATA0; i < XMEDIA_VO_MIPI_LANE_MAX - 1; i++) {
for (j = i + 1; j < XMEDIA_VO_MIPI_LANE_MAX; j++) {
if (mipi_attr->lane_sel[i] == mipi_attr->lane_sel[j]) {
VO_TRACE(MODULE_DBG_ERR,"dev %d mipi intf not support duplicate (lane sel[%d] and lane_sel[%d])!\n",
dev, mipi_attr->lane_sel[i], mipi_attr->lane_sel[j]);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if (mipi_attr->lane_sel[i] >= XMEDIA_VO_MIPI_LANE_MAX) {
VO_TRACE(MODULE_DBG_ERR,"dev %d mipi intf, mipi lane sel is out of support(%d) !\n",
dev, mipi_attr->lane_sel[i]);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if (mipi_attr->lane_sel[j] >= XMEDIA_VO_MIPI_LANE_MAX) {
VO_TRACE(MODULE_DBG_ERR,"dev %d mipi intf, mipi lane sel is out of support(%d) !\n",
dev, mipi_attr->lane_sel[j]);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
}
for (i = XMEDIA_VO_MIPI_LANE_DATA0; i < XMEDIA_VO_MIPI_LANE_MAX; i++) {
if ((mipi_attr->lane_pn_swap[i] != XMEDIA_TRUE) && (mipi_attr->lane_pn_swap[i] != XMEDIA_FALSE)) {
VO_TRACE(MODULE_DBG_ERR,"dev %d mipi intf, mipi lane swap is out of support(%d) !\n",
dev, mipi_attr->lane_pn_swap[j]);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
if ((mipi_attr->data_type != XMEDIA_INTF_MIPI_DSI_DATA_TYPE_YUV422_16BIT) &&
(mipi_attr->data_type != XMEDIA_INTF_MIPI_DSI_DATA_TYPE_RGB666_18BIT) &&
(mipi_attr->data_type != XMEDIA_INTF_MIPI_DSI_DATA_TYPE_RGB888_24BIT)){
VO_TRACE(MODULE_DBG_ERR,"dev %d lcd intf not support data_type(%d) !\n", dev, mipi_attr->data_type);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
//需要测试是否支持所有的这些分辨率
if ((intf_sync != XMEDIA_VO_INTF_SYNC_USER) &&
(((intf_sync >= XMEDIA_VO_INTF_SYNC_3840x2160_50) && (intf_sync <= XMEDIA_VO_INTF_SYNC_4096x2160_60)) ||
(intf_sync == XMEDIA_VO_INTF_SYNC_7680x4320_30) || (intf_sync == XMEDIA_VO_INTF_SYNC_PAL) ||
(intf_sync == XMEDIA_VO_INTF_SYNC_NTSC) || (intf_sync == XMEDIA_VO_INTF_SYNC_960H_PAL) ||
(intf_sync == XMEDIA_VO_INTF_SYNC_960H_NTSC) || (intf_sync == XMEDIA_VO_INTF_SYNC_1080I50) ||
(intf_sync == XMEDIA_VO_INTF_SYNC_1080I60))) {
VO_TRACE(MODULE_DBG_ERR,"dev %d mipi intf, intfsync %d illegal!\n", dev, intf_sync);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if (mipi_attr->mipi_lane_num < XMEDIA_VO_MIPI_LANE_DEFAULT || mipi_attr->mipi_lane_num >= XMEDIA_VO_MIPI_LANE_NUM_MAX) {
VO_TRACE(MODULE_DBG_ERR, "dev %d not support mipi_lane_num %d", dev, mipi_attr->mipi_lane_num);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if (mipi_attr->mipi_lane_num == XMEDIA_VO_MIPI_LANE_DEFAULT) {
mipi_attr->mipi_lane_num = XMEDIA_VO_MIPI_LANE_NUM4;
VO_TRACE(MODULE_DBG_INFO, "mipi_lane_num %d\n", mipi_attr->mipi_lane_num);
}
return XMEDIA_SUCCESS;
}
static xmedia_s32 vo_check_lvds_attr(xmedia_vo_dev dev, xmedia_vo_lvds_attr *lvds_attr,
xmedia_vo_intf_sync intf_sync)
{
xmedia_s32 i, j;
#ifdef VO_KERNEL
if (!(CHIP_ONLY_SUPPORT_LVDSTX() || CHIP_BOTH_SUPPORT_MIPITX_LVDSTX())) {
VO_TRACE(MODULE_DBG_ERR,"dev %d lvds intf not support, CHIP_TYPE err!\n", dev);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
#endif
if ((lvds_attr->data_type != XMEDIA_INTF_LVDS_DATA_TYPE_RGB666_18BIT) &&
(lvds_attr->data_type != XMEDIA_INTF_LVDS_DATA_TYPE_RGB888_24BIT)) {
VO_TRACE(MODULE_DBG_ERR,"dev %d lvds intf not support data_type(%d) !\n", dev, lvds_attr->data_type);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((lvds_attr->format != XMEDIA_INTF_LVDS_FORMAT_VESA) && (lvds_attr->format != XMEDIA_INTF_LVDS_FORMAT_JEIDA)) {
VO_TRACE(MODULE_DBG_ERR,"dev %d lvds intf not support format(%d) !\n", dev, lvds_attr->format);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
for (i = XMEDIA_VO_LVDS_LANE_DATA0; i < XMEDIA_VO_LVDS_LANE_MAX - 1; i++) {
for (j = i + 1; j < XMEDIA_VO_LVDS_LANE_MAX; j++) {
if (lvds_attr->lane_sel[i] == lvds_attr->lane_sel[j]) {
VO_TRACE(MODULE_DBG_ERR,"dev %d lvds intf not support duplicate (lane sel[%d] and lane_sel[%d])!\n",
dev, lvds_attr->lane_sel[i], lvds_attr->lane_sel[j]);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if (lvds_attr->lane_sel[i] >= XMEDIA_VO_LVDS_LANE_MAX) {
VO_TRACE(MODULE_DBG_ERR,"dev %d lvds intf, lvds lane sel is out of support(%d) !\n",
dev, lvds_attr->lane_sel[i]);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if (lvds_attr->lane_sel[j] >= XMEDIA_VO_LVDS_LANE_MAX) {
VO_TRACE(MODULE_DBG_ERR,"dev %d lvds intf, lvds lane sel is out of support(%d) !\n",
dev, lvds_attr->lane_sel[j]);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
}
//需要测试是否支持所有的这些分辨率
if ((intf_sync != XMEDIA_VO_INTF_SYNC_USER) &&
(((intf_sync >= XMEDIA_VO_INTF_SYNC_1920x2160_30) && (intf_sync <= XMEDIA_VO_INTF_SYNC_4096x2160_60)) ||
(intf_sync == XMEDIA_VO_INTF_SYNC_7680x4320_30) || (intf_sync == XMEDIA_VO_INTF_SYNC_1920x1200_60) ||
(intf_sync == XMEDIA_VO_INTF_SYNC_PAL) || (intf_sync == XMEDIA_VO_INTF_SYNC_NTSC) ||
(intf_sync == XMEDIA_VO_INTF_SYNC_960H_PAL) || (intf_sync == XMEDIA_VO_INTF_SYNC_960H_NTSC) ||
(intf_sync == XMEDIA_VO_INTF_SYNC_1080I50) || (intf_sync == XMEDIA_VO_INTF_SYNC_1080I60))) {
VO_TRACE(MODULE_DBG_ERR,"dev %d lvds intf, intfsync %d illegal!\n", dev, intf_sync);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
return XMEDIA_SUCCESS;
}
static xmedia_s32 vo_check_dev_size(xmedia_vo_dev dev, xmedia_intf_type intf_type,
xmedia_video_size *dev_size) {
if (VO_CHECK_VIRT_DEV(dev) == XMEDIA_TRUE) {
if (dev_size->width > g_dev_capability[dev].max_size.width ||
dev_size->height > g_dev_capability[dev].max_size.height) {
VO_TRACE(MODULE_DBG_ERR, "dev%d not support dev_size_width %d\n", dev, dev_size->width);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
} else {
if (dev_size->width > g_dev_capability[dev].max_size.width) {
VO_TRACE(MODULE_DBG_ERR, "dev%d not support dev_size_width %d\n", dev, dev_size->width);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
//只有mipi支持 width>1920以上时序
if ((dev_size->width > VO_INTF_NOT_MIPI_MAX_WHIDTH) && (intf_type != XMEDIA_INTF_TYPE_MIPI_DSI)) {
VO_TRACE(MODULE_DBG_ERR, "only mipi width support 1920+\n");
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
return XMEDIA_SUCCESS;
}
xmedia_s32 hal_vo_check_dev_intf(xmedia_vo_dev dev, xmedia_vo_dev_config *config, xmedia_video_size *dev_size)
{
xmedia_s32 ret;
if (vo_check_dev_size(dev, config->intf_config.intf_type, dev_size) != XMEDIA_SUCCESS) {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
//虚拟设备不需要后续的check
if (VO_CHECK_VIRT_DEV(dev) == XMEDIA_TRUE) {
return XMEDIA_SUCCESS;
}
switch (config->intf_config.intf_type){
case XMEDIA_INTF_TYPE_BT656:
ret = vo_check_bt656_attr(dev, &(config->intf_config.bt656_attr), config->intf_sync);
break;
case XMEDIA_INTF_TYPE_BT1120:
ret = vo_check_bt1120_attr(dev, &(config->intf_config.bt1120_attr), config->intf_sync);
break;
case XMEDIA_INTF_TYPE_LCD:
ret = vo_check_lcd_attr(dev, &(config->intf_config.lcd_attr), config->intf_sync);
break;
case XMEDIA_INTF_TYPE_MIPI_DSI:
ret = vo_check_mipi_attr(dev, &(config->intf_config.mipi_attr), config->intf_sync);
break;
case XMEDIA_INTF_TYPE_LVDS:
ret = vo_check_lvds_attr(dev, &(config->intf_config.lvds_attr), config->intf_sync);
break;
default:
ret = XMEDIA_ERRCODE_NOT_SUPPORT;
break;
}
return ret;
}
xmedia_s32 hal_vo_check_clk(xmedia_vo_dev dev, xmedia_vo_dev_config *config, xmedia_u32 clk)
{
//dev=0 且 mipi 端子才支持297M时钟，否则只支持148.5M
if ((dev == XMEDIA_VO_DEV_0) && (config->intf_config.intf_type == XMEDIA_INTF_TYPE_MIPI_DSI)) {
if (clk > VO_INTF_MIPI_MAX_CLK) {
VO_TRACE(MODULE_DBG_ERR,"hal_vo_check_clk err, clk %d\n", clk);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
} else {
if (clk > VO_INTF_NOT_MIPI_MAX_CLK) {
VO_TRACE(MODULE_DBG_ERR,"hal_vo_check_clk err, clk %d\n", clk);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
return XMEDIA_SUCCESS;
}
xmedia_s32 hal_vo_check_dev_csc_cap(xmedia_vo_dev dev, xmedia_vo_intf_config *intf_config,
xmedia_vo_dev_csc *dev_csc)
{
xmedia_bool mipi_rgb_en;
if (dev_csc->color_info.color_gamut == XMEDIA_VIDEO_COLOR_GAMUT_BT2020) {
VO_TRACE(MODULE_DBG_ERR,"Vo dev(%d) color gamut should be bt601 or 709\n", dev);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if (((intf_config->intf_type == XMEDIA_INTF_TYPE_LCD) || (intf_config->intf_type == XMEDIA_INTF_TYPE_LVDS)) &&
(dev_csc->color_info.color_space == XMEDIA_VIDEO_COLOR_SPACE_YUV)) {
VO_TRACE(MODULE_DBG_ERR,"Vo dev(%d) lcd/lvds should be output rgb\n", dev);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if (((intf_config->intf_type == XMEDIA_INTF_TYPE_BT656) || (intf_config->intf_type == XMEDIA_INTF_TYPE_BT1120)) &&
(dev_csc->color_info.color_space == XMEDIA_VIDEO_COLOR_SPACE_RGB)) {
VO_TRACE(MODULE_DBG_ERR,"Vo dev(%d) bt656/bt1120 should be output yuv\n", dev);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if (intf_config->intf_type == XMEDIA_INTF_TYPE_MIPI_DSI) {
if ((intf_config->mipi_attr.data_type == XMEDIA_INTF_MIPI_DSI_DATA_TYPE_RGB666_18BIT) ||
(intf_config->mipi_attr.data_type == XMEDIA_INTF_MIPI_DSI_DATA_TYPE_RGB888_24BIT)){
mipi_rgb_en = XMEDIA_TRUE;
} else {
mipi_rgb_en = XMEDIA_FALSE;
}
if ((mipi_rgb_en == XMEDIA_TRUE) && (dev_csc->color_info.color_space == XMEDIA_VIDEO_COLOR_SPACE_YUV)){
VO_TRACE(MODULE_DBG_ERR,"dev %d color space should be same as mipi output(%d,%d)\n",
dev, mipi_rgb_en, dev_csc->color_info.color_space);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((mipi_rgb_en == XMEDIA_FALSE) && (dev_csc->color_info.color_space == XMEDIA_VIDEO_COLOR_SPACE_RGB)){
VO_TRACE(MODULE_DBG_ERR,"dev %d color space should be same as mipi output(%d,%d)\n",
dev, mipi_rgb_en, dev_csc->color_info.color_space);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
return XMEDIA_SUCCESS;
}
xmedia_s32 hal_vo_check_dev_gamma_cap(xmedia_vo_dev dev, xmedia_vo_intf_config *intf_config)
{
if ((intf_config->intf_type == XMEDIA_INTF_TYPE_BT656) || (intf_config->intf_type == XMEDIA_INTF_TYPE_BT1120)) {
VO_TRACE(MODULE_DBG_DEBUG,"Vo dev(%d) yuv output not support gamma set\n", dev);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((intf_config->intf_type == XMEDIA_INTF_TYPE_MIPI_DSI) &&
(intf_config->mipi_attr.data_type == XMEDIA_INTF_MIPI_DSI_DATA_TYPE_YUV422_16BIT)) {
VO_TRACE(MODULE_DBG_DEBUG,"Vo dev(%d) yuv output not support gamma set\n", dev);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
return XMEDIA_SUCCESS;
}
xmedia_bool hal_vo_check_chip_type(vo_chip_type board_id)
{
if (board_id == VO_CHIP_TYPE_XM7606V1) {
return XMEDIA_TRUE;
} else {
return XMEDIA_FALSE;
}
}
xmedia_s32 hal_vo_check_layer_cap(xmedia_vo_layer layer, xmedia_u32 max_width, xmedia_u32 max_height,
xmedia_vo_layer_config *layer_config)
{
if ((layer_config->img_size.width < g_layer_capability[layer].min_out_size.width) ||
(layer_config->img_size.height < g_layer_capability[layer].min_out_size.height)) {
VO_TRACE(MODULE_DBG_ERR,"layer %d image size(%d, %d) is illegaled, should biger than (%d,%d)!\n",
layer, layer_config->img_size.width, layer_config->img_size.height,
g_layer_capability[layer].min_out_size.width, g_layer_capability[layer].min_out_size.height);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if (layer_config->img_size.width > max_width || layer_config->img_size.height > max_height) {
VO_TRACE(MODULE_DBG_ERR,"layer %d image size width(%d %d) is illegaled, should less than(%d %d)!\n",
layer, layer_config->img_size.width, layer_config->img_size.height, max_width, max_height);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if ((IS_ALIGN(layer_config->img_size.width, 2) != XMEDIA_TRUE) ||
(IS_ALIGN(layer_config->img_size.height, 2) != XMEDIA_TRUE)) {
VO_TRACE(MODULE_DBG_ERR,"layer %d img size(%d, %d) dosen't aligned by 2 pixel!\n",
layer, layer_config->img_size.width, layer_config->img_size.height);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if ((layer_config->pix_format != XMEDIA_VIDEO_PIXEL_FMT_YUV_SEMIPLANAR_420) &&
(layer_config->pix_format != XMEDIA_VIDEO_PIXEL_FMT_YUV_SEMIPLANAR_422) &&
(layer_config->pix_format != XMEDIA_VIDEO_PIXEL_FMT_YVU_SEMIPLANAR_420) &&
(layer_config->pix_format != XMEDIA_VIDEO_PIXEL_FMT_YVU_SEMIPLANAR_422) &&
(layer_config->pix_format != XMEDIA_VIDEO_PIXEL_FMT_YUV_400)) {
VO_TRACE(MODULE_DBG_ERR,"layer %d pix_format %d doesn't support!\n", layer, layer_config->pix_format);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if (layer_config->bit_width != XMEDIA_VIDEO_DATA_WIDTH_8) {
VO_TRACE(MODULE_DBG_ERR,"layer %d bit_width %d doesn't support!\n", layer, layer_config->bit_width);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if (layer_config->part_mode >= XMEDIA_VO_PARTITION_MODE_MAX) {
VO_TRACE(MODULE_DBG_ERR,"layer %d part mode %d is illegal!\n", layer, layer_config->part_mode);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
return XMEDIA_SUCCESS;
}
xmedia_s32 hal_vo_check_layer_frame(xmedia_vo_layer layer, xmedia_video_frame_info *frame_info)
{
xmedia_u32 valid_width;
xmedia_u32 valid_height;
valid_width = g_layer_capability[layer].min_out_size.width;
valid_height = g_layer_capability[layer].min_out_size.height;
if ((frame_info->frame.pixel_fmt != XMEDIA_VIDEO_PIXEL_FMT_YUV_SEMIPLANAR_422) &&
(frame_info->frame.pixel_fmt != XMEDIA_VIDEO_PIXEL_FMT_YVU_SEMIPLANAR_422) &&
(frame_info->frame.pixel_fmt != XMEDIA_VIDEO_PIXEL_FMT_YUV_SEMIPLANAR_420) &&
(frame_info->frame.pixel_fmt != XMEDIA_VIDEO_PIXEL_FMT_YVU_SEMIPLANAR_420) &&
(frame_info->frame.pixel_fmt != XMEDIA_VIDEO_PIXEL_FMT_YUV_400)) {
VO_TRACE(MODULE_DBG_ERR,"Unsupport input pixel format %d!\n", frame_info->frame.pixel_fmt);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if ((frame_info->frame.width < valid_width) || (frame_info->frame.height < valid_height) ||
(IS_ALIGN(frame_info->frame.width, 2) != XMEDIA_TRUE) ||
(IS_ALIGN(frame_info->frame.width, 2) != XMEDIA_TRUE)) {
VO_TRACE(MODULE_DBG_ERR,"pic width(%d) is smaller than min width 32 or pic height(%d) is smaller than"
"min height 32 or not align2!!\n", frame_info->frame.width, frame_info->frame.height);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if (frame_info->frame.dynamic_range != XMEDIA_VIDEO_DYNAMIC_RANGE_SDR) {
VO_TRACE(MODULE_DBG_ERR,"Unsupport input dynamic range%d!\n", frame_info->frame.dynamic_range);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if (frame_info->frame.compress_mode != XMEDIA_VIDEO_COMPRESS_MODE_NONE) {
VO_TRACE(MODULE_DBG_ERR,"Unsupport input compress mode%d!\n", frame_info->frame.compress_mode);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if (frame_info->frame.video_fmt != XMEDIA_VIDEO_FMT_LINEAR) {
VO_TRACE(MODULE_DBG_ERR,"Unsupport input video format%d!\n", frame_info->frame.video_fmt);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if (frame_info->frame.bit_width != XMEDIA_VIDEO_DATA_WIDTH_8) {
VO_TRACE(MODULE_DBG_ERR,"Unsupport input bit width%d!\n", frame_info->frame.bit_width);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if ((frame_info->frame.color_info.color_space != XMEDIA_VIDEO_COLOR_SPACE_YUV) ||
(frame_info->frame.color_info.color_gamut == XMEDIA_VIDEO_COLOR_GAMUT_BT2020) ||
(frame_info->frame.color_info.color_gamut >= XMEDIA_VIDEO_COLOR_GAMUT_MAX) ||
(frame_info->frame.color_info.quantify_range >= XMEDIA_VIDEO_COLOR_RANGE_MAX)) {
VO_TRACE(MODULE_DBG_ERR,"Unsupport input color info:space-gamut-range(%d-%d-%d)!\n",
frame_info->frame.color_info.color_space,
frame_info->frame.color_info.color_gamut,frame_info->frame.color_info.quantify_range);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
return XMEDIA_SUCCESS;
}
xmedia_void hal_vo_init_chip_capaciblity(xmedia_void)
{
if (g_vo_cap_is_inited == XMEDIA_TRUE) {
return;
}
g_vo_cap_is_inited = XMEDIA_TRUE;
vo_init_chip_capacity();
vo_init_chip_dev_capacity();
vo_init_chip_layer_capacity();
}
xmedia_u32 hal_vo_get_chip_revision(xmedia_void)
{
return g_vo_cap.chip_revision;
}
vo_base_cap *hal_vo_get_chip_capacity(xmedia_void)
{
return &g_vo_cap;
}
vo_layer_cap *hal_get_layer_chip_capacity(xmedia_vo_layer layer)
{
return &g_layer_capability[layer];
}
vo_dev_cap *hal_get_dev_chip_capacity(xmedia_vo_dev dev)
{
return &g_dev_capability[dev];
}
source/bootloader/product/driver/vo/hal/xmfalcon/hal_vo_chip_cfg.h
Executable
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/* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef __HAL_VO_CHIP_CFG_H__
#define __HAL_VO_CHIP_CFG_H__
#include "drv_vo_comm.h"
#include "xmedia_vo.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
VO_CHIP_INTF_TYPE_BT656 = 1 << 0,
VO_CHIP_INTF_TYPE_BT1120 = 1 << 1,
VO_CHIP_INTF_TYPE_LCD = 1 << 2,
VO_CHIP_INTF_TYPE_LVDS = 1 << 3,
VO_CHIP_INTF_TYPE_MIPI_DSI = 1 << 4,
VO_CHIP_INTF_TYPE_MAX
} vo_chip_intf_type;
typedef enum {
VO_CHIP_TYPE_XM7606V1,
VO_CHIP_TYPE_MAX
} vo_chip_type;
typedef struct {
xmedia_bool support_hdr;
xmedia_bool support_flip;
xmedia_bool support_mirror;
xmedia_bool support_zme;
xmedia_bool support_dcmp;
xmedia_bool support_region;
xmedia_u32 region_num;
xmedia_video_size max_read_size;
xmedia_video_size min_out_size;
xmedia_u32 support_max_bit_width;
xmedia_u32 support_pixformat_num;
} vo_layer_cap;
typedef struct {
xmedia_u32 support_video_layer_num;
xmedia_u32 support_gfx_layer_num;
xmedia_u32 support_max_layer_num;
xmedia_u32 support_intf_num;
xmedia_u32 support_csc_num;
xmedia_video_size max_size;
xmedia_bool support_ink;
xmedia_bool support_attach_layer;
xmedia_u32 max_frame_rate;
} vo_dev_cap;
typedef struct {
xmedia_u64 vo_phy_addr;
xmedia_u32 board_id;
xmedia_u32 irq_num;
xmedia_u32 irq_cpumask;
xmedia_u32 chip_revision;
xmedia_u32 chip_type;
xmedia_char *chip_name;
xmedia_char *irq_name;
} vo_base_cap;
xmedia_bool hal_vo_check_chip_type(vo_chip_type board_id);
xmedia_void hal_vo_init_chip_capaciblity(xmedia_void);
xmedia_u32 hal_vo_get_chip_revision(xmedia_void);
xmedia_s32 hal_vo_check_layer_cap(xmedia_vo_layer layer, xmedia_u32 max_width, xmedia_u32 max_height,
xmedia_vo_layer_config *layer_config);
xmedia_s32 hal_vo_check_dev_intf(xmedia_vo_dev dev, xmedia_vo_dev_config *config, xmedia_video_size *dev_size);
xmedia_s32 hal_vo_check_clk(xmedia_vo_dev dev, xmedia_vo_dev_config *config, xmedia_u32 clk);
xmedia_s32 hal_vo_check_dev_size(xmedia_vo_dev dev, xmedia_u32 width, xmedia_u32 height);
xmedia_s32 hal_vo_check_dev_csc_cap(xmedia_vo_dev dev, xmedia_vo_intf_config *intf_config,
xmedia_vo_dev_csc *dev_csc);
xmedia_s32 hal_vo_check_dev_gamma_cap(xmedia_vo_dev dev, xmedia_vo_intf_config *intf_config);
xmedia_s32 hal_vo_check_layer_frame(xmedia_vo_layer layer, xmedia_video_frame_info *frame_info);
vo_base_cap *hal_vo_get_chip_capacity(xmedia_void);
vo_layer_cap* hal_get_layer_chip_capacity(xmedia_vo_layer layer);
vo_dev_cap* hal_get_dev_chip_capacity(xmedia_vo_dev dev);
#ifdef __cplusplus
}
#endif
#endif /* __HAL_VO__CHIP_CFG_H__ */
source/bootloader/product/driver/vo/hal/xmfalcon/hal_vo_reg.c
Executable
+17373
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source/bootloader/product/driver/vo/hal/xmfalcon/hal_vo_reg.h
Executable
+7889
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File diff suppressed because it is too large Load Diff
source/bootloader/product/driver/vo/hal/xmfalcon/intf/hal_vo_intf.c
Executable
+1471
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source/bootloader/product/driver/vo/hal/xmfalcon/intf/hal_vo_intf.h
Executable
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef __HAL_VO_INTF_H__
#define __HAL_VO_INTF_H__
#include "hal_vo_csc.h"
#include "hal_vo_clock.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum{
VO_INTF_HS_MODE_RF = 0, //vsyn对应的上升沿和下降沿都有效
VO_INTF_HS_MODE_RF_NONE, //vsyn对应的上升沿和下降沿都无效
VO_INTF_HS_MODE_FALLING,
VO_INTF_HS_MODE_RISING,
VO_INTF_HS_MODE_MAX,
}vo_intf_hs_mode;
typedef struct{
xmedia_bool hcds_en;
xmedia_bool hcds_mode;
xmedia_u8 hcds_coef_0;
xmedia_u8 hcds_coef_1;
xmedia_u8 hcds_coef_2;
xmedia_u8 hcds_coef_3;
}vo_intf_hcds;
typedef struct{
xmedia_bool clip_en;
xmedia_u32 clip_l;
xmedia_u32 clip_h;
}vo_intf_clip;
typedef struct{
xmedia_u16 top_start;
xmedia_u16 top_end;
xmedia_u16 bottom_start;
xmedia_u16 bottom_end;
}vo_intf_bt_sync;
typedef struct {
xmedia_bool ink_en;
xmedia_bool cross_en;
xmedia_bool color_reverse;
xmedia_u32 color;
xmedia_u32 x;
xmedia_u32 y;
} vo_csc_ink_info;
typedef struct {
vo_clock_priority_sel vo_clock_priority_sel; //debug 接口 1：lcd分频器优先，0：固定频点优先
xmedia_bool vo_special_timing_sel; //true表示使用固定分频，需要配置特殊时序,否则使用默认时序
xmedia_u32 fixed_clk_htotal;
xmedia_u32 fixed_clk_hbb;
xmedia_u32 fixed_clk_hfb;
xmedia_u32 vs_st_v_filed;
xmedia_u32 vs_end_v_filed;
} vo_intf_special_timing;
typedef struct{
xmedia_u32 phy_clk_cfg; //mipi phy clock 需要配置给mipi ctrl，根据dev clk_hz 和 mipi ctrl计算公式得到
xmedia_u32 phy_vid_hline_time; //mipi phy hline time
xmedia_u32 phy_lanebyte_clock_hz;
xmedia_u32 phy_master_swap; //mipi lane序配置
xmedia_s32 phy_htotal_adjust;
xmedia_s32 phy_vsync_adjust;
xmedia_vo_mipi_lane_num phy_lane_num; //mipi lane数量
} mipi_phy_config;
typedef struct {
xmedia_s32 size;
xmedia_u8 *array;
} vo_mipi_lcd_config;
xmedia_void hal_vo_set_intf_fifo(xmedia_vo_dev dev, xmedia_u32 fifo);
xmedia_void hal_vo_set_intf_enable(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_get_intf_enable(xmedia_vo_dev dev, xmedia_bool *enable);
xmedia_void hal_vo_set_intf_chk_sum_enable(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_set_intf_hs_mode(xmedia_vo_dev dev, vo_intf_hs_mode hs_mode);
xmedia_void hal_vo_set_intf_mux(xmedia_vo_dev dev, xmedia_intf_type intf);
xmedia_void hal_vo_set_intf_regup(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_set_intf_cnt_pos(xmedia_vo_dev dev);
xmedia_void hal_vo_set_intf_timing(xmedia_vo_dev dev, xmedia_u32 frame_rate,
xmedia_vo_intf_config *intf_config, xmedia_vo_user_sync_timing *sync_timing, vo_intf_special_timing *special_timing);
xmedia_void hal_vo_set_intf_sync_inverse(xmedia_vo_dev dev);
xmedia_void hal_vo_set_intf_vtt_sel(xmedia_vo_dev dev, xmedia_u32 vtt_id, xmedia_bool cnt_mode);
xmedia_void hal_vo_set_intf_vtt_mode(xmedia_vo_dev dev, xmedia_u32 vtt_id, xmedia_bool frame_mode);
xmedia_void hal_vo_set_intf_vtt_thd(xmedia_vo_dev dev, xmedia_u32 vtt_id, xmedia_u32 vtt_thd);
xmedia_void hal_vo_get_intf_state(xmedia_vo_dev dev, xmedia_bool *btm, xmedia_u16 *vcnt, xmedia_u8 *vstate);
xmedia_void hal_vo_get_intf_checksum_value(xmedia_vo_dev dev, xmedia_u32 *y, xmedia_u32 *u, xmedia_u32 *v);
xmedia_void hal_vo_set_intf_bt_mode(xmedia_vo_dev dev, xmedia_bool value);
xmedia_void hal_vo_set_intf_bt_yc_order(xmedia_vo_dev dev, xmedia_bool value);
xmedia_void hal_vo_set_intf_bt_uv_order(xmedia_vo_dev dev, xmedia_bool value);
xmedia_void hal_vo_set_intf_bt_vbit_mode(xmedia_vo_dev dev, xmedia_bool sync_mode);
xmedia_void hal_vo_set_intf_bt_bit_inverse(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_set_intf_bt_user_sync(xmedia_vo_dev dev, vo_intf_bt_sync *sync);
xmedia_void hal_vo_set_intf_lcd_mode(xmedia_vo_dev dev, xmedia_bool value);
xmedia_void hal_vo_set_intf_lcd_rgb_order(xmedia_vo_dev dev, xmedia_u8 order0, xmedia_u8 order1);
xmedia_void hal_vo_set_intf_lcd_bit_inverse(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_set_intf_mute_enable(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_get_intf_mute_enable(xmedia_vo_dev dev, xmedia_bool *enable);
xmedia_void hal_vo_set_intf_mute_pattern_mode(xmedia_vo_dev dev, xmedia_u8 value);
xmedia_void hal_vo_set_intf_mute_data_mode(xmedia_vo_dev dev, xmedia_u8 value);
xmedia_void hal_vo_set_intf_checkbar_size(xmedia_vo_dev dev, xmedia_u8 width, xmedia_u8 height);
xmedia_void hal_vo_set_intf_cbar_sel(xmedia_vo_dev dev, xmedia_u8 value);
xmedia_void hal_vo_set_intf_mute_color(xmedia_vo_dev dev, xmedia_u32 white_color, xmedia_u32 black_color);
xmedia_void hal_vo_set_intf_ink(xmedia_vo_dev dev, vo_csc_ink_info *ink_info);
xmedia_void hal_vo_set_intf_clip(xmedia_vo_dev dev, vo_intf_clip *intf_clip);
xmedia_void hal_vo_set_intf_csc_en(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_get_intf_csc_en(xmedia_vo_dev dev, xmedia_bool *enable);
xmedia_void hal_vo_set_intf_csc(xmedia_vo_dev dev, vo_csc_coef *intf_csc);
xmedia_void hal_vo_set_intf_hcds(xmedia_vo_dev dev, vo_intf_hcds *intf_hcds);
xmedia_void hal_vo_set_intf_dither_enable(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_set_intf_dither_thd(xmedia_vo_dev dev, xmedia_u8 thd_h, xmedia_u8 thd_l);
xmedia_void hal_vo_set_bt656_intf_cfg(xmedia_vo_dev dev, xmedia_vo_bt656_attr *bt656_attr);
xmedia_void hal_vo_set_bt1120_intf_cfg(xmedia_vo_dev dev, xmedia_vo_bt1120_attr *bt1120_attr);
xmedia_void hal_vo_set_lcd_intf_cfg(xmedia_vo_dev dev, xmedia_vo_lcd_attr *lcd_attr);
xmedia_void hal_vo_set_mipi_intf_cfg(xmedia_vo_dev dev, xmedia_vo_mipi_attr *mipi_attr);
xmedia_void hal_vo_set_lvds_intf_cfg(xmedia_vo_dev dev, xmedia_vo_lvds_attr *lvds_attr);
xmedia_s32 hal_vo_set_mipi_tx_phy_cfg(xmedia_vo_dev dev, xmedia_u32 frame_rate,
xmedia_vo_user_sync_timing *sync_timing, mipi_phy_config *mipi_phy_cfg, xmedia_bool special_timing_sel);
xmedia_void hal_vo_set_mipi_tx_phy_reset(xmedia_void);
xmedia_s32 hal_vo_enable_lvds_phy_cfg(xmedia_u32 clk_hz);
xmedia_s32 hal_vo_disable_lvds_phy_cfg(xmedia_void);
xmedia_s32 vo_calculate_mipi_phy_cfg(xmedia_vo_dev dev, xmedia_u32 clk_hz, xmedia_vo_mipi_attr *mipi_attr,
mipi_phy_config* mipi_phy_cfg);
#ifdef __cplusplus
}
#endif
#endif
source/bootloader/product/driver/vo/hal/xmorca/clock/hal_vo_clock.c
+384
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifdef VO_BOOT
#include <string.h>
#include "xmedia_vo.h"
#endif
#include "hal_vo.h"
#include "hal_vo_disp.h"
#include "hal_vo_reg.h"
#include "sys_drv.h"
#include "hal_vo_clock.h"
extern s_vout_regs_type *g_p_vout_reg;
xmedia_void hal_vo_clock_init(vo_clock_config * vo_clock)
{
xmedia_u32 i;
osal_memset(vo_clock, 0, sizeof(vo_clock_config));
for(i = XMEDIA_VO_DEV_0;i < XMEDIA_VO_REAL_DEV_NUM; i++) {
vo_clock->dev_clock_info[i].clock_sel = VO_CLOCK_SRC_SEL_MAX;
}
for(i = VO_CRG_CLOCK_TYPE_MCU;i < VO_CRG_CLOCK_TYPE_MAX; i++) {
vo_clock->intf_clock_info[i].intf_sel_dev = XMEDIA_VO_REAL_DEV_NUM;
}
}
xmedia_void hal_vo_clock_deinit(xmedia_void)
{
return;
}
//vo top 门控使能
xmedia_void hal_vo_set_clock_gate(vo_clock_config * vo_clock, xmedia_bool enable)
{
hal_reg_vout_set_cfg_ck_dyn_gt_en_dma(g_p_vout_reg, enable);
hal_reg_vout_set_cfg_ck_dyn_gt_en(g_p_vout_reg, enable);
vo_clock->vo_top_clock_gate = enable;
return;
}
static vo_clock_src_sel vo_fix_clk_sel(vo_clock_config * vo_clock, xmedia_vo_dev dev, xmedia_u32 clk_hz)
{
if ((0 < clk_hz) && (clk_hz <= VO_CLOCK_SRC_13_5MHZ)) {
vo_clock->dev_clock_info[dev].fixed_clock_hz = VO_CLOCK_SRC_13_5MHZ;
return VO_CLOCK_SRC_SEL_13_5MHZ;
} else if ((VO_CLOCK_SRC_13_5MHZ < clk_hz) && (clk_hz <= VO_CLOCK_SRC_27MHZ)) {
vo_clock->dev_clock_info[dev].fixed_clock_hz = VO_CLOCK_SRC_27MHZ;
return VO_CLOCK_SRC_SEL_27MHZ;
} else if ((VO_CLOCK_SRC_27MHZ < clk_hz) && (clk_hz <= VO_CLOCK_SRC_37_125MHZ)) {
vo_clock->dev_clock_info[dev].fixed_clock_hz = VO_CLOCK_SRC_37_125MHZ;
return VO_CLOCK_SRC_SEL_37_125MHZ;
} else if ((VO_CLOCK_SRC_37_125MHZ < clk_hz) && (clk_hz <= VO_CLOCK_SRC_74_25MHZ)) {
vo_clock->dev_clock_info[dev].fixed_clock_hz = VO_CLOCK_SRC_74_25MHZ;
return VO_CLOCK_SRC_SEL_74_25MHZ;
} else if ((VO_CLOCK_SRC_74_25MHZ < clk_hz) && (clk_hz <= VO_CLOCK_SRC_148_5MHZ)) {
vo_clock->dev_clock_info[dev].fixed_clock_hz = VO_CLOCK_SRC_148_5MHZ;
return VO_CLOCK_SRC_SEL_148_5MHZ;
} else {
VO_TRACE(MODULE_DBG_DEBUG, "not match normal Hz! Use LCD or PLL Hz!\n");
return VO_CLOCK_SRC_SEL_MAX;
}
}
static vo_clock_ppc_sel vo_get_ppc_clock(vo_clock_config *vo_clock)
{
xmedia_u32 i;
xmedia_u32 intf_clk_hz = 0;
xmedia_u32 ppc_clk_hz = 0;
for(i = XMEDIA_VO_DEV_0;i < XMEDIA_VO_DEV_1; i++) {
hal_vo_get_intf_clock(vo_clock, i, &intf_clk_hz);
ppc_clk_hz = (intf_clk_hz > ppc_clk_hz) ? intf_clk_hz : ppc_clk_hz;
}
if (ppc_clk_hz <= 50000000) {
return VO_CLOCK_SRC_PPC_SEL_50MHZ;
} else if (ppc_clk_hz <= 100000000) {
return VO_CLOCK_SRC_PPC_SEL_100MHZ;
} else if (ppc_clk_hz <= 150000000) {
return VO_CLOCK_SRC_PPC_SEL_150MHZ;
} else if (ppc_clk_hz <= 200000000) {
return VO_CLOCK_SRC_PPC_SEL_200MHZ;
} else {
return VO_CLOCK_SRC_PPC_SEL_MAX;
}
}
static vo_clock_src_sel vo_div_clk_sel(vo_clock_config *vo_clock, xmedia_vo_dev dev,
xmedia_u32 clk_hz)
{
xmedia_bool lcd_use_flag = XMEDIA_TRUE;
xmedia_u32 i;
//判断lcd分频能否使用
if (clk_hz <= LCD_FREQUENCY_DIVIDER_MAX) {
for(i = XMEDIA_VO_DEV_0;i < XMEDIA_VO_REAL_DEV_NUM; i++) {
//lcd分频已使能&&不是本dev使用&&分频频率不同 则无法使用lcd分频
if ((vo_clock->dev_clock_info[i].clock_sel == VO_CLOCK_SRC_SEL_LCD) &&
(i != dev) && (vo_clock->dev_clock_info[i].freq_clock[VO_DIV_CLOCK_TYPE_LCD].div_clock_hz != clk_hz)) {
lcd_use_flag = XMEDIA_FALSE;
}
}
//配置lcd分频
if (lcd_use_flag == XMEDIA_TRUE) {
return VO_CLOCK_SRC_SEL_LCD;
}
}
return VO_CLOCK_SRC_SEL_MAX;
}
static vo_div_clock_type vo_clk_sel_to_div_type(vo_clock_src_sel clk_sel)
{
switch (clk_sel) {
case VO_CLOCK_SRC_SEL_LCD:
return VO_DIV_CLOCK_TYPE_LCD;
default :
return VO_DIV_CLOCK_TYPE_MAX;
}
}
//crg 分频时钟配置
xmedia_s32 hal_vo_set_dev_div_clock(vo_clock_config * vo_clock, xmedia_vo_dev dev, xmedia_u32 clk_hz,
xmedia_bool *vo_special_timing_sel, xmedia_bool vo_lcd_divider_priority)
{
vo_clock_src_sel clk_sel;
vo_clock_ppc_sel vo_ppc_sel;
vo_div_clock_type div_type;
xmedia_chn_info vo_chn_info = {0};
vo_chn_info.mod_id = MOD_ID_VO;
vo_chn_info.dev_id = dev;
vo_chn_info.chn_id = 0;
//debug状态位检测，优先使用lcd分频器 or 优先使用固定频点
if (vo_lcd_divider_priority == XMEDIA_TRUE) {
clk_sel = vo_div_clk_sel(vo_clock, dev, clk_hz);
if (clk_sel == VO_CLOCK_SRC_SEL_MAX) {
//分频器无法使用，尝试使用固定频点
clk_sel = vo_fix_clk_sel(vo_clock, dev, clk_hz);
if (clk_sel == VO_CLOCK_SRC_SEL_MAX) {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
vo_clock->dev_clock_info[dev].clock_sel = clk_sel;
} else {
div_type = vo_clk_sel_to_div_type(clk_sel);
if (div_type == VO_DIV_CLOCK_TYPE_MAX) {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
//使用lcd分频器
vo_clock->dev_clock_info[dev].clock_sel = clk_sel;
vo_clock->dev_clock_info[dev].fixed_clock_hz = 0;
vo_clock->dev_clock_info[dev].freq_clock[div_type].div_clock_hz = clk_hz;
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LCD_DIV_CFG, &clk_hz);
}
} else {
clk_sel = vo_fix_clk_sel(vo_clock, dev, clk_hz);
if (clk_sel != VO_CLOCK_SRC_SEL_MAX) {
//使用固定频点
vo_clock->dev_clock_info[dev].clock_sel = clk_sel;
} else {
clk_sel = vo_div_clk_sel(vo_clock, dev, clk_hz);
if (clk_sel == VO_CLOCK_SRC_SEL_MAX) {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
div_type = vo_clk_sel_to_div_type(clk_sel);
if (div_type == VO_DIV_CLOCK_TYPE_MAX) {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
//使用lcd分频
vo_clock->dev_clock_info[dev].clock_sel = clk_sel;
vo_clock->dev_clock_info[dev].fixed_clock_hz = 0;
vo_clock->dev_clock_info[dev].freq_clock[div_type].div_clock_hz = clk_hz;
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LCD_DIV_CFG, &clk_hz);
}
}
//都使用校正后的特殊时序,不同的是依照 分频器时钟值/固定频点值 计算出不同的矫正时序
*vo_special_timing_sel = XMEDIA_TRUE;
//时钟源选择配置
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_VOU_HD_CKSEL, &vo_clock->dev_clock_info[dev].clock_sel);
vo_clock->dev_clock_info[dev].clock_hz = clk_hz;
//ppc 时钟配置
vo_ppc_sel = vo_get_ppc_clock(vo_clock);
if (vo_ppc_sel != VO_CLOCK_SRC_PPC_SEL_MAX) {
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_VOU_PPC_CKSEL, &vo_ppc_sel);
}else {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
return XMEDIA_SUCCESS;
}
//crg时钟 分频器使能
xmedia_void hal_vo_set_dev_div_clock_enable(vo_clock_config * vo_clock,
xmedia_vo_dev dev, xmedia_bool clk_en)
{
xmedia_bool lcd_div_freq_en = XMEDIA_FALSE;
xmedia_u32 i;
xmedia_chn_info vo_chn_info = {0};
vo_chn_info.mod_id = MOD_ID_VO;
vo_chn_info.dev_id = dev;
vo_chn_info.chn_id = 0;
if (vo_clock->dev_clock_info[dev].clock_sel == VO_CLOCK_SRC_SEL_LCD) {
vo_clock->dev_clock_info[dev].freq_clock[VO_DIV_CLOCK_TYPE_LCD].div_clock_en = clk_en;
}
//有可能两个dev用同一个分屏器的频点，判断是否是所有dev分频器的使能状态
for(i = XMEDIA_VO_DEV_0;i < XMEDIA_VO_REAL_DEV_NUM; i++) {
lcd_div_freq_en |= vo_clock->dev_clock_info[i].freq_clock[VO_DIV_CLOCK_TYPE_LCD].div_clock_en;
}
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LCD_DIV_CKEN, &lcd_div_freq_en);
return;
}
//crg时钟 vou软复位请求
xmedia_void hal_vo_set_clock_reset_enable(vo_clock_config * vo_clock, xmedia_bool reset_en)
{
xmedia_chn_info vo_chn_info = {0};
xmedia_u32 i;
vo_chn_info.mod_id = MOD_ID_VO;
vo_chn_info.dev_id = 0;
vo_chn_info.chn_id = 0;
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_VOU_SRST_REQ, &reset_en);
//软复位 暂定状态将会改变 其他配置呢 div配置及门控使能 intf门控使能等????
for(i = XMEDIA_VO_DEV_0;i < XMEDIA_VO_REAL_DEV_NUM; i++) {
vo_clock->dev_clock_info[i].dev_clock_gate = XMEDIA_FALSE;
}
}
xmedia_bool hal_vo_get_clock_reset_sta(xmedia_void)
{
xmedia_bool state;
xmedia_chn_info vo_chn_info = {0};
vo_chn_info.mod_id = MOD_ID_VO;
vo_chn_info.dev_id = 0;
vo_chn_info.chn_id = 0;
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_VOU_SRST_GET, &state);
return state;
}
//crg时钟 vou dev0/dev1门控使能
xmedia_void hal_vo_set_dev_clock_enable(vo_clock_config * vo_clock,
xmedia_vo_dev dev, xmedia_bool clk_en)
{
xmedia_chn_info vo_chn_info = {0};
vo_chn_info.mod_id = MOD_ID_VO;
vo_chn_info.dev_id = dev;
vo_chn_info.chn_id = 0;
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_VOU_HD_CKEN, &clk_en);
vo_clock->dev_clock_info[dev].dev_clock_gate = clk_en;
return;
}
xmedia_bool vo_check_intf_sel_dev(vo_clock_config * vo_clock,
vo_crg_intf_type crg_int_type, xmedia_vo_dev dev)
{
xmedia_u32 i;
for(i = VO_CRG_CLOCK_TYPE_MCU;i < VO_CRG_CLOCK_TYPE_MAX; i++) {
//dev是否已经被其他intf选定了
if ((vo_clock->intf_clock_info[i].intf_sel_dev == dev) && (crg_int_type != i)) {
return XMEDIA_FAILURE;
}
}
return XMEDIA_SUCCESS;
}
static vo_crg_intf_type hal_vo_swap_intf_type(xmedia_intf_type intf_type)
{
switch(intf_type) {
case XMEDIA_INTF_TYPE_BT656:
case XMEDIA_INTF_TYPE_BT1120:
return VO_CRG_CLOCK_TYPE_BT;
case XMEDIA_INTF_TYPE_LCD:
return VO_CRG_CLOCK_TYPE_LCD;
case XMEDIA_INTF_TYPE_MCU:
return VO_CRG_CLOCK_TYPE_MCU;
default:
return VO_CRG_CLOCK_TYPE_MAX;
}
}
xmedia_void hal_vo_set_intf_detach_dev(vo_clock_config * vo_clock,
xmedia_vo_dev dev, xmedia_intf_type intf_type)
{
xmedia_u32 i;
for(i = VO_CRG_CLOCK_TYPE_MCU;i < VO_CRG_CLOCK_TYPE_MAX; i++) {
if ((vo_clock->intf_clock_info[i].intf_sel_dev == dev) && (hal_vo_swap_intf_type(intf_type) == i)) {
vo_clock->intf_clock_info[i].intf_sel_dev = XMEDIA_VO_REAL_DEV_NUM;
}
}
return;
}
//crg intf 时钟 通道选择
xmedia_s32 hal_vo_set_intf_clock(vo_clock_config * vo_clock,
xmedia_vo_dev dev, xmedia_bool clk_reverse_en, xmedia_intf_type intf_type)
{
xmedia_chn_info vo_chn_info = {0};
vo_chn_info.mod_id = MOD_ID_VO;
vo_chn_info.dev_id = dev;
vo_chn_info.chn_id = 0;
switch(intf_type) {
case XMEDIA_INTF_TYPE_BT656:
case XMEDIA_INTF_TYPE_BT1120:
if (vo_check_intf_sel_dev(vo_clock, VO_CRG_CLOCK_TYPE_BT, dev) == XMEDIA_SUCCESS) {
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_BT_HD_CKSEL, &dev); //bt接口时钟通道选择 hd0 hd1
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_BT_PCTRL, &clk_reverse_en); //bt接口时钟反向
vo_clock->intf_clock_info[VO_CRG_CLOCK_TYPE_BT].intf_sel_dev = dev;
vo_clock->intf_clock_info[VO_CRG_CLOCK_TYPE_BT].intf_reverse_en = clk_reverse_en;
break;
} else {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
case XMEDIA_INTF_TYPE_LCD:
if (vo_check_intf_sel_dev(vo_clock, VO_CRG_CLOCK_TYPE_LCD, dev) == XMEDIA_SUCCESS) {
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LCD_HD_CKSEL, &dev); //lcd接口时钟通道选择 hd0 hd1
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LCD_PCTRL, &clk_reverse_en); //lcd接口时钟反向
vo_clock->intf_clock_info[VO_CRG_CLOCK_TYPE_LCD].intf_sel_dev = dev;
vo_clock->intf_clock_info[VO_CRG_CLOCK_TYPE_LCD].intf_reverse_en = clk_reverse_en;
break;
} else {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
case XMEDIA_INTF_TYPE_MCU:
//todo ???? mcu 接口时钟
break;
default:
VO_TRACE(MODULE_DBG_ERR, "intf type error!\n");
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
return XMEDIA_SUCCESS;
}
//crg intf 接口时钟门控使能
xmedia_void hal_vo_set_intf_clock_enable(vo_clock_config * vo_clock,
xmedia_intf_type intf_type, xmedia_bool clock_enable)
{
xmedia_chn_info vo_chn_info = {0};
vo_chn_info.mod_id = MOD_ID_VO;
vo_chn_info.dev_id = 0;
vo_chn_info.chn_id = 0;
switch(intf_type) {
case XMEDIA_INTF_TYPE_BT656:
case XMEDIA_INTF_TYPE_BT1120:
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_BT_CKEN, &clock_enable); //bt时钟使能
break;
case XMEDIA_INTF_TYPE_LCD:
drv_sys_mod_ctrl(&vo_chn_info, SYS_VO_LCD_CKEN, &clock_enable); //lcd时钟使能
break;
case XMEDIA_INTF_TYPE_MCU:
break;
default:
VO_TRACE(MODULE_DBG_ERR, "intf type error!\n");
return;
}
vo_clock->intf_clock_info[hal_vo_swap_intf_type(intf_type)].intf_clock_gate = clock_enable;
return;
}
//获取接口实际配置时钟
xmedia_s32 hal_vo_get_intf_clock(vo_clock_config * vo_clock, xmedia_vo_dev dev, xmedia_u32 *clock_hz)
{
vo_div_clock_type div_type;
if (vo_clock->dev_clock_info[dev].clock_sel == VO_CLOCK_SRC_SEL_MAX) {
VO_TRACE(MODULE_DBG_ERR, "clock_sel error!\n");
return XMEDIA_FAILURE;
}
if (vo_clock->dev_clock_info[dev].clock_sel != VO_CLOCK_SRC_SEL_LCD) {
*clock_hz = vo_clock->dev_clock_info[dev].fixed_clock_hz;
} else {
div_type = vo_clk_sel_to_div_type(vo_clock->dev_clock_info[dev].clock_sel);
*clock_hz = vo_clock->dev_clock_info[dev].freq_clock[div_type].div_clock_hz;
}
return XMEDIA_SUCCESS;
}
source/bootloader/product/driver/vo/hal/xmorca/clock/hal_vo_clock.h
+125
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@@ -0,0 +1,125 @@
/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef __HAL_VO_CLOCK_H__
#define __HAL_VO_CLOCK_H__
#include "drv_vo_comm.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
VO_MIPITX_PLL_REF_CKSEL_24M = 0,
VO_MIPITX_PLL_REF_CKSEL_36M,
VO_MIPITX_PLL_REF_CKSEL_MAX
} vo_mipitx_pll_ref_cksel;
#define LCD_FREQUENCY_DIVIDER_MAX (148.5 * 1000 * 1000)
#define PLL_FREQUENCY_DIVIDER_MAX (297 * 1000 * 1000)
#define LCD_DIV_2_POWER_27 (1 << 27) //2的27次方
#define LCD_DIV_2_POWER_24 (1 << 24) //2的24次方
#define LCD_DIV_SORCE_FRE (1375*1000*1000) //lcd源频率
#define VO_CLOCK_SRC_13_5MHZ 13500000
#define VO_CLOCK_SRC_27MHZ 27000000
#define VO_CLOCK_SRC_37_125MHZ 37125000
#define VO_CLOCK_SRC_74_25MHZ 74250000
#define VO_CLOCK_SRC_148_5MHZ 148500000
#define VO_CLOCK_SRC_297MHZ 297000000
#define VO_CLOCK_SRC_343_75MHZ 343750000
typedef enum {
VO_CLOCK_SRC_SEL_148_5MHZ,
VO_CLOCK_SRC_SEL_74_25MHZ,
VO_CLOCK_SRC_SEL_37_125MHZ,
VO_CLOCK_SRC_SEL_27MHZ,
VO_CLOCK_SRC_SEL_13_5MHZ,
VO_CLOCK_SRC_SEL_LCD,
VO_CLOCK_SRC_SEL_MAX,
}vo_clock_src_sel;
typedef enum {
VO_CLOCK_SRC_PPC_SEL_200MHZ,
VO_CLOCK_SRC_PPC_SEL_150MHZ,
VO_CLOCK_SRC_PPC_SEL_100MHZ,
VO_CLOCK_SRC_PPC_SEL_50MHZ,
VO_CLOCK_SRC_PPC_SEL_MAX,
}vo_clock_ppc_sel;
typedef enum {
VO_DIV_CLOCK_TYPE_LCD,
VO_DIV_CLOCK_TYPE_MAX,
} vo_div_clock_type;
typedef enum {
VO_CRG_CLOCK_TYPE_MCU,
VO_CRG_CLOCK_TYPE_BT,
VO_CRG_CLOCK_TYPE_LCD,
VO_CRG_CLOCK_TYPE_MAX,
} vo_crg_intf_type;
typedef enum {
VO_CLOCK_PRIORITY_SEL_NORMAL,
VO_CLOCK_PRIORITY_SEL_LCD,
VO_CLOCK_PRIORITY_SEL_FIX,
VO_CLOCK_PRIORITY_SEL_MAX,
} vo_clock_priority_sel;
typedef struct {
xmedia_bool div_clock_en; //分频器使能状态 dev0 dev1 共用同一分频器时 需判断两个dev的使能状态来使能分频器
xmedia_u32 div_clock_hz; //分频器频率
} vo_div_clock_info;
typedef struct {
vo_clock_src_sel clock_sel; //dev 时钟源选择
xmedia_bool vo_lvds_sel; //lvds时需要配1 选择LVDS TXPHY PLL_CLKOUT，否则配0 选择SOC时钟
xmedia_u32 clock_hz;
xmedia_u32 fixed_clock_hz; //固定频点时钟
vo_div_clock_info freq_clock[VO_DIV_CLOCK_TYPE_MAX];//dev 分频器信息
xmedia_bool dev_clock_gate; //dev时钟门控
} vo_dev_clock_info;
typedef struct {
xmedia_bool intf_clock_gate; //intf时钟门控
xmedia_vo_dev intf_sel_dev; //接口时钟通道选择
xmedia_bool intf_reverse_en;
} vo_intf_clock_info;
typedef struct {
xmedia_bool vo_top_clock_gate; //vo top层动态时钟门控
vo_dev_clock_info dev_clock_info[XMEDIA_VO_REAL_DEV_NUM]; //dev时钟信息
vo_intf_clock_info intf_clock_info[VO_CRG_CLOCK_TYPE_MAX]; //intf时钟信息
} vo_clock_config;
#define VO_MIPI_PLL_FREF VO_MIPITX_PLL_REF_CKSEL_24M //24MHz pll原始频率
xmedia_void hal_vo_clock_init(vo_clock_config * vo_clock);
xmedia_void hal_vo_clock_deinit(xmedia_void);
xmedia_void hal_vo_set_clock_gate(vo_clock_config * vo_clock, xmedia_bool enable);
xmedia_s32 hal_vo_set_dev_div_clock(vo_clock_config * vo_clock, xmedia_vo_dev dev, xmedia_u32 clk_hz,
xmedia_bool *vo_special_timing_sel, xmedia_bool vo_lcd_divider_priority);
xmedia_void hal_vo_set_dev_div_clock_enable(vo_clock_config * vo_clock, xmedia_vo_dev dev,
xmedia_bool clk_en);
xmedia_void hal_vo_set_clock_reset_enable(vo_clock_config * vo_clock, xmedia_bool reset_en);
xmedia_bool hal_vo_get_clock_reset_sta(xmedia_void);
xmedia_void hal_vo_set_dev_clock_enable(vo_clock_config * vo_clock, xmedia_vo_dev dev,
xmedia_bool clk_en);
xmedia_s32 hal_vo_set_intf_clock(vo_clock_config * vo_clock, xmedia_vo_dev dev, xmedia_bool clk_reverse_en,
xmedia_intf_type intf_type);
xmedia_void hal_vo_set_intf_clock_enable(vo_clock_config * vo_clock, xmedia_intf_type intf_type,
xmedia_bool clock_enable);
xmedia_void hal_vo_set_intf_detach_dev(vo_clock_config * vo_clock, xmedia_vo_dev dev,
xmedia_intf_type intf_type);
xmedia_s32 hal_vo_get_intf_clock(vo_clock_config * vo_clock, xmedia_vo_dev dev, xmedia_u32 *clock_hz);
#ifdef __cplusplus
}
#endif
#endif /* __HAL_VO_IP_CSC_H__ */
source/bootloader/product/driver/vo/hal/xmorca/csc/hal_vo_csc.c
+310
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@@ -0,0 +1,310 @@
/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#include "hal_vo_csc.h"
#define VO_CSC_TABLE_MAX 61
typedef struct{
vo_csc_type type;
const vo_csc_coef *matrix;
} vo_csc_type_matrix;
const vo_csc_coef g_csc_yuv601limit_to_yuv601limit = {
1024, 0, 0, 0, 1024, 0, 0, 0, 1024,
-16, -128, -128,
16, 128, 128,
};
const vo_csc_coef g_csc_yuv601full_to_yuv601limit = {
880, 0, 0, 0, 899, 0, 0, 0, 899,
0, -128, -128,
16, 128, 128,
};
const vo_csc_coef g_csc_yuv709limit_to_yuv601limit = {
1024, 102, 196, 0, 1014, -113, 0, -74, 1007,
-16, -128, -128,
-16, 128, 128,
};
const vo_csc_coef g_csc_yuv709full_to_yuv601limit = {
880, 90, 173, 0, 891, -99, 0, -65, 864,
0, -128, -128,
16, 128, 128,
};
const vo_csc_coef g_csc_yuv601limit_to_yuv709limit = {
1024, -118, -213, 0, 1043, 117, 0, 77, 1050,
-16, -128, -128,
16, 128, 128,
};
const vo_csc_coef g_csc_yuv601full_to_yuv709limit = {
880, -103, -187, 0, 916, 102, 0, 67, 922,
0, -128, -128,
16, 128, 128,
};
const vo_csc_coef g_csc_yuv709limit_to_yuv709limit = {
1024, 0, 0, 0, 1024, 0, 0, 0, 1024,
-16, -128, -128,
16, 128, 128,
};
const vo_csc_coef g_csc_yuv709full_to_yuv709limit = {
880, 0, 0, 0, 899, 0, 0, 0, 899,
0, -128, -128,
16, 128, 128,
};
const vo_csc_coef g_csc_yuv601limit_to_yuv601full = {
1192, 0, 0, 0, 1165, 0, 0, 0, 1165,
-16, -128, -128,
0, 128, 128,
};
const vo_csc_coef g_csc_yuv601full_to_yuv601full = {
1024, 0, 0, 0, 1024, 0, 0, 0, 1024,
0, -128, -128,
0, 128, 128,
};
const vo_csc_coef g_csc_yuv709limit_to_yuv601full = {
1192, 117, 222, 0, 1154, -128, 0, -84, 1146,
-16, -128, -128,
0, 128, 128,
};
const vo_csc_coef g_csc_yuv709full_to_yuv601full = {
1024, 102, 196, 0, 1014, -113, 0, -74, 1007,
0, -128, -128,
0, 128, 128,
};
const vo_csc_coef g_csc_yuv601limit_to_yuv709full = {
1192, -137, -248, 0, 1188, 133, 0, 87, 1194,
-16, -128, -128,
0, 128, 128,
};
const vo_csc_coef g_csc_yuv601full_to_yuv709full = {
1024, -118, -213, 0, 1043, 117, 0, 77, 1050,
0, -128, -128,
0, 128, 128,
};
const vo_csc_coef g_csc_yuv709limit_to_yuv709full = {
1192, 0, 0, 0, 1165, 0, 0, 0, 1165,
-16, -128, -128,
0, 128, 128,
};
const vo_csc_coef g_csc_yuv709full_to_yuv709full = {
1024, 0, 0, 0, 1024, 0, 0, 0, 1024,
0, -128, -128,
0, 128, 128,
};
const vo_csc_coef g_csc_yuv601limit_to_rgbfull = {
1192, 0, 1634, 1192, -400, -833, 1192, 2066, 0,
-16, -128, -128,
0, 0, 0,
};
const vo_csc_coef g_csc_yuv601full_to_rgbfull = {
1024, 0, 1040, 1024, -344, -706, 1024, 1774, 0,
0, -128, -128,
0, 0, 0,
};
const vo_csc_coef g_csc_yuv709limit_to_rgbfull = {
1192, 0, 1836, 1192, -218, -547, 1192, 2166, 0,
-16, -128, -128,
0, 0, 0,
};
const vo_csc_coef g_csc_yuv709full_to_rgbfull = {
1024, 0, 1577, 1024, -187, -470, 1024, 1860, 0,
0, -128, -128,
0, 0, 0,
};
const vo_csc_coef g_csc_yuv601limit_to_rgblimit = {
1024, 0, 1404, 1024, -344, -716, 1024, 1775, 0,
-16, -128, -128,
16, 16, 16,
};
const vo_csc_coef g_csc_yuv601full_to_rgblimit = {
880, 0, 1233, 880, -302, -629, 880, 1559, 0,
0, -128, -128,
16, 16, 16,
};
const vo_csc_coef g_csc_yuv709limit_to_rgblimit = {
1024, 0, 1578, 1024, -187, -470, 1024, 1861, 0,
-16, -128, -128,
16, 16, 16,
};
const vo_csc_coef g_csc_yuv709full_to_rgblimit = {
880, 0, 1385, 880, -164, -413, 880, 1634, 0,
0, -128, -128,
16, 16, 16,
};
const int g_sin_table[VO_CSC_TABLE_MAX] = {
-500, -485, -469, -454, -438, -422, -407, -391, -374, -358,
-342, -325, -309, -292, -276, -259, -242, -225, -208, -191,
-174, -156, -139, -122, -104, -87, -70, -52, -35, -17,
0, 17, 35, 52, 70, 87, 104, 122, 139, 156,
174, 191, 208, 225, 242, 259, 276, 292, 309, 325,
342, 358, 374, 391, 407, 422, 438, 454, 469, 485,
500
};
const int g_cos_table[VO_CSC_TABLE_MAX] = {
866, 875, 883, 891, 899, 906, 914, 921, 927, 934,
940, 946, 951, 956, 961, 966, 970, 974, 978, 982,
985, 988, 990, 993, 995, 996, 998, 999, 999, 1000,
1000, 1000, 999, 999, 998, 996, 995, 993, 990, 988,
985, 982, 978, 974, 970, 966, 961, 956, 951, 946,
940, 934, 927, 921, 914, 906, 899, 891, 883, 875,
866
};
//后面需要根据算法提供的参数进行更新
static vo_csc_type_matrix g_type_to_matrix[VO_CSC_MAX] = {
{ VO_CSC_YUV2RGB_601_LIMIT2FULL, &g_csc_yuv601limit_to_rgbfull },
{ VO_CSC_YUV2RGB_709_LIMIT2FULL, &g_csc_yuv709limit_to_rgbfull },
{ VO_CSC_YUV2RGB_601_FULL2LIMIT, &g_csc_yuv601full_to_rgblimit },
{ VO_CSC_YUV2RGB_709_FULL2LIMIT, &g_csc_yuv709full_to_rgblimit },
{ VO_CSC_YUV2RGB_601_FULL2FULL, &g_csc_yuv601full_to_rgbfull },
{ VO_CSC_YUV2RGB_709_FULL2FULL, &g_csc_yuv709full_to_rgbfull },
{ VO_CSC_YUV2RGB_601_LIMIT2LIMIT, &g_csc_yuv601limit_to_rgblimit },
{ VO_CSC_YUV2RGB_709_LIMIT2LIMIT, &g_csc_yuv709limit_to_rgblimit },
{ VO_CSC_YUV2YUV_601_601_LIMIT2LIMIT, &g_csc_yuv601limit_to_yuv601limit },
{ VO_CSC_YUV2YUV_601_709_LIMIT2LIMIT, &g_csc_yuv601limit_to_yuv709limit },
{ VO_CSC_YUV2YUV_709_601_LIMIT2LIMIT, &g_csc_yuv709limit_to_yuv601limit },
{ VO_CSC_YUV2YUV_709_709_LIMIT2LIMIT, &g_csc_yuv709limit_to_yuv709limit },
{ VO_CSC_YUV2YUV_601_601_FULL2FULL, &g_csc_yuv601full_to_yuv601full },
{ VO_CSC_YUV2YUV_601_709_FULL2FULL, &g_csc_yuv601full_to_yuv709full },
{ VO_CSC_YUV2YUV_709_601_FULL2FULL, &g_csc_yuv709full_to_yuv601full },
{ VO_CSC_YUV2YUV_709_709_FULL2FULL, &g_csc_yuv709full_to_yuv709full },
{ VO_CSC_YUV2YUV_601_601_LIMIT2FULL, &g_csc_yuv601limit_to_yuv601full },
{ VO_CSC_YUV2YUV_601_709_LIMIT2FULL, &g_csc_yuv601limit_to_yuv709full },
{ VO_CSC_YUV2YUV_709_601_LIMIT2FULL, &g_csc_yuv709limit_to_yuv601full },
{ VO_CSC_YUV2YUV_709_709_LIMIT2FULL, &g_csc_yuv709limit_to_yuv709full },
{ VO_CSC_YUV2YUV_601_601_FULL2LIMIT, &g_csc_yuv601full_to_yuv601limit },
{ VO_CSC_YUV2YUV_601_709_FULL2LIMIT, &g_csc_yuv601full_to_yuv709limit },
{ VO_CSC_YUV2YUV_709_601_FULL2LIMIT, &g_csc_yuv709full_to_yuv601limit },
{ VO_CSC_YUV2YUV_709_709_FULL2LIMIT, &g_csc_yuv709full_to_yuv709limit },
};
static xmedia_s32 vo_get_base_matrix_by_type(vo_csc_type csc_type, const vo_csc_coef **csc_tmp)
{
xmedia_u32 loop;
xmedia_u32 len;
len = sizeof(g_type_to_matrix) / sizeof(vo_csc_type_matrix);
for (loop = 0; loop < len; loop++) {
if (g_type_to_matrix[loop].type == csc_type) {
if (g_type_to_matrix[loop].matrix != XMEDIA_NULL) {
*csc_tmp = g_type_to_matrix[loop].matrix;
} else {
break;
}
return XMEDIA_SUCCESS;
}
}
return XMEDIA_FAILURE;
};
static xmedia_bool vo_check_csc_type(vo_csc_type type)
{
if ((type >= VO_CSC_YUV2RGB_601_LIMIT2FULL) && (type <= VO_CSC_YUV2RGB_709_LIMIT2LIMIT)) {
return XMEDIA_TRUE;
}
return XMEDIA_FALSE;
}
xmedia_s32 hal_vo_csc_coef_convert(vo_pic_info *src_pic_info, vo_csc_coef *pst_csc_matrix)
{
xmedia_s32 luma = 0;
xmedia_s32 contrast = 0;
xmedia_s32 hue = 0;
xmedia_s32 satu = 0;
const vo_csc_coef *base_csc_matrix = XMEDIA_NULL;
luma = (xmedia_s32)src_pic_info->luma * 64 / 100 - 32;
contrast = ((xmedia_s32)src_pic_info->contrast - 50) * 2 + 100;
hue = (xmedia_s32)src_pic_info->hue * 60 / 100;
satu = ((xmedia_s32)src_pic_info->saturation - 50) * 2 + 100;
if (hue >= VO_CSC_TABLE_MAX) {
VO_TRACE(MODULE_DBG_ERR,"hue %d error!\n", hue);
return XMEDIA_FAILURE;
}
if (vo_get_base_matrix_by_type(src_pic_info->csc_type, &base_csc_matrix) != XMEDIA_SUCCESS) {
VO_TRACE(MODULE_DBG_ERR,"vo_get_base_matrix_by_type error!\n");
return XMEDIA_FAILURE;
}
pst_csc_matrix->csc_offset_in0 = base_csc_matrix->csc_offset_in0;
pst_csc_matrix->csc_offset_in1 = base_csc_matrix->csc_offset_in1;
pst_csc_matrix->csc_offset_in2 = base_csc_matrix->csc_offset_in2;
pst_csc_matrix->csc_offset_out0 = base_csc_matrix->csc_offset_out0;
pst_csc_matrix->csc_offset_out1 = base_csc_matrix->csc_offset_out1;
pst_csc_matrix->csc_offset_out2 = base_csc_matrix->csc_offset_out2;
/* C_ratio的调节范围一般是0～1.99, C_ratio=s32Contrast/100
* S的调节范围一般为0~1.99,S=s32Satu/100
* 色调调节参数的范围一般为-30°~30°,通过查表法求得COS和SIN值并/1000
*/
if (vo_check_csc_type(src_pic_info->csc_type) == XMEDIA_TRUE) {
/* 此公式仅用于YUV->RGB转换，RGB->YUV转换不可用此公式 */
pst_csc_matrix->csc_coef0 = (contrast * base_csc_matrix->csc_coef0) / 100;
pst_csc_matrix->csc_coef1 = (contrast * satu * ((base_csc_matrix->csc_coef1 * g_cos_table[hue] -
base_csc_matrix->csc_coef2 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef2 = (contrast * satu * ((base_csc_matrix->csc_coef1 * g_sin_table[hue] +
base_csc_matrix->csc_coef2 * g_cos_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef3 = (contrast * base_csc_matrix->csc_coef3) / 100;
pst_csc_matrix->csc_coef4 = (contrast * satu * ((base_csc_matrix->csc_coef4 * g_cos_table[hue] -
base_csc_matrix->csc_coef5 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef5 = (contrast * satu * ((base_csc_matrix->csc_coef4 * g_sin_table[hue] +
base_csc_matrix->csc_coef5 * g_cos_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef6 = (contrast * base_csc_matrix->csc_coef6) / 100;
pst_csc_matrix->csc_coef7 = (contrast * satu * ((base_csc_matrix->csc_coef7 * g_cos_table[hue] -
base_csc_matrix->csc_coef8 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef8 = (contrast * satu * ((base_csc_matrix->csc_coef7 * g_sin_table[hue] +
base_csc_matrix->csc_coef8 * g_cos_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_offset_in0 += (contrast != 0) ? (luma * 100 / contrast) : luma * 100;
} else {
/* 此公式仅用于RGB->YUV转换，YUV->RGB转换不可用此公式，
* YUV->YUV仅调节图像效果可用此公式，因为常量矩阵为单位矩阵 */
pst_csc_matrix->csc_coef0 = (contrast * base_csc_matrix->csc_coef0) / 100;
pst_csc_matrix->csc_coef1 = (contrast * base_csc_matrix->csc_coef1) / 100;
pst_csc_matrix->csc_coef2 = (contrast * base_csc_matrix->csc_coef2) / 100;
pst_csc_matrix->csc_coef3 = (contrast * satu * ((base_csc_matrix->csc_coef3 * g_cos_table[hue] +
base_csc_matrix->csc_coef3 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef4 = (contrast * satu * ((base_csc_matrix->csc_coef4 * g_cos_table[hue] +
base_csc_matrix->csc_coef4 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef5 = (contrast * satu * ((base_csc_matrix->csc_coef5 * g_cos_table[hue] +
base_csc_matrix->csc_coef5 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef6 = (contrast * satu * ((base_csc_matrix->csc_coef6 * g_cos_table[hue] -
base_csc_matrix->csc_coef6 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef7 = (contrast * satu * ((base_csc_matrix->csc_coef7 * g_cos_table[hue] -
base_csc_matrix->csc_coef7 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_coef8 = (contrast * satu * ((base_csc_matrix->csc_coef8 * g_cos_table[hue] -
base_csc_matrix->csc_coef8 * g_sin_table[hue]) / 1000)) / 10000;
pst_csc_matrix->csc_offset_out0 += luma;
}
return XMEDIA_SUCCESS;
}
source/bootloader/product/driver/vo/hal/xmorca/csc/hal_vo_csc.h
+41
View File
@@ -0,0 +1,41 @@
/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef __HAL_VO_CSC_H__
#define __HAL_VO_CSC_H__
#include "drv_vo_comm.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef struct {
xmedia_s32 csc_coef0;
xmedia_s32 csc_coef1;
xmedia_s32 csc_coef2;
xmedia_s32 csc_coef3;
xmedia_s32 csc_coef4;
xmedia_s32 csc_coef5;
xmedia_s32 csc_coef6;
xmedia_s32 csc_coef7;
xmedia_s32 csc_coef8;
xmedia_s32 csc_offset_in0;
xmedia_s32 csc_offset_in1;
xmedia_s32 csc_offset_in2;
xmedia_s32 csc_offset_out0;
xmedia_s32 csc_offset_out1;
xmedia_s32 csc_offset_out2;
} vo_csc_coef;
xmedia_s32 hal_vo_csc_coef_convert(vo_pic_info *src_pic_info, vo_csc_coef *pst_csc_matrix);
#ifdef __cplusplus
}
#endif
#endif /* __HAL_VO_IP_CSC_H__ */
source/bootloader/product/driver/vo/hal/xmorca/disp/hal_vo_disp.c
+722
View File
@@ -0,0 +1,722 @@
/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#include "hal_vo_disp.h"
#include "hal_vo_reg.h"
extern s_vout_regs_type *g_p_vout_reg;
xmedia_void hal_vo_set_top_regup(xmedia_bool enable)
{
hal_reg_vout_set_cfg_regup_en(g_p_vout_reg, enable);
return;
}
xmedia_void hal_vo_get_top_regup(xmedia_bool *enable)
{
*enable = hal_reg_vout_get_top_regup_sta(g_p_vout_reg);
return;
}
xmedia_void hal_vo_get_video_regup(xmedia_vo_layer layer, xmedia_bool *enable)
{
if (layer == XMEDIA_VO_LAYER_V0) {
*enable = hal_reg_vout_get_v0_regup_sta(g_p_vout_reg);
} else {
;
}
return;
}
xmedia_void hal_vo_get_intf_regup(xmedia_vo_dev dev, xmedia_bool *state)
{
if (dev == XMEDIA_VO_DEV_0) {
*state = hal_reg_vout_get_intf_regup_sta(g_p_vout_reg);
} else {
;
}
return;
}
xmedia_void hal_vo_get_version0(xmedia_u32 *version)
{
*version = hal_reg_vout_get_vout_ver_0(g_p_vout_reg);
return;
}
xmedia_void hal_vo_get_version1(xmedia_u32 *version)
{
*version = hal_reg_vout_get_vout_ver_1(g_p_vout_reg);
return;
}
xmedia_void hal_vo_set_mem_ctrl(xmedia_u32 speed)
{
hal_reg_vout_set_cfg_rfs_sram_ctrl(g_p_vout_reg, speed);
hal_reg_vout_set_cfg_ras_sram_ctrl(g_p_vout_reg, speed);
return;
}
xmedia_u32 hal_vo_get_mask_interrupt_state(xmedia_void)
{
xmedia_u32 mask_state;
mask_state = hal_reg_vout_reg_read((xmedia_uintptr_t)&(g_p_vout_reg->vout_int_sta.u32));
return mask_state;
}
xmedia_void hal_vo_clear_mask_interrupt_state(vo_isr_interrupt_type int_mask)
{
if (int_mask & VO_ISR_INTERRUPT_TYPE_DHD0_VTT0) {
hal_reg_vout_set_cfg_intf_vt_int_0_clr(g_p_vout_reg, XMEDIA_TRUE);
}
if (int_mask & VO_ISR_INTERRUPT_TYPE_DHD0_VTT1) {
hal_reg_vout_set_cfg_intf_vt_int_1_clr(g_p_vout_reg, XMEDIA_TRUE);
}
if (int_mask & VO_ISR_INTERRUPT_TYPE_DHD0_VTT2) {
hal_reg_vout_set_cfg_intf_vt_int_2_clr(g_p_vout_reg, XMEDIA_TRUE);
}
if (int_mask & VO_ISR_INTERRUPT_TYPE_DHD0_VTT3) {
hal_reg_vout_set_cfg_intf_vt_int_3_clr(g_p_vout_reg, XMEDIA_TRUE);
}
if (int_mask & VO_ISR_INTERRUPT_TYPE_DHD0_UFINT) {
hal_reg_vout_set_cfg_intf_underflow_clr(g_p_vout_reg, XMEDIA_TRUE);
}
if (int_mask & VO_ISR_INTERRUPT_TYPE_LOW_DELAY_CERR) {
hal_reg_vout_set_cfg_low_delay_c_err_clr(g_p_vout_reg, XMEDIA_TRUE);
}
if (int_mask & VO_ISR_INTERRUPT_TYPE_LOW_DELAY_YERR) {
hal_reg_vout_set_cfg_low_delay_y_err_clr(g_p_vout_reg, XMEDIA_TRUE);
}
if (int_mask & VO_ISR_INTERRUPT_TYPE_BUSR_ERR) {
hal_reg_vout_set_cfg_axi_bus_rerr_clr(g_p_vout_reg, XMEDIA_TRUE);
}
if (int_mask & VO_ISR_INTERRUPT_TYPE_BUSW_ERR) {
hal_reg_vout_set_cfg_axi_bus_werr_clr(g_p_vout_reg, XMEDIA_TRUE);
}
return;
}
xmedia_void hal_vo_set_mask_interrupt_enable(vo_isr_interrupt_type int_mask,xmedia_bool enable)
{
if (int_mask & VO_ISR_INTERRUPT_TYPE_DHD0_VTT0) {
hal_reg_vout_set_cfg_intf_vt_int_0_msk(g_p_vout_reg, enable);
}
if (int_mask & VO_ISR_INTERRUPT_TYPE_DHD0_VTT1) {
hal_reg_vout_set_cfg_intf_vt_int_1_msk(g_p_vout_reg, enable);
}
if (int_mask & VO_ISR_INTERRUPT_TYPE_DHD0_VTT2) {
hal_reg_vout_set_cfg_intf_vt_int_2_msk(g_p_vout_reg, enable);
}
if (int_mask & VO_ISR_INTERRUPT_TYPE_DHD0_VTT3) {
hal_reg_vout_set_cfg_intf_vt_int_3_msk(g_p_vout_reg, enable);
}
if (int_mask & VO_ISR_INTERRUPT_TYPE_DHD0_UFINT) {
hal_reg_vout_set_cfg_intf_underflow_msk(g_p_vout_reg, enable);
}
if (int_mask & VO_ISR_INTERRUPT_TYPE_LOW_DELAY_CERR) {
hal_reg_vout_set_cfg_low_delay_c_err_msk(g_p_vout_reg, enable);
}
if (int_mask & VO_ISR_INTERRUPT_TYPE_LOW_DELAY_YERR) {
hal_reg_vout_set_cfg_low_delay_y_err_msk(g_p_vout_reg, enable);
}
if (int_mask & VO_ISR_INTERRUPT_TYPE_BUSR_ERR) {
hal_reg_vout_set_cfg_axi_bus_rerr_msk(g_p_vout_reg, enable);
}
if (int_mask & VO_ISR_INTERRUPT_TYPE_BUSW_ERR) {
hal_reg_vout_set_cfg_axi_bus_werr_msk(g_p_vout_reg, enable);
}
return;
}
xmedia_u32 hal_vo_get_unmask_interrupt_state(xmedia_void)
{
xmedia_u32 unmask_state;
unmask_state = hal_reg_vout_reg_read((xmedia_uintptr_t)&(g_p_vout_reg->vout_int_src_sta.u32));
return unmask_state;
}
xmedia_void hal_vo_clear_lowband_state(xmedia_bool enable)
{
hal_reg_vout_set_cfg_uf_clr(g_p_vout_reg, enable);
return;
}
xmedia_bool hal_vo_disp_get_dma_busy_state(xmedia_void)
{
xmedia_bool state = 0;
state |= hal_reg_vout_get_rdma_busy_g0(g_p_vout_reg);
state |= hal_reg_vout_get_rdma1_busy_v0_c(g_p_vout_reg);
state |= hal_reg_vout_get_rdma1_busy_v0_y(g_p_vout_reg);
state |= hal_reg_vout_get_rdma_busy_v0_c(g_p_vout_reg);
state |= hal_reg_vout_get_rdma_busy_v0_y(g_p_vout_reg);
return state;
}
xmedia_void hal_vo_set_cbm_bgcolor(xmedia_vo_dev dev, xmedia_u32 bgcolor)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_bk_color(g_p_vout_reg, bgcolor);
} else {
;
}
return;
}
xmedia_void hal_vo_get_cbm_bgcolor(xmedia_vo_dev dev, xmedia_u32 *bgcolor)
{
if (dev == XMEDIA_VO_DEV_0) {
*bgcolor = hal_reg_vout_get_cfg_bk_color(g_p_vout_reg);
} else {
;
}
return;
}
xmedia_void hal_vo_set_dma_standing(xmedia_vo_dev dev, xmedia_u8 value)
{
hal_reg_vout_set_cfg_axi_rd_ost_num(g_p_vout_reg, value);
return;
}
xmedia_u8 hal_vo_get_dma_standing(xmedia_void)
{
return hal_reg_vout_get_cfg_axi_rd_ost_num(g_p_vout_reg);
}
//v0 层的封装寄存器
xmedia_void hal_vo_set_enable(xmedia_vo_layer layer, xmedia_bool enable)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_layer_en(g_p_vout_reg, enable);
} else {
;
}
return;
}
xmedia_void hal_vo_get_enable(xmedia_vo_layer layer, xmedia_bool *enable)
{
if (layer == XMEDIA_VO_LAYER_V0) {
*enable = hal_reg_vout_get_cfg_layer_en(g_p_vout_reg);
} else {
;
}
return;
}
//两个及时寄存器
xmedia_void hal_vo_set_regup_mode(xmedia_vo_layer layer, xmedia_bool filed_en)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_regup_mode(g_p_vout_reg, filed_en);
} else {
;
}
return;
}
xmedia_void hal_vo_set_regup_field(xmedia_vo_layer layer, xmedia_bool bottom_en)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_regup_field(g_p_vout_reg, bottom_en);
} else {
;
}
return;
}
xmedia_void hal_vo_set_alpha(xmedia_vo_layer layer, xmedia_u8 alpha)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_galpha(g_p_vout_reg, alpha);
} else {
;
}
return;
}
xmedia_void hal_vo_set_alpha_enable(xmedia_vo_layer layer, xmedia_bool alpha_en)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_galpha_en(g_p_vout_reg, alpha_en);
} else {
;
}
return;
}
xmedia_void hal_vo_set_alpha_blend_mode(xmedia_vo_layer layer, xmedia_bool alpha_blend_en)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_blend_mode(g_p_vout_reg, alpha_blend_en);
} else {
;
}
return;
}
xmedia_void hal_vo_set_src_pixel_format(xmedia_vo_layer layer, vo_pixel_format format, xmedia_bool uv_order)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_src_fmt(g_p_vout_reg, format);
hal_reg_vout_set_cfg_src_uv_order(g_p_vout_reg, uv_order);
} else {
;
}
return;
}
xmedia_void hal_vo_set_multi_enable(xmedia_vo_layer layer, xmedia_bool enable)
{
return;
}
xmedia_void hal_vo_get_multi_enable(xmedia_vo_layer layer, xmedia_bool *enable)
{
return;
}
xmedia_void hal_vo_set_video_regup_enable(xmedia_vo_layer layer, xmedia_bool enable)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_v0upd_cfg_regup_en(g_p_vout_reg, enable);
}
return;
}
xmedia_void hal_vo_set_bgcolor(xmedia_vo_layer layer, xmedia_u32 bgcolor)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_v0bk_cfg_bk_color(g_p_vout_reg, bgcolor);
hal_reg_vout_set_cfg_mrg0_mute_color(g_p_vout_reg, bgcolor);
hal_reg_vout_set_cfg_mrg1_mute_color(g_p_vout_reg, bgcolor);
} else {
;
}
return;
}
xmedia_void hal_vo_get_bgcolor(xmedia_vo_layer layer, xmedia_u32 *bgcolor)
{
if (layer == XMEDIA_VO_LAYER_V0) {
*bgcolor = hal_reg_vout_get_v0bk_cfg_bk_color(g_p_vout_reg);
} else {
;
}
return;
}
xmedia_void hal_vo_set_mute_enable(xmedia_vo_layer layer, xmedia_bool enable)
{
//此接口用于single模式，由于7206相对于7605 删除了独立的单区域模式，所以layer mute直接使用 mrg0_mute_en即可
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_mrg0_mute_en(g_p_vout_reg, enable);
} else {
;
}
return;
}
xmedia_void hal_vo_get_mute_enable(xmedia_vo_layer layer, xmedia_bool *enable)
{
//此接口用于single模式，由于7206相对于7605 删除了独立的单区域模式，所以layer mute直接使用 mrg0_mute_en即可
if (layer == XMEDIA_VO_LAYER_V0) {
*enable = hal_reg_vout_get_cfg_mrg0_mute_en(g_p_vout_reg);
} else {
;
}
return;
}
xmedia_void hal_vo_set_mute_color(xmedia_vo_layer layer, xmedia_u32 bgcolor)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_v0bk_cfg_bk_color(g_p_vout_reg, bgcolor);
} else {
;
}
return;
}
xmedia_void hal_vo_set_mute_pattern_mode(xmedia_vo_layer layer, xmedia_bool value)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_mute_pat(g_p_vout_reg, value);
} else {
;
}
return;
}
xmedia_void hal_vo_set_mute_data_mode(xmedia_vo_layer layer, xmedia_bool value)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_mute_mode(g_p_vout_reg, value);
} else {
;
}
return;
}
xmedia_void hal_vo_set_checkbar_size(xmedia_vo_layer layer, xmedia_u8 width, xmedia_u8 height)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_checker_h(g_p_vout_reg, width);
hal_reg_vout_set_cfg_checker_v(g_p_vout_reg, height);
} else {
;
}
return;
}
/*
* 层相对窗口 的rect
*/
xmedia_void hal_vo_set_disp_rect (xmedia_vo_layer layer, xmedia_video_rect *disp_rect)
{
if (layer == XMEDIA_VO_LAYER_V0) {
#if 0
hal_reg_vout_set_cfg_disp_xpos(g_p_vout_reg, disp_rect->x);
hal_reg_vout_set_cfg_disp_ypos(g_p_vout_reg, disp_rect->y);
hal_reg_vout_set_cfg_disp_v(g_p_vout_reg, disp_rect->height - 1);
hal_reg_vout_set_cfg_disp_h(g_p_vout_reg, disp_rect->width - 1);
#endif
} else {
;
}
return;
}
xmedia_void hal_vo_get_disp_rect (xmedia_vo_layer layer, xmedia_video_rect *disp_rect)
{
if (layer == XMEDIA_VO_LAYER_V0) {
#if 0
disp_rect->x = hal_reg_vout_get_cfg_disp_xpos(g_p_vout_reg);
disp_rect->y = hal_reg_vout_get_cfg_disp_ypos(g_p_vout_reg);
disp_rect->height= hal_reg_vout_get_cfg_disp_v(g_p_vout_reg);
disp_rect->width = hal_reg_vout_get_cfg_disp_h(g_p_vout_reg);
#endif
} else {
;
}
return;
}
xmedia_void hal_vo_set_src_rect (xmedia_vo_layer layer, xmedia_video_rect *src_rect)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_src_xpos(g_p_vout_reg, src_rect->x);
hal_reg_vout_set_cfg_src_ypos(g_p_vout_reg, src_rect->y);
hal_reg_vout_set_cfg_src_v(g_p_vout_reg, src_rect->height - 1);
hal_reg_vout_set_cfg_src_h(g_p_vout_reg, src_rect->width - 1);
} else {
;
}
return ;
}
xmedia_void hal_vo_get_src_rect (xmedia_vo_layer layer, xmedia_video_rect *src_rect)
{
if (layer == XMEDIA_VO_LAYER_V0) {
src_rect->x = hal_reg_vout_get_cfg_src_xpos(g_p_vout_reg);
src_rect->y = hal_reg_vout_get_cfg_src_ypos(g_p_vout_reg);
src_rect->width = hal_reg_vout_get_cfg_src_v(g_p_vout_reg);
src_rect->height = hal_reg_vout_get_cfg_src_h(g_p_vout_reg);
} else {
;
}
return ;
}
xmedia_void hal_vo_set_mrg_mixer_prio(xmedia_vo_layer layer, vo_mrg_mix_prio prio_id)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_mixer_prio(g_p_vout_reg, prio_id);
} else {
;
}
return;
}
xmedia_void hal_vo_set_mrg_enable(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_bool enable)
{
if (layer == XMEDIA_VO_LAYER_V0) {
if (region_id == 0) {
hal_reg_vout_set_cfg_mrg0_en(g_p_vout_reg, enable);
} else if (region_id == 1) {
hal_reg_vout_set_cfg_mrg1_en(g_p_vout_reg, enable);
} else {
;
}
} else {
;
}
return ;
}
xmedia_void hal_vo_set_mrg_mute_enable(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_bool enable)
{
if (layer == XMEDIA_VO_LAYER_V0) {
if (region_id == 0) {
hal_reg_vout_set_cfg_mrg0_mute_en(g_p_vout_reg, enable);
} else if (region_id == 1) {
hal_reg_vout_set_cfg_mrg1_mute_en(g_p_vout_reg, enable);
} else {
;
}
} {
;
}
return ;
}
xmedia_void hal_vo_get_mrg_enable(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_bool *enable)
{
if (layer == XMEDIA_VO_LAYER_V0) {
if (region_id == 0) {
*enable = hal_reg_vout_get_cfg_mrg0_en(g_p_vout_reg);
} else if (region_id == 1) {
*enable = hal_reg_vout_get_cfg_mrg1_en(g_p_vout_reg);
} else {
;
}
} {
;
}
return;
}
xmedia_void hal_vo_set_mrg_src_rect (xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_video_rect *src_rect)
{
if (layer == XMEDIA_VO_LAYER_V0) {
if (region_id == 0) {
hal_reg_vout_set_cfg_mrg0_src_xpos(g_p_vout_reg, src_rect->x);
hal_reg_vout_set_cfg_mrg0_src_ypos(g_p_vout_reg, src_rect->y);
hal_reg_vout_set_cfg_mrg0_src_h(g_p_vout_reg, src_rect->width - 1);
hal_reg_vout_set_cfg_mrg0_src_v(g_p_vout_reg, src_rect->height - 1);
} else if (region_id == 1) {
hal_reg_vout_set_cfg_mrg1_src_xpos(g_p_vout_reg, src_rect->x);
hal_reg_vout_set_cfg_mrg1_src_ypos(g_p_vout_reg, src_rect->y);
hal_reg_vout_set_cfg_mrg1_src_h(g_p_vout_reg, src_rect->width - 1);
hal_reg_vout_set_cfg_mrg1_src_v(g_p_vout_reg, src_rect->height - 1);
}else {
;
}
} else {
;
}
return ;
}
xmedia_void hal_vo_set_lba_color(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_u32 color)
{
if (layer == XMEDIA_VO_LAYER_V0) {
if (region_id == 0) {
hal_reg_vout_set_cfg_lba0_color(g_p_vout_reg, color);
} else if (region_id == 1) {
hal_reg_vout_set_cfg_lba1_color(g_p_vout_reg, color);
} else {
;
}
} {
;
}
return;
}
xmedia_void hal_vo_set_lba_rect(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_video_rect *lba_rect)
{
if (layer == XMEDIA_VO_LAYER_V0) {
if (region_id == 0) {
hal_reg_vout_set_cfg_mrg0_disp_xpos(g_p_vout_reg, lba_rect->x);
hal_reg_vout_set_cfg_mrg0_disp_ypos(g_p_vout_reg, lba_rect->y);
hal_reg_vout_set_cfg_mrg0_disp_h(g_p_vout_reg, lba_rect->width - 1);
hal_reg_vout_set_cfg_mrg0_disp_v(g_p_vout_reg, lba_rect->height - 1);
} else if (region_id == 1) {
hal_reg_vout_set_cfg_mrg1_disp_xpos(g_p_vout_reg, lba_rect->x);
hal_reg_vout_set_cfg_mrg1_disp_ypos(g_p_vout_reg, lba_rect->y);
hal_reg_vout_set_cfg_mrg1_disp_h(g_p_vout_reg, lba_rect->width - 1);
hal_reg_vout_set_cfg_mrg1_disp_v(g_p_vout_reg, lba_rect->height - 1);
}else {
;
}
} else {
;
}
return ;
}
xmedia_void hal_vo_set_mrg_dst_rect (xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_video_rect *dst_rect)
{
if (layer == XMEDIA_VO_LAYER_V0) {
if (region_id == 0) {
hal_reg_vout_set_cfg_mrg0_src_xpos(g_p_vout_reg, dst_rect->x);
hal_reg_vout_set_cfg_mrg0_src_ypos(g_p_vout_reg, dst_rect->y);
hal_reg_vout_set_cfg_mrg0_src_h(g_p_vout_reg, dst_rect->width - 1);
hal_reg_vout_set_cfg_mrg0_src_v(g_p_vout_reg, dst_rect->height - 1);
}
else if (region_id == 1) {
hal_reg_vout_set_cfg_mrg1_src_xpos(g_p_vout_reg, dst_rect->x);
hal_reg_vout_set_cfg_mrg1_src_ypos(g_p_vout_reg, dst_rect->y);
hal_reg_vout_set_cfg_mrg1_src_h(g_p_vout_reg, dst_rect->width - 1);
hal_reg_vout_set_cfg_mrg1_src_v(g_p_vout_reg, dst_rect->height - 1);
} else {
;
}
} else {
;
}
return ;
}
xmedia_void hal_vo_set_mrg0_addr(xmedia_vo_layer layer, vo_addr *addr)
{
xmedia_u32 addr_y_l = addr->lum_addr & 0xFFFFFFFF;
xmedia_u32 addr_y_h = (addr->lum_addr & 0xFFFFFFFF00000000) >> 32;
xmedia_u32 addr_c_l = addr->chm_addr & 0xFFFFFFFF;
xmedia_u32 addr_c_h = (addr->chm_addr & 0xFFFFFFFF00000000) >> 32;
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_mrg0_src_stride_c(g_p_vout_reg, addr->chm_stride);
hal_reg_vout_set_cfg_mrg0_src_addr_c_l(g_p_vout_reg, addr_c_l);
hal_reg_vout_set_cfg_mrg0_src_addr_c_h(g_p_vout_reg, addr_c_h);
hal_reg_vout_set_cfg_mrg0_src_stride_y(g_p_vout_reg, addr->lum_stride);
hal_reg_vout_set_cfg_mrg0_src_addr_y_l(g_p_vout_reg, addr_y_l);
hal_reg_vout_set_cfg_mrg0_src_addr_y_h(g_p_vout_reg, addr_y_h);
} else {
;
}
return ;
}
xmedia_void hal_vo_set_mrg1_addr(xmedia_vo_layer layer, vo_addr *addr)
{
xmedia_u32 addr_y_l = addr->lum_addr & 0xFFFFFFFF;
xmedia_u32 addr_y_h = (addr->lum_addr & 0xFFFFFFFF00000000) >> 32;
xmedia_u32 addr_c_l = addr->chm_addr & 0xFFFFFFFF;
xmedia_u32 addr_c_h = (addr->chm_addr & 0xFFFFFFFF00000000) >> 32;
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_mrg1_src_stride_c(g_p_vout_reg, addr->chm_stride);
hal_reg_vout_set_cfg_mrg1_src_addr_c_l(g_p_vout_reg, addr_c_l);
hal_reg_vout_set_cfg_mrg1_src_addr_c_h(g_p_vout_reg, addr_c_h);
hal_reg_vout_set_cfg_mrg1_src_stride_y(g_p_vout_reg, addr->lum_stride);
hal_reg_vout_set_cfg_mrg1_src_addr_y_l(g_p_vout_reg, addr_y_l);
hal_reg_vout_set_cfg_mrg1_src_addr_y_h(g_p_vout_reg, addr_y_h);
} else {
;
}
return ;
}
xmedia_void hal_vo_set_mrg_addr(xmedia_vo_layer layer, xmedia_u32 region_id,vo_addr *addr)
{
if (region_id == 0) {
hal_vo_set_mrg0_addr(layer, addr);
} else if (region_id == 1) {
hal_vo_set_mrg1_addr(layer, addr);
} else {
;
}
return ;
}
xmedia_void hal_vo_set_mrg_mute_color(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_u32 bgcolor)
{
if (layer == XMEDIA_VO_LAYER_V0) {
if (region_id == 0) {
hal_reg_vout_set_cfg_mrg0_mute_color(g_p_vout_reg, bgcolor);
} else if (region_id == 1) {
hal_reg_vout_set_cfg_mrg1_mute_color(g_p_vout_reg, bgcolor);
}
else {
;
}
} else {
;
}
return ;
}
xmedia_void hal_vo_set_csc_en(xmedia_vo_layer layer, xmedia_bool enable)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_csc_en(g_p_vout_reg,enable);
} else {
;
}
return;
}
xmedia_void hal_vo_set_mrg0_csc(xmedia_vo_layer layer,vo_csc_coef *csc)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_mrg0_csc_offset_in_2(g_p_vout_reg,csc->csc_offset_in2);
hal_reg_vout_set_cfg_mrg0_csc_offset_in_1(g_p_vout_reg,csc->csc_offset_in1);
hal_reg_vout_set_cfg_mrg0_csc_offset_in_0(g_p_vout_reg,csc->csc_offset_in0);
hal_reg_vout_set_cfg_mrg0_csc_offset_out_2(g_p_vout_reg,csc->csc_offset_out2);
hal_reg_vout_set_cfg_mrg0_csc_offset_out_1(g_p_vout_reg,csc->csc_offset_out1);
hal_reg_vout_set_cfg_mrg0_csc_offset_out_0(g_p_vout_reg,csc->csc_offset_out0);
hal_reg_vout_set_cfg_mrg0_csc_matrix_0(g_p_vout_reg,csc->csc_coef0);
hal_reg_vout_set_cfg_mrg0_csc_matrix_1(g_p_vout_reg,csc->csc_coef1);
hal_reg_vout_set_cfg_mrg0_csc_matrix_2(g_p_vout_reg,csc->csc_coef2);
hal_reg_vout_set_cfg_mrg0_csc_matrix_3(g_p_vout_reg,csc->csc_coef3);
hal_reg_vout_set_cfg_mrg0_csc_matrix_4(g_p_vout_reg,csc->csc_coef4);
hal_reg_vout_set_cfg_mrg0_csc_matrix_5(g_p_vout_reg,csc->csc_coef5);
hal_reg_vout_set_cfg_mrg0_csc_matrix_6(g_p_vout_reg,csc->csc_coef6);
hal_reg_vout_set_cfg_mrg0_csc_matrix_7(g_p_vout_reg,csc->csc_coef7);
hal_reg_vout_set_cfg_mrg0_csc_matrix_8(g_p_vout_reg,csc->csc_coef8);
} else {
;
}
return;
}
xmedia_void hal_vo_set_mrg1_csc(xmedia_vo_layer layer,vo_csc_coef *csc)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_mrg1_csc_offset_in_2(g_p_vout_reg,csc->csc_offset_in2);
hal_reg_vout_set_cfg_mrg1_csc_offset_in_1(g_p_vout_reg,csc->csc_offset_in1);
hal_reg_vout_set_cfg_mrg1_csc_offset_in_0(g_p_vout_reg,csc->csc_offset_in0);
hal_reg_vout_set_cfg_mrg1_csc_offset_out_2(g_p_vout_reg,csc->csc_offset_out2);
hal_reg_vout_set_cfg_mrg1_csc_offset_out_1(g_p_vout_reg,csc->csc_offset_out1);
hal_reg_vout_set_cfg_mrg1_csc_offset_out_0(g_p_vout_reg,csc->csc_offset_out0);
hal_reg_vout_set_cfg_mrg1_csc_matrix_0(g_p_vout_reg,csc->csc_coef0);
hal_reg_vout_set_cfg_mrg1_csc_matrix_1(g_p_vout_reg,csc->csc_coef1);
hal_reg_vout_set_cfg_mrg1_csc_matrix_2(g_p_vout_reg,csc->csc_coef2);
hal_reg_vout_set_cfg_mrg1_csc_matrix_3(g_p_vout_reg,csc->csc_coef3);
hal_reg_vout_set_cfg_mrg1_csc_matrix_4(g_p_vout_reg,csc->csc_coef4);
hal_reg_vout_set_cfg_mrg1_csc_matrix_5(g_p_vout_reg,csc->csc_coef5);
hal_reg_vout_set_cfg_mrg1_csc_matrix_6(g_p_vout_reg,csc->csc_coef6);
hal_reg_vout_set_cfg_mrg1_csc_matrix_7(g_p_vout_reg,csc->csc_coef7);
hal_reg_vout_set_cfg_mrg1_csc_matrix_8(g_p_vout_reg,csc->csc_coef8);
} else {
;
}
return;
}
xmedia_void hal_vo_set_mrg_csc(xmedia_vo_layer layer, xmedia_u32 region_id, vo_csc_coef *csc)
{
if (region_id == 0) {
hal_vo_set_mrg0_csc(layer, csc);
} else if (region_id == 1) {
hal_vo_set_mrg1_csc(layer, csc);
} else {
;
}
return;
}
xmedia_void hal_vo_set_csc_mode(xmedia_vo_layer layer, xmedia_bool csc_mode)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_csc_mode(g_p_vout_reg, csc_mode);
} else {
;
}
return;
}
source/bootloader/product/driver/vo/hal/xmorca/disp/hal_vo_disp.h
+115
View File
@@ -0,0 +1,115 @@
/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef __HAL_VO_DISP_H__
#define __HAL_VO_DISP_H__
#include "hal_vo_csc.h"
#include "drv_vo_comm.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
VO_MRG_MIX_PRIO_RDMA0 = 0,
VO_MRG_MIX_PRIO_RDMA1,
VO_MRG_MIX_PRIO_MAX,
} vo_mrg_mix_prio;
typedef enum {
VO_MIX_PRIO_VIDEO = 0,
VO_MIX_PRIO_GFX,
VO_MIX_PRIO_MAX,
} vo_mix_prio;
typedef enum {
VO_PIXEL_FMT_YUV_400 = 0,
VO_PIXEL_FMT_YUV_420,
VO_PIXEL_FMT_YUV_422,
VO_PIXEL_FMT_YUV_MAX
} vo_pixel_format;
typedef struct {
xmedia_bool vcus_mode;
xmedia_bool hcus_mode;
xmedia_u8 hcus_coef0;
xmedia_u8 hcus_coef1;
xmedia_u8 hcus_coef2;
xmedia_u8 hcus_coef3;
xmedia_u8 vcus_coef0;
xmedia_u8 vcus_coef1;
xmedia_u8 vcus_coef2;
xmedia_u8 vcus_coef3;
} vo_video_cus;
xmedia_void hal_vo_set_top_regup(xmedia_bool enable);
xmedia_void hal_vo_get_top_regup(xmedia_bool *enable);
xmedia_void hal_vo_get_video_regup(xmedia_vo_layer layer, xmedia_bool *enable);
xmedia_void hal_vo_get_intf_regup(xmedia_vo_dev dev, xmedia_bool *enable);
xmedia_void hal_vo_get_version0(xmedia_u32 *version);
xmedia_void hal_vo_get_version1(xmedia_u32 *version);
xmedia_void hal_vo_set_mem_ctrl(xmedia_u32 speed);
xmedia_u32 hal_vo_get_mask_interrupt_state(xmedia_void);
xmedia_void hal_vo_clear_mask_interrupt_state(vo_isr_interrupt_type int_mask);
xmedia_void hal_vo_set_mask_interrupt_enable(vo_isr_interrupt_type int_mask,xmedia_bool enable);
xmedia_u32 hal_vo_get_unmask_interrupt_state(xmedia_void);
xmedia_void hal_vo_clear_lowband_state(xmedia_bool enable);
xmedia_bool hal_vo_disp_get_dma_busy_state(xmedia_void);
xmedia_void hal_vo_set_cbm_mixer_prio(xmedia_vo_dev dev, vo_mix_prio prio_id);
xmedia_void hal_vo_set_cbm_bgcolor(xmedia_vo_dev dev, xmedia_u32 bgcolor);
xmedia_void hal_vo_get_cbm_bgcolor(xmedia_vo_dev dev, xmedia_u32 *bgcolor);
xmedia_void hal_vo_set_dma_standing(xmedia_vo_dev dev, xmedia_u8 value);
xmedia_u8 hal_vo_get_dma_standing(xmedia_void);
xmedia_void hal_vo_set_enable(xmedia_vo_layer layer, xmedia_bool enable);
xmedia_void hal_vo_get_enable(xmedia_vo_layer layer, xmedia_bool *enable);
//两个及时寄存器
xmedia_void hal_vo_set_regup_mode(xmedia_vo_layer layer, xmedia_bool filed_en);
xmedia_void hal_vo_set_regup_field(xmedia_vo_layer layer, xmedia_bool bottom_en);
xmedia_void hal_vo_set_alpha(xmedia_vo_layer layer, xmedia_u8 alpha);
xmedia_void hal_vo_set_alpha_enable(xmedia_vo_layer layer, xmedia_bool alpha_en);
xmedia_void hal_vo_set_alpha_blend_mode(xmedia_vo_layer layer, xmedia_bool alpha_blend_en);
xmedia_void hal_vo_set_src_pixel_format(xmedia_vo_layer layer, vo_pixel_format format, xmedia_bool uv_order);
xmedia_void hal_vo_set_multi_enable(xmedia_vo_layer layer, xmedia_bool enable);
xmedia_void hal_vo_get_multi_enable(xmedia_vo_layer layer, xmedia_bool *enable);
xmedia_void hal_vo_set_bgcolor(xmedia_vo_layer layer, xmedia_u32 bgcolor);
xmedia_void hal_vo_get_bgcolor(xmedia_vo_layer layer, xmedia_u32 *bgcolor);
xmedia_void hal_vo_set_mute_enable(xmedia_vo_layer layer, xmedia_bool enable);
xmedia_void hal_vo_get_mute_enable(xmedia_vo_layer layer, xmedia_bool *enable);
xmedia_void hal_vo_set_video_regup_enable(xmedia_vo_layer layer, xmedia_bool enable);
xmedia_void hal_vo_set_mute_color(xmedia_vo_layer layer, xmedia_u32 bgcolor);
xmedia_void hal_vo_set_mute_pattern_mode(xmedia_vo_layer layer, xmedia_bool value);
xmedia_void hal_vo_set_mute_data_mode(xmedia_vo_layer layer, xmedia_bool value);
xmedia_void hal_vo_set_checkbar_size(xmedia_vo_layer layer, xmedia_u8 width, xmedia_u8 height);
xmedia_void hal_vo_set_disp_rect (xmedia_vo_layer layer, xmedia_video_rect *disp_rect);
xmedia_void hal_vo_get_disp_rect (xmedia_vo_layer layer, xmedia_video_rect *disp_rect);
xmedia_void hal_vo_set_src_rect (xmedia_vo_layer layer, xmedia_video_rect *src_rect);
xmedia_void hal_vo_get_src_rect (xmedia_vo_layer layer, xmedia_video_rect *src_rect);
xmedia_void hal_vo_set_addr (xmedia_vo_layer layer, vo_addr *addr);
xmedia_void hal_vo_set_mrg_mixer_prio(xmedia_vo_layer layer, vo_mrg_mix_prio prio_id);
xmedia_void hal_vo_set_mrg_rdma1_en(xmedia_vo_layer layer, xmedia_bool enable);
xmedia_void hal_vo_set_mrg_enable(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_bool enable);
xmedia_void hal_vo_set_mrg_mute_enable(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_bool enable);
xmedia_void hal_vo_get_mrg_enable(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_bool *enable);
xmedia_void hal_vo_set_mrg_sort(xmedia_vo_layer layer, xmedia_u16 sort);
xmedia_void hal_vo_set_mrg_src_rect (xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_video_rect *src_rect);
xmedia_void hal_vo_set_mrg_dst_rect (xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_video_rect *dst_rect);
xmedia_void hal_vo_set_mrg0_addr(xmedia_vo_layer layer, vo_addr *addr);
xmedia_void hal_vo_set_mrg1_addr(xmedia_vo_layer layer, vo_addr *addr);
xmedia_void hal_vo_set_mrg_addr(xmedia_vo_layer layer, xmedia_u32 region_id,vo_addr *addr);
xmedia_void hal_vo_set_mrg_mute_color(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_u32 bgcolor);
xmedia_void hal_vo_set_cus(xmedia_vo_layer layer, vo_video_cus *cus);
xmedia_void hal_vo_set_csc_en(xmedia_vo_layer layer, xmedia_bool enable);
xmedia_void hal_vo_set_mrg0_csc(xmedia_vo_layer layer,vo_csc_coef *csc);
xmedia_void hal_vo_set_mrg1_csc(xmedia_vo_layer layer,vo_csc_coef *csc);
xmedia_void hal_vo_set_mrg_csc(xmedia_vo_layer layer, xmedia_u32 region_id, vo_csc_coef *csc);
xmedia_void hal_vo_set_csc_mode(xmedia_vo_layer layer, xmedia_bool csc_mode);
xmedia_void hal_vo_set_lba_color(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_u32 color);
xmedia_void hal_vo_set_lba_rect(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_video_rect *lba_rect);
#ifdef __cplusplus
}
#endif
#endif
source/bootloader/product/driver/vo/hal/xmorca/gamma/hal_vo_gamma.c
+63
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@@ -0,0 +1,63 @@
/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#include "hal_vo_reg.h"
#include "hal_vo_gamma.h"
extern s_vout_regs_type *g_p_vout_reg;
xmedia_void hal_vo_gamma_enable(xmedia_vo_dev dev, xmedia_bool enable)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_gamma_en(g_p_vout_reg, enable);
} else {
;
}
return;
}
xmedia_s32 hal_vo_gamma_get_table_size(xmedia_void)
{
return VO_GAMMA_MAP_SIZE * sizeof(xmedia_u8);
}
xmedia_void hal_vo_gamma_set_table(xmedia_vo_dev dev, xmedia_void *gamma_virtual_addr,
xmedia_u32 gamma_mem_len, xmedia_vo_gamma_table *gamma_table)
{
xmedia_s32 i;
for (i = 0;i < VO_GAMMA_MAP_SIZE; i++) {
((xmedia_u8 *)gamma_virtual_addr)[i] = gamma_table->gamma_table[i];
}
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_para_2_update(g_p_vout_reg, XMEDIA_TRUE);
} else {
;
}
return;
}
xmedia_void hal_vo_gamma_get_table(xmedia_vo_dev dev, xmedia_void *gamma_virtual_addr,
xmedia_u32 gamma_mem_len, xmedia_vo_gamma_table *gamma_table)
{
xmedia_s32 i;
for (i = 0;i < VO_GAMMA_MAP_SIZE; i++) {
gamma_table->gamma_table[i] = ((xmedia_u8 *)gamma_virtual_addr)[i];
}
return;
}
xmedia_void hal_vo_gamma_set_addr(xmedia_vo_dev dev, xmedia_u64 addr)
{
xmedia_u32 addr_l = addr & 0xFFFFFFFF;
xmedia_u32 addr_h = (addr & 0xFFFFFFFF00000000) >> 32;
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_para_2_addr_h(g_p_vout_reg, addr_h);
hal_reg_vout_set_cfg_para_2_addr_l(g_p_vout_reg, addr_l);
} else {
;
}
return;
}
source/bootloader/product/driver/vo/hal/xmorca/gamma/hal_vo_gamma.h
+27
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@@ -0,0 +1,27 @@
/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef __HAL_VO_GAMMA_H__
#define __HAL_VO_GAMMA_H__
#include "drv_vo_comm.h"
#ifdef __cplusplus
extern "C" {
#endif
xmedia_void hal_vo_gamma_enable(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_s32 hal_vo_gamma_get_table_size(xmedia_void);
xmedia_void hal_vo_gamma_set_table(xmedia_vo_dev dev, xmedia_void *gamma_virtual_addr,
xmedia_u32 gamma_mem_len, xmedia_vo_gamma_table *gamma_table);
xmedia_void hal_vo_gamma_get_table(xmedia_vo_dev dev, xmedia_void *gamma_virtual_addr,
xmedia_u32 gamma_mem_len, xmedia_vo_gamma_table *gamma_table);
xmedia_void hal_vo_gamma_set_addr(xmedia_vo_dev dev, xmedia_u64 addr);
#ifdef __cplusplus
}
#endif
#endif /* __HAL_VO_IP_CSC_H__ */
source/bootloader/product/driver/vo/hal/xmorca/hal_vo.c
+965
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@@ -0,0 +1,965 @@
/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifdef VO_KERNEL
#include "osal.h"
#endif
#include "hal_vo.h"
#include "hal_vo_chip_cfg.h"
#include "hal_vo_reg.h"
#include "hal_vo_disp.h"
#include "hal_vo_intf.h"
#include "hal_vo_clock.h"
#include "hal_vo_gamma.h"
#ifdef VO_KERNEL
#include "drv_vo_buf.h"
#include "drv_ddr_ost_qos.h"
#include "drv_vo_dev.h"
#endif
#ifdef VO_BOOT
#include "drv_vo_comm.h"
#endif
static vo_hal_context vo_hal_ctx;
#define vo_reg_addr_offset(REG) ((xmedia_ulong) & (((s_vout_regs_type *)0)->REG))
#define OFFSET_ELE_NUM 2
#ifdef VO_KERNEL
static xmedia_ulong g_vo_reg_offset[][OFFSET_ELE_NUM] = {
{ vo_reg_addr_offset(vout_top_ctrl), 0x30c },
{ vo_reg_addr_offset(vout_v0_ctrl), 0x348 },
{ vo_reg_addr_offset(vout_intf_ctrl), 0x22c },
{ vo_reg_addr_offset(vout_intf_hcds_ctrl), 0x38 },
};
static xmedia_u8 *g_vo_reg_record = XMEDIA_NULL;
#endif
typedef struct {
xmedia_u64 gamma_phy_addr;
xmedia_void *gamma_virtual_addr;
xmedia_u32 gamma_mem_len;
} vo_dev_gamma_buf;
#define VO_BASE_ADDR 0x11280000
s_vout_regs_type *g_p_vout_reg = (s_vout_regs_type *)VO_BASE_ADDR;
#define VO_FIFO_DEPTH 959
#define VO_MMZ_NAME_SIZE 128
#define VO_DEFAULT_OST_VALUE 8
#ifdef VO_KERNEL
static vo_dev_gamma_buf g_vo_gamma_buf[XMEDIA_VO_REAL_DEV_NUM];
#endif
vo_hal_context *hal_vo_get_hal_context(xmedia_void)
{
return &vo_hal_ctx;
}
static xmedia_s32 vo_reg_map(xmedia_void)
{
#ifdef VO_KERNEL
if (g_p_vout_reg == XMEDIA_NULL) {
g_p_vout_reg = (s_vout_regs_type *)osal_ioremap_nocache(VO_BASE_ADDR, sizeof(s_vout_regs_type));
if (g_p_vout_reg == XMEDIA_NULL) {
return XMEDIA_FAILURE;
}
}
#endif
return XMEDIA_SUCCESS;
}
static xmedia_void vo_reg_unmap(xmedia_void)
{
#ifdef VO_KERNEL
if (g_p_vout_reg != XMEDIA_NULL) {
osal_iounmap((xmedia_void *)g_p_vout_reg);
g_p_vout_reg = XMEDIA_NULL;
}
#endif
return;
}
xmedia_s32 hal_vo_gamma_init(xmedia_vo_dev dev)
{
#ifdef VO_KERNEL
xmedia_char mmz_user_name[VO_MMZ_NAME_SIZE];
xmedia_vo_gamma_table gamma_table;
xmedia_u32 i = 0;
g_vo_gamma_buf[dev].gamma_mem_len = hal_vo_gamma_get_table_size();
osal_snprintf(mmz_user_name, sizeof(mmz_user_name), "vo_gamma_dev%u", dev);
g_vo_gamma_buf[dev].gamma_phy_addr = drv_vo_mmz_alloc(mmz_user_name,
g_vo_gamma_buf[dev].gamma_mem_len, XMEDIA_NULL);
if (g_vo_gamma_buf[dev].gamma_phy_addr == XMEDIA_NULL) {
VO_TRACE(MODULE_DBG_ERR,"drv_vo_mmz_alloc error!\n");
goto err_out;
}
g_vo_gamma_buf[dev].gamma_virtual_addr = drv_vo_mmz_map(g_vo_gamma_buf[dev].gamma_phy_addr,
g_vo_gamma_buf[dev].gamma_mem_len);
if (g_vo_gamma_buf[dev].gamma_virtual_addr == XMEDIA_NULL) {
drv_vo_mmz_free(g_vo_gamma_buf[dev].gamma_phy_addr);
g_vo_gamma_buf[dev].gamma_phy_addr = XMEDIA_NULL;
VO_TRACE(MODULE_DBG_ERR,"drv_vo_mmz_map return NULL!\n");
goto err_out;
}
for (i = 0; i < VO_GAMMA_MAP_SIZE; i++) {
gamma_table.gamma_table[i] = i;
}
hal_vo_set_gamma_table(dev, &gamma_table);
return XMEDIA_SUCCESS;
err_out:
if (g_vo_gamma_buf[dev].gamma_virtual_addr != XMEDIA_NULL) {
drv_vo_mmz_unmap(g_vo_gamma_buf[dev].gamma_virtual_addr);
g_vo_gamma_buf[dev].gamma_virtual_addr = XMEDIA_NULL;
}
if (g_vo_gamma_buf[dev].gamma_phy_addr != XMEDIA_NULL) {
drv_vo_mmz_free(g_vo_gamma_buf[dev].gamma_phy_addr);
g_vo_gamma_buf[dev].gamma_phy_addr = XMEDIA_NULL;
}
return XMEDIA_FAILURE;
#endif
#ifdef VO_BOOT
return XMEDIA_SUCCESS;
#endif
}
xmedia_s32 hal_vo_gamma_deinit(xmedia_vo_dev dev)
{
#ifdef VO_KERNEL
if (g_vo_gamma_buf[dev].gamma_virtual_addr != XMEDIA_NULL) {
drv_vo_mmz_unmap(g_vo_gamma_buf[dev].gamma_virtual_addr);
g_vo_gamma_buf[dev].gamma_virtual_addr = XMEDIA_NULL;
}
if (g_vo_gamma_buf[dev].gamma_phy_addr != XMEDIA_NULL) {
drv_vo_mmz_free(g_vo_gamma_buf[dev].gamma_phy_addr);
g_vo_gamma_buf[dev].gamma_phy_addr = XMEDIA_NULL;
}
return XMEDIA_SUCCESS;
#endif
#ifdef VO_BOOT
return XMEDIA_SUCCESS;
#endif
}
xmedia_s32 hal_vo_init(xmedia_void)
{
xmedia_u32 ret;
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
osal_memset(hal_ctx, 0, sizeof(vo_hal_context));
hal_vo_init_chip_capaciblity();
ret = vo_reg_map();
if (ret != XMEDIA_SUCCESS) {
return ret;
}
hal_vo_clock_init(&hal_ctx->clock_config);
return XMEDIA_SUCCESS;
}
xmedia_void hal_vo_deinit(xmedia_void)
{
//关闭所有的时钟todo
hal_vo_clock_deinit();
vo_reg_unmap();
return;
}
vo_base_cap* hal_vo_get_capacity(xmedia_void)
{
return hal_vo_get_chip_capacity();
}
vo_layer_cap* hal_get_layer_capacity(xmedia_u32 layer)
{
return hal_get_layer_chip_capacity(layer);
}
vo_dev_cap* hal_get_dev_capacity(xmedia_vo_dev dev)
{
return hal_get_dev_chip_capacity(dev);
}
xmedia_void hal_vo_set_clock_gate_enable(xmedia_bool clk_en)
{
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
hal_vo_set_clock_gate(&hal_ctx->clock_config, clk_en);
}
xmedia_void hal_vo_set_crg_clock_reset(xmedia_bool reset_en)
{
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
hal_vo_set_clock_reset_enable(&hal_ctx->clock_config, reset_en);
}
xmedia_bool hal_vo_get_crg_clock_reset_state(xmedia_void)
{
return hal_vo_get_clock_reset_sta();
}
xmedia_void hal_vo_set_clock_sel_priority(xmedia_vo_dev dev, vo_clock_priority_sel vo_clock_priority_sel)
{
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
hal_ctx->special_timing[dev].vo_clock_priority_sel = vo_clock_priority_sel;
}
xmedia_s32 hal_vo_set_crg_clock(xmedia_vo_dev dev, xmedia_u32 clk_hz, xmedia_bool clk_reverse_en,
xmedia_intf_type intf_type)
{
xmedia_bool vo_lcd_divider_priority = XMEDIA_FALSE;
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
xmedia_s32 ret = XMEDIA_SUCCESS;
//根据时钟判断是否需要使用特殊时序配置
if (hal_ctx->special_timing[dev].vo_clock_priority_sel == VO_CLOCK_PRIORITY_SEL_LCD) {
vo_lcd_divider_priority = XMEDIA_TRUE;
} else if (hal_ctx->special_timing[dev].vo_clock_priority_sel == VO_CLOCK_PRIORITY_SEL_FIX) {
vo_lcd_divider_priority = XMEDIA_FALSE;
} else {
//debug没有设置lcd分频器时，对接口类型做二次判断，lcd/lvds优先使用LCD分频器
if ((intf_type == XMEDIA_INTF_TYPE_LCD) || (intf_type == XMEDIA_INTF_TYPE_LVDS) ||
(intf_type == XMEDIA_INTF_TYPE_MCU)) {
vo_lcd_divider_priority = XMEDIA_TRUE;
}
}
ret = hal_vo_set_dev_div_clock(&hal_ctx->clock_config, dev, clk_hz,
&hal_ctx->special_timing[dev].vo_special_timing_sel, vo_lcd_divider_priority);
if (ret != XMEDIA_SUCCESS) {
return ret;
}
ret = hal_vo_set_intf_clock(&hal_ctx->clock_config, dev, clk_reverse_en, intf_type);
return ret;
}
xmedia_void hal_vo_set_crg_clock_enable(xmedia_vo_dev dev, xmedia_intf_type intf_type, xmedia_bool clk_en)
{
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
hal_vo_set_dev_div_clock_enable(&hal_ctx->clock_config, dev, clk_en);
hal_vo_set_dev_clock_enable(&hal_ctx->clock_config, dev, clk_en);
hal_vo_set_intf_clock_enable(&hal_ctx->clock_config, intf_type, clk_en);
return;
}
xmedia_void hal_vo_set_crg_intf_detach_dev(xmedia_vo_dev dev, xmedia_intf_type intf_type)
{
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
hal_vo_set_intf_detach_dev(&hal_ctx->clock_config, dev, intf_type);
}
xmedia_void hal_vo_set_top_regup_enable(xmedia_bool enable)
{
hal_vo_set_top_regup(enable);
return;
}
xmedia_bool hal_vo_get_top_regup_enable(xmedia_void)
{
xmedia_bool enable = XMEDIA_FALSE;
hal_vo_get_top_regup(&enable);
return enable;
}
xmedia_void hal_vo_set_dev_intf_regup_enable(xmedia_vo_dev dev, xmedia_bool enable)
{
hal_vo_set_intf_regup(dev, enable);
return;
}
xmedia_bool hal_vo_get_dev_intf_regup_state(xmedia_vo_dev dev)
{
xmedia_bool state = XMEDIA_FALSE;
hal_vo_get_intf_regup(dev, &state);
return state;
}
xmedia_void hal_vo_set_layer_regup_enable(xmedia_vo_layer layer, xmedia_bool enable)
{
hal_vo_set_video_regup_enable(layer, enable);
return;
}
xmedia_bool hal_vo_get_layer_regup_enable(xmedia_vo_layer layer)
{
xmedia_bool enable = XMEDIA_FALSE;
hal_vo_get_video_regup(layer, &enable);
return enable;
}
xmedia_void hal_vo_get_interrupt_state(vo_int_state_type type, xmedia_u32 *state)
{
if (type == VO_INT_STATE_TYPE_MASK) {
*state = hal_vo_get_mask_interrupt_state();
} else if (type == VO_INT_STATE_TYPE_UNMASK) {
*state = hal_vo_get_unmask_interrupt_state();
} else {
*state = hal_vo_get_mask_interrupt_state();
}
return;
}
xmedia_void hal_vo_clean_interrupt_state(vo_int_state_type type, vo_isr_interrupt_type state)
{
if (type == VO_INT_STATE_TYPE_UNMASK) {
hal_vo_clear_lowband_state(XMEDIA_TRUE);
} else {
hal_vo_clear_mask_interrupt_state(state);
}
return;
}
xmedia_void hal_vo_set_interrupt_enable(vo_isr_interrupt_type int_type, xmedia_bool enable)
{
hal_vo_set_mask_interrupt_enable(int_type, enable);
return;
}
xmedia_void hal_vo_set_int_mode(xmedia_vo_dev dev, xmedia_u32 vtt_id, vo_isr_field_flag int_mode)
{
xmedia_bool frame_mode;
if ((int_mode == VO_ISR_FIELD_FLAG_TOP) || (int_mode == VO_ISR_FIELD_FLAG_BOTTOM) ||
(int_mode == VO_ISR_FIELD_FLAG_TOP_BOTTOM)) {
frame_mode = XMEDIA_TRUE;
} else {
frame_mode = XMEDIA_FALSE;
}
hal_vo_set_intf_vtt_mode(dev, vtt_id, frame_mode);
return;
}
xmedia_void hal_vo_set_dev_thd(xmedia_vo_dev dev, xmedia_u32 vtt_id, xmedia_u32 thd)
{
//设置中断有效区计数
hal_vo_set_intf_vtt_sel(dev, vtt_id, 1);
hal_vo_set_intf_vtt_thd(dev, vtt_id, thd);
return;
}
xmedia_void hal_vo_get_dev_state(xmedia_vo_dev dev, xmedia_bool *btm, xmedia_u16 *vcnt, xmedia_u8 *vstate)
{
hal_vo_get_intf_state(dev, btm, vcnt, vstate);
return;
}
xmedia_void hal_vo_set_dev_mixer_prio(xmedia_vo_dev dev, vo_mix_prio prio_id)
{
//不支持图形视频调层
return;
}
xmedia_void hal_vo_set_dev_bgcolor(xmedia_vo_dev dev, xmedia_u32 bgcolor)
{
hal_vo_set_cbm_bgcolor(dev, bgcolor);
return;
}
xmedia_void hal_vo_get_dev_bgcolor(xmedia_vo_dev dev, xmedia_u32 *bgcolor)
{
xmedia_u32 color;
hal_vo_get_cbm_bgcolor(dev, &color);
*bgcolor = color;
return;
}
xmedia_void hal_vo_set_dev_csc_en(xmedia_vo_dev dev, xmedia_bool csc_en)
{
//接口csc删除
return;
}
xmedia_void hal_vo_get_dev_csc_en(xmedia_vo_dev dev, xmedia_bool *csc_en)
{
//接口csc删除
return;
}
xmedia_s32 hal_vo_set_dev_csc_coef(xmedia_vo_dev dev, vo_pic_info* pic_info)
{
//接口csc删除
return XMEDIA_SUCCESS;
}
/*以下关于特殊时序计算均参考 “VOUT_MIPI 时序配置说明.excel”,
*以下计算得到的值都是非-1 计算，而excel中的寄存器值都是-1运算
*/
static xmedia_void hal_vo_calc_special_timing(xmedia_vo_dev dev, xmedia_u32 frame_rate,
xmedia_vo_intf_config *intf_config, xmedia_vo_user_sync_timing *sync_timing)
{
xmedia_s32 cycle_n = 0;
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
vo_intf_special_timing * special_timing = &hal_ctx->special_timing[dev];
xmedia_u32 fixed_clock_hz;
switch(intf_config->intf_type) {
case XMEDIA_INTF_TYPE_BT656:
case XMEDIA_INTF_TYPE_BT1120:
case XMEDIA_INTF_TYPE_LCD:
case XMEDIA_INTF_TYPE_MCU:
//cycle_n表示单个像素时钟倍数，lcd串行配置为3，并行为1，bt656并行yuv为2
cycle_n = hal_vo_get_cyc_pre_pixel(intf_config);
if (hal_vo_get_intf_clock(&hal_ctx->clock_config, dev, &fixed_clock_hz) != XMEDIA_SUCCESS) {
return;
}
/* =INT(1/I4/(I9+I10+I11+I12)/(1/(I26/I23)/10^6))
* (1/(frame_rate * (vbb + vfb + vact))) / (1/((fixed_clock_Mz/cycle_n) * 10^6))
* ((fixed_clock_Mz/cycle_n) * 10^6) / (frame_rate * (vbb + vfb + vact))
* (fixed_clock_hz/cycle_n) / (frame_rate * (vbb + vfb + vact))
*/
special_timing->fixed_clk_htotal = (fixed_clock_hz / cycle_n) / (frame_rate * (sync_timing->vbb +
sync_timing->vfb + sync_timing->vact));
/* (I27-I31-1)/2-1
* (special_timing->fixed_clk_htotal - sync_timing->hact) / 2
* 表格运算会出现小数，和逻辑沟通，向下取整忽略小数部分
*/
special_timing->fixed_clk_hbb = (special_timing->fixed_clk_htotal - sync_timing->hact) / 2;
/* I27-(I31+1)-(I29+1)-1
* fixed_clk_hfb - hact - hbb
*/
special_timing->fixed_clk_hfb = special_timing->fixed_clk_htotal - sync_timing->hact -
special_timing->fixed_clk_hbb;
special_timing->vs_st_v_filed = sync_timing->vfb;
special_timing->vs_end_v_filed = special_timing->vs_st_v_filed + sync_timing->vpw;
VO_TRACE(MODULE_DBG_DEBUG,
"fixed_clk_htotal %d fixed_clock_hz %d fixed_clk_hbb %d fixed_clk_hfb %d\n",
special_timing->fixed_clk_htotal, fixed_clock_hz,
special_timing->fixed_clk_hbb, special_timing->fixed_clk_hfb);
VO_TRACE(MODULE_DBG_DEBUG, "vs_st_v_filed %d vs_end_v_filed %d\n",
special_timing->vs_st_v_filed, special_timing->vs_end_v_filed);
break;
default:
break;
}
}
xmedia_void hal_vo_set_dev_intf_timing(xmedia_vo_dev dev, xmedia_u32 frame_rate,
xmedia_vo_intf_config *intf_config, xmedia_vo_user_sync_timing *sync_timing)
{
vo_hal_context *hal_ctx = hal_vo_get_hal_context();
#ifdef VO_KERNEL
ddr_ost_info ost_value;
#endif
hal_vo_set_intf_cnt_pos(dev);
if (hal_ctx->special_timing[dev].vo_special_timing_sel) {
hal_vo_calc_special_timing(dev, frame_rate, intf_config, sync_timing);
}
hal_vo_set_intf_timing(dev, frame_rate, intf_config, sync_timing, &hal_ctx->special_timing[dev]);
hal_vo_set_intf_fifo(dev, VO_FIFO_DEPTH);
#ifdef VO_KERNEL
drv_ddr_get_ost(XMEDIA_MOD_ID_VO, &ost_value);
if (ost_value.rd_ost >= VO_DEFAULT_OST_VALUE) {
VO_TRACE(MODULE_DBG_ERR, "dev %d rd_ost error! ost_value.rd_ost %d use default value %d\n", dev,
ost_value.rd_ost, VO_DEFAULT_OST_VALUE);
ost_value.rd_ost = VO_DEFAULT_OST_VALUE;
}
#endif
#ifdef VO_BOOT
hal_vo_set_dma_standing(dev, 8);
#endif
switch(intf_config->intf_type){
case XMEDIA_INTF_TYPE_BT656:
hal_vo_set_bt656_intf_cfg(dev, &(intf_config->bt656_attr));
break;
case XMEDIA_INTF_TYPE_BT1120:
hal_vo_set_bt1120_intf_cfg(dev, &(intf_config->bt1120_attr));
break;
case XMEDIA_INTF_TYPE_LCD:
hal_vo_set_lcd_intf_cfg(dev, &(intf_config->lcd_attr));
break;
case XMEDIA_INTF_TYPE_MCU:
hal_vo_set_mcu_intf_cfg(dev, &(intf_config->mcu_attr));
break;
default:
break;
}
//intf 时钟相关绑定及门控 在前级set crg中做了
return;
}
xmedia_void hal_vo_set_dev_intf_enable(xmedia_vo_dev dev, xmedia_bool enable)
{
hal_vo_set_intf_enable(dev, enable);
return;
}
xmedia_void hal_vo_get_dev_intf_enable(xmedia_vo_dev dev, xmedia_bool *enable)
{
hal_vo_get_intf_enable(dev, enable);
return;
}
xmedia_void hal_vo_set_layer_enable(xmedia_vo_layer layer, xmedia_bool enable)
{
hal_vo_set_enable(layer, enable);
return;
}
xmedia_void hal_vo_get_layer_enable(xmedia_vo_layer layer, xmedia_bool *enable)
{
hal_vo_get_enable(layer,enable);
return;
}
xmedia_void hal_vo_set_layer_bg_color(xmedia_vo_layer layer, xmedia_u32 bgcolor)
{
hal_vo_set_bgcolor(layer, bgcolor);
return;
}
xmedia_void hal_vo_set_layer_mute_enable(xmedia_vo_layer layer, xmedia_bool enable)
{
hal_vo_set_mute_enable(layer, enable);
return;
}
xmedia_void hal_vo_set_layer_csc_en(xmedia_vo_layer layer, xmedia_bool csc_en)
{
hal_vo_set_csc_en(layer, csc_en);
return;
}
xmedia_s32 hal_vo_set_layer_csc_coef(xmedia_vo_layer layer, vo_pic_info* pic_info)
{
vo_csc_coef csc_matrix;
hal_vo_set_alpha(layer, 0xFF);
if (hal_vo_csc_coef_convert(pic_info, &csc_matrix) != XMEDIA_SUCCESS) {
return XMEDIA_FAILURE;
}
//vo输入肯定是yuv数据
hal_vo_set_csc_mode(layer, XMEDIA_TRUE);
//hal_vo_get_multi_enable(layer, &multi_en);
//不需要再指定 单区域 或者 多区域模式
hal_vo_set_mrg0_csc(layer, &csc_matrix);
hal_vo_set_mrg1_csc(layer, &csc_matrix);
return XMEDIA_SUCCESS;
}
xmedia_void hal_vo_set_layer_disp_rect(xmedia_vo_layer layer, xmedia_video_rect *disp_rect)
{
hal_vo_set_disp_rect(layer, disp_rect);
return;
}
xmedia_void hal_vo_get_layer_disp_rect(xmedia_vo_layer layer, xmedia_video_rect *disp_rect)
{
hal_vo_get_disp_rect(layer, disp_rect);
return;
}
//单区域模式 设定真实内容相对于层的rect
xmedia_void hal_vo_set_layer_reso_rect(xmedia_vo_layer layer, xmedia_video_rect *reso_rect)
{
hal_vo_set_src_rect(layer, reso_rect);
return;
}
xmedia_void hal_vo_get_layer_reso_rect(xmedia_vo_layer layer, xmedia_video_rect *reso_rect)
{
hal_vo_get_src_rect(layer, reso_rect);
return;
}
xmedia_void hal_vo_set_cus(xmedia_vo_layer layer, vo_video_cus *cus)
{
if (layer == XMEDIA_VO_LAYER_V0) {
hal_reg_vout_set_cfg_vcus_coef_0(g_p_vout_reg, cus->vcus_coef0);
hal_reg_vout_set_cfg_vcus_coef_1(g_p_vout_reg, cus->vcus_coef1);
hal_reg_vout_set_cfg_hcus_coef_0(g_p_vout_reg, cus->hcus_coef0);
hal_reg_vout_set_cfg_hcus_coef_1(g_p_vout_reg, cus->hcus_coef1);
} else if (layer == XMEDIA_VO_LAYER_V1) {
} else {
;
}
return;
}
xmedia_void hal_vo_set_layer_pixel_format(xmedia_vo_layer layer, xmedia_video_pixel_format pix_format)
{
vo_pixel_format format = VO_PIXEL_FMT_YUV_420;
xmedia_bool uv_order = 0;
vo_video_cus cus;
cus.vcus_coef0 = 0x3f;
cus.hcus_coef0 = 0x3f;
cus.vcus_coef1 = 1;
cus.hcus_coef1 = 1;
hal_vo_set_cus(layer, &cus);
//注意下逻辑的排序与应用理解的UV是方向的
if (pix_format == XMEDIA_VIDEO_PIXEL_FMT_YUV_SEMIPLANAR_420) {
format = VO_PIXEL_FMT_YUV_420;
uv_order = 1;
} else if (pix_format == XMEDIA_VIDEO_PIXEL_FMT_YVU_SEMIPLANAR_420) {
format = VO_PIXEL_FMT_YUV_420;
uv_order = 0;
} else if (pix_format == XMEDIA_VIDEO_PIXEL_FMT_YUV_SEMIPLANAR_422) {
format = VO_PIXEL_FMT_YUV_422;
uv_order = 1;
} else if (pix_format == XMEDIA_VIDEO_PIXEL_FMT_YVU_SEMIPLANAR_422) {
format = VO_PIXEL_FMT_YUV_422;
uv_order = 0;
} else if (pix_format == XMEDIA_VIDEO_PIXEL_FMT_YUV_400) {
format = VO_PIXEL_FMT_YUV_400;
uv_order = 0;
} else {
format = VO_PIXEL_FMT_YUV_420;
uv_order = 1;
}
hal_vo_set_src_pixel_format(layer, format, uv_order);
return;
}
//单区域和多区域控制
xmedia_void hal_vo_set_layer_multi_enable(xmedia_vo_layer layer, xmedia_bool enable)
{
hal_vo_set_multi_enable(layer, enable);
return;
}
xmedia_void hal_vo_get_layer_multi_enable(xmedia_vo_layer layer, xmedia_bool *enable)
{
hal_vo_get_multi_enable(layer, enable);
return;
}
xmedia_void hal_vo_set_layer_region_enable(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_bool enable)
{
hal_vo_set_mrg_enable(layer, region_id, enable);
return;
}
xmedia_void hal_vo_get_layer_region_enable(xmedia_vo_layer layer, xmedia_u32 region_id, xmedia_bool *enable)
{
hal_vo_get_mrg_enable(layer, region_id, enable);
return;
}
xmedia_void hal_vo_set_layer_region_mrg_enable(xmedia_vo_layer layer, xmedia_u32 region_id,
xmedia_bool enable)
{
hal_vo_set_mrg_enable(layer, region_id, enable);
return;
}
xmedia_void hal_vo_set_layer_region_mute_color(xmedia_vo_layer layer, xmedia_u32 region_id,
xmedia_u32 bgcolor)
{
hal_vo_set_mrg_mute_color(layer, region_id, bgcolor);
return;
}
xmedia_void hal_vo_set_layer_single_region_cfg(xmedia_vo_layer layer, vo_layer_single_cfg *single_cfg)
{
//真实内容 相对于显示窗口的rect
hal_vo_set_src_rect(layer, &(single_cfg->frame_rect));
hal_vo_set_mute_enable(layer, single_cfg->mute_en);
//逻辑不分单区域和多区域模式，单区域即只配置一个0显示区域即可
hal_vo_set_mrg_enable(layer, 0, !(single_cfg->mute_en));
hal_vo_set_mrg_src_rect(layer,0, &(single_cfg->video_rect));
//LBA
hal_vo_set_lba_color(layer, 0, single_cfg->lba_color);
hal_vo_set_lba_rect(layer, 0, &(single_cfg->lba_rect));
hal_vo_set_mrg_addr(layer,0, &(single_cfg->frame_addr));
return;
}
xmedia_void hal_vo_set_layer_multi_region_cfg(xmedia_vo_layer layer, vo_layer_multi_cfg *multi_cfg)
{
xmedia_u32 id;
id = multi_cfg->region_id;
hal_vo_set_mrg_enable(layer, id, multi_cfg->region[id].enable);
hal_vo_set_mrg_src_rect(layer,id, &(multi_cfg->region[id].src_rect));
hal_vo_set_mrg_addr(layer,id, &(multi_cfg->region[id].region_addr));
hal_vo_set_lba_color(layer, id, multi_cfg->region[id].lba_color);
hal_vo_set_lba_rect(layer, id, &(multi_cfg->region[id].lba_rect));
hal_vo_set_mrg_mixer_prio(layer, VO_MRG_MIX_PRIO_RDMA0);
return;
}
xmedia_void hal_vo_set_dev_debug_pattern(xmedia_vo_dev dev, vo_pattern_info *pattern_info)
{
hal_vo_set_intf_mute_enable(dev, pattern_info->pattern_en);
hal_vo_set_intf_mute_pattern_mode(dev, pattern_info->pattern_mode);
hal_vo_set_intf_mute_data_mode(dev, pattern_info->data_mode);
hal_vo_set_intf_mute_color(dev, pattern_info->color, pattern_info->color);
hal_vo_set_intf_cbar_sel(dev, pattern_info->rgb);
if (pattern_info->pattern_mode == VO_PATTERN_MODE_CHECKER) {
hal_vo_set_intf_checkbar_size(dev, pattern_info->width, pattern_info->height);
//重复????
hal_vo_set_intf_mute_color(dev, pattern_info->color, !(pattern_info->color));
}
return;
}
xmedia_void hal_vo_set_layer_debug_pattern(xmedia_vo_layer layer, vo_pattern_info *pattern_info)
{
vo_pattern_mode mode = VO_PATTERN_MODE_FULLCOLOR;
mode = pattern_info->pattern_mode;
if ((mode != VO_PATTERN_MODE_FULLCOLOR) && (mode != VO_PATTERN_MODE_CHECKER)) {
mode = VO_PATTERN_MODE_FULLCOLOR;
}
hal_vo_set_mute_enable(layer, pattern_info->pattern_en);
hal_vo_set_mute_pattern_mode(layer, pattern_info->pattern_mode);
hal_vo_set_mute_data_mode(layer, pattern_info->data_mode);
hal_vo_set_mute_color(layer, pattern_info->color);
if (mode == VO_PATTERN_MODE_CHECKER) {
hal_vo_set_checkbar_size(layer, pattern_info->width, pattern_info->height);
}
return;
}
xmedia_void hal_vo_set_debug_ink(xmedia_vo_dev dev, vo_csc_ink_info *ink_info)
{
hal_vo_set_intf_ink(dev, ink_info);
return;
}
xmedia_void hal_vo_get_debug_checksum(xmedia_vo_dev dev, xmedia_u32 *y, xmedia_u32 *u, xmedia_u32 *v)
{
hal_vo_get_intf_checksum_value(dev, y, u, v);
return;
}
xmedia_s32 hal_vo_enable_dev_phy_cfg(xmedia_vo_dev dev, xmedia_u32 clk_hz, xmedia_u32 frame_rate,
xmedia_vo_user_sync_timing *sync_timing, xmedia_intf_type intf_type)
{
switch(intf_type){
case XMEDIA_INTF_TYPE_MCU:
break;
case XMEDIA_INTF_TYPE_BT656:
case XMEDIA_INTF_TYPE_BT1120:
case XMEDIA_INTF_TYPE_LCD:
default:
break;
}
return XMEDIA_SUCCESS;
}
xmedia_void hal_vo_disable_dev_phy_cfg(xmedia_intf_type intf_type)
{
switch(intf_type){
case XMEDIA_INTF_TYPE_MCU:
//todo????
break;
case XMEDIA_INTF_TYPE_BT656:
case XMEDIA_INTF_TYPE_BT1120:
case XMEDIA_INTF_TYPE_LCD:
default:
break;
}
return;
}
xmedia_s32 vo_calc_dev_phy_clk_cfg(xmedia_vo_dev dev, xmedia_u32 clk_hz, xmedia_vo_intf_config *intf_config)
{
xmedia_s32 ret = XMEDIA_SUCCESS;
switch(intf_config->intf_type){
case XMEDIA_INTF_TYPE_MCU:
case XMEDIA_INTF_TYPE_BT656:
case XMEDIA_INTF_TYPE_BT1120:
case XMEDIA_INTF_TYPE_LCD:
default:
break;
}
return ret;
}
#ifdef VO_KERNEL
xmedia_void hal_vo_set_gamma_addr(xmedia_vo_dev dev)
{
hal_vo_gamma_set_addr(dev, g_vo_gamma_buf[dev].gamma_phy_addr);
}
xmedia_void hal_vo_set_gamma_enable(xmedia_vo_dev dev, xmedia_bool enable)
{
hal_vo_gamma_enable(dev, enable);
}
xmedia_void hal_vo_set_gamma_table(xmedia_vo_dev dev, xmedia_vo_gamma_table *gamma_table)
{
hal_vo_gamma_set_table(dev, g_vo_gamma_buf[dev].gamma_virtual_addr, g_vo_gamma_buf[dev].gamma_mem_len, gamma_table);
}
xmedia_void hal_vo_get_gamma_table(xmedia_vo_dev dev, xmedia_vo_gamma_table *gamma_table)
{
hal_vo_gamma_get_table(dev, g_vo_gamma_buf[dev].gamma_virtual_addr, g_vo_gamma_buf[dev].gamma_mem_len, gamma_table);
}
xmedia_s32 hal_vo_reg_record(xmedia_void)
{
xmedia_u32 idx, section_num;
xmedia_ulong offset = 0;
xmedia_u32 malloc_size = 0;
section_num = sizeof(g_vo_reg_offset) / sizeof(xmedia_ulong) / VO_OFFSET_ELE_NUM;
for (idx = 0; idx < section_num; idx++) {
malloc_size += g_vo_reg_offset[idx][1];
}
if (g_vo_reg_record != XMEDIA_NULL) {
VO_TRACE(MODULE_DBG_ERR,"g_vo_reg_record is not null,please check!\n");
return XMEDIA_FAILURE;
} else {
g_vo_reg_record = (xmedia_u8 *)osal_kmalloc(malloc_size, osal_gfp_kernel);
}
for (idx = 0; idx < section_num; idx++) {
osal_memcpy((xmedia_void *)((xmedia_uintptr_t)g_vo_reg_record + offset),
(xmedia_void *)((xmedia_uintptr_t)g_p_vout_reg + g_vo_reg_offset[idx][0]), g_vo_reg_offset[idx][1]);
offset += g_vo_reg_offset[idx][1];
}
return XMEDIA_SUCCESS;
}
xmedia_s32 hal_vo_reg_restore(xmedia_void)
{
xmedia_u32 idx;
xmedia_u32 section_num;
xmedia_ulong offset = 0;
if (g_vo_reg_record == XMEDIA_NULL) {
VO_TRACE(MODULE_DBG_ERR,"g_vo_reg_record is null,please check!\n");
return XMEDIA_FAILURE;
}
section_num = sizeof(g_vo_reg_offset) / sizeof(xmedia_ulong) / VO_OFFSET_ELE_NUM;
for (idx = 0; idx < section_num; idx++) {
osal_memcpy((xmedia_void *)(xmedia_uintptr_t)((xmedia_ulong)(xmedia_uintptr_t)g_p_vout_reg + g_vo_reg_offset[idx][0]),
(xmedia_void *)(xmedia_uintptr_t)((xmedia_ulong)(xmedia_uintptr_t)g_vo_reg_record + offset),
g_vo_reg_offset[idx][1]);
offset += g_vo_reg_offset[idx][1];
}
osal_kfree(g_vo_reg_record);
g_vo_reg_record = XMEDIA_NULL;
return XMEDIA_SUCCESS;
}
#endif
/*
*乘以2是因为mcu采用的时钟2倍频方案，也就是一个clk_vo 传输一个mcu scl,
*具体mcu cyc_pre_pixel参考逻辑提供的 “时钟频点计算表格.xlsx”
*/
static xmedia_u32 vo_get_mcu_intf_cyc_pre_pixel(xmedia_intf_mcu_data_type data_type)
{
switch (data_type) {
case XMEDIA_VO_MCU_DATA_TYPE_8BIT_16BPP_RGB565_8080I:
return 4;//2 * 2
case XMEDIA_VO_MCU_DATA_TYPE_8BIT_18BPP_RGB666_8080I:
return 6;//3 * 2
case XMEDIA_VO_MCU_DATA_TYPE_8BIT_16BPP_RGB565_8080II:
return 4;//2 * 2
case XMEDIA_VO_MCU_DATA_TYPE_8BIT_18BPP_RGB666_8080II:
return 6;//3 * 2
case XMEDIA_VO_MCU_DATA_TYPE_9BIT_16BPP_RGB565_8080I:
return 4;//2 * 2
case XMEDIA_VO_MCU_DATA_TYPE_9BIT_18BPP_RGB666_8080I_OPTION1:
return 4;//2 * 2
case XMEDIA_VO_MCU_DATA_TYPE_9BIT_18BPP_RGB666_8080I_OPTION2:
return 6;//3 * 2
case XMEDIA_VO_MCU_DATA_TYPE_9BIT_16BPP_RGB565_8080II:
return 4;//2 * 2
case XMEDIA_VO_MCU_DATA_TYPE_9BIT_18BPP_RGB666_8080II_OPTION1:
return 4;//2 * 2
case XMEDIA_VO_MCU_DATA_TYPE_9BIT_18BPP_RGB666_8080II_OPTION2:
return 6;//3 * 2
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_16BPP_RGB565_8080I:
return 2;//1 * 2
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080I_OPTION1:
return 3;//1.5 * 2
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080I_OPTION2:
return 4;//2 * 2
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080I_OPTION3:
return 4;//2 * 2
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080I_OPTION4:
return 4;//2 * 2
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080I_OPTION5:
return 4;//2 * 2
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_16BPP_RGB565_8080II:
return 2;//1 * 2
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080II_OPTION1:
return 3;//1.5 * 2
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080II_OPTION2:
return 4;//2 * 2
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080II_OPTION3:
return 4;//2 * 2
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080II_OPTION4:
return 4;//2 *2
case XMEDIA_VO_MCU_DATA_TYPE_18BIT_16BPP_RGB565_8080I:
return 2;//1 * 2
case XMEDIA_VO_MCU_DATA_TYPE_18BIT_18BPP_RGB666_8080I:
return 2;//1 * 2
case XMEDIA_VO_MCU_DATA_TYPE_18BIT_16BPP_RGB565_8080II:
return 2;//1 * 2
case XMEDIA_VO_MCU_DATA_TYPE_18BIT_18BPP_RGB666_8080II:
return 2;//1 * 2
case XMEDIA_VO_MCU_DATA_TYPE_3LINE_RGB565_OPTION1:
return 36;//18 * 2
case XMEDIA_VO_MCU_DATA_TYPE_3LINE_RGB666_OPTION1:
return 54;//27 * 2
case XMEDIA_VO_MCU_DATA_TYPE_3LINE_RGB565_OPTION2:
return 64;//32 * 2
case XMEDIA_VO_MCU_DATA_TYPE_3LINE_RGB666_OPTION2:
return 96;//48 * 2
case XMEDIA_VO_MCU_DATA_TYPE_4LINE_RGB565:
return 32;//16 * 2
case XMEDIA_VO_MCU_DATA_TYPE_4LINE_RGB666:
return 48;//24 * 2
default:
return 1;
}
}
xmedia_u32 hal_vo_get_cyc_pre_pixel(xmedia_vo_intf_config *intf_config)
{
switch (intf_config->intf_type) {
case XMEDIA_INTF_TYPE_BT656:
return 2;
case XMEDIA_INTF_TYPE_BT1120:
return 1;
case XMEDIA_INTF_TYPE_LCD:
if (intf_config->lcd_attr.data_mode == XMEDIA_VO_LCD_DATA_MODE_SERIAL) {
return 3;
} else {
return 1;
}
case XMEDIA_INTF_TYPE_MCU:
return vo_get_mcu_intf_cyc_pre_pixel(intf_config->mcu_attr.data_type);
default:
VO_TRACE(MODULE_DBG_ERR,"vo_get_cyc_pre_pixel error,please check!\n");
return 1;
}
}
xmedia_bool hal_vo_get_dma_busy_state(xmedia_void)
{
return hal_vo_disp_get_dma_busy_state();
}
xmedia_void hal_vo_set_underflow_clr(xmedia_bool enable)
{
hal_reg_vout_set_cfg_intf_underflow_clr(g_p_vout_reg, enable);
hal_vo_clear_lowband_state(enable);
}
xmedia_void hal_vo_do_low_band(xmedia_bool enable)
{
hal_vo_set_clock_gate_enable(enable);
hal_reg_vout_set_cfg_para_0_update(g_p_vout_reg, enable);
hal_reg_vout_set_cfg_para_2_update(g_p_vout_reg, enable);
hal_vo_set_top_regup_enable(XMEDIA_TRUE);
}
source/bootloader/product/driver/vo/hal/xmorca/hal_vo_chip_cfg.c
+502
View File
@@ -0,0 +1,502 @@
/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#include "hal_vo_chip_cfg.h"
#ifdef VO_KERNEL
#include "comm_version.h"
#endif
#define VO_IRQ_NAME "intr_vo"
#define VO_INTF_NOT_MIPI_MAX_WHIDTH 1920
#define VO_INTF_NOT_MCU_MAX_CLK 74250000
#define VO_INTF_MCU_MAX_CLK 148500000
#define VO_IRQ_NUM_7606V1 47
xmedia_s32 g_vo_irq = VO_IRQ_NUM_7606V1;
static vo_base_cap g_vo_cap;
static vo_layer_cap g_layer_capability[XMEDIA_VO_LAYER_MAX];
static vo_dev_cap g_dev_capability[XMEDIA_VO_DEV_MAX];
static xmedia_void vo_init_chip_capacity(xmedia_void)
{
g_vo_cap.irq_name = VO_IRQ_NAME;
g_vo_cap.irq_num = g_vo_irq;
g_vo_cap.irq_cpumask = 0;
g_vo_cap.chip_name = "xm7606v1";
g_vo_cap.chip_revision = 0;
g_vo_cap.chip_type = 0;
g_vo_cap.board_id =0;
return;
}
static xmedia_void vo_init_chip_dev_capacity(xmedia_void)
{
int i = 0;
for (i = 0; i < XMEDIA_VO_DEV_MAX; i++) {
g_dev_capability[i].support = XMEDIA_TRUE;
g_dev_capability[i].support_video_layer_num = 1;
g_dev_capability[i].support_gfx_layer_num = 1;
g_dev_capability[i].support_max_layer_num = 2;
g_dev_capability[i].support_intf_num = 1;
g_dev_capability[i].support_csc_num = 3;
g_dev_capability[i].max_size.width = 1920;
g_dev_capability[i].max_size.height = 1080;
g_dev_capability[i].max_frame_rate = 60;
g_dev_capability[i].support_ink = XMEDIA_TRUE;
g_dev_capability[i].support_attach_layer = XMEDIA_FALSE;
if (VO_CHECK_VAILD_DEV(i) == XMEDIA_FALSE) {
g_dev_capability[i].support = XMEDIA_FALSE;
}
}
return;
}
static xmedia_void vo_init_chip_layer_capacity(xmedia_void)
{
int i = 0;
for (i = 0; i < XMEDIA_VO_LAYER_MAX; i++) {
g_layer_capability[i].support = XMEDIA_TRUE;
g_layer_capability[i].support_hdr = XMEDIA_FALSE;
g_layer_capability[i].support_flip = XMEDIA_FALSE;
g_layer_capability[i].support_mirror = XMEDIA_FALSE;
g_layer_capability[i].support_zme = XMEDIA_FALSE;
g_layer_capability[i].support_dcmp = XMEDIA_FALSE;
g_layer_capability[i].support_region = XMEDIA_TRUE;
g_layer_capability[i].region_num = 2;
g_layer_capability[i].max_read_size.width = 1920;
g_layer_capability[i].max_read_size.height = 1080;
g_layer_capability[i].min_out_size.width = 32;
g_layer_capability[i].min_out_size.height = 32;
g_layer_capability[i].support_max_bit_width = 8;
g_layer_capability[i].support_pixformat_num = 5;
if (VO_CHECK_VAILD_LAYER(i) == XMEDIA_FALSE) {
g_layer_capability[i].support = XMEDIA_FALSE;
}
}
return;
}
static xmedia_s32 vo_check_bt656_attr(xmedia_vo_dev dev, xmedia_vo_bt656_attr *bt656_attr,
xmedia_vo_intf_sync intf_sync)
{
if (bt656_attr->data_type != XMEDIA_INTF_BT_DATA_TYPE_YUV422_8BIT) {
VO_TRACE(MODULE_DBG_ERR,"dev %d bt656 intf not support data_type(%d) !\n", dev, bt656_attr->data_type);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((bt656_attr->data_seq != XMEDIA_INTF_BT601_BT656_DATA_SEQ_UYVY) &&
(bt656_attr->data_seq != XMEDIA_INTF_BT601_BT656_DATA_SEQ_VYUY) &&
(bt656_attr->data_seq != XMEDIA_INTF_BT601_BT656_DATA_SEQ_YUYV) &&
(bt656_attr->data_seq != XMEDIA_INTF_BT601_BT656_DATA_SEQ_YVYU)){
VO_TRACE(MODULE_DBG_ERR,"dev %d bt656 intf not support data_seq(%d) !\n", dev, bt656_attr->data_seq);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if (intf_sync != XMEDIA_VO_INTF_SYNC_USER) {
VO_TRACE(MODULE_DBG_ERR,"dev %d bt656 intf, intfsync %d illegal!\n", dev, intf_sync);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
return XMEDIA_SUCCESS;
}
static xmedia_s32 vo_check_bt1120_attr(xmedia_vo_dev dev, xmedia_vo_bt1120_attr *bt1120_attr,
xmedia_vo_intf_sync intf_sync)
{
if (bt1120_attr->data_type != XMEDIA_INTF_BT_DATA_TYPE_YUV422_8BIT) {
VO_TRACE(MODULE_DBG_ERR,"dev %d bt1120 intf not support data_type(%d) !\n", dev, bt1120_attr->data_type);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((bt1120_attr->data_seq != XMEDIA_INTF_BT1120_DATA_SEQ_UVUV) &&
(bt1120_attr->data_seq != XMEDIA_INTF_BT1120_DATA_SEQ_VUVU)){
VO_TRACE(MODULE_DBG_ERR,"dev %d bt1120 intf not support data_seq(%d) !\n", dev, bt1120_attr->data_seq);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((intf_sync != XMEDIA_VO_INTF_SYNC_USER) && (intf_sync != XMEDIA_VO_INTF_SYNC_720P50) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_720P60) && (intf_sync != XMEDIA_VO_INTF_SYNC_576P50) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_480P60)) {
VO_TRACE(MODULE_DBG_ERR,"dev %d bt1120 intf, intfsync %d illegal!\n", dev, intf_sync);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
return XMEDIA_SUCCESS;
}
static xmedia_s32 vo_check_lcd_sync(xmedia_vo_dev dev, xmedia_vo_lcd_attr *lcd_attr,
xmedia_vo_intf_sync intf_sync)
{
xmedia_intf_lcd_data_type data_type = lcd_attr->data_type;
xmedia_vo_lcd_data_mode data_mode = lcd_attr->data_mode;
//XMEDIA_VO_INTF_SYNC_USER lcd 用户自定义时序 是否会有问题????
if ((data_mode == XMEDIA_VO_LCD_DATA_MODE_SERIAL) && (data_type == XMEDIA_INTF_LCD_DATA_TYPE_RGB666_18BIT)) {
if ((intf_sync != XMEDIA_VO_INTF_SYNC_320x240_50) && (intf_sync != XMEDIA_VO_INTF_SYNC_240x320_50) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_USER)) {
VO_TRACE(MODULE_DBG_ERR,"For LCD 6bit intface,dev %d intfsync %d illegal!\n", dev, intf_sync);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
if ((data_mode == XMEDIA_VO_LCD_DATA_MODE_SERIAL) && (data_type == XMEDIA_INTF_LCD_DATA_TYPE_RGB888_24BIT)) {
if ((intf_sync != XMEDIA_VO_INTF_SYNC_320x240_60) && (intf_sync != XMEDIA_VO_INTF_SYNC_USER)) {
VO_TRACE(MODULE_DBG_ERR,"For LCD 8bit intface,dev %d intfsync %d illegal!\n", dev, intf_sync);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
if ((data_mode == XMEDIA_VO_LCD_DATA_MODE_PARA) && (data_type == XMEDIA_INTF_LCD_DATA_TYPE_RGB565_16BIT)) {
if ((intf_sync != XMEDIA_VO_INTF_SYNC_240x320_60) && (intf_sync != XMEDIA_VO_INTF_SYNC_640x480_60) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_USER)) {
VO_TRACE(MODULE_DBG_ERR,"For LCD 16bit intface,dev %d intfsync %d illegal!\n", dev, intf_sync);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
if ((data_mode == XMEDIA_VO_LCD_DATA_MODE_PARA) && (data_type == XMEDIA_INTF_LCD_DATA_TYPE_RGB666_18BIT)) {
if ((intf_sync != XMEDIA_VO_INTF_SYNC_240x320_60) && (intf_sync != XMEDIA_VO_INTF_SYNC_640x480_60) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_USER)) {
VO_TRACE(MODULE_DBG_ERR,"For LCD 18bit intface,dev %d intfsync %d illegal!\n", dev, intf_sync);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
if ((data_mode == XMEDIA_VO_LCD_DATA_MODE_PARA) && (data_type == XMEDIA_INTF_LCD_DATA_TYPE_RGB888_24BIT)) {
if ((intf_sync != XMEDIA_VO_INTF_SYNC_240x320_60) && (intf_sync != XMEDIA_VO_INTF_SYNC_640x480_60) &&
(intf_sync != XMEDIA_VO_INTF_SYNC_800x480_50) && (intf_sync != XMEDIA_VO_INTF_SYNC_USER)) {
VO_TRACE(MODULE_DBG_ERR,"For LCD 24bit intface,dev %d intfsync %d illegal!\n", dev, intf_sync);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
return XMEDIA_SUCCESS;
}
static xmedia_s32 vo_check_lcd_attr(xmedia_vo_dev dev, xmedia_vo_lcd_attr *lcd_attr,
xmedia_vo_intf_sync intf_sync)
{
xmedia_intf_lcd_data_type data_type = lcd_attr->data_type;
xmedia_vo_lcd_data_mode data_mode = lcd_attr->data_mode;
if ((data_type != XMEDIA_INTF_LCD_DATA_TYPE_RGB565_16BIT) && (data_type != XMEDIA_INTF_LCD_DATA_TYPE_RGB666_18BIT) &&
(data_type != XMEDIA_INTF_LCD_DATA_TYPE_RGB888_24BIT)) {
VO_TRACE(MODULE_DBG_ERR,"dev %d lcd intf not support data_type(%d) !\n", dev, data_type);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((data_mode != XMEDIA_VO_LCD_DATA_MODE_SERIAL) && (data_mode != XMEDIA_VO_LCD_DATA_MODE_PARA)) {
VO_TRACE(MODULE_DBG_ERR,"dev %d lcd intf not support data_mode(%d) !\n", dev, data_mode);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((lcd_attr->data_seq != XMEDIA_INTF_LCD_DATA_SEQ_RGB) && (lcd_attr->data_seq != XMEDIA_INTF_LCD_DATA_SEQ_RBG) &&
(lcd_attr->data_seq != XMEDIA_INTF_LCD_DATA_SEQ_GRB) && (lcd_attr->data_seq != XMEDIA_INTF_LCD_DATA_SEQ_GBR) &&
(lcd_attr->data_seq != XMEDIA_INTF_LCD_DATA_SEQ_BRG) && (lcd_attr->data_seq != XMEDIA_INTF_LCD_DATA_SEQ_BGR)) {
VO_TRACE(MODULE_DBG_ERR,"dev %d lcd intf not support data_seq(%d) !\n", dev, lcd_attr->data_seq);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if (data_mode == XMEDIA_VO_LCD_DATA_MODE_SERIAL) {
if ((data_type != XMEDIA_INTF_LCD_DATA_TYPE_RGB666_18BIT) && (data_type != XMEDIA_INTF_LCD_DATA_TYPE_RGB888_24BIT)) {
VO_TRACE(MODULE_DBG_ERR,"dev %d lcd intf support 18&24 bit in serial mode(%d) !\n", dev, data_type);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
return vo_check_lcd_sync(dev, lcd_attr, intf_sync);
}
static xmedia_s32 vo_check_mcu_attr(xmedia_vo_dev dev, xmedia_vo_mcu_attr *lcd_attr,
xmedia_vo_intf_sync intf_sync)
{
if ((lcd_attr->te_mode_en != XMEDIA_TRUE) && (lcd_attr->te_mode_en != XMEDIA_FALSE)) {
VO_TRACE(MODULE_DBG_ERR,"dev %d lcd attr te_mode_en not support (%d) !\n", dev, lcd_attr->te_mode_en);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((lcd_attr->data_type < XMEDIA_VO_MCU_DATA_TYPE_8BIT_16BPP_RGB565_8080I) ||
(lcd_attr->data_type > XMEDIA_VO_MCU_DATA_TYPE_4LINE_RGB666)) {
VO_TRACE(MODULE_DBG_ERR,"dev %d lcd attr data_type not support (%d) !\n", dev, lcd_attr->data_type);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((intf_sync != XMEDIA_VO_INTF_SYNC_USER) && (intf_sync != XMEDIA_VO_INTF_SYNC_320x240_60)) {
VO_TRACE(MODULE_DBG_ERR,"dev %d mcu intf, intfsync %d illegal!\n", dev, intf_sync);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
return XMEDIA_SUCCESS;
}
static xmedia_s32 vo_check_dev_size(xmedia_vo_dev dev, xmedia_intf_type intf_type,
xmedia_video_size *dev_size) {
if (VO_CHECK_VIRT_DEV(dev) == XMEDIA_TRUE) {
if (dev_size->width > g_dev_capability[dev].max_size.width ||
dev_size->height > g_dev_capability[dev].max_size.height) {
VO_TRACE(MODULE_DBG_ERR, "dev%d not support dev_size_width %d\n", dev, dev_size->width);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
} else {
if (dev_size->width > g_dev_capability[dev].max_size.width) {
VO_TRACE(MODULE_DBG_ERR, "dev%d not support dev_size_width %d\n", dev, dev_size->width);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
//只有mipi支持 width>1920以上时序
if ((dev_size->width > VO_INTF_NOT_MIPI_MAX_WHIDTH) && (intf_type != XMEDIA_INTF_TYPE_MIPI_DSI)) {
VO_TRACE(MODULE_DBG_ERR, "only mipi width support 1920+\n");
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
return XMEDIA_SUCCESS;
}
xmedia_s32 hal_vo_check_dev_intf(xmedia_vo_dev dev, xmedia_vo_dev_config *config, xmedia_video_size *dev_size)
{
xmedia_s32 ret;
if (vo_check_dev_size(dev, config->intf_config.intf_type, dev_size) != XMEDIA_SUCCESS) {
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
//虚拟设备不需要后续的check
if (VO_CHECK_VIRT_DEV(dev) == XMEDIA_TRUE) {
return XMEDIA_SUCCESS;
}
switch (config->intf_config.intf_type){
case XMEDIA_INTF_TYPE_BT656:
ret = vo_check_bt656_attr(dev, &(config->intf_config.bt656_attr), config->intf_sync);
break;
case XMEDIA_INTF_TYPE_BT1120:
ret = vo_check_bt1120_attr(dev, &(config->intf_config.bt1120_attr), config->intf_sync);
break;
case XMEDIA_INTF_TYPE_LCD:
ret = vo_check_lcd_attr(dev, &(config->intf_config.lcd_attr), config->intf_sync);
break;
case XMEDIA_INTF_TYPE_MCU:
ret = vo_check_mcu_attr(dev, &(config->intf_config.mcu_attr), config->intf_sync);
break;
default:
ret = XMEDIA_ERRCODE_NOT_SUPPORT;
break;
}
return ret;
}
xmedia_s32 hal_vo_check_clk(xmedia_vo_dev dev, xmedia_vo_dev_config *config, xmedia_u32 clk)
{
//MCU端子为了支持spi mcu跑到320x240 p30 放开到148.5
if (config->intf_config.intf_type == XMEDIA_INTF_TYPE_MCU) {
if (clk > VO_INTF_MCU_MAX_CLK) {
VO_TRACE(MODULE_DBG_ERR,"hal_vo_check_clk err, clk %d\n", clk);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
} else {
if (clk > VO_INTF_NOT_MCU_MAX_CLK) {
VO_TRACE(MODULE_DBG_ERR,"hal_vo_check_clk err, clk %d\n", clk);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
return XMEDIA_SUCCESS;
}
xmedia_s32 hal_vo_check_dev_csc_cap(xmedia_vo_dev dev, xmedia_vo_intf_config *intf_config,
xmedia_vo_dev_csc *dev_csc)
{
xmedia_bool mipi_rgb_en;
if (dev_csc->color_info.color_gamut == XMEDIA_VIDEO_COLOR_GAMUT_BT2020) {
VO_TRACE(MODULE_DBG_ERR,"Vo dev(%d) color gamut should be bt601 or 709\n", dev);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if (((intf_config->intf_type == XMEDIA_INTF_TYPE_LCD) || (intf_config->intf_type == XMEDIA_INTF_TYPE_LVDS) ||
(intf_config->intf_type == XMEDIA_INTF_TYPE_MCU)) &&
(dev_csc->color_info.color_space == XMEDIA_VIDEO_COLOR_SPACE_YUV)) {
VO_TRACE(MODULE_DBG_ERR,"Vo dev(%d) lcd/lvds should be output rgb\n", dev);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if (((intf_config->intf_type == XMEDIA_INTF_TYPE_BT656) || (intf_config->intf_type == XMEDIA_INTF_TYPE_BT1120)) &&
(dev_csc->color_info.color_space == XMEDIA_VIDEO_COLOR_SPACE_RGB)) {
VO_TRACE(MODULE_DBG_ERR,"Vo dev(%d) bt656/bt1120 should be output yuv\n", dev);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if (intf_config->intf_type == XMEDIA_INTF_TYPE_MIPI_DSI) {
if ((intf_config->mipi_attr.data_type == XMEDIA_INTF_MIPI_DSI_DATA_TYPE_RGB666_18BIT) ||
(intf_config->mipi_attr.data_type == XMEDIA_INTF_MIPI_DSI_DATA_TYPE_RGB888_24BIT)){
mipi_rgb_en = XMEDIA_TRUE;
} else {
mipi_rgb_en = XMEDIA_FALSE;
}
if ((mipi_rgb_en == XMEDIA_TRUE) && (dev_csc->color_info.color_space == XMEDIA_VIDEO_COLOR_SPACE_YUV)){
VO_TRACE(MODULE_DBG_ERR,"dev %d color space should be same as mipi output(%d,%d)\n",
dev, mipi_rgb_en, dev_csc->color_info.color_space);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((mipi_rgb_en == XMEDIA_FALSE) && (dev_csc->color_info.color_space == XMEDIA_VIDEO_COLOR_SPACE_RGB)){
VO_TRACE(MODULE_DBG_ERR,"dev %d color space should be same as mipi output(%d,%d)\n",
dev, mipi_rgb_en, dev_csc->color_info.color_space);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
}
return XMEDIA_SUCCESS;
}
xmedia_s32 hal_vo_check_dev_gamma_cap(xmedia_vo_dev dev, xmedia_vo_intf_config *intf_config)
{
if ((intf_config->intf_type == XMEDIA_INTF_TYPE_BT656) || (intf_config->intf_type == XMEDIA_INTF_TYPE_BT1120)) {
VO_TRACE(MODULE_DBG_DEBUG,"Vo dev(%d) yuv output not support gamma set\n", dev);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
if ((intf_config->intf_type == XMEDIA_INTF_TYPE_MIPI_DSI) &&
(intf_config->mipi_attr.data_type == XMEDIA_INTF_MIPI_DSI_DATA_TYPE_YUV422_16BIT)) {
VO_TRACE(MODULE_DBG_DEBUG,"Vo dev(%d) yuv output not support gamma set\n", dev);
return XMEDIA_ERRCODE_NOT_SUPPORT;
}
return XMEDIA_SUCCESS;
}
xmedia_bool hal_vo_check_chip_type(vo_chip_type board_id)
{
if (board_id == VO_CHIP_TYPE_XM7606V1) {
return XMEDIA_TRUE;
} else {
return XMEDIA_FALSE;
}
}
xmedia_s32 hal_vo_check_layer_cap(xmedia_vo_layer layer, xmedia_u32 max_width, xmedia_u32 max_height,
xmedia_vo_layer_config *layer_config)
{
if ((layer_config->img_size.width < g_layer_capability[layer].min_out_size.width) ||
(layer_config->img_size.height < g_layer_capability[layer].min_out_size.height)) {
VO_TRACE(MODULE_DBG_ERR,"layer %d image size(%d, %d) is illegaled, should biger than (%d,%d)!\n",
layer, layer_config->img_size.width, layer_config->img_size.height,
g_layer_capability[layer].min_out_size.width, g_layer_capability[layer].min_out_size.height);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if (layer_config->img_size.width > max_width || layer_config->img_size.height > max_height) {
VO_TRACE(MODULE_DBG_ERR,"layer %d image size width(%d %d) is illegaled, should less than(%d %d)!\n",
layer, layer_config->img_size.width, layer_config->img_size.height, max_width, max_height);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if ((IS_ALIGN(layer_config->img_size.width, 2) != XMEDIA_TRUE) ||
(IS_ALIGN(layer_config->img_size.height, 2) != XMEDIA_TRUE)) {
VO_TRACE(MODULE_DBG_ERR,"layer %d img size(%d, %d) dosen't aligned by 2 pixel!\n",
layer, layer_config->img_size.width, layer_config->img_size.height);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if ((layer_config->pix_format != XMEDIA_VIDEO_PIXEL_FMT_YUV_SEMIPLANAR_420) &&
(layer_config->pix_format != XMEDIA_VIDEO_PIXEL_FMT_YUV_SEMIPLANAR_422) &&
(layer_config->pix_format != XMEDIA_VIDEO_PIXEL_FMT_YVU_SEMIPLANAR_420) &&
(layer_config->pix_format != XMEDIA_VIDEO_PIXEL_FMT_YVU_SEMIPLANAR_422) &&
(layer_config->pix_format != XMEDIA_VIDEO_PIXEL_FMT_YUV_400)) {
VO_TRACE(MODULE_DBG_ERR,"layer %d pix_format %d doesn't support!\n", layer, layer_config->pix_format);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if (layer_config->bit_width != XMEDIA_VIDEO_DATA_WIDTH_8) {
VO_TRACE(MODULE_DBG_ERR,"layer %d bit_width %d doesn't support!\n", layer, layer_config->bit_width);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if (layer_config->part_mode >= XMEDIA_VO_PARTITION_MODE_MAX) {
VO_TRACE(MODULE_DBG_ERR,"layer %d part mode %d is illegal!\n", layer, layer_config->part_mode);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
return XMEDIA_SUCCESS;
}
xmedia_s32 hal_vo_check_layer_frame(xmedia_vo_layer layer, xmedia_video_frame_info *frame_info)
{
xmedia_u32 valid_width;
xmedia_u32 valid_height;
valid_width = g_layer_capability[layer].min_out_size.width;
valid_height = g_layer_capability[layer].min_out_size.height;
if ((frame_info->frame.pixel_fmt != XMEDIA_VIDEO_PIXEL_FMT_YUV_SEMIPLANAR_422) &&
(frame_info->frame.pixel_fmt != XMEDIA_VIDEO_PIXEL_FMT_YVU_SEMIPLANAR_422) &&
(frame_info->frame.pixel_fmt != XMEDIA_VIDEO_PIXEL_FMT_YUV_SEMIPLANAR_420) &&
(frame_info->frame.pixel_fmt != XMEDIA_VIDEO_PIXEL_FMT_YVU_SEMIPLANAR_420) &&
(frame_info->frame.pixel_fmt != XMEDIA_VIDEO_PIXEL_FMT_YUV_400)) {
VO_TRACE(MODULE_DBG_ERR,"Unsupport input pixel format %d!\n", frame_info->frame.pixel_fmt);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if ((frame_info->frame.width < valid_width) || (frame_info->frame.height < valid_height) ||
(IS_ALIGN(frame_info->frame.width, 2) != XMEDIA_TRUE) ||
(IS_ALIGN(frame_info->frame.width, 2) != XMEDIA_TRUE)) {
VO_TRACE(MODULE_DBG_ERR,"pic width(%d) is smaller than min width 32 or pic height(%d) is smaller than"
"min height 32 or not align2!!\n", frame_info->frame.width, frame_info->frame.height);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if (frame_info->frame.dynamic_range != XMEDIA_VIDEO_DYNAMIC_RANGE_SDR) {
VO_TRACE(MODULE_DBG_ERR,"Unsupport input dynamic range%d!\n", frame_info->frame.dynamic_range);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if (frame_info->frame.compress_mode != XMEDIA_VIDEO_COMPRESS_MODE_NONE) {
VO_TRACE(MODULE_DBG_ERR,"Unsupport input compress mode%d!\n", frame_info->frame.compress_mode);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if ((frame_info->frame.video_fmt != XMEDIA_VIDEO_FMT_LINEAR) &&
(frame_info->frame.video_fmt != XMEDIA_VIDEO_FMT_TILE_32x4) &&
(frame_info->frame.video_fmt != XMEDIA_VIDEO_FMT_TILE_64x4)) {
VO_TRACE(MODULE_DBG_ERR,"Unsupport input video format%d!\n", frame_info->frame.video_fmt);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if (frame_info->frame.bit_width != XMEDIA_VIDEO_DATA_WIDTH_8) {
VO_TRACE(MODULE_DBG_ERR,"Unsupport input bit width%d!\n", frame_info->frame.bit_width);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
if ((frame_info->frame.color_info.color_space != XMEDIA_VIDEO_COLOR_SPACE_YUV) ||
(frame_info->frame.color_info.color_gamut == XMEDIA_VIDEO_COLOR_GAMUT_BT2020) ||
(frame_info->frame.color_info.color_gamut >= XMEDIA_VIDEO_COLOR_GAMUT_MAX) ||
(frame_info->frame.color_info.quantify_range >= XMEDIA_VIDEO_COLOR_RANGE_MAX)) {
VO_TRACE(MODULE_DBG_ERR,"Unsupport input color info:space-gamut-range(%d-%d-%d)!\n",
frame_info->frame.color_info.color_space,
frame_info->frame.color_info.color_gamut,frame_info->frame.color_info.quantify_range);
return XMEDIA_ERRCODE_INVALID_PARAM;
}
return XMEDIA_SUCCESS;
}
xmedia_void hal_vo_init_chip_capaciblity(xmedia_void)
{
vo_init_chip_capacity();
vo_init_chip_dev_capacity();
vo_init_chip_layer_capacity();
}
xmedia_u32 hal_vo_get_chip_revision(xmedia_void)
{
return g_vo_cap.chip_revision;
}
vo_base_cap *hal_vo_get_chip_capacity(xmedia_void)
{
return &g_vo_cap;
}
vo_layer_cap *hal_get_layer_chip_capacity(xmedia_vo_layer layer)
{
return &g_layer_capability[layer];
}
vo_dev_cap *hal_get_dev_chip_capacity(xmedia_vo_dev dev)
{
return &g_dev_capability[dev];
}
source/bootloader/product/driver/vo/hal/xmorca/hal_vo_chip_cfg.h
+87
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@@ -0,0 +1,87 @@
/* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef __HAL_VO_CHIP_CFG_H__
#define __HAL_VO_CHIP_CFG_H__
#include "drv_vo_comm.h"
#ifdef VO_BOOT
#include "xmedia_vo.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
VO_CHIP_INTF_TYPE_BT656 = 1 << 0,
VO_CHIP_INTF_TYPE_BT1120 = 1 << 1,
VO_CHIP_INTF_TYPE_LCD = 1 << 2,
VO_CHIP_INTF_TYPE_LVDS = 1 << 3,
VO_CHIP_INTF_TYPE_MIPI_DSI = 1 << 4,
VO_CHIP_INTF_TYPE_MAX
} vo_chip_intf_type;
typedef enum {
VO_CHIP_TYPE_XM7606V1,
VO_CHIP_TYPE_MAX
} vo_chip_type;
typedef struct {
xmedia_bool support;
xmedia_bool support_hdr;
xmedia_bool support_flip;
xmedia_bool support_mirror;
xmedia_bool support_zme;
xmedia_bool support_dcmp;
xmedia_bool support_region;
xmedia_u32 region_num;
xmedia_video_size max_read_size;
xmedia_video_size min_out_size;
xmedia_u32 support_max_bit_width;
xmedia_u32 support_pixformat_num;
} vo_layer_cap;
typedef struct {
xmedia_bool support;
xmedia_u32 support_video_layer_num;
xmedia_u32 support_gfx_layer_num;
xmedia_u32 support_max_layer_num;
xmedia_u32 support_intf_num;
xmedia_u32 support_csc_num;
xmedia_video_size max_size;
xmedia_bool support_ink;
xmedia_bool support_attach_layer;
xmedia_u32 max_frame_rate;
} vo_dev_cap;
typedef struct {
xmedia_u32 board_id;
xmedia_u32 irq_num;
xmedia_u32 irq_cpumask;
xmedia_u32 chip_revision;
xmedia_u32 chip_type;
xmedia_char *chip_name;
xmedia_char *irq_name;
} vo_base_cap;
xmedia_bool hal_vo_check_chip_type(vo_chip_type board_id);
xmedia_void hal_vo_init_chip_capaciblity(xmedia_void);
xmedia_u32 hal_vo_get_chip_revision(xmedia_void);
xmedia_s32 hal_vo_check_layer_cap(xmedia_vo_layer layer, xmedia_u32 max_width, xmedia_u32 max_height,
xmedia_vo_layer_config *layer_config);
xmedia_s32 hal_vo_check_dev_intf(xmedia_vo_dev dev, xmedia_vo_dev_config *config, xmedia_video_size *dev_size);
xmedia_s32 hal_vo_check_clk(xmedia_vo_dev dev, xmedia_vo_dev_config *config, xmedia_u32 clk);
xmedia_s32 hal_vo_check_dev_size(xmedia_vo_dev dev, xmedia_u32 width, xmedia_u32 height);
xmedia_s32 hal_vo_check_dev_csc_cap(xmedia_vo_dev dev, xmedia_vo_intf_config *intf_config,
xmedia_vo_dev_csc *dev_csc);
xmedia_s32 hal_vo_check_dev_gamma_cap(xmedia_vo_dev dev, xmedia_vo_intf_config *intf_config);
xmedia_s32 hal_vo_check_layer_frame(xmedia_vo_layer layer, xmedia_video_frame_info *frame_info);
vo_base_cap *hal_vo_get_chip_capacity(xmedia_void);
vo_layer_cap* hal_get_layer_chip_capacity(xmedia_vo_layer layer);
vo_dev_cap* hal_get_dev_chip_capacity(xmedia_vo_dev dev);
#ifdef __cplusplus
}
#endif
#endif /* __HAL_VO__CHIP_CFG_H__ */
source/bootloader/product/driver/vo/hal/xmorca/hal_vo_reg.c
+5926
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File diff suppressed because it is too large Load Diff
source/bootloader/product/driver/vo/hal/xmorca/hal_vo_reg.h
+2750
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File diff suppressed because it is too large Load Diff
source/bootloader/product/driver/vo/hal/xmorca/intf/hal_vo_intf.c
+976
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@@ -0,0 +1,976 @@
/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#include "hal_vo.h"
#include "hal_vo_intf.h"
#include "hal_vo_reg.h"
#include "hal_vo_clock.h"
#ifdef VO_BOOT
#include "drv_vo_comm.h"
#endif
#ifdef VO_KERNEL
#include "osal.h"
#endif
extern s_vout_regs_type *g_p_vout_reg;
extern vo_dts_lcd_config g_vo_dts_lcd_config[VO_DTS_LCD_TYPE_MAX];
#define MCU_CMD_PACKAGE_MAX_SIZE (64 * 4)
#define VO_REGUP_POS_VALUE 1
#define VO_PARA_POS_VALUE 2
#define VO_PREFETCH_POS_VALUE 3
#define VO_START_POS_VALUE 4
xmedia_void hal_vo_set_intf_fifo(xmedia_vo_dev dev, xmedia_u32 fifo)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_intf_sfifo_thd(g_p_vout_reg, fifo);
} else {
;
}
return;
}
xmedia_void hal_vo_set_intf_enable(xmedia_vo_dev dev, xmedia_bool enable)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_chk_sum_en(g_p_vout_reg, enable);
hal_reg_vout_set_cfg_intf_en(g_p_vout_reg, enable);
} else {
;
}
return;
}
xmedia_void hal_vo_get_intf_enable(xmedia_vo_dev dev, xmedia_bool *enable)
{
if (dev == XMEDIA_VO_DEV_0) {
*enable = hal_reg_vout_get_cfg_intf_en(g_p_vout_reg);
} else {
;
}
return;
}
xmedia_void hal_vo_set_intf_chk_sum_enable(xmedia_vo_dev dev, xmedia_bool enable)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_chk_sum_en(g_p_vout_reg, enable);
} else {
;
}
return;
}
//for mipi
xmedia_void hal_vo_set_intf_hs_mode(xmedia_vo_dev dev, vo_intf_hs_mode hs_mode)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_hs_mode(g_p_vout_reg, hs_mode);
} else {
;
}
return;
}
xmedia_void hal_vo_set_intf_mux(xmedia_vo_dev dev, xmedia_intf_type intf)
{
if (dev == XMEDIA_VO_DEV_0) {
switch (intf) {
case XMEDIA_INTF_TYPE_LCD:
hal_reg_vout_set_cfg_intf_sel(g_p_vout_reg, 1);
break;
case XMEDIA_INTF_TYPE_BT656:
case XMEDIA_INTF_TYPE_BT1120:
hal_reg_vout_set_cfg_intf_sel(g_p_vout_reg, 0);
if (intf == XMEDIA_INTF_TYPE_BT1120) {
hal_reg_vout_set_cfg_bt_mode(g_p_vout_reg, 1);
} else {
hal_reg_vout_set_cfg_bt_mode(g_p_vout_reg, 0);
}
break;
case XMEDIA_INTF_TYPE_MCU:
hal_reg_vout_set_cfg_intf_sel(g_p_vout_reg, 4);
break;
default:
break;
}
} else {
}
return ;
}
xmedia_void hal_vo_set_intf_regup(xmedia_vo_dev dev, xmedia_bool enable)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_intfupd_cfg_regup_en(g_p_vout_reg, enable);
}
return;
}
//默认从消隐区开始计数
xmedia_void hal_vo_set_intf_cnt_pos(xmedia_vo_dev dev)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_regup_pos(g_p_vout_reg, VO_REGUP_POS_VALUE);
hal_reg_vout_set_cfg_para_pos(g_p_vout_reg, VO_PARA_POS_VALUE);
hal_reg_vout_set_cfg_prefetch_pos(g_p_vout_reg, VO_PREFETCH_POS_VALUE);
hal_reg_vout_set_cfg_start_pos(g_p_vout_reg, VO_START_POS_VALUE);
} else {
;
}
return;
}
xmedia_void hal_vo_set_intf_timing(xmedia_vo_dev dev, xmedia_u32 frame_rate,
xmedia_vo_intf_config *intf_config, xmedia_vo_user_sync_timing *sync_timing,
vo_intf_special_timing *special_timing)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_interlaced(g_p_vout_reg, !(sync_timing->iop)); //逐隔行 配置
hal_reg_vout_set_cfg_de_inv(g_p_vout_reg,sync_timing->idv); //数据有效信号的极性
hal_reg_vout_set_cfg_hs_inv(g_p_vout_reg,sync_timing->ihs); //水平有效信号的极性
hal_reg_vout_set_cfg_vs_inv(g_p_vout_reg,sync_timing->ivs); //垂直有效信号的极性
if (sync_timing->iop == 0) {
hal_reg_vout_set_cfg_vact(g_p_vout_reg, sync_timing->vact * 2 - 1);//垂直有效区
} else {
hal_reg_vout_set_cfg_vact(g_p_vout_reg, sync_timing->vact - 1);
}
hal_reg_vout_set_cfg_vbb(g_p_vout_reg,sync_timing->vbb - 1); //垂直消隐后肩
hal_reg_vout_set_cfg_vfb(g_p_vout_reg,sync_timing->vfb - 1); //垂直消隐前肩
hal_reg_vout_set_cfg_hact(g_p_vout_reg,sync_timing->hact - 1); //水平有效区
hal_reg_vout_set_cfg_bvbb(g_p_vout_reg,sync_timing->bvbb - 1); //底场垂直消隐后肩
hal_reg_vout_set_cfg_bvfb(g_p_vout_reg,sync_timing->bvfb - 1); //底场垂直消隐前肩
hal_reg_vout_set_cfg_hs_width(g_p_vout_reg,sync_timing->hpw); //水平脉冲宽度
if (special_timing->vo_special_timing_sel) {
hal_reg_vout_set_cfg_hbb(g_p_vout_reg,special_timing->fixed_clk_hbb - 1); //水平消隐后肩
hal_reg_vout_set_cfg_hfb(g_p_vout_reg,special_timing->fixed_clk_hfb - 1); //水平消隐前肩
//vsync lcd mipi lvds 都需要使用，vsync的起始点和结束点
hal_reg_vout_set_cfg_vs_st_h_field0(g_p_vout_reg, special_timing->fixed_clk_hfb - 1);
hal_reg_vout_set_cfg_vs_end_h_field0(g_p_vout_reg, special_timing->fixed_clk_hfb - 1);
hal_reg_vout_set_cfg_vs_st_v_field0(g_p_vout_reg, special_timing->vs_st_v_filed);
hal_reg_vout_set_cfg_vs_end_v_field0(g_p_vout_reg, special_timing->vs_end_v_filed);
} else {
hal_reg_vout_set_cfg_hbb(g_p_vout_reg,sync_timing->hbb - 1); //水平消隐后肩
hal_reg_vout_set_cfg_hfb(g_p_vout_reg,sync_timing->hfb - 1); //水平消隐前肩
//vsync lcd mipi lvds 都需要使用，vsync的起始点和结束点
hal_reg_vout_set_cfg_vs_st_h_field0(g_p_vout_reg, sync_timing->hbb - 1);
hal_reg_vout_set_cfg_vs_end_h_field0(g_p_vout_reg, sync_timing->hbb - 1);
hal_reg_vout_set_cfg_vs_st_v_field0(g_p_vout_reg, sync_timing->vfb);
hal_reg_vout_set_cfg_vs_end_v_field0(g_p_vout_reg, sync_timing->vfb + sync_timing->vpw);
}
hal_reg_vout_set_cfg_field_tog(g_p_vout_reg, 0x0); //场模式用的 暂时不管
hal_reg_vout_set_cfg_bfield_tog(g_p_vout_reg, 0x0); //场模式用的 暂时不管
hal_reg_vout_set_cfg_vs_st_h_field1(g_p_vout_reg, 0x0); //场模式用的 暂时不管
hal_reg_vout_set_cfg_vs_end_h_field1(g_p_vout_reg, 0x0); //场模式用的 暂时不管
hal_reg_vout_set_cfg_vs_st_v_field1(g_p_vout_reg, 0x0); //场模式用的 暂时不管
hal_reg_vout_set_cfg_vs_end_v_field1(g_p_vout_reg, 0x0); //场模式用的 暂时不管
/*
* 目前还有以下参数没用到
* xmedia_u16 hmid; //底场同步水平有效区域
* xmedia_bool synm; //同步模式(0 表示比如BT656时序，1表示像LCD那样的信号)
* xmedia_u8 intfb; //隔行输出的位宽y
*/
} else {
;
}
return;
}
//主要给LCD用，BT用内同步
xmedia_void hal_vo_set_intf_sync_inverse(xmedia_vo_dev dev)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_field_tog(g_p_vout_reg, 0x0); //(0->vbb+bvbb+1)
hal_reg_vout_set_cfg_bfield_tog(g_p_vout_reg, 0x0);
hal_reg_vout_set_cfg_vs_st_h_field0(g_p_vout_reg, 0x0);
hal_reg_vout_set_cfg_vs_end_h_field0(g_p_vout_reg, 0x1);
hal_reg_vout_set_cfg_vs_st_v_field0(g_p_vout_reg, 0x0); //行翻转点起始
hal_reg_vout_set_cfg_vs_end_v_field0(g_p_vout_reg, 0x1); //(0,vfb+vbb+1)
hal_reg_vout_set_cfg_vs_st_v_field1(g_p_vout_reg, 0x0);
hal_reg_vout_set_cfg_vs_end_v_field1(g_p_vout_reg, 0x1);
hal_reg_vout_set_cfg_vs_st_h_field1(g_p_vout_reg, 0x0);
hal_reg_vout_set_cfg_vs_end_h_field1(g_p_vout_reg, 0x1);
} else {
;
}
return;
}
//垂直中断起始行配置：有效区或者消隐区计数
xmedia_void hal_vo_set_intf_vtt_sel(xmedia_vo_dev dev, xmedia_u32 vtt_id, xmedia_bool cnt_mode)
{
if (dev == XMEDIA_VO_DEV_0) {
if (vtt_id == 0) {
hal_reg_vout_set_cfg_vt_int_cnt_sel_0(g_p_vout_reg, cnt_mode);
}
if (vtt_id == 1) {
hal_reg_vout_set_cfg_vt_int_cnt_sel_1(g_p_vout_reg, cnt_mode);
}
if (vtt_id == 2) {
hal_reg_vout_set_cfg_vt_int_cnt_sel_2(g_p_vout_reg, cnt_mode);
}
if (vtt_id == 3) {
hal_reg_vout_set_cfg_vt_int_cnt_sel_3(g_p_vout_reg, cnt_mode);
}
} else {
;
}
return;
}
//帧模式还是场模式
xmedia_void hal_vo_set_intf_vtt_mode(xmedia_vo_dev dev, xmedia_u32 vtt_id, xmedia_bool frame_mode)
{
if (dev == XMEDIA_VO_DEV_0) {
if (vtt_id == 0) {
hal_reg_vout_set_cfg_vt_int_mode_0(g_p_vout_reg, frame_mode);
}
if (vtt_id == 1) {
hal_reg_vout_set_cfg_vt_int_mode_1(g_p_vout_reg, frame_mode);
}
if (vtt_id == 2) {
hal_reg_vout_set_cfg_vt_int_mode_2(g_p_vout_reg, frame_mode);
}
if (vtt_id == 3) {
hal_reg_vout_set_cfg_vt_int_mode_3(g_p_vout_reg, frame_mode);
}
} else {
;
}
return;
}
//中断阈值
xmedia_void hal_vo_set_intf_vtt_thd(xmedia_vo_dev dev, xmedia_u32 vtt_id, xmedia_u32 vtt_thd)
{
if (dev == XMEDIA_VO_DEV_0) {
if (vtt_id == 0) {
hal_reg_vout_set_cfg_vt_int_thd_0(g_p_vout_reg, vtt_thd);
}
if (vtt_id == 1) {
hal_reg_vout_set_cfg_vt_int_thd_1(g_p_vout_reg, vtt_thd);
}
if (vtt_id == 2) {
hal_reg_vout_set_cfg_vt_int_thd_2(g_p_vout_reg, vtt_thd);
}
if (vtt_id == 3) {
hal_reg_vout_set_cfg_vt_int_thd_3(g_p_vout_reg, vtt_thd);
}
} else {
;
}
return;
}
xmedia_void hal_vo_get_intf_state(xmedia_vo_dev dev, xmedia_bool *btm, xmedia_u16 *vcnt, xmedia_u8 *vstate)
{
if (dev == XMEDIA_VO_DEV_0) {
*btm = hal_reg_vout_get_field_flag_ppc(g_p_vout_reg);
*vstate = hal_reg_vout_get_vstate(g_p_vout_reg);
if (hal_reg_vout_get_cfg_vt_int_cnt_sel_0(g_p_vout_reg) == 0) {
*vcnt = hal_reg_vout_get_vcnt_st_vblk(g_p_vout_reg);
} else if (hal_reg_vout_get_cfg_vt_int_cnt_sel_0(g_p_vout_reg) == 1) {
*vcnt = hal_reg_vout_get_vcnt_st_vact(g_p_vout_reg);
} else {
*vcnt = hal_reg_vout_get_vcnt_st_vblk(g_p_vout_reg);
}
} else {
;
}
return;
}
xmedia_void hal_vo_get_intf_checksum_value(xmedia_vo_dev dev, xmedia_u32 *y, xmedia_u32 *u, xmedia_u32 *v)
{
if (dev == XMEDIA_VO_DEV_0) {
*y = hal_reg_vout_get_intf_y_sum(g_p_vout_reg);
*u = hal_reg_vout_get_intf_u_sum(g_p_vout_reg);
*v = hal_reg_vout_get_intf_v_sum(g_p_vout_reg);
} else {
;
}
return;
}
xmedia_void hal_vo_set_intf_bt_mode(xmedia_vo_dev dev, xmedia_bool value)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_bt_mode(g_p_vout_reg, value);
} else {
;
}
return ;
}
xmedia_void hal_vo_set_intf_bt_yc_order(xmedia_vo_dev dev, xmedia_bool value)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_bt_yc_order(g_p_vout_reg, value);
} else {
;
}
return ;
}
xmedia_void hal_vo_set_intf_bt_uv_order(xmedia_vo_dev dev, xmedia_bool value)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_bt_uv_order(g_p_vout_reg, value);
} else {
;
}
return ;
}
//场消隐还是自定义
xmedia_void hal_vo_set_intf_bt_vbit_mode(xmedia_vo_dev dev, xmedia_bool sync_mode)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_vbit_mode(g_p_vout_reg, sync_mode);
} else {
;
}
return ;
}
xmedia_void hal_vo_set_intf_bt_bit_inverse(xmedia_vo_dev dev, xmedia_bool enable)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_bt_bit_inv(g_p_vout_reg, enable);
} else {
;
}
return ;
}
xmedia_void hal_vo_set_intf_bt_user_sync(xmedia_vo_dev dev, vo_intf_bt_sync *sync)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_vbit_st(g_p_vout_reg, sync->top_start);
hal_reg_vout_set_cfg_vbit_end(g_p_vout_reg, sync->top_end);
hal_reg_vout_set_cfg_bvbit_st(g_p_vout_reg, sync->bottom_start);
hal_reg_vout_set_cfg_bvbit_end(g_p_vout_reg, sync->bottom_end);
} else {
;
}
return ;
}
xmedia_void hal_vo_set_intf_lcd_mode(xmedia_vo_dev dev, xmedia_bool value)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_lcd_mode(g_p_vout_reg, value);
} else {
;
}
return ;
}
xmedia_void hal_vo_set_intf_lcd_rgb_order(xmedia_vo_dev dev, xmedia_u8 order0, xmedia_u8 order1)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_lcd_rgb_order_0(g_p_vout_reg, order0);
hal_reg_vout_set_cfg_lcd_rgb_order_1(g_p_vout_reg, order1);
} else {
;
}
return ;
}
xmedia_void hal_vo_set_intf_lcd_bit_inverse(xmedia_vo_dev dev, xmedia_bool enable)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_lcd_bit_inv(g_p_vout_reg, enable);
} else {
;
}
return ;
}
xmedia_void hal_vo_set_intf_mute_enable(xmedia_vo_dev dev, xmedia_bool enable)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_voutintf_cfg_mute_en(g_p_vout_reg, enable);
} else {
;
}
return;
}
xmedia_void hal_vo_get_intf_mute_enable(xmedia_vo_dev dev, xmedia_bool *enable)
{
if (dev == XMEDIA_VO_DEV_0) {
*enable = hal_reg_vout_get_voutintf_cfg_mute_en(g_p_vout_reg);
} else {
;
}
return;
}
xmedia_void hal_vo_set_intf_mute_pattern_mode(xmedia_vo_dev dev, xmedia_u8 value)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_voutintf_cfg_mute_pat(g_p_vout_reg, value);
} else {
;
}
return;
}
xmedia_void hal_vo_set_intf_mute_data_mode(xmedia_vo_dev dev, xmedia_u8 value)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_voutintf_cfg_mute_mode(g_p_vout_reg, value);
} else {
;
}
return;
}
xmedia_void hal_vo_set_intf_checkbar_size(xmedia_vo_dev dev, xmedia_u8 width, xmedia_u8 height)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_voutintf_cfg_checker_h(g_p_vout_reg, width);
hal_reg_vout_set_voutintf_cfg_checker_v(g_p_vout_reg, height);
} else {
;
}
return;
}
xmedia_void hal_vo_set_intf_cbar_sel(xmedia_vo_dev dev, xmedia_u8 value)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_cbar_sel(g_p_vout_reg, value);
} else {
;
}
return;
}
xmedia_void hal_vo_set_intf_mute_color(xmedia_vo_dev dev, xmedia_u32 white_color, xmedia_u32 black_color)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_voutintf_cfg_mute_color(g_p_vout_reg, white_color);
hal_reg_vout_set_intfmutebk_cfg_bk_color(g_p_vout_reg, black_color);
} else {
;
}
return;
}
xmedia_void hal_vo_set_intf_ink(xmedia_vo_dev dev, vo_csc_ink_info *ink_info)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_ink_en(g_p_vout_reg, ink_info->ink_en);
hal_reg_vout_set_cfg_cross_en(g_p_vout_reg, ink_info->cross_en);
hal_reg_vout_set_cfg_cross_color_mode(g_p_vout_reg, ink_info->color_reverse);
hal_reg_vout_set_cfg_cross_color(g_p_vout_reg, ink_info->color);
hal_reg_vout_set_cfg_y_pos(g_p_vout_reg, ink_info->y);
hal_reg_vout_set_cfg_x_pos(g_p_vout_reg, ink_info->x);
} else {
;
}
return;
}
xmedia_void hal_vo_set_intf_clip(xmedia_vo_dev dev, vo_intf_clip *intf_clip)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_clip_yuv_l(g_p_vout_reg, intf_clip->clip_l);
hal_reg_vout_set_cfg_clip_yuv_h(g_p_vout_reg, intf_clip->clip_h);
hal_reg_vout_set_cfg_clip_en(g_p_vout_reg, intf_clip->clip_en);
} else {
;
}
return;
}
xmedia_void hal_vo_set_intf_hcds(xmedia_vo_dev dev, vo_intf_hcds *intf_hcds)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_hcds_coef_0(g_p_vout_reg, intf_hcds->hcds_coef_0);
hal_reg_vout_set_cfg_hcds_coef_1(g_p_vout_reg, intf_hcds->hcds_coef_1);
hal_reg_vout_set_cfg_hcds_coef_2(g_p_vout_reg, intf_hcds->hcds_coef_2);
hal_reg_vout_set_cfg_hcds_coef_3(g_p_vout_reg, intf_hcds->hcds_coef_3);
// 0:丢点模式， 1：二阶滤波
hal_reg_vout_set_cfg_hcds_mode(g_p_vout_reg, intf_hcds->hcds_mode);
hal_reg_vout_set_cfg_hcds_en(g_p_vout_reg, intf_hcds->hcds_en);
} else {
;
}
return;
}
xmedia_void hal_vo_set_intf_dither_enable(xmedia_vo_dev dev, xmedia_bool enable)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_dither_en(g_p_vout_reg, enable);
} else {
;
}
return ;
}
xmedia_void hal_vo_set_intf_dither_thd(xmedia_vo_dev dev, xmedia_u8 thd_h, xmedia_u8 thd_l)
{
if (dev == XMEDIA_VO_DEV_0) {
hal_reg_vout_set_cfg_dither_thd_h(g_p_vout_reg, thd_h);
hal_reg_vout_set_cfg_dither_thd_l(g_p_vout_reg, thd_l);
} else {
;
}
return ;
}
//接口数据顺序要要注意下视频格式输出的顺序
xmedia_void hal_vo_set_bt656_intf_cfg(xmedia_vo_dev dev, xmedia_vo_bt656_attr *bt656_attr)
{
vo_intf_hcds intf_hcds;
vo_intf_clip intf_clip;
hal_vo_set_intf_mux(dev, XMEDIA_INTF_TYPE_BT656);
intf_hcds.hcds_en = XMEDIA_TRUE;
intf_hcds.hcds_mode = 0;
intf_hcds.hcds_coef_0 = 127;
intf_hcds.hcds_coef_1 = 1;
intf_hcds.hcds_coef_2 = 32;
intf_hcds.hcds_coef_3 = 96;
hal_vo_set_intf_hcds(dev, &intf_hcds);
intf_clip.clip_en = XMEDIA_TRUE;
intf_clip.clip_l = 0x101010;
intf_clip.clip_h = 0xEBF0F0;
hal_vo_set_intf_clip(dev, &intf_clip);
switch(bt656_attr->data_seq){
case XMEDIA_INTF_BT601_BT656_DATA_SEQ_YUYV:
hal_vo_set_intf_bt_yc_order(dev, 1);
hal_vo_set_intf_bt_uv_order(dev, 0);
break;
case XMEDIA_INTF_BT601_BT656_DATA_SEQ_YVYU:
hal_vo_set_intf_bt_yc_order(dev, 1);
hal_vo_set_intf_bt_uv_order(dev, 1);
break;
case XMEDIA_INTF_BT601_BT656_DATA_SEQ_UYVY:
hal_vo_set_intf_bt_yc_order(dev, 0);
hal_vo_set_intf_bt_uv_order(dev, 0);
break;
case XMEDIA_INTF_BT601_BT656_DATA_SEQ_VYUY:
hal_vo_set_intf_bt_yc_order(dev, 0);
hal_vo_set_intf_bt_uv_order(dev, 1);
break;
default:
break;
}
return;
}
xmedia_void hal_vo_set_bt1120_intf_cfg(xmedia_vo_dev dev, xmedia_vo_bt1120_attr *bt1120_attr)
{
vo_intf_hcds intf_hcds;
vo_intf_clip intf_clip;
hal_vo_set_intf_mux(dev, XMEDIA_INTF_TYPE_BT1120);
hal_vo_set_intf_dither_enable(dev, XMEDIA_FALSE);
intf_hcds.hcds_en = XMEDIA_TRUE;
intf_hcds.hcds_mode = 0;
intf_hcds.hcds_coef_0 = 127;
intf_hcds.hcds_coef_1 = 1;
intf_hcds.hcds_coef_2 = 32;
intf_hcds.hcds_coef_3 = 96;
hal_vo_set_intf_hcds(dev, &intf_hcds);
intf_clip.clip_en = XMEDIA_TRUE;
intf_clip.clip_l = 0x101010;
intf_clip.clip_h = 0xEBF0F0;
hal_vo_set_intf_clip(dev, &intf_clip);
hal_vo_set_intf_bt_yc_order(dev, 0);
switch(bt1120_attr->data_seq){
case XMEDIA_INTF_BT1120_DATA_SEQ_VUVU:
hal_vo_set_intf_bt_uv_order(dev, 1);
break;
case XMEDIA_INTF_BT1120_DATA_SEQ_UVUV:
hal_vo_set_intf_bt_uv_order(dev, 0);
break;
default:
break;
}
return;
}
xmedia_void hal_vo_set_lcd_intf_cfg(xmedia_vo_dev dev, xmedia_vo_lcd_attr *lcd_attr)
{
xmedia_u8 data_seq = 0;
hal_vo_set_intf_mux(dev, XMEDIA_INTF_TYPE_LCD);
switch(lcd_attr->data_mode){
case XMEDIA_VO_LCD_DATA_MODE_SERIAL:
if (lcd_attr->data_type == XMEDIA_INTF_LCD_DATA_TYPE_RGB666_18BIT) {
hal_vo_set_intf_lcd_mode(dev, 0);
} else {
hal_vo_set_intf_lcd_mode(dev, 1);
}
break;
case XMEDIA_VO_LCD_DATA_MODE_PARA:
if (lcd_attr->data_type == XMEDIA_INTF_LCD_DATA_TYPE_RGB565_16BIT) {
hal_vo_set_intf_lcd_mode(dev, 2);
} else if (lcd_attr->data_type == XMEDIA_INTF_LCD_DATA_TYPE_RGB666_18BIT) {
hal_vo_set_intf_lcd_mode(dev, 3);
} else {
hal_vo_set_intf_lcd_mode(dev, 4);
}
break;
default:
break;
}
/*
*逻辑和实际lcd的颜色是不一致的
* PLCD:
* LCD_RGB = LOGIC_BGR LCD_RBG = LOGIC_GBR LCD_BGR = LOGIC_RGB
* LCD_GRB = LOGIC_BRG LCD_GBR = LOGIC_GRB LCD_BRG = LOGIC_RBG
* SLCD:
* LCD_RGB = LOGIC_RGB LCD_RBG = LOGIC_RBG LCD_BGR = LOGIC_BGR
* LCD_GRB = LOGIC_GRB LCD_GBR = LOGIC_BRG LCD_BRG = LOGIC_GBR
*/
switch(lcd_attr->data_seq){
case XMEDIA_INTF_LCD_DATA_SEQ_RGB:
data_seq = lcd_attr->data_mode == XMEDIA_VO_LCD_DATA_MODE_PARA ? 5 : 0;
break;
case XMEDIA_INTF_LCD_DATA_SEQ_RBG:
data_seq = lcd_attr->data_mode == XMEDIA_VO_LCD_DATA_MODE_PARA ? 3 : 1;
break;
case XMEDIA_INTF_LCD_DATA_SEQ_GRB:
data_seq = lcd_attr->data_mode == XMEDIA_VO_LCD_DATA_MODE_PARA ? 4 : 2;
break;
case XMEDIA_INTF_LCD_DATA_SEQ_GBR:
data_seq = lcd_attr->data_mode == XMEDIA_VO_LCD_DATA_MODE_PARA ? 2 : 4;
break;
case XMEDIA_INTF_LCD_DATA_SEQ_BRG:
data_seq = lcd_attr->data_mode == XMEDIA_VO_LCD_DATA_MODE_PARA ? 1 : 3;
break;
case XMEDIA_INTF_LCD_DATA_SEQ_BGR:
data_seq = lcd_attr->data_mode == XMEDIA_VO_LCD_DATA_MODE_PARA ? 0 : 5;
break;
default:
break;
}
hal_vo_set_intf_lcd_rgb_order(dev, data_seq, data_seq);
hal_vo_set_intf_dither_enable(dev, XMEDIA_TRUE);
hal_vo_set_intf_dither_thd(dev, 255, 0);
return;
}
static xmedia_void vo_data_type_to_hal_type(xmedia_intf_mcu_data_type data_type, xmedia_u32 *hal_data_type,
xmedia_u32 *hal_wr_mode)
{
switch (data_type) {
case XMEDIA_VO_MCU_DATA_TYPE_8BIT_16BPP_RGB565_8080I:
*hal_data_type = data_type;
*hal_wr_mode = 1;
break;
case XMEDIA_VO_MCU_DATA_TYPE_8BIT_18BPP_RGB666_8080I:
*hal_data_type = data_type;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_8BIT_16BPP_RGB565_8080II:
*hal_data_type = data_type;
*hal_wr_mode = 1;
break;
case XMEDIA_VO_MCU_DATA_TYPE_8BIT_18BPP_RGB666_8080II:
*hal_data_type = data_type;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_9BIT_16BPP_RGB565_8080I:
*hal_data_type = data_type;
*hal_wr_mode = 1;
break;
case XMEDIA_VO_MCU_DATA_TYPE_9BIT_18BPP_RGB666_8080I_OPTION1:
*hal_data_type = data_type;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_9BIT_18BPP_RGB666_8080I_OPTION2:
*hal_data_type = data_type;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_9BIT_16BPP_RGB565_8080II:
*hal_data_type = data_type;
*hal_wr_mode = 1;
break;
case XMEDIA_VO_MCU_DATA_TYPE_9BIT_18BPP_RGB666_8080II_OPTION1:
*hal_data_type = data_type;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_9BIT_18BPP_RGB666_8080II_OPTION2:
*hal_data_type = data_type;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_16BPP_RGB565_8080I:
*hal_data_type = data_type;
*hal_wr_mode = 1;
break;
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080I_OPTION1:
*hal_data_type = data_type;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080I_OPTION2:
*hal_data_type = data_type;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080I_OPTION3:
*hal_data_type = data_type;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080I_OPTION4:
*hal_data_type = data_type;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080I_OPTION5:
*hal_data_type = data_type;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_16BPP_RGB565_8080II:
*hal_data_type = data_type;
*hal_wr_mode = 1;
break;
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080II_OPTION1:
*hal_data_type = data_type;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080II_OPTION2:
*hal_data_type = data_type;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080II_OPTION3:
*hal_data_type = data_type;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080II_OPTION4:
*hal_data_type = data_type;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_18BIT_16BPP_RGB565_8080I:
*hal_data_type = data_type;
*hal_wr_mode = 1;
break;
case XMEDIA_VO_MCU_DATA_TYPE_18BIT_18BPP_RGB666_8080I:
*hal_data_type = data_type;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_18BIT_16BPP_RGB565_8080II:
*hal_data_type = data_type;
*hal_wr_mode = 1;
break;
case XMEDIA_VO_MCU_DATA_TYPE_18BIT_18BPP_RGB666_8080II:
*hal_data_type = data_type;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_3LINE_RGB565_OPTION1:
*hal_data_type = 26;
*hal_wr_mode = 1;
break;
case XMEDIA_VO_MCU_DATA_TYPE_3LINE_RGB666_OPTION1:
*hal_data_type = 27;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_3LINE_RGB565_OPTION2:
*hal_data_type = 29;
*hal_wr_mode = 1;
break;
case XMEDIA_VO_MCU_DATA_TYPE_3LINE_RGB666_OPTION2:
*hal_data_type = 30;
*hal_wr_mode = 2;
break;
case XMEDIA_VO_MCU_DATA_TYPE_4LINE_RGB565:
*hal_data_type = 32;
*hal_wr_mode = 1;
break;
case XMEDIA_VO_MCU_DATA_TYPE_4LINE_RGB666:
*hal_data_type = 33;
*hal_wr_mode = 2;
break;
default:
*hal_data_type = 0;
*hal_wr_mode = 2;
break;
}
return;
}
// MCU 屏写参数
static xmedia_s32 vo_mcu_write_cmd(xmedia_u8 lut_mcu[], xmedia_u32 para_size)
{
// 查询等待
while((hal_reg_vout_get_mcu_wr_cmd_state(g_p_vout_reg) != 0) ||
(hal_reg_vout_get_mcu_rd_cmd_state(g_p_vout_reg) == 1) ||
(hal_reg_vout_get_mcu_rd_pixel_state(g_p_vout_reg) == 1));
// 配置屏命令类型 写参数
hal_reg_vout_set_cfg_mcu_cmd_mode(g_p_vout_reg, 0x1);
// 参数个数 减一配置
hal_reg_vout_set_cfg_mcu_wrcmd_size(g_p_vout_reg, para_size - 1);
// 配置写参数寄存器
osal_memcpy((xmedia_void*)&(g_p_vout_reg->vout_mcu_screen_wr_para), lut_mcu, para_size * 4);
// 等待参数全部写入参数RAM中
while(hal_reg_vout_get_mcu_wr_cmd_state(g_p_vout_reg) != 1) ;
// 使能参数更新到MCU屏
hal_reg_vout_set_cfg_mcu_wrcmd_start(g_p_vout_reg, XMEDIA_TRUE);
while(hal_reg_vout_get_mcu_wr_cmd_state(g_p_vout_reg) != 0);
return 0;
}
static xmedia_s32 vo_dts_array_to_cmd_package(xmedia_u8 *cmd_buf, xmedia_u32 *cmd_index)
{
xmedia_s32 index = *cmd_index;
xmedia_u8 *cmd_buf_tmp = cmd_buf;
xmedia_u32 one_cmd_len = 0;
xmedia_u32 one_cmd_len_4byte_align = 0;
xmedia_u32 cmd_buf_fill_size = 0;
xmedia_u32 i = 0;
if (*cmd_index >= g_vo_dts_lcd_config[VO_DTS_LCD_TYPE_MCU].size) {
VO_TRACE(MODULE_DBG_DEBUG, "convert end *cmd_index %d\n", *cmd_index);
return cmd_buf_fill_size;
}
while(1) {
one_cmd_len = g_vo_dts_lcd_config[VO_DTS_LCD_TYPE_MCU].array[index];
//碰到延时指令 直接跳出 进入下次循环的延时处理
if (one_cmd_len == 0) {
VO_TRACE(MODULE_DBG_DEBUG, "need delay %d ms break!!!\n", g_vo_dts_lcd_config[VO_DTS_LCD_TYPE_MCU].array[index + 1]);
break;
}
//命令长度对4取整
one_cmd_len_4byte_align = ((one_cmd_len / 4) + ((one_cmd_len % 4) ? 1 : 0)) * 4;
//超出单次传送命令包长度
if((cmd_buf_fill_size + one_cmd_len_4byte_align) >= MCU_CMD_PACKAGE_MAX_SIZE) {
*cmd_index = index;
break;
}
//单个命令起始位置
index++;
osal_memcpy(cmd_buf_tmp, (g_vo_dts_lcd_config[VO_DTS_LCD_TYPE_MCU].array + index), one_cmd_len);
//索引按实际命令累加
index += one_cmd_len;
//按4byte对齐累加
cmd_buf_tmp += one_cmd_len_4byte_align;
cmd_buf_fill_size += one_cmd_len_4byte_align;
*cmd_index = index;
if (index == g_vo_dts_lcd_config[VO_DTS_LCD_TYPE_MCU].size) {
VO_TRACE(MODULE_DBG_DEBUG, "read end success\n");
break;
} else if (index > g_vo_dts_lcd_config[VO_DTS_LCD_TYPE_MCU].size) {
VO_TRACE(MODULE_DBG_ERR, "size error please check!!!\n");
break;
} else {
}
}
for (i = 0;i < (cmd_buf_fill_size / 4); i++) {
VO_TRACE(MODULE_DBG_DEBUG, "0x%02x 0x%02x 0x%02x 0x%02x \n", cmd_buf[i*4], cmd_buf[i*4 + 1],cmd_buf[i*4 + 2],cmd_buf[i*4 + 3]);
}
return cmd_buf_fill_size;
}
static xmedia_s32 vo_dts_do_delay(xmedia_u8 *cmd_buf, xmedia_u32 *cmd_index)
{
xmedia_s32 index = *cmd_index;
xmedia_u8 *cmd_buf_tmp = cmd_buf;
xmedia_u32 one_cmd_len = 0;
if (*cmd_index >= g_vo_dts_lcd_config[VO_DTS_LCD_TYPE_MCU].size) {
VO_TRACE(MODULE_DBG_DEBUG, "convert end *cmd_index %d\n", *cmd_index);
return XMEDIA_FALSE;
}
one_cmd_len = g_vo_dts_lcd_config[VO_DTS_LCD_TYPE_MCU].array[index];
if (one_cmd_len == 0) {
VO_TRACE(MODULE_DBG_DEBUG, "need delay %d ms!!!\n", g_vo_dts_lcd_config[VO_DTS_LCD_TYPE_MCU].array[index + 1]);
cmd_buf_tmp[0] = 0;
cmd_buf_tmp[1] = g_vo_dts_lcd_config[VO_DTS_LCD_TYPE_MCU].array[index + 1];
index +=2;
*cmd_index = index;
return XMEDIA_TRUE;
} else {
return XMEDIA_FALSE;
}
}
//mcu屏参初始化 todo ????
xmedia_void hal_vo_set_mcu_intf_cfg(xmedia_vo_dev dev, xmedia_vo_mcu_attr *mcu_attr)
{
vo_intf_hcds intf_hcds;
xmedia_u32 hal_data_type;
xmedia_u32 hal_wr_mode;
xmedia_u8 *cmd_buf;
xmedia_s32 cmd_buf_fill_size = 0;
xmedia_u32 cmd_index = 0;
xmedia_s32 ret = XMEDIA_FALSE;
hal_vo_set_intf_mux(dev, XMEDIA_INTF_TYPE_MCU);
vo_data_type_to_hal_type(mcu_attr->data_type, &hal_data_type, &hal_wr_mode);
hal_reg_vout_set_cfg_mcu_mode(g_p_vout_reg, hal_data_type);
//mcu屏软复位
hal_reg_vout_set_cfg_mcu_rst_ctrl(g_p_vout_reg, XMEDIA_TRUE);
osal_udelay(1*1000);
hal_reg_vout_set_cfg_mcu_rst_ctrl(g_p_vout_reg, XMEDIA_FALSE);
osal_udelay(10*1000);
hal_reg_vout_set_cfg_mcu_rst_ctrl(g_p_vout_reg, XMEDIA_TRUE);
osal_udelay(120*1000);
cmd_buf = (xmedia_u8 *)osal_vmalloc(MCU_CMD_PACKAGE_MAX_SIZE);
while(1) {
osal_memset(cmd_buf, 0, MCU_CMD_PACKAGE_MAX_SIZE);
//处理屏参中穿插的延时指令 可能有连续延时指令 所以while循环处理
while(1) {
ret = vo_dts_do_delay(cmd_buf, &cmd_index);
if (ret == XMEDIA_TRUE) {
VO_TRACE(MODULE_DBG_DEBUG, "do delay %d ms!!!\n", cmd_buf[1]);
osal_udelay(cmd_buf[1] * 1000);
cmd_buf[1] = 0;
} else {
VO_TRACE(MODULE_DBG_DEBUG, "do delay success!!!\n");
break;
}
}
//传屏参
cmd_buf_fill_size = vo_dts_array_to_cmd_package(cmd_buf, &cmd_index);
if (cmd_buf_fill_size > 0) {
vo_mcu_write_cmd(cmd_buf, (cmd_buf_fill_size / 4));
} else {
VO_TRACE(MODULE_DBG_DEBUG, "set mcu param end!!!\n");
break;
}
}
osal_vfree(cmd_buf);
osal_udelay(10*1000);
//565 666
hal_reg_vout_set_cfg_mcu_wr_fmt(g_p_vout_reg, hal_wr_mode);
//rgb888 下采样
hal_vo_set_intf_dither_enable(dev, XMEDIA_TRUE);
hal_vo_set_intf_dither_thd(dev, 255, 0);
// 使用TE帧同步
hal_reg_vout_set_cfg_mcu_sync_type(g_p_vout_reg, mcu_attr->te_mode_en);
// Write memory start
hal_reg_vout_set_cfg_mcu_wrram_cmd(g_p_vout_reg, 0x2c);
// Write memory continue
hal_reg_vout_set_cfg_mcu_wrramc_cmd(g_p_vout_reg, 0x3c);
intf_hcds.hcds_en = XMEDIA_TRUE;
intf_hcds.hcds_mode = 0;
intf_hcds.hcds_coef_0 = 127;
intf_hcds.hcds_coef_1 = 1;
intf_hcds.hcds_coef_2 = 32;
intf_hcds.hcds_coef_3 = 96;
hal_vo_set_intf_hcds(dev, &intf_hcds);
hal_reg_vout_set_cfg_mcu_wrram_en(g_p_vout_reg, 0x1); // 当前帧写display data到屏幕frame ram命令使能
return;
}
source/bootloader/product/driver/vo/hal/xmorca/intf/hal_vo_intf.h
+124
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef __HAL_VO_INTF_H__
#define __HAL_VO_INTF_H__
#include "hal_vo_csc.h"
#include "hal_vo_clock.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum{
VO_INTF_HS_MODE_RF = 0, //vsyn对应的上升沿和下降沿都有效
VO_INTF_HS_MODE_RF_NONE, //vsyn对应的上升沿和下降沿都无效
VO_INTF_HS_MODE_FALLING,
VO_INTF_HS_MODE_RISING,
VO_INTF_HS_MODE_MAX,
}vo_intf_hs_mode;
typedef struct{
xmedia_bool hcds_en;
xmedia_bool hcds_mode;
xmedia_u8 hcds_coef_0;
xmedia_u8 hcds_coef_1;
xmedia_u8 hcds_coef_2;
xmedia_u8 hcds_coef_3;
}vo_intf_hcds;
typedef struct{
xmedia_bool clip_en;
xmedia_u32 clip_l;
xmedia_u32 clip_h;
}vo_intf_clip;
typedef struct{
xmedia_u16 top_start;
xmedia_u16 top_end;
xmedia_u16 bottom_start;
xmedia_u16 bottom_end;
}vo_intf_bt_sync;
typedef struct {
xmedia_bool ink_en;
xmedia_bool cross_en;
xmedia_bool color_reverse;
xmedia_u32 color;
xmedia_u32 x;
xmedia_u32 y;
} vo_csc_ink_info;
typedef struct {
vo_clock_priority_sel vo_clock_priority_sel; //debug 接口 1：lcd分频器优先，0：固定频点优先
xmedia_bool vo_special_timing_sel; //true表示使用固定分频，需要配置特殊时序,否则使用默认时序
xmedia_u32 fixed_clk_htotal;
xmedia_u32 fixed_clk_hbb;
xmedia_u32 fixed_clk_hfb;
xmedia_u32 vs_st_v_filed;
xmedia_u32 vs_end_v_filed;
} vo_intf_special_timing;
typedef enum{
VO_DTS_LCD_TYPE_MIPI = 0,
VO_DTS_LCD_TYPE_MCU,
VO_DTS_LCD_TYPE_MAX,
}vo_dts_lcd_type;
typedef struct {
xmedia_s32 size;
xmedia_u8 *array;
} vo_dts_lcd_config;
xmedia_void hal_vo_set_intf_fifo(xmedia_vo_dev dev, xmedia_u32 fifo);
xmedia_void hal_vo_set_intf_enable(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_get_intf_enable(xmedia_vo_dev dev, xmedia_bool *enable);
xmedia_void hal_vo_set_intf_chk_sum_enable(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_set_intf_hs_mode(xmedia_vo_dev dev, vo_intf_hs_mode hs_mode);
xmedia_void hal_vo_set_intf_mux(xmedia_vo_dev dev, xmedia_intf_type intf);
xmedia_void hal_vo_set_intf_regup(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_set_intf_cnt_pos(xmedia_vo_dev dev);
xmedia_void hal_vo_set_intf_timing(xmedia_vo_dev dev, xmedia_u32 frame_rate,
xmedia_vo_intf_config *intf_config, xmedia_vo_user_sync_timing *sync_timing, vo_intf_special_timing *special_timing);
xmedia_void hal_vo_set_intf_sync_inverse(xmedia_vo_dev dev);
xmedia_void hal_vo_set_intf_vtt_sel(xmedia_vo_dev dev, xmedia_u32 vtt_id, xmedia_bool cnt_mode);
xmedia_void hal_vo_set_intf_vtt_mode(xmedia_vo_dev dev, xmedia_u32 vtt_id, xmedia_bool frame_mode);
xmedia_void hal_vo_set_intf_vtt_thd(xmedia_vo_dev dev, xmedia_u32 vtt_id, xmedia_u32 vtt_thd);
xmedia_void hal_vo_get_intf_state(xmedia_vo_dev dev, xmedia_bool *btm, xmedia_u16 *vcnt, xmedia_u8 *vstate);
xmedia_void hal_vo_get_intf_checksum_value(xmedia_vo_dev dev, xmedia_u32 *y, xmedia_u32 *u, xmedia_u32 *v);
xmedia_void hal_vo_set_intf_bt_mode(xmedia_vo_dev dev, xmedia_bool value);
xmedia_void hal_vo_set_intf_bt_yc_order(xmedia_vo_dev dev, xmedia_bool value);
xmedia_void hal_vo_set_intf_bt_uv_order(xmedia_vo_dev dev, xmedia_bool value);
xmedia_void hal_vo_set_intf_bt_vbit_mode(xmedia_vo_dev dev, xmedia_bool sync_mode);
xmedia_void hal_vo_set_intf_bt_bit_inverse(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_set_intf_bt_user_sync(xmedia_vo_dev dev, vo_intf_bt_sync *sync);
xmedia_void hal_vo_set_intf_lcd_mode(xmedia_vo_dev dev, xmedia_bool value);
xmedia_void hal_vo_set_intf_lcd_rgb_order(xmedia_vo_dev dev, xmedia_u8 order0, xmedia_u8 order1);
xmedia_void hal_vo_set_intf_lcd_bit_inverse(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_set_intf_mute_enable(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_get_intf_mute_enable(xmedia_vo_dev dev, xmedia_bool *enable);
xmedia_void hal_vo_set_intf_mute_pattern_mode(xmedia_vo_dev dev, xmedia_u8 value);
xmedia_void hal_vo_set_intf_mute_data_mode(xmedia_vo_dev dev, xmedia_u8 value);
xmedia_void hal_vo_set_intf_checkbar_size(xmedia_vo_dev dev, xmedia_u8 width, xmedia_u8 height);
xmedia_void hal_vo_set_intf_cbar_sel(xmedia_vo_dev dev, xmedia_u8 value);
xmedia_void hal_vo_set_intf_mute_color(xmedia_vo_dev dev, xmedia_u32 white_color, xmedia_u32 black_color);
xmedia_void hal_vo_set_intf_ink(xmedia_vo_dev dev, vo_csc_ink_info *ink_info);
xmedia_void hal_vo_set_intf_clip(xmedia_vo_dev dev, vo_intf_clip *intf_clip);
xmedia_void hal_vo_set_intf_csc_en(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_get_intf_csc_en(xmedia_vo_dev dev, xmedia_bool *enable);
xmedia_void hal_vo_set_intf_csc(xmedia_vo_dev dev, vo_csc_coef *intf_csc);
xmedia_void hal_vo_set_intf_hcds(xmedia_vo_dev dev, vo_intf_hcds *intf_hcds);
xmedia_void hal_vo_set_intf_dither_enable(xmedia_vo_dev dev, xmedia_bool enable);
xmedia_void hal_vo_set_intf_dither_thd(xmedia_vo_dev dev, xmedia_u8 thd_h, xmedia_u8 thd_l);
xmedia_void hal_vo_set_bt656_intf_cfg(xmedia_vo_dev dev, xmedia_vo_bt656_attr *bt656_attr);
xmedia_void hal_vo_set_bt1120_intf_cfg(xmedia_vo_dev dev, xmedia_vo_bt1120_attr *bt1120_attr);
xmedia_void hal_vo_set_lcd_intf_cfg(xmedia_vo_dev dev, xmedia_vo_lcd_attr *lcd_attr);
xmedia_void hal_vo_set_mcu_intf_cfg(xmedia_vo_dev dev, xmedia_vo_mcu_attr *mcu_attr);
#ifdef __cplusplus
}
#endif
#endif
source/bootloader/product/driver/vo/include/xmedia_vo.h
Executable
+373
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
#ifndef __XMEDIA_VO_H__
#define __XMEDIA_VO_H__
#include "drv_sys_comm.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif
#define VO_GAMMA_MAP_SIZE 256
typedef xmedia_s32 xmedia_vo_chn;
typedef enum {
XMEDIA_VO_DEV_0 = 0,
XMEDIA_VO_DEV_1,
XMEDIA_VO_DEV_VIRT_0,
XMEDIA_VO_DEV_VIRT_1,
XMEDIA_VO_DEV_MAX
}xmedia_vo_dev;
typedef enum {
XMEDIA_VO_LAYER_V0 = 0,
XMEDIA_VO_LAYER_V1,
XMEDIA_VO_LAYER_VIRT_V0,
XMEDIA_VO_LAYER_VIRT_V1,
XMEDIA_VO_LAYER_MAX
}xmedia_vo_layer;
//定义输出接口时序
typedef enum {
XMEDIA_VO_INTF_SYNC_PAL = 0,
XMEDIA_VO_INTF_SYNC_NTSC,
XMEDIA_VO_INTF_SYNC_1080P24,
XMEDIA_VO_INTF_SYNC_1080P25,
XMEDIA_VO_INTF_SYNC_1080P30,
XMEDIA_VO_INTF_SYNC_720P50,
XMEDIA_VO_INTF_SYNC_720P60,
XMEDIA_VO_INTF_SYNC_1080I50,
XMEDIA_VO_INTF_SYNC_1080I60,
XMEDIA_VO_INTF_SYNC_1080P50,
XMEDIA_VO_INTF_SYNC_1080P60,
XMEDIA_VO_INTF_SYNC_576P50 = 11,
XMEDIA_VO_INTF_SYNC_480P60,
XMEDIA_VO_INTF_SYNC_800x600_60 = 13,
XMEDIA_VO_INTF_SYNC_1024x768_60,
XMEDIA_VO_INTF_SYNC_1280x1024_60,
XMEDIA_VO_INTF_SYNC_1366x768_60,
XMEDIA_VO_INTF_SYNC_1440x900_60,
XMEDIA_VO_INTF_SYNC_1280x800_60,
XMEDIA_VO_INTF_SYNC_1600x1200_60,
XMEDIA_VO_INTF_SYNC_1680x1050_60,
XMEDIA_VO_INTF_SYNC_1920x1200_60,
XMEDIA_VO_INTF_SYNC_640x480_60,
XMEDIA_VO_INTF_SYNC_960H_PAL,
XMEDIA_VO_INTF_SYNC_960H_NTSC,
XMEDIA_VO_INTF_SYNC_1920x2160_30,
XMEDIA_VO_INTF_SYNC_2560x1440_30,
XMEDIA_VO_INTF_SYNC_2560x1440_60,
XMEDIA_VO_INTF_SYNC_2560x1600_60,
XMEDIA_VO_INTF_SYNC_3840x2160_24 = 29,
XMEDIA_VO_INTF_SYNC_3840x2160_25,
XMEDIA_VO_INTF_SYNC_3840x2160_30,
XMEDIA_VO_INTF_SYNC_3840x2160_50,
XMEDIA_VO_INTF_SYNC_3840x2160_60,
XMEDIA_VO_INTF_SYNC_4096x2160_24,
XMEDIA_VO_INTF_SYNC_4096x2160_25,
XMEDIA_VO_INTF_SYNC_4096x2160_30,
XMEDIA_VO_INTF_SYNC_4096x2160_50,
XMEDIA_VO_INTF_SYNC_4096x2160_60,
XMEDIA_VO_INTF_SYNC_320x240_60 = 39,
XMEDIA_VO_INTF_SYNC_320x240_50,
XMEDIA_VO_INTF_SYNC_240x320_50,
XMEDIA_VO_INTF_SYNC_240x320_60,
XMEDIA_VO_INTF_SYNC_800x600_50,
XMEDIA_VO_INTF_SYNC_800x480_50,
XMEDIA_VO_INTF_SYNC_720x1280_60,
XMEDIA_VO_INTF_SYNC_1080x1920_60,
XMEDIA_VO_INTF_SYNC_7680x4320_30,
XMEDIA_VO_INTF_SYNC_USER = 48,
XMEDIA_VO_INTF_SYNC_MAX
}xmedia_vo_intf_sync;
//定义设备模式
typedef enum{
XMEDIA_VO_DEV_MODE_VIDEO_GRAPHIC = 0,
XMEDIA_VO_DEV_MODE_VIDEO,
XMEDIA_VO_DEV_MODE_GRAPHIC,
XMEDIA_VO_DEV_MODE_MAX
}xmedia_vo_dev_mode;
//定义lcd的数据传输模式
typedef enum {
XMEDIA_VO_LCD_DATA_MODE_SERIAL = 0,
XMEDIA_VO_LCD_DATA_MODE_PARA,
XMEDIA_VO_LCD_DATA_MODE_MAX
} xmedia_vo_lcd_data_mode;
//定义视频分割模式
typedef enum {
XMEDIA_VO_PARTITION_MODE_SINGLE = 0, //单区域模式，用软件将多张图片进行拼接显示在硬件的一个区域上
XMEDIA_VO_PARTITION_MODE_MULTI, //多区域模式，每个区域对应硬件的一个区域
XMEDIA_VO_PARTITION_MODE_MAX,
}xmedia_vo_partition_mode;
//定义局部放大类型
typedef enum {
XMEDIA_VO_ZOOM_IN_RECT = 0,
XMEDIA_VO_ZOOM_IN_RATIO,
XMEDIA_VO_ZOOM_IN_MAX
} xmedia_vo_zoom_in_type;
//定义视频低延时模式
typedef enum {
XMEDIA_VO_LOW_DELAY_NONE = 0, //普通模式
XMEDIA_VO_LOW_DELAY_NORMAL, //软件低延时
XMEDIA_VO_LOW_DELAY_MAX
} xmedia_vo_low_delay_mode;
//定义用户同步时序
typedef struct {
xmedia_u16 vact; //垂直有效区
xmedia_u16 vbb; //垂直消隐后肩
xmedia_u16 vfb; //垂直消隐前肩
xmedia_u16 hact; //水平有效区
xmedia_u16 hbb; //水平消隐后肩
xmedia_u16 hfb; //水平消隐前肩
xmedia_u16 hmid; //底场同步水平有效区域
xmedia_u16 bvact; //底场垂直有效区
xmedia_u16 bvbb; //底场垂直消隐后肩
xmedia_u16 bvfb; //底场垂直消隐前肩
xmedia_u16 hpw; //水平脉冲宽度
xmedia_u16 vpw; //垂直脉冲宽度
xmedia_bool idv; //数据有效信号的极性
xmedia_bool ihs; //水平有效信号的极性
xmedia_bool ivs; //垂直有效信号的极性
xmedia_bool synm; //同步模式
xmedia_bool iop; //隔行或者逐行显示(0表示隔行，1表示逐行)
xmedia_u8 intfb; //隔行输出的位宽
} xmedia_vo_user_sync_timing;
//定义用户同步信息
typedef struct {
xmedia_vo_user_sync_timing timing_info; //输出接口的时序信息
xmedia_u32 frame_rate; //用户同步输出帧率
xmedia_bool clk_reverse_en; //时钟是否翻转
} xmedia_vo_user_sync_config;
//定义BT656的属性
typedef struct {
xmedia_intf_bt_data_type data_type;
xmedia_intf_bt601_bt656_data_seq data_seq;
} xmedia_vo_bt656_attr;
//定义BT1120的属性
typedef struct {
xmedia_intf_bt_data_type data_type;
xmedia_intf_bt1120_data_seq data_seq;
} xmedia_vo_bt1120_attr;
//定义LCD的属性
typedef struct {
xmedia_intf_lcd_data_type data_type;
xmedia_vo_lcd_data_mode data_mode;
xmedia_intf_lcd_data_seq data_seq;
} xmedia_vo_lcd_attr;
typedef enum {
XMEDIA_VO_MIPI_LANE_DATA0 = 0,
XMEDIA_VO_MIPI_LANE_DATA1,
XMEDIA_VO_MIPI_LANE_CLK,
XMEDIA_VO_MIPI_LANE_DATA2,
XMEDIA_VO_MIPI_LANE_DATA3,
XMEDIA_VO_MIPI_LANE_MAX
}xmedia_vo_mipi_lane;
typedef enum {
XMEDIA_VO_MIPI_LANE_DEFAULT = 0,
XMEDIA_VO_MIPI_LANE_NUM1,
XMEDIA_VO_MIPI_LANE_NUM2,
XMEDIA_VO_MIPI_LANE_NUM3,
XMEDIA_VO_MIPI_LANE_NUM4,
XMEDIA_VO_MIPI_LANE_NUM_MAX
}xmedia_vo_mipi_lane_num;
//定义MIPI的属性
typedef struct {
xmedia_intf_mipi_dsi_data_type data_type;
xmedia_bool lane_pn_swap[XMEDIA_VO_MIPI_LANE_MAX];
xmedia_vo_mipi_lane lane_sel[XMEDIA_VO_MIPI_LANE_MAX];
xmedia_s32 mipi_htotal_adjust;
xmedia_s32 mipi_vsync_adjust;
xmedia_vo_mipi_lane_num mipi_lane_num;
} xmedia_vo_mipi_attr;
typedef enum {
XMEDIA_VO_LVDS_LANE_DATA0 = 0,
XMEDIA_VO_LVDS_LANE_DATA1,
XMEDIA_VO_LVDS_LANE_DATA2,
XMEDIA_VO_LVDS_LANE_DATA3,
XMEDIA_VO_LVDS_LANE_CLK,
XMEDIA_VO_LVDS_LANE_MAX
}xmedia_vo_lvds_lane;
//定义LVDS的属性
typedef struct {
xmedia_intf_lvds_data_type data_type;
xmedia_intf_lvds_format format;
xmedia_vo_lvds_lane lane_sel[XMEDIA_VO_LVDS_LANE_MAX];
xmedia_bool lane_pn_swap[XMEDIA_VO_LVDS_LANE_MAX];
} xmedia_vo_lvds_attr;
//定义mcu的数据传输模式
typedef enum {
XMEDIA_VO_MCU_DATA_TYPE_8BIT_16BPP_RGB565_8080I = 0,
XMEDIA_VO_MCU_DATA_TYPE_8BIT_18BPP_RGB666_8080I,
XMEDIA_VO_MCU_DATA_TYPE_8BIT_16BPP_RGB565_8080II,
XMEDIA_VO_MCU_DATA_TYPE_8BIT_18BPP_RGB666_8080II,
XMEDIA_VO_MCU_DATA_TYPE_9BIT_16BPP_RGB565_8080I,
XMEDIA_VO_MCU_DATA_TYPE_9BIT_18BPP_RGB666_8080I_OPTION1,
XMEDIA_VO_MCU_DATA_TYPE_9BIT_18BPP_RGB666_8080I_OPTION2,
XMEDIA_VO_MCU_DATA_TYPE_9BIT_16BPP_RGB565_8080II,
XMEDIA_VO_MCU_DATA_TYPE_9BIT_18BPP_RGB666_8080II_OPTION1,
XMEDIA_VO_MCU_DATA_TYPE_9BIT_18BPP_RGB666_8080II_OPTION2,
XMEDIA_VO_MCU_DATA_TYPE_16BIT_16BPP_RGB565_8080I,
XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080I_OPTION1,
XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080I_OPTION2,
XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080I_OPTION3,
XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080I_OPTION4,
XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080I_OPTION5,
XMEDIA_VO_MCU_DATA_TYPE_16BIT_16BPP_RGB565_8080II,
XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080II_OPTION1,
XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080II_OPTION2,
XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080II_OPTION3,
XMEDIA_VO_MCU_DATA_TYPE_16BIT_18BPP_RGB666_8080II_OPTION4,
XMEDIA_VO_MCU_DATA_TYPE_18BIT_16BPP_RGB565_8080I,
XMEDIA_VO_MCU_DATA_TYPE_18BIT_18BPP_RGB666_8080I,
XMEDIA_VO_MCU_DATA_TYPE_18BIT_16BPP_RGB565_8080II,
XMEDIA_VO_MCU_DATA_TYPE_18BIT_18BPP_RGB666_8080II,
XMEDIA_VO_MCU_DATA_TYPE_3LINE_RGB565_OPTION1,
XMEDIA_VO_MCU_DATA_TYPE_3LINE_RGB666_OPTION1,
XMEDIA_VO_MCU_DATA_TYPE_3LINE_RGB565_OPTION2,
XMEDIA_VO_MCU_DATA_TYPE_3LINE_RGB666_OPTION2,
XMEDIA_VO_MCU_DATA_TYPE_4LINE_RGB565,
XMEDIA_VO_MCU_DATA_TYPE_4LINE_RGB666,
XMEDIA_VO_MCU_DATA_TYPE_MAX
} xmedia_intf_mcu_data_type;
//定义MCU的属性
typedef struct {
xmedia_bool te_mode_en;
xmedia_intf_mcu_data_type data_type;
} xmedia_vo_mcu_attr;
//定义输出接口信息
typedef struct {
xmedia_intf_type intf_type;
union {
xmedia_vo_bt656_attr bt656_attr;
xmedia_vo_bt1120_attr bt1120_attr;
xmedia_vo_lcd_attr lcd_attr;
xmedia_vo_mipi_attr mipi_attr;
xmedia_vo_lvds_attr lvds_attr;
xmedia_vo_mcu_attr mcu_attr;
};
} xmedia_vo_intf_config;
//定义设备属性
typedef struct {
xmedia_u32 bg_color; //设备的背景色，RGB格式
xmedia_vo_intf_config intf_config; //输出接口属性
xmedia_vo_intf_sync intf_sync; //输出接口的时序
xmedia_vo_user_sync_config user_sync_config; //用户同步属性
} xmedia_vo_dev_config;
//定义设备的csc属性
typedef struct {
xmedia_vo_dev_mode mode; //设备模式
xmedia_video_color_descript color_info; //颜色信息，包含输出色域空间，色域范围和量化范围
xmedia_u32 luma; //亮度范围为[0, 100]，默认50
xmedia_u32 contrast; //对比度度范围为[0, 100]，默认50
xmedia_u32 hue; //色度范围为[0, 100]，默认50
xmedia_u32 saturation; //饱和度范围为[0, 100]，默认50
} xmedia_vo_dev_csc;
typedef struct {
xmedia_u8 gamma_table[VO_GAMMA_MAP_SIZE];
} xmedia_vo_gamma_table;
//定义设备的gamma属性
typedef struct {
xmedia_bool gamma_en; //gamma使能状态
xmedia_vo_gamma_table gamma_table; //gamma表
} xmedia_vo_dev_gamma;
//定义视频层输出属性
typedef struct {
xmedia_video_size img_size; //视频层的画布尺寸
xmedia_video_pixel_format pix_format; //视频层的像素格式
xmedia_video_data_width bit_width;; //视频层数据位宽
xmedia_u32 disp_buf_len; //显示buf的长度
xmedia_vo_partition_mode part_mode; //视频层的分割模式
} xmedia_vo_layer_config;
//定义通道属性
typedef struct {
xmedia_u32 zorder; //通道顺序
xmedia_video_rect out_rect; //输出通道的分辨率和位置
xmedia_u32 bg_color; //输出通道区域背景色
xmedia_video_rect region_rect;//输出通道的区域分辨率和位置
} xmedia_vo_chn_attr;
//定义通道局部放大属性
typedef struct {
xmedia_u32 x_ratio; //范围为[0，1000]; x_ratio = x * 1000 / W, x是局部放大的起始位置，W是通道帧的宽度
xmedia_u32 y_ratio; //范围为[0，1000]; y_ratio = y * 1000 / H, y是局部放大的起始位置，H是通道帧的高度
xmedia_u32 w_ratio; //范围为[0，1000]; w_ratio = x * 1000 / W, w是局部放大的宽度，W是通道帧的宽度
xmedia_u32 h_ratio; //范围为[0，1000]; h_ratio = h * 1000 / H, h是局部放大的高度，H是通道帧的高度
} xmedia_vo_zoom_ratio;
typedef struct {
xmedia_vo_zoom_in_type zoom_type; //选择局部放大类型
union {
xmedia_video_rect zoom_rect; //按窗口局部放大
xmedia_vo_zoom_ratio zoom_ratio; //按比例局部放大
};
} xmedia_vo_zoom_attr;
//定义边框属性
typedef struct{
xmedia_u32 width;
xmedia_u32 color;
}xmedia_vo_border;
typedef struct {
xmedia_bool border_en;
xmedia_vo_border border;
} xmedia_vo_border_attr;
//定义镜像属性
typedef struct {
xmedia_bool mirror_en;
xmedia_bool flip_en;
} xmedia_vo_mirror_attr;
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif
#endif