GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)

This commit is contained in:
lai
2026-09-06 03:52:57 +08:00
commit b1928b41c0
21813 changed files with 4413081 additions and 0 deletions
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# SPDX-License-Identifier: GPL-2.0+
obj-y += boot-device.o
obj-$(CONFIG_ARCH_UNIPHIER_LD4) += boot-device-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += boot-device-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += boot-device-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += boot-device-pro5.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += boot-device-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += boot-device-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += boot-device-ld11.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += boot-device-ld11.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS3) += boot-device-pxs3.o
@@ -0,0 +1,60 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2016-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
#include <common.h>
#include <spl.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include "boot-device.h"
const struct uniphier_boot_device uniphier_ld11_boot_device_table[] = {
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI Addr 5)"},
{BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training Off)"},
{BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training On)"},
{BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training Off)"},
{BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training On)"},
{BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training Off)"},
{BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training On)"},
{BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training Off)"},
{BOOT_DEVICE_NOR, "NOR (XECS1)"},
};
const unsigned uniphier_ld11_boot_device_count =
ARRAY_SIZE(uniphier_ld11_boot_device_table);
int uniphier_ld11_boot_device_is_usb(u32 pinmon)
{
return !!(~pinmon & 0x00000080);
}
int uniphier_ld20_boot_device_is_usb(u32 pinmon)
{
return !!(~pinmon & 0x00000780);
}
@@ -0,0 +1,51 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2014 Panasonic Corporation
* Copyright (C) 2015-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
#include <common.h>
#include <spl.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include "boot-device.h"
const struct uniphier_boot_device uniphier_ld4_boot_device_table[] = {
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, EraseSize 1MB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, EraseSize 1MB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 24, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 24, ONFI, Addr 5)"},
{BOOT_DEVICE_MMC1, "eMMC (3.3V)"},
{BOOT_DEVICE_MMC1, "eMMC (1.8V)"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NOR, "NOR (XECS0)"},
};
const unsigned uniphier_ld4_boot_device_count =
ARRAY_SIZE(uniphier_ld4_boot_device_table);
@@ -0,0 +1,50 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
#include <common.h>
#include <spl.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include "boot-device.h"
const struct uniphier_boot_device uniphier_pro5_boot_device_table[] = {
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128MB, Addr 4)"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512MB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_MMC1, "eMMC (1.8V)"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128MB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
};
const unsigned uniphier_pro5_boot_device_count =
ARRAY_SIZE(uniphier_pro5_boot_device_table);
@@ -0,0 +1,63 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
#include <common.h>
#include <spl.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include "boot-device.h"
const struct uniphier_boot_device uniphier_pxs2_boot_device_table[] = {
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"},
{BOOT_DEVICE_MMC1, "eMMC (1.8V)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 4)"},
{BOOT_DEVICE_SPI, "SPI (3Byte CS0)"},
{BOOT_DEVICE_SPI, "SPI (4Byte CS0)"},
{BOOT_DEVICE_SPI, "SPI (3Byte CS1)"},
{BOOT_DEVICE_SPI, "SPI (4Byte CS1)"},
{BOOT_DEVICE_SPI, "SPI (4Byte CS0)"},
{BOOT_DEVICE_SPI, "SPI (3Byte CS0)"},
{BOOT_DEVICE_NONE, "Reserved"},
};
const unsigned uniphier_pxs2_boot_device_count =
ARRAY_SIZE(uniphier_pxs2_boot_device_table);
int uniphier_pxs2_boot_device_is_usb(u32 pinmon)
{
return !!(pinmon & 0x00000040);
}
unsigned int uniphier_pxs2_boot_device_fixup(unsigned int mode)
{
if (mode == BOOT_DEVICE_USB)
return BOOT_DEVICE_NOR;
return mode;
}
@@ -0,0 +1,40 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
#include <common.h>
#include <spl.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include "../sg-regs.h"
#include "boot-device.h"
const struct uniphier_boot_device uniphier_pxs3_boot_device_table[] = {
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
{BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training Off)"},
{BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training On)"},
{BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training Off)"},
{BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training On)"},
{BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training Off)"},
{BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training On)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5, BBM Last Page)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5, BBM Last Page)"},
};
const unsigned uniphier_pxs3_boot_device_count =
ARRAY_SIZE(uniphier_pxs3_boot_device_table);
int uniphier_pxs3_boot_device_is_usb(u32 pinmon)
{
return !!(readl(sg_base + SG_PINMON2) & BIT(31));
}
@@ -0,0 +1,258 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
#include <common.h>
#include <spl.h>
#include <stdio.h>
#include <linux/io.h>
#include <linux/log2.h>
#include "../init.h"
#include "../sbc/sbc-regs.h"
#include "../sg-regs.h"
#include "../soc-info.h"
#include "boot-device.h"
struct uniphier_boot_device_info {
unsigned int soc_id;
unsigned int boot_device_sel_shift;
const struct uniphier_boot_device *boot_device_table;
const unsigned int *boot_device_count;
int (*boot_device_is_sd)(u32 pinmon);
int (*boot_device_is_usb)(u32 pinmon);
unsigned int (*boot_device_fixup)(unsigned int mode);
int (*boot_is_swapped)(void);
bool have_internal_stm;
};
static const struct uniphier_boot_device_info uniphier_boot_device_info[] = {
#if defined(CONFIG_ARCH_UNIPHIER_LD4)
{
.soc_id = UNIPHIER_LD4_ID,
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_ld4_boot_device_table,
.boot_device_count = &uniphier_ld4_boot_device_count,
.boot_is_swapped = uniphier_sbc_boot_is_swapped,
.have_internal_stm = true,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
{
.soc_id = UNIPHIER_PRO4_ID,
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_ld4_boot_device_table,
.boot_device_count = &uniphier_ld4_boot_device_count,
.boot_is_swapped = uniphier_sbc_boot_is_swapped,
.have_internal_stm = false,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
{
.soc_id = UNIPHIER_SLD8_ID,
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_ld4_boot_device_table,
.boot_device_count = &uniphier_ld4_boot_device_count,
.boot_is_swapped = uniphier_sbc_boot_is_swapped,
.have_internal_stm = true,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
{
.soc_id = UNIPHIER_PRO5_ID,
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_pro5_boot_device_table,
.boot_device_count = &uniphier_pro5_boot_device_count,
.boot_is_swapped = uniphier_sbc_boot_is_swapped,
.have_internal_stm = false,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
{
.soc_id = UNIPHIER_PXS2_ID,
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_pxs2_boot_device_table,
.boot_device_count = &uniphier_pxs2_boot_device_count,
.boot_device_is_usb = uniphier_pxs2_boot_device_is_usb,
.boot_device_fixup = uniphier_pxs2_boot_device_fixup,
.boot_is_swapped = uniphier_sbc_boot_is_swapped,
.have_internal_stm = false,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
{
.soc_id = UNIPHIER_LD6B_ID,
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_pxs2_boot_device_table,
.boot_device_count = &uniphier_pxs2_boot_device_count,
.boot_device_is_usb = uniphier_pxs2_boot_device_is_usb,
.boot_device_fixup = uniphier_pxs2_boot_device_fixup,
.boot_is_swapped = uniphier_sbc_boot_is_swapped,
.have_internal_stm = true, /* STM on A-chip */
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD11)
{
.soc_id = UNIPHIER_LD11_ID,
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_ld11_boot_device_table,
.boot_device_count = &uniphier_ld11_boot_device_count,
.boot_device_is_usb = uniphier_ld11_boot_device_is_usb,
.boot_is_swapped = uniphier_sbc_boot_is_swapped,
.have_internal_stm = true,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD20)
{
.soc_id = UNIPHIER_LD20_ID,
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_ld11_boot_device_table,
.boot_device_count = &uniphier_ld11_boot_device_count,
.boot_device_is_usb = uniphier_ld20_boot_device_is_usb,
.boot_is_swapped = uniphier_sbc_boot_is_swapped,
.have_internal_stm = true,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PXS3)
{
.soc_id = UNIPHIER_PXS3_ID,
.boot_device_sel_shift = 1,
.boot_device_table = uniphier_pxs3_boot_device_table,
.boot_device_count = &uniphier_pxs3_boot_device_count,
.boot_device_is_usb = uniphier_pxs3_boot_device_is_usb,
.boot_is_swapped = uniphier_sbc_boot_is_swapped,
.have_internal_stm = false,
},
#endif
};
UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_boot_device_info,
uniphier_boot_device_info)
static unsigned int __uniphier_boot_device_raw(
const struct uniphier_boot_device_info *info)
{
u32 pinmon;
unsigned int boot_sel;
if (info->boot_is_swapped && info->boot_is_swapped())
return BOOT_DEVICE_NOR;
pinmon = readl(sg_base + SG_PINMON0);
if (info->boot_device_is_sd && info->boot_device_is_sd(pinmon))
return BOOT_DEVICE_MMC2;
if (info->boot_device_is_usb && info->boot_device_is_usb(pinmon))
return BOOT_DEVICE_USB;
boot_sel = pinmon >> info->boot_device_sel_shift;
BUG_ON(!is_power_of_2(*info->boot_device_count));
boot_sel &= *info->boot_device_count - 1;
return info->boot_device_table[boot_sel].boot_device;
}
unsigned int uniphier_boot_device_raw(void)
{
const struct uniphier_boot_device_info *info;
info = uniphier_get_boot_device_info();
if (!info) {
pr_err("unsupported SoC\n");
return BOOT_DEVICE_NONE;
}
return __uniphier_boot_device_raw(info);
}
u32 spl_boot_device(void)
{
const struct uniphier_boot_device_info *info;
u32 raw_mode;
info = uniphier_get_boot_device_info();
if (!info) {
pr_err("unsupported SoC\n");
return BOOT_DEVICE_NONE;
}
raw_mode = __uniphier_boot_device_raw(info);
return info->boot_device_fixup ?
info->boot_device_fixup(raw_mode) : raw_mode;
}
int uniphier_have_internal_stm(void)
{
const struct uniphier_boot_device_info *info;
info = uniphier_get_boot_device_info();
if (!info) {
pr_err("unsupported SoC\n");
return -ENOTSUPP;
}
return info->have_internal_stm;
}
int uniphier_boot_from_backend(void)
{
return !!(readl(sg_base + SG_PINMON0) & BIT(27));
}
#ifndef CONFIG_SPL_BUILD
static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
const struct uniphier_boot_device_info *info;
u32 pinmon;
unsigned int boot_device_count, boot_sel;
int i;
info = uniphier_get_boot_device_info();
if (!info) {
pr_err("unsupported SoC\n");
return CMD_RET_FAILURE;
}
if (uniphier_have_internal_stm())
printf("STB Micon: %s\n",
uniphier_boot_from_backend() ? "OFF" : "ON");
if (info->boot_is_swapped)
printf("Boot Swap: %s\n",
info->boot_is_swapped() ? "ON" : "OFF");
pinmon = readl(sg_base + SG_PINMON0);
if (info->boot_device_is_sd)
printf("SD Boot: %s\n",
info->boot_device_is_sd(pinmon) ? "ON" : "OFF");
if (info->boot_device_is_usb)
printf("USB Boot: %s\n",
info->boot_device_is_usb(pinmon) ? "ON" : "OFF");
boot_device_count = *info->boot_device_count;
boot_sel = pinmon >> info->boot_device_sel_shift;
boot_sel &= boot_device_count - 1;
printf("\nBoot Mode Sel:\n");
for (i = 0; i < boot_device_count; i++)
printf(" %c %02x %s\n", i == boot_sel ? '*' : ' ', i,
info->boot_device_table[i].desc);
return CMD_RET_SUCCESS;
}
U_BOOT_CMD(
pinmon, 1, 1, do_pinmon,
"pin monitor",
""
);
#endif /* !CONFIG_SPL_BUILD */
@@ -0,0 +1,34 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
#ifndef _UNIPHIER_BOOT_DEVICE_H_
#define _UNIPHIER_BOOT_DEVICE_H_
struct uniphier_boot_device {
unsigned int boot_device;
const char *desc;
};
extern const struct uniphier_boot_device uniphier_ld4_boot_device_table[];
extern const struct uniphier_boot_device uniphier_pro5_boot_device_table[];
extern const struct uniphier_boot_device uniphier_pxs2_boot_device_table[];
extern const struct uniphier_boot_device uniphier_ld11_boot_device_table[];
extern const struct uniphier_boot_device uniphier_pxs3_boot_device_table[];
extern const unsigned int uniphier_ld4_boot_device_count;
extern const unsigned int uniphier_pro5_boot_device_count;
extern const unsigned int uniphier_pxs2_boot_device_count;
extern const unsigned int uniphier_ld11_boot_device_count;
extern const unsigned int uniphier_pxs3_boot_device_count;
int uniphier_pxs2_boot_device_is_usb(u32 pinmon);
int uniphier_ld11_boot_device_is_usb(u32 pinmon);
int uniphier_ld20_boot_device_is_usb(u32 pinmon);
int uniphier_pxs3_boot_device_is_usb(u32 pinmon);
unsigned int uniphier_pxs2_boot_device_fixup(unsigned int mode);
#endif /* _UNIPHIER_BOOT_DEVICE_H_ */