GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)
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# SPDX-License-Identifier: GPL-2.0+
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ifdef CONFIG_SPL_BUILD
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obj-$(CONFIG_ARCH_UNIPHIER_LD4) += debug-uart-ld4.o
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obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += debug-uart-pro4.o
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obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += debug-uart-sld8.o
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obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += debug-uart-pro5.o
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obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += debug-uart-pxs2.o
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obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += debug-uart-ld6b.o
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endif
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obj-y += debug-uart.o
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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#include <config.h>
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#include <linux/kernel.h>
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#include "../sg-regs.h"
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#include "debug-uart.h"
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#define UNIPHIER_LD4_UART_CLK 36864000
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unsigned int uniphier_ld4_debug_uart_init(void)
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{
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sg_set_iectrl(0);
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sg_set_pinsel(88, 1, 8, 4); /* HSDOUT6 -> TXD0 */
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return DIV_ROUND_CLOSEST(UNIPHIER_LD4_UART_CLK, 16 * CONFIG_BAUDRATE);
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}
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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#include <config.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include "../sc-regs.h"
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#include "../sg-regs.h"
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#include "debug-uart.h"
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#define UNIPHIER_LD6B_UART_CLK 88888888
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unsigned int uniphier_ld6b_debug_uart_init(void)
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{
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u32 tmp;
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sg_set_iectrl(0);
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sg_set_pinsel(135, 3, 8, 4); /* PORT10 -> TXD0 */
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sg_set_pinsel(115, 0, 8, 4); /* TXD1 -> TXD1 */
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sg_set_pinsel(113, 2, 8, 4); /* SBO0 -> TXD2 */
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tmp = readl(sc_base + SC_CLKCTRL);
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tmp |= SC_CLKCTRL_CEN_PERI;
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writel(tmp, sc_base + SC_CLKCTRL);
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return DIV_ROUND_CLOSEST(UNIPHIER_LD6B_UART_CLK, 16 * CONFIG_BAUDRATE);
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}
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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#include <config.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include "../sc-regs.h"
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#include "../sg-regs.h"
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#include "debug-uart.h"
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#define UNIPHIER_PRO4_UART_CLK 73728000
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unsigned int uniphier_pro4_debug_uart_init(void)
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{
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u32 tmp;
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sg_set_iectrl(0);
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sg_set_pinsel(128, 0, 4, 8); /* TXD0 -> TXD0 */
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writel(1, sg_base + SG_LOADPINCTRL);
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tmp = readl(sc_base + SC_CLKCTRL);
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tmp |= SC_CLKCTRL_CEN_PERI;
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writel(tmp, sc_base + SC_CLKCTRL);
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return DIV_ROUND_CLOSEST(UNIPHIER_PRO4_UART_CLK, 16 * CONFIG_BAUDRATE);
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}
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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#include <config.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include "../sc-regs.h"
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#include "../sg-regs.h"
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#include "debug-uart.h"
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#define UNIPHIER_PRO5_UART_CLK 73728000
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unsigned int uniphier_pro5_debug_uart_init(void)
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{
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u32 tmp;
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sg_set_iectrl(0);
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sg_set_pinsel(47, 0, 4, 8); /* TXD0 -> TXD0 */
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sg_set_pinsel(49, 0, 4, 8); /* TXD1 -> TXD1 */
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sg_set_pinsel(51, 0, 4, 8); /* TXD2 -> TXD2 */
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sg_set_pinsel(53, 0, 4, 8); /* TXD3 -> TXD3 */
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writel(1, sg_base + SG_LOADPINCTRL);
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tmp = readl(sc_base + SC_CLKCTRL);
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tmp |= SC_CLKCTRL_CEN_PERI;
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writel(tmp, sc_base + SC_CLKCTRL);
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return DIV_ROUND_CLOSEST(UNIPHIER_PRO5_UART_CLK, 16 * CONFIG_BAUDRATE);
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}
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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#include <config.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include "../sc-regs.h"
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#include "../sg-regs.h"
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#include "debug-uart.h"
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#define UNIPHIER_PXS2_UART_CLK 88888888
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unsigned int uniphier_pxs2_debug_uart_init(void)
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{
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u32 tmp;
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sg_set_iectrl(0);
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sg_set_pinsel(217, 8, 8, 4); /* TXD0 -> TXD0 */
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sg_set_pinsel(115, 8, 8, 4); /* TXD1 -> TXD1 */
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sg_set_pinsel(113, 8, 8, 4); /* TXD2 -> TXD2 */
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sg_set_pinsel(219, 8, 8, 4); /* TXD3 -> TXD3 */
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tmp = readl(sc_base + SC_CLKCTRL);
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tmp |= SC_CLKCTRL_CEN_PERI;
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writel(tmp, sc_base + SC_CLKCTRL);
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return DIV_ROUND_CLOSEST(UNIPHIER_PXS2_UART_CLK, 16 * CONFIG_BAUDRATE);
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}
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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#include <config.h>
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#include <linux/kernel.h>
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#include "../sg-regs.h"
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#include "debug-uart.h"
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#define UNIPHIER_SLD8_UART_CLK 80000000
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unsigned int uniphier_sld8_debug_uart_init(void)
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{
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sg_set_iectrl(0);
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sg_set_pinsel(70, 3, 8, 4); /* HSDOUT6 -> TXD0 */
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return DIV_ROUND_CLOSEST(UNIPHIER_SLD8_UART_CLK, 16 * CONFIG_BAUDRATE);
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}
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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#include <common.h>
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#include <debug_uart.h>
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#include <linux/io.h>
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#include <linux/serial_reg.h>
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#include "../sg-regs.h"
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#include "../soc-info.h"
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#include "debug-uart.h"
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#define UNIPHIER_UART_TX 0x00
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#define UNIPHIER_UART_LCR_MCR 0x10
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#define UNIPHIER_UART_LSR 0x14
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#define UNIPHIER_UART_LDR 0x24
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static void _debug_uart_putc(int c)
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{
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void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
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while (!(readl(base + UNIPHIER_UART_LSR) & UART_LSR_THRE))
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;
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writel(c, base + UNIPHIER_UART_TX);
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}
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#ifdef CONFIG_SPL_BUILD
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void sg_set_pinsel(unsigned int pin, unsigned int muxval,
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unsigned int mux_bits, unsigned int reg_stride)
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{
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unsigned int shift = pin * mux_bits % 32;
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void __iomem *reg = sg_base + SG_PINCTRL_BASE +
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pin * mux_bits / 32 * reg_stride;
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u32 mask = (1U << mux_bits) - 1;
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u32 tmp;
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tmp = readl(reg);
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tmp &= ~(mask << shift);
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tmp |= (mask & muxval) << shift;
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writel(tmp, reg);
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}
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void sg_set_iectrl(unsigned int pin)
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{
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unsigned int bit = pin % 32;
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void __iomem *reg = sg_base + SG_IECTRL + pin / 32 * 4;
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u32 tmp;
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tmp = readl(reg);
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tmp |= 1 << bit;
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writel(tmp, reg);
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}
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#endif
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void _debug_uart_init(void)
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{
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#ifdef CONFIG_SPL_BUILD
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void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
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unsigned int divisor;
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switch (uniphier_get_soc_id()) {
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#if defined(CONFIG_ARCH_UNIPHIER_LD4)
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case UNIPHIER_LD4_ID:
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divisor = uniphier_ld4_debug_uart_init();
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break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
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case UNIPHIER_PRO4_ID:
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divisor = uniphier_pro4_debug_uart_init();
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break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
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case UNIPHIER_SLD8_ID:
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divisor = uniphier_sld8_debug_uart_init();
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break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
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case UNIPHIER_PRO5_ID:
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divisor = uniphier_pro5_debug_uart_init();
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break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
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case UNIPHIER_PXS2_ID:
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divisor = uniphier_pxs2_debug_uart_init();
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break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
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case UNIPHIER_LD6B_ID:
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divisor = uniphier_ld6b_debug_uart_init();
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break;
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#endif
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default:
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return;
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}
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writel(UART_LCR_WLEN8 << 8, base + UNIPHIER_UART_LCR_MCR);
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writel(divisor, base + UNIPHIER_UART_LDR);
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#endif
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}
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DEBUG_UART_FUNCS
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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#ifndef _MACH_DEBUG_UART_H
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#define _MACH_DEBUG_UART_H
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unsigned int uniphier_ld4_debug_uart_init(void);
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unsigned int uniphier_pro4_debug_uart_init(void);
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unsigned int uniphier_sld8_debug_uart_init(void);
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unsigned int uniphier_pro5_debug_uart_init(void);
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unsigned int uniphier_pxs2_debug_uart_init(void);
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unsigned int uniphier_ld6b_debug_uart_init(void);
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void sg_set_pinsel(unsigned int pin, unsigned int muxval,
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unsigned int mux_bits, unsigned int reg_stride);
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void sg_set_iectrl(unsigned int pin);
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#endif /* _MACH_DEBUG_UART_H */
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