GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)

This commit is contained in:
lai
2026-09-06 03:52:57 +08:00
commit b1928b41c0
21813 changed files with 4413081 additions and 0 deletions
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# SPDX-License-Identifier: GPL-2.0+
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_ARCH_UNIPHIER_LD4) += debug-uart-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += debug-uart-pro4.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += debug-uart-sld8.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += debug-uart-pro5.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += debug-uart-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += debug-uart-ld6b.o
endif
obj-y += debug-uart.o
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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*/
#include <config.h>
#include <linux/kernel.h>
#include "../sg-regs.h"
#include "debug-uart.h"
#define UNIPHIER_LD4_UART_CLK 36864000
unsigned int uniphier_ld4_debug_uart_init(void)
{
sg_set_iectrl(0);
sg_set_pinsel(88, 1, 8, 4); /* HSDOUT6 -> TXD0 */
return DIV_ROUND_CLOSEST(UNIPHIER_LD4_UART_CLK, 16 * CONFIG_BAUDRATE);
}
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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*/
#include <config.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include "../sc-regs.h"
#include "../sg-regs.h"
#include "debug-uart.h"
#define UNIPHIER_LD6B_UART_CLK 88888888
unsigned int uniphier_ld6b_debug_uart_init(void)
{
u32 tmp;
sg_set_iectrl(0);
sg_set_pinsel(135, 3, 8, 4); /* PORT10 -> TXD0 */
sg_set_pinsel(115, 0, 8, 4); /* TXD1 -> TXD1 */
sg_set_pinsel(113, 2, 8, 4); /* SBO0 -> TXD2 */
tmp = readl(sc_base + SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_PERI;
writel(tmp, sc_base + SC_CLKCTRL);
return DIV_ROUND_CLOSEST(UNIPHIER_LD6B_UART_CLK, 16 * CONFIG_BAUDRATE);
}
@@ -0,0 +1,30 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*/
#include <config.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include "../sc-regs.h"
#include "../sg-regs.h"
#include "debug-uart.h"
#define UNIPHIER_PRO4_UART_CLK 73728000
unsigned int uniphier_pro4_debug_uart_init(void)
{
u32 tmp;
sg_set_iectrl(0);
sg_set_pinsel(128, 0, 4, 8); /* TXD0 -> TXD0 */
writel(1, sg_base + SG_LOADPINCTRL);
tmp = readl(sc_base + SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_PERI;
writel(tmp, sc_base + SC_CLKCTRL);
return DIV_ROUND_CLOSEST(UNIPHIER_PRO4_UART_CLK, 16 * CONFIG_BAUDRATE);
}
@@ -0,0 +1,33 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*/
#include <config.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include "../sc-regs.h"
#include "../sg-regs.h"
#include "debug-uart.h"
#define UNIPHIER_PRO5_UART_CLK 73728000
unsigned int uniphier_pro5_debug_uart_init(void)
{
u32 tmp;
sg_set_iectrl(0);
sg_set_pinsel(47, 0, 4, 8); /* TXD0 -> TXD0 */
sg_set_pinsel(49, 0, 4, 8); /* TXD1 -> TXD1 */
sg_set_pinsel(51, 0, 4, 8); /* TXD2 -> TXD2 */
sg_set_pinsel(53, 0, 4, 8); /* TXD3 -> TXD3 */
writel(1, sg_base + SG_LOADPINCTRL);
tmp = readl(sc_base + SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_PERI;
writel(tmp, sc_base + SC_CLKCTRL);
return DIV_ROUND_CLOSEST(UNIPHIER_PRO5_UART_CLK, 16 * CONFIG_BAUDRATE);
}
@@ -0,0 +1,31 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*/
#include <config.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include "../sc-regs.h"
#include "../sg-regs.h"
#include "debug-uart.h"
#define UNIPHIER_PXS2_UART_CLK 88888888
unsigned int uniphier_pxs2_debug_uart_init(void)
{
u32 tmp;
sg_set_iectrl(0);
sg_set_pinsel(217, 8, 8, 4); /* TXD0 -> TXD0 */
sg_set_pinsel(115, 8, 8, 4); /* TXD1 -> TXD1 */
sg_set_pinsel(113, 8, 8, 4); /* TXD2 -> TXD2 */
sg_set_pinsel(219, 8, 8, 4); /* TXD3 -> TXD3 */
tmp = readl(sc_base + SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_PERI;
writel(tmp, sc_base + SC_CLKCTRL);
return DIV_ROUND_CLOSEST(UNIPHIER_PXS2_UART_CLK, 16 * CONFIG_BAUDRATE);
}
@@ -0,0 +1,20 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*/
#include <config.h>
#include <linux/kernel.h>
#include "../sg-regs.h"
#include "debug-uart.h"
#define UNIPHIER_SLD8_UART_CLK 80000000
unsigned int uniphier_sld8_debug_uart_init(void)
{
sg_set_iectrl(0);
sg_set_pinsel(70, 3, 8, 4); /* HSDOUT6 -> TXD0 */
return DIV_ROUND_CLOSEST(UNIPHIER_SLD8_UART_CLK, 16 * CONFIG_BAUDRATE);
}
@@ -0,0 +1,104 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*/
#include <common.h>
#include <debug_uart.h>
#include <linux/io.h>
#include <linux/serial_reg.h>
#include "../sg-regs.h"
#include "../soc-info.h"
#include "debug-uart.h"
#define UNIPHIER_UART_TX 0x00
#define UNIPHIER_UART_LCR_MCR 0x10
#define UNIPHIER_UART_LSR 0x14
#define UNIPHIER_UART_LDR 0x24
static void _debug_uart_putc(int c)
{
void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
while (!(readl(base + UNIPHIER_UART_LSR) & UART_LSR_THRE))
;
writel(c, base + UNIPHIER_UART_TX);
}
#ifdef CONFIG_SPL_BUILD
void sg_set_pinsel(unsigned int pin, unsigned int muxval,
unsigned int mux_bits, unsigned int reg_stride)
{
unsigned int shift = pin * mux_bits % 32;
void __iomem *reg = sg_base + SG_PINCTRL_BASE +
pin * mux_bits / 32 * reg_stride;
u32 mask = (1U << mux_bits) - 1;
u32 tmp;
tmp = readl(reg);
tmp &= ~(mask << shift);
tmp |= (mask & muxval) << shift;
writel(tmp, reg);
}
void sg_set_iectrl(unsigned int pin)
{
unsigned int bit = pin % 32;
void __iomem *reg = sg_base + SG_IECTRL + pin / 32 * 4;
u32 tmp;
tmp = readl(reg);
tmp |= 1 << bit;
writel(tmp, reg);
}
#endif
void _debug_uart_init(void)
{
#ifdef CONFIG_SPL_BUILD
void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
unsigned int divisor;
switch (uniphier_get_soc_id()) {
#if defined(CONFIG_ARCH_UNIPHIER_LD4)
case UNIPHIER_LD4_ID:
divisor = uniphier_ld4_debug_uart_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
case UNIPHIER_PRO4_ID:
divisor = uniphier_pro4_debug_uart_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
case UNIPHIER_SLD8_ID:
divisor = uniphier_sld8_debug_uart_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
case UNIPHIER_PRO5_ID:
divisor = uniphier_pro5_debug_uart_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
case UNIPHIER_PXS2_ID:
divisor = uniphier_pxs2_debug_uart_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
case UNIPHIER_LD6B_ID:
divisor = uniphier_ld6b_debug_uart_init();
break;
#endif
default:
return;
}
writel(UART_LCR_WLEN8 << 8, base + UNIPHIER_UART_LCR_MCR);
writel(divisor, base + UNIPHIER_UART_LDR);
#endif
}
DEBUG_UART_FUNCS
@@ -0,0 +1,20 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*/
#ifndef _MACH_DEBUG_UART_H
#define _MACH_DEBUG_UART_H
unsigned int uniphier_ld4_debug_uart_init(void);
unsigned int uniphier_pro4_debug_uart_init(void);
unsigned int uniphier_sld8_debug_uart_init(void);
unsigned int uniphier_pro5_debug_uart_init(void);
unsigned int uniphier_pxs2_debug_uart_init(void);
unsigned int uniphier_ld6b_debug_uart_init(void);
void sg_set_pinsel(unsigned int pin, unsigned int muxval,
unsigned int mux_bits, unsigned int reg_stride);
void sg_set_iectrl(unsigned int pin);
#endif /* _MACH_DEBUG_UART_H */