GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)
This commit is contained in:
@@ -0,0 +1,9 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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# (C) Copyright 2000-2004
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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# ccflags-y += -DET_DEBUG
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extra-y = start.o
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obj-y = cpu.o speed.o cpu_init.o interrupts.o
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@@ -0,0 +1,113 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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*
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* (C) Copyright 2000-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*/
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#include <common.h>
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#include <vsprintf.h>
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#include <watchdog.h>
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#include <command.h>
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#include <netdev.h>
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#include <asm/immap.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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ccm_t *ccm = (ccm_t *) MMAP_CCM;
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out_8(&ccm->rcr, CCM_RCR_SOFTRST);
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/* we don't return! */
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return 0;
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}
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#if defined(CONFIG_DISPLAY_CPUINFO)
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int print_cpuinfo(void)
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{
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ccm_t *ccm = (ccm_t *) MMAP_CCM;
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u16 msk;
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u16 id = 0;
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u8 ver;
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puts("CPU: ");
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msk = (in_be16(&ccm->cir) >> 6);
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ver = (in_be16(&ccm->cir) & 0x003f);
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switch (msk) {
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case 0x31:
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id = 5235;
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break;
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}
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if (id) {
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char buf1[32], buf2[32];
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printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
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ver);
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printf(" CPU CLK %s MHz BUS CLK %s MHz\n",
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strmhz(buf1, gd->cpu_clk),
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strmhz(buf2, gd->bus_clk));
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}
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return 0;
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};
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#endif /* CONFIG_DISPLAY_CPUINFO */
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#if defined(CONFIG_WATCHDOG)
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/* Called by macro WATCHDOG_RESET */
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void watchdog_reset(void)
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{
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wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
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/* Count register */
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out_be16(&wdp->sr, 0x5555);
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asm("nop");
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out_be16(&wdp->sr, 0xaaaa);
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}
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int watchdog_disable(void)
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{
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wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
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/* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
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/* halted watchdog timer */
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setbits_be16(&wdp->cr, WTM_WCR_HALTED);
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puts("WATCHDOG:disabled\n");
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return (0);
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}
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int watchdog_init(void)
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{
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wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
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u32 wdog_module = 0;
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/* set timeout and enable watchdog */
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wdog_module = ((CONFIG_SYS_CLK / CONFIG_SYS_HZ) * CONFIG_WATCHDOG_TIMEOUT);
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wdog_module |= (wdog_module / 8192);
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out_be16(&wdp->mr, wdog_module);
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out_be16(&wdp->cr, WTM_WCR_EN);
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puts("WATCHDOG:enabled\n");
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return (0);
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}
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#endif /* CONFIG_WATCHDOG */
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#if defined(CONFIG_MCFFEC)
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/* Default initializations for MCFFEC controllers. To override,
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* create a board-specific function called:
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* int board_eth_init(bd_t *bis)
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*/
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int cpu_eth_init(bd_t *bis)
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{
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return mcffec_initialize(bis);
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}
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#endif
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@@ -0,0 +1,176 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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*
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* (C) Copyright 2000-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2007, 2012 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*/
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#include <common.h>
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#include <cpu_func.h>
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#include <watchdog.h>
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#include <asm/immap.h>
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#include <asm/io.h>
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#if defined(CONFIG_CMD_NET)
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#include <config.h>
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#include <net.h>
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#include <asm/fec.h>
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#endif
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/* The registers in fbcs_t struct can be 16-bit for CONFIG_M5235 or 32-bit wide otherwise. */
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#ifdef CONFIG_M5235
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#define out_be_fbcs_reg out_be16
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#else
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#define out_be_fbcs_reg out_be32
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#endif
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/*
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* Breath some life into the CPU...
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*
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* Set up the memory map,
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* initialize a bunch of registers,
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* initialize the UPM's
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*/
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void cpu_init_f(void)
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{
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gpio_t *gpio = (gpio_t *) MMAP_GPIO;
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fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS;
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wdog_t *wdog = (wdog_t *) MMAP_WDOG;
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scm_t *scm = (scm_t *) MMAP_SCM;
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/* watchdog is enabled by default - disable the watchdog */
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#ifndef CONFIG_WATCHDOG
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out_be16(&wdog->cr, 0);
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#endif
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out_be32(&scm->rambar, CONFIG_SYS_INIT_RAM_ADDR | SCM_RAMBAR_BDE);
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/* Port configuration */
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out_8(&gpio->par_cs, 0);
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#if (defined(CONFIG_SYS_CS0_BASE) && defined(CONFIG_SYS_CS0_MASK) && defined(CONFIG_SYS_CS0_CTRL))
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out_be_fbcs_reg(&fbcs->csar0, CONFIG_SYS_CS0_BASE);
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out_be_fbcs_reg(&fbcs->cscr0, CONFIG_SYS_CS0_CTRL);
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out_be32(&fbcs->csmr0, CONFIG_SYS_CS0_MASK);
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#endif
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#if (defined(CONFIG_SYS_CS1_BASE) && defined(CONFIG_SYS_CS1_MASK) && defined(CONFIG_SYS_CS1_CTRL))
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setbits_8(&gpio->par_cs, GPIO_PAR_CS_CS1);
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out_be_fbcs_reg(&fbcs->csar1, CONFIG_SYS_CS1_BASE);
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out_be_fbcs_reg(&fbcs->cscr1, CONFIG_SYS_CS1_CTRL);
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out_be32(&fbcs->csmr1, CONFIG_SYS_CS1_MASK);
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#endif
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#if (defined(CONFIG_SYS_CS2_BASE) && defined(CONFIG_SYS_CS2_MASK) && defined(CONFIG_SYS_CS2_CTRL))
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setbits_8(&gpio->par_cs, GPIO_PAR_CS_CS2);
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out_be_fbcs_reg(&fbcs->csar2, CONFIG_SYS_CS2_BASE);
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out_be_fbcs_reg(&fbcs->cscr2, CONFIG_SYS_CS2_CTRL);
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out_be32(&fbcs->csmr2, CONFIG_SYS_CS2_MASK);
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#endif
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#if (defined(CONFIG_SYS_CS3_BASE) && defined(CONFIG_SYS_CS3_MASK) && defined(CONFIG_SYS_CS3_CTRL))
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setbits_8(&gpio->par_cs, GPIO_PAR_CS_CS3);
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out_be_fbcs_reg(&fbcs->csar3, CONFIG_SYS_CS3_BASE);
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out_be_fbcs_reg(&fbcs->cscr3, CONFIG_SYS_CS3_CTRL);
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out_be32(&fbcs->csmr3, CONFIG_SYS_CS3_MASK);
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#endif
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#if (defined(CONFIG_SYS_CS4_BASE) && defined(CONFIG_SYS_CS4_MASK) && defined(CONFIG_SYS_CS4_CTRL))
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setbits_8(&gpio->par_cs, GPIO_PAR_CS_CS4);
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out_be_fbcs_reg(&fbcs->csar4, CONFIG_SYS_CS4_BASE);
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out_be_fbcs_reg(&fbcs->cscr4, CONFIG_SYS_CS4_CTRL);
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out_be32(&fbcs->csmr4, CONFIG_SYS_CS4_MASK);
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#endif
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#if (defined(CONFIG_SYS_CS5_BASE) && defined(CONFIG_SYS_CS5_MASK) && defined(CONFIG_SYS_CS5_CTRL))
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setbits_8(&gpio->par_cs, GPIO_PAR_CS_CS5);
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out_be_fbcs_reg(&fbcs->csar5, CONFIG_SYS_CS5_BASE);
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out_be_fbcs_reg(&fbcs->cscr5, CONFIG_SYS_CS5_CTRL);
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out_be32(&fbcs->csmr5, CONFIG_SYS_CS5_MASK);
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#endif
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#if (defined(CONFIG_SYS_CS6_BASE) && defined(CONFIG_SYS_CS6_MASK) && defined(CONFIG_SYS_CS6_CTRL))
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setbits_8(&gpio->par_cs, GPIO_PAR_CS_CS6);
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out_be_fbcs_reg(&fbcs->csar6, CONFIG_SYS_CS6_BASE);
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out_be_fbcs_reg(&fbcs->cscr6, CONFIG_SYS_CS6_CTRL);
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out_be32(&fbcs->csmr6, CONFIG_SYS_CS6_MASK);
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#endif
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#if (defined(CONFIG_SYS_CS7_BASE) && defined(CONFIG_SYS_CS7_MASK) && defined(CONFIG_SYS_CS7_CTRL))
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setbits_8(&gpio->par_cs, GPIO_PAR_CS_CS7);
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out_be_fbcs_reg(&fbcs->csar7, CONFIG_SYS_CS7_BASE);
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out_be_fbcs_reg(&fbcs->cscr7, CONFIG_SYS_CS7_CTRL);
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out_be32(&fbcs->csmr7, CONFIG_SYS_CS7_MASK);
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#endif
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#ifdef CONFIG_SYS_I2C_FSL
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CONFIG_SYS_I2C_PINMUX_REG &= CONFIG_SYS_I2C_PINMUX_CLR;
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CONFIG_SYS_I2C_PINMUX_REG |= CONFIG_SYS_I2C_PINMUX_SET;
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#endif
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icache_enable();
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}
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/*
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* initialize higher level parts of CPU like timers
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*/
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int cpu_init_r(void)
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{
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return (0);
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}
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void uart_port_conf(int port)
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{
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gpio_t *gpio = (gpio_t *) MMAP_GPIO;
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/* Setup Ports: */
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switch (port) {
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case 0:
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clrbits_be16(&gpio->par_uart,
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GPIO_PAR_UART_U0RXD | GPIO_PAR_UART_U0TXD);
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setbits_be16(&gpio->par_uart,
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GPIO_PAR_UART_U0RXD | GPIO_PAR_UART_U0TXD);
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break;
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case 1:
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clrbits_be16(&gpio->par_uart,
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GPIO_PAR_UART_U1RXD_MASK | GPIO_PAR_UART_U1TXD_MASK);
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setbits_be16(&gpio->par_uart,
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GPIO_PAR_UART_U1RXD_U1RXD | GPIO_PAR_UART_U1TXD_U1TXD);
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break;
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case 2:
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#ifdef CONFIG_SYS_UART2_PRI_GPIO
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clrbits_be16(&gpio->par_uart,
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GPIO_PAR_UART_U2RXD | GPIO_PAR_UART_U2TXD);
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setbits_be16(&gpio->par_uart,
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GPIO_PAR_UART_U2RXD | GPIO_PAR_UART_U2TXD);
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#elif defined(CONFIG_SYS_UART2_ALT1_GPIO)
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clrbits_8(&gpio->par_feci2c,
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GPIO_PAR_FECI2C_EMDC_MASK | GPIO_PAR_FECI2C_EMDIO_MASK);
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setbits_8(&gpio->par_feci2c,
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GPIO_PAR_FECI2C_EMDC_U2TXD | GPIO_PAR_FECI2C_EMDIO_U2RXD);
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#endif
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break;
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}
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}
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#if defined(CONFIG_CMD_NET)
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int fecpin_setclear(struct eth_device *dev, int setclear)
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{
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gpio_t *gpio = (gpio_t *) MMAP_GPIO;
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if (setclear) {
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setbits_8(&gpio->par_feci2c,
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GPIO_PAR_FECI2C_EMDC_FECEMDC |
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GPIO_PAR_FECI2C_EMDIO_FECEMDIO);
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} else {
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clrbits_8(&gpio->par_feci2c,
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GPIO_PAR_FECI2C_EMDC_MASK |
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GPIO_PAR_FECI2C_EMDIO_MASK);
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}
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return 0;
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}
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#endif
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@@ -0,0 +1,34 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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*
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* Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*/
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/* CPU specific interrupt routine */
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#include <common.h>
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#include <irq_func.h>
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#include <asm/immap.h>
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#include <asm/io.h>
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int interrupt_init(void)
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{
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int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
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/* Make sure all interrupts are disabled */
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setbits_be32(&intp->imrl0, 0x1);
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enable_interrupts();
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return 0;
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}
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#if defined(CONFIG_MCFTMR)
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void dtimer_intr_setup(void)
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{
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int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
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out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI);
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clrbits_be32(&intp->imrl0, INTC_IPRL_INT0);
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clrbits_be32(&intp->imrl0, CONFIG_SYS_TMRINTR_MASK);
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}
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#endif
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@@ -0,0 +1,38 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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*
|
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* (C) Copyright 2000-2003
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
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* Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
|
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*/
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#include <common.h>
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#include <asm/processor.h>
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#include <asm/immap.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* get_clocks() fills in gd->cpu_clock and gd->bus_clk
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*/
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int get_clocks(void)
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{
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pll_t *pll = (pll_t *)(MMAP_PLL);
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out_be32(&pll->syncr, PLL_SYNCR_MFD(1));
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while (!(in_be32(&pll->synsr) & PLL_SYNSR_LOCK))
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;
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gd->bus_clk = CONFIG_SYS_CLK;
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gd->cpu_clk = (gd->bus_clk * 2);
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#ifdef CONFIG_SYS_I2C_FSL
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gd->arch.i2c1_clk = gd->bus_clk;
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#endif
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return (0);
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}
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@@ -0,0 +1,259 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
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* Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
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*/
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#include <asm-offsets.h>
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#include <config.h>
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#include "version.h"
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#include <asm/cache.h>
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#define _START _start
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#define _FAULT _fault
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#define SAVE_ALL \
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move.w #0x2700,%sr; /* disable intrs */ \
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subl #60,%sp; /* space for 15 regs */ \
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moveml %d0-%d7/%a0-%a6,%sp@;
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#define RESTORE_ALL \
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moveml %sp@,%d0-%d7/%a0-%a6; \
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addl #60,%sp; /* space for 15 regs */ \
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rte;
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.text
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/*
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* Vector table. This is used for initial platform startup.
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* These vectors are to catch any un-intended traps.
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*/
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_vectors:
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INITSP: .long 0x00000000 /* Initial SP */
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INITPC: .long _START /* Initial PC */
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vector02_0F:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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/* Reserved */
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vector10_17:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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vector18_1F:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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/* TRAP #0 - #15 */
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vector20_2F:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
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/* Reserved */
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vector30_3F:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
|
||||
vector64_127:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
|
||||
vector128_191:
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
|
||||
vector192_255:
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
|
||||
.text
|
||||
|
||||
.globl _start
|
||||
_start:
|
||||
nop
|
||||
nop
|
||||
move.w #0x2700,%sr /* Mask off Interrupt */
|
||||
|
||||
/* Set vector base register at the beginning of the Flash */
|
||||
move.l #CONFIG_SYS_FLASH_BASE, %d0
|
||||
movec %d0, %VBR
|
||||
|
||||
move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
|
||||
movec %d0, %RAMBAR1
|
||||
|
||||
/* invalidate and disable cache */
|
||||
move.l #CF_CACR_CINV, %d0 /* Invalidate cache cmd */
|
||||
movec %d0, %CACR /* Invalidate cache */
|
||||
nop
|
||||
move.l #0, %d0
|
||||
movec %d0, %ACR0
|
||||
movec %d0, %ACR1
|
||||
|
||||
/* initialize general use internal ram */
|
||||
move.l #0, %d0
|
||||
move.l #(ICACHE_STATUS), %a1 /* icache */
|
||||
move.l #(DCACHE_STATUS), %a2 /* icache */
|
||||
move.l %d0, (%a1)
|
||||
move.l %d0, (%a2)
|
||||
|
||||
/* put relocation table address to a5 */
|
||||
move.l #__got_start, %a5
|
||||
|
||||
/* setup stack initially on top of internal static ram */
|
||||
move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
|
||||
|
||||
/*
|
||||
* if configured, malloc_f arena will be reserved first,
|
||||
* then (and always) gd struct space will be reserved
|
||||
*/
|
||||
move.l %sp, -(%sp)
|
||||
move.l #board_init_f_alloc_reserve, %a1
|
||||
jsr (%a1)
|
||||
|
||||
/* update stack and frame-pointers */
|
||||
move.l %d0, %sp
|
||||
move.l %sp, %fp
|
||||
|
||||
/* initialize reserved area */
|
||||
move.l %d0, -(%sp)
|
||||
move.l #board_init_f_init_reserve, %a1
|
||||
jsr (%a1)
|
||||
|
||||
/* run low-level CPU init code (from flash) */
|
||||
move.l #cpu_init_f, %a1
|
||||
jsr (%a1)
|
||||
|
||||
/* run low-level board init code (from flash) */
|
||||
clr.l %sp@-
|
||||
move.l #board_init_f, %a1
|
||||
jsr (%a1)
|
||||
|
||||
/* board_init_f() does not return */
|
||||
|
||||
/******************************************************************************/
|
||||
|
||||
/*
|
||||
* void relocate_code (addr_sp, gd, addr_moni)
|
||||
*
|
||||
* This "function" does not return, instead it continues in RAM
|
||||
* after relocating the monitor code.
|
||||
*
|
||||
* r3 = dest
|
||||
* r4 = src
|
||||
* r5 = length in bytes
|
||||
* r6 = cachelinesize
|
||||
*/
|
||||
.globl relocate_code
|
||||
relocate_code:
|
||||
link.w %a6,#0
|
||||
move.l 8(%a6), %sp /* set new stack pointer */
|
||||
|
||||
move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
|
||||
move.l 16(%a6), %a0 /* Save copy of Destination Address */
|
||||
|
||||
move.l #CONFIG_SYS_MONITOR_BASE, %a1
|
||||
move.l #__init_end, %a2
|
||||
move.l %a0, %a3
|
||||
|
||||
/* copy the code to RAM */
|
||||
1:
|
||||
move.l (%a1)+, (%a3)+
|
||||
cmp.l %a1,%a2
|
||||
bgt.s 1b
|
||||
|
||||
/*
|
||||
* We are done. Do not return, instead branch to second part of board
|
||||
* initialization, now running from RAM.
|
||||
*/
|
||||
move.l %a0, %a1
|
||||
add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
|
||||
jmp (%a1)
|
||||
|
||||
in_ram:
|
||||
|
||||
clear_bss:
|
||||
/*
|
||||
* Now clear BSS segment
|
||||
*/
|
||||
move.l %a0, %a1
|
||||
add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
|
||||
move.l %a0, %d1
|
||||
add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
|
||||
6:
|
||||
clr.l (%a1)+
|
||||
cmp.l %a1,%d1
|
||||
bgt.s 6b
|
||||
|
||||
/*
|
||||
* fix got table in RAM
|
||||
*/
|
||||
move.l %a0, %a1
|
||||
add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
|
||||
move.l %a1,%a5 /* * fix got pointer register a5 */
|
||||
|
||||
move.l %a0, %a2
|
||||
add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
|
||||
|
||||
7:
|
||||
move.l (%a1),%d1
|
||||
sub.l #_start,%d1
|
||||
add.l %a0,%d1
|
||||
move.l %d1,(%a1)+
|
||||
cmp.l %a2, %a1
|
||||
bne 7b
|
||||
|
||||
/* calculate relative jump to board_init_r in ram */
|
||||
move.l %a0, %a1
|
||||
add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
|
||||
|
||||
/* set parameters for board_init_r */
|
||||
move.l %a0,-(%sp) /* dest_addr */
|
||||
move.l %d0,-(%sp) /* gd */
|
||||
jsr (%a1)
|
||||
|
||||
/******************************************************************************/
|
||||
|
||||
/* exception code */
|
||||
.globl _fault
|
||||
_fault:
|
||||
bra _fault
|
||||
|
||||
.globl _exc_handler
|
||||
_exc_handler:
|
||||
SAVE_ALL
|
||||
movel %sp,%sp@-
|
||||
bsr exc_handler
|
||||
addql #4,%sp
|
||||
RESTORE_ALL
|
||||
|
||||
.globl _int_handler
|
||||
_int_handler:
|
||||
SAVE_ALL
|
||||
movel %sp,%sp@-
|
||||
bsr int_handler
|
||||
addql #4,%sp
|
||||
RESTORE_ALL
|
||||
|
||||
/******************************************************************************/
|
||||
|
||||
.globl version_string
|
||||
version_string:
|
||||
.ascii U_BOOT_VERSION_STRING, "\0"
|
||||
.align 4
|
||||
Reference in New Issue
Block a user