GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)

source/bootloader/u-boot-2020.01/arch/sandbox/lib/Makefile

@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2011 The Chromium OS Authors.
+#
+# (C) Copyright 2002-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+
+obj-y	+= interrupts.o sections.o
+obj-$(CONFIG_PCI)	+= pci_io.o
+obj-$(CONFIG_CMD_BOOTM) += bootm.o
+obj-$(CONFIG_CMD_BOOTZ) += bootm.o

source/bootloader/u-boot-2020.01/arch/sandbox/lib/bootm.c

@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * Copyright (c) 2015 Sjoerd Simons <sjoerd.simons@collabora.co.uk>
+ */
+
+#include <common.h>
+#include <asm/io.h>
+
+#define	LINUX_ARM_ZIMAGE_MAGIC	0x016f2818
+
+struct arm_z_header {
+	uint32_t	code[9];
+	uint32_t	zi_magic;
+	uint32_t	zi_start;
+	uint32_t	zi_end;
+} __attribute__ ((__packed__));
+
+int bootz_setup(ulong image, ulong *start, ulong *end)
+{
+	uint8_t *zimage = map_sysmem(image, 0);
+	struct arm_z_header *arm_hdr = (struct arm_z_header *)zimage;
+	int ret = 0;
+
+	if (memcmp(zimage + 0x202, "HdrS", 4) == 0) {
+		uint8_t setup_sects = *(zimage + 0x1f1);
+		uint32_t syssize =
+			le32_to_cpu(*(uint32_t *)(zimage + 0x1f4));
+
+		*start = 0;
+		*end = (setup_sects + 1) * 512 + syssize * 16;
+
+		printf("setting up X86 zImage [ %ld - %ld ]\n",
+		       *start, *end);
+	} else if (le32_to_cpu(arm_hdr->zi_magic) == LINUX_ARM_ZIMAGE_MAGIC) {
+		*start = le32_to_cpu(arm_hdr->zi_start);
+		*end = le32_to_cpu(arm_hdr->zi_end);
+
+		printf("setting up ARM zImage [ %ld - %ld ]\n",
+		       *start, *end);
+	} else {
+		printf("Unrecognized zImage\n");
+		ret = 1;
+	}
+
+	unmap_sysmem((void *)image);
+
+	return ret;
+}
+
+int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
+{
+	if (flag & (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)) {
+		bootstage_mark(BOOTSTAGE_ID_RUN_OS);
+		printf("## Transferring control to Linux (at address %08lx)...\n",
+		       images->ep);
+		printf("sandbox: continuing, as we cannot run Linux\n");
+	}
+
+	return 0;
+}

source/bootloader/u-boot-2020.01/arch/sandbox/lib/crt0_sandbox_efi.S

@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * PE/COFF header for EFI applications
+ *
+ * Copyright (c) 2019 Heinrich Schuchardt
+ */
+
+#include <host_arch.h>
+
+#if HOST_ARCH == HOST_ARCH_X86_64
+#include "../../../arch/x86/lib/crt0_x86_64_efi.S"
+#endif
+
+#if HOST_ARCH == HOST_ARCH_X86
+#include "../../../arch/x86/lib/crt0_ia32_efi.S"
+#endif
+
+#if HOST_ARCH == HOST_ARCH_AARCH64
+#include "../../../arch/arm/lib/crt0_aarch64_efi.S"
+#endif
+
+#if HOST_ARCH == HOST_ARCH_ARM
+#include "../../../arch/arm/lib/crt0_arm_efi.S"
+#endif
+
+#if HOST_ARCH == HOST_ARCH_RISCV32
+#include "../../../arch/riscv/lib/crt0_riscv_efi.S"
+#endif
+
+#if HOST_ARCH == HOST_ARCH_RISCV64
+#include "../../../arch/riscv/lib/crt0_riscv_efi.S"
+#endif

source/bootloader/u-boot-2020.01/arch/sandbox/lib/interrupts.c

@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include <common.h>
+#include <irq_func.h>
+
+int interrupt_init(void)
+{
+	return 0;
+}
+
+void enable_interrupts(void)
+{
+	return;
+}
+int disable_interrupts(void)
+{
+	return 0;
+}

source/bootloader/u-boot-2020.01/arch/sandbox/lib/pci_io.c

@@ -0,0 +1,137 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2014 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+/*
+ * IO space access commands.
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+#include <asm/io.h>
+
+int pci_map_physmem(phys_addr_t paddr, unsigned long *lenp,
+		    struct udevice **devp, void **ptrp)
+{
+	struct udevice *dev;
+	int ret;
+
+	*ptrp = 0;
+	for (uclass_first_device(UCLASS_PCI_EMUL, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		struct dm_pci_emul_ops *ops = pci_get_emul_ops(dev);
+
+		if (!ops || !ops->map_physmem)
+			continue;
+		ret = (ops->map_physmem)(dev, paddr, lenp, ptrp);
+		if (ret)
+			continue;
+		*devp = dev;
+		return 0;
+	}
+
+	debug("%s: failed: addr=%pap\n", __func__, &paddr);
+	return -ENOSYS;
+}
+
+int pci_unmap_physmem(const void *vaddr, unsigned long len,
+		      struct udevice *dev)
+{
+	struct dm_pci_emul_ops *ops = pci_get_emul_ops(dev);
+
+	if (!ops || !ops->unmap_physmem)
+		return -ENOSYS;
+	return (ops->unmap_physmem)(dev, vaddr, len);
+}
+
+static int pci_io_read(unsigned int addr, ulong *valuep, pci_size_t size)
+{
+	struct udevice *dev;
+	int ret;
+
+	*valuep = pci_get_ff(size);
+	for (uclass_first_device(UCLASS_PCI_EMUL, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		struct dm_pci_emul_ops *ops = pci_get_emul_ops(dev);
+
+		if (ops && ops->read_io) {
+			ret = (ops->read_io)(dev, addr, valuep, size);
+			if (!ret)
+				return 0;
+		}
+	}
+
+	debug("%s: failed: addr=%x\n", __func__, addr);
+	return -ENOSYS;
+}
+
+static int pci_io_write(unsigned int addr, ulong value, pci_size_t size)
+{
+	struct udevice *dev;
+	int ret;
+
+	for (uclass_first_device(UCLASS_PCI_EMUL, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		struct dm_pci_emul_ops *ops = pci_get_emul_ops(dev);
+
+		if (ops && ops->write_io) {
+			ret = (ops->write_io)(dev, addr, value, size);
+			if (!ret)
+				return 0;
+		}
+	}
+
+	debug("%s: failed: addr=%x, value=%lx\n", __func__, addr, value);
+	return -ENOSYS;
+}
+
+int _inl(unsigned int addr)
+{
+	unsigned long value;
+	int ret;
+
+	ret = pci_io_read(addr, &value, PCI_SIZE_32);
+
+	return ret ? 0 : value;
+}
+
+int _inw(unsigned int addr)
+{
+	unsigned long value;
+	int ret;
+
+	ret = pci_io_read(addr, &value, PCI_SIZE_16);
+
+	return ret ? 0 : value;
+}
+
+int _inb(unsigned int addr)
+{
+	unsigned long value;
+	int ret;
+
+	ret = pci_io_read(addr, &value, PCI_SIZE_8);
+
+	return ret ? 0 : value;
+}
+
+void _outl(unsigned int value, unsigned int addr)
+{
+	pci_io_write(addr, value, PCI_SIZE_32);
+}
+
+void _outw(unsigned int value, unsigned int addr)
+{
+	pci_io_write(addr, value, PCI_SIZE_16);
+}
+
+void _outb(unsigned int value, unsigned int addr)
+{
+	pci_io_write(addr, value, PCI_SIZE_8);
+}

source/bootloader/u-boot-2020.01/arch/sandbox/lib/reloc_sandbox_efi.c

@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * position independent shared object relocator
+ *
+ * Copyright (c) 2019 Heinrich Schuchardt
+ */
+
+#include <host_arch.h>
+
+#if HOST_ARCH == HOST_ARCH_X86_64
+#include "../../../arch/x86/lib/reloc_x86_64_efi.c"
+#endif
+
+#if HOST_ARCH == HOST_ARCH_X86
+#include "../../../arch/x86/lib/reloc_ia32_efi.c"
+#endif
+
+#if HOST_ARCH == HOST_ARCH_AARCH64
+#include "../../../arch/arm/lib/reloc_aarch64_efi.c"
+#endif
+
+#if HOST_ARCH == HOST_ARCH_ARM
+#include "../../../arch/arm/lib/reloc_arm_efi.c"
+#endif
+
+#if HOST_ARCH == HOST_ARCH_RISCV32
+#include "../../../arch/riscv/lib/reloc_riscv_efi.c"
+#endif
+
+#if HOST_ARCH == HOST_ARCH_RISCV64
+#include "../../../arch/riscv/lib/reloc_riscv_efi.c"
+#endif

source/bootloader/u-boot-2020.01/arch/sandbox/lib/sections.c

@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2013 Albert ARIBAUD <albert.u.boot@aribaud.net>
+ *
+ */
+
+char __efi_runtime_start[0] __attribute__((section(".__efi_runtime_start")));
+char __efi_runtime_stop[0] __attribute__((section(".__efi_runtime_stop")));
+char __efi_runtime_rel_start[0]
+		__attribute__((section(".__efi_runtime_rel_start")));
+char __efi_runtime_rel_stop[0]
+		__attribute__((section(".__efi_runtime_rel_stop")));