GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)

source/bootloader/u-boot-2020.01/arch/x86/include/asm/fsp/fsp_azalia.h

@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: Intel */
+/*
+ * Copyright (C) 2013, Intel Corporation
+ * Copyright (C) 2015, Google, Inc
+ */
+
+#ifndef _FSP_AZALIA_H_
+#define _FSP_AZALIA_H_
+
+struct __packed azalia_verb_table_header {
+	u32 vendor_device_id;
+	u16 sub_system_id;
+	u8 revision_id;		/* 0xff applies to all steppings */
+	u8 front_panel_support;
+	u16 number_of_rear_jacks;
+	u16 number_of_front_jacks;
+};
+
+struct __packed azalia_verb_table {
+	struct azalia_verb_table_header header;
+	const u32 *data;
+};
+
+struct __packed azalia_config {
+	u8 pme_enable:1;
+	u8 docking_supported:1;
+	u8 docking_attached:1;
+	u8 hdmi_codec_enable:1;
+	u8 azalia_v_ci_enable:1;
+	u8 rsvdbits:3;
+	/* number of verb tables provided by platform */
+	u8 verb_table_num;
+	const struct azalia_verb_table *verb_table;
+	/* delay timer after azalia reset */
+	u16 reset_wait_timer_ms;
+};
+
+#endif

source/bootloader/u-boot-2020.01/arch/x86/include/asm/fsp/fsp_bootmode.h

@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: Intel */
+/*
+ * Copyright (C) 2013, Intel Corporation
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#ifndef __FSP_BOOT_MODE_H__
+#define __FSP_BOOT_MODE_H__
+
+/* 0x21 - 0xf..f are reserved */
+#define BOOT_FULL_CONFIG		0x00
+#define BOOT_MINIMAL_CONFIG		0x01
+#define BOOT_NO_CONFIG_CHANGES		0x02
+#define BOOT_FULL_CONFIG_PLUS_DIAG	0x03
+#define BOOT_DEFAULT_SETTINGS		0x04
+#define BOOT_ON_S4_RESUME		0x05
+#define BOOT_ON_S5_RESUME		0x06
+#define BOOT_ON_S2_RESUME		0x10
+#define BOOT_ON_S3_RESUME		0x11
+#define BOOT_ON_FLASH_UPDATE		0x12
+#define BOOT_IN_RECOVERY_MODE		0x20
+
+#endif

source/bootloader/u-boot-2020.01/arch/x86/include/asm/fsp/fsp_fv.h

@@ -0,0 +1,136 @@
+/* SPDX-License-Identifier: Intel */
+/*
+ * Copyright (C) 2013, Intel Corporation
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#ifndef __FSP_FV___
+#define __FSP_FV___
+
+/* Value of EFI_FV_FILE_ATTRIBUTES */
+#define EFI_FV_FILE_ATTR_ALIGNMENT	0x0000001F
+#define EFI_FV_FILE_ATTR_FIXED		0x00000100
+#define EFI_FV_FILE_ATTR_MEMORY_MAPPED	0x00000200
+
+/* Attributes bit definitions */
+#define EFI_FVB2_READ_DISABLED_CAP	0x00000001
+#define EFI_FVB2_READ_ENABLED_CAP	0x00000002
+#define EFI_FVB2_READ_STATUS		0x00000004
+#define EFI_FVB2_WRITE_DISABLED_CAP	0x00000008
+#define EFI_FVB2_WRITE_ENABLED_CAP	0x00000010
+#define EFI_FVB2_WRITE_STATUS		0x00000020
+#define EFI_FVB2_LOCK_CAP		0x00000040
+#define EFI_FVB2_LOCK_STATUS		0x00000080
+#define EFI_FVB2_STICKY_WRITE		0x00000200
+#define EFI_FVB2_MEMORY_MAPPED		0x00000400
+#define EFI_FVB2_ERASE_POLARITY		0x00000800
+#define EFI_FVB2_READ_LOCK_CAP		0x00001000
+#define EFI_FVB2_READ_LOCK_STATUS	0x00002000
+#define EFI_FVB2_WRITE_LOCK_CAP		0x00004000
+#define EFI_FVB2_WRITE_LOCK_STATUS	0x00008000
+#define EFI_FVB2_ALIGNMENT		0x001F0000
+#define EFI_FVB2_ALIGNMENT_1		0x00000000
+#define EFI_FVB2_ALIGNMENT_2		0x00010000
+#define EFI_FVB2_ALIGNMENT_4		0x00020000
+#define EFI_FVB2_ALIGNMENT_8		0x00030000
+#define EFI_FVB2_ALIGNMENT_16		0x00040000
+#define EFI_FVB2_ALIGNMENT_32		0x00050000
+#define EFI_FVB2_ALIGNMENT_64		0x00060000
+#define EFI_FVB2_ALIGNMENT_128		0x00070000
+#define EFI_FVB2_ALIGNMENT_256		0x00080000
+#define EFI_FVB2_ALIGNMENT_512		0x00090000
+#define EFI_FVB2_ALIGNMENT_1K		0x000A0000
+#define EFI_FVB2_ALIGNMENT_2K		0x000B0000
+#define EFI_FVB2_ALIGNMENT_4K		0x000C0000
+#define EFI_FVB2_ALIGNMENT_8K		0x000D0000
+#define EFI_FVB2_ALIGNMENT_16K		0x000E0000
+#define EFI_FVB2_ALIGNMENT_32K		0x000F0000
+#define EFI_FVB2_ALIGNMENT_64K		0x00100000
+#define EFI_FVB2_ALIGNMENT_128K		0x00110000
+#define EFI_FVB2_ALIGNMENT_256K		0x00120000
+#define EFI_FVB2_ALIGNMENT_512K		0x00130000
+#define EFI_FVB2_ALIGNMENT_1M		0x00140000
+#define EFI_FVB2_ALIGNMENT_2M		0x00150000
+#define EFI_FVB2_ALIGNMENT_4M		0x00160000
+#define EFI_FVB2_ALIGNMENT_8M		0x00170000
+#define EFI_FVB2_ALIGNMENT_16M		0x00180000
+#define EFI_FVB2_ALIGNMENT_32M		0x00190000
+#define EFI_FVB2_ALIGNMENT_64M		0x001A0000
+#define EFI_FVB2_ALIGNMENT_128M		0x001B0000
+#define EFI_FVB2_ALIGNMENT_256M		0x001C0000
+#define EFI_FVB2_ALIGNMENT_512M		0x001D0000
+#define EFI_FVB2_ALIGNMENT_1G		0x001E0000
+#define EFI_FVB2_ALIGNMENT_2G		0x001F0000
+
+struct fv_blkmap_entry {
+	/* The number of sequential blocks which are of the same size */
+	u32	num_blocks;
+	/* The size of the blocks */
+	u32	length;
+};
+
+/* Describes the features and layout of the firmware volume */
+struct fv_header {
+	/*
+	 * The first 16 bytes are reserved to allow for the reset vector of
+	 * processors whose reset vector is at address 0.
+	 */
+	u8			zero_vec[16];
+	/*
+	 * Declares the file system with which the firmware volume
+	 * is formatted.
+	 */
+	efi_guid_t		fs_guid;
+	/*
+	 * Length in bytes of the complete firmware volume, including
+	 * the header.
+	 */
+	u64			fv_len;
+	/* Set to EFI_FVH_SIGNATURE */
+	u32			sign;
+	/*
+	 * Declares capabilities and power-on defaults for the firmware
+	 * volume.
+	 */
+	u32			attr;
+	/* Length in bytes of the complete firmware volume header */
+	u16			hdr_len;
+	/*
+	 * A 16-bit checksum of the firmware volume header.
+	 * A valid header sums to zero.
+	 */
+	u16			checksum;
+	/*
+	 * Offset, relative to the start of the header, of the extended
+	 * header (EFI_FIRMWARE_VOLUME_EXT_HEADER) or zero if there is
+	 * no extended header.
+	 */
+	u16			ext_hdr_off;
+	/* This field must always be set to zero */
+	u8			reserved[1];
+	/*
+	 * Set to 2. Future versions of this specification may define new
+	 * header fields and will increment the Revision field accordingly.
+	 */
+	u8			rev;
+	/*
+	 * An array of run-length encoded FvBlockMapEntry structures.
+	 * The array is terminated with an entry of {0,0}.
+	 */
+	struct fv_blkmap_entry	block_map[1];
+};
+
+#define EFI_FVH_SIGNATURE	SIGNATURE_32('_', 'F', 'V', 'H')
+
+/* Firmware Volume Header Revision definition */
+#define EFI_FVH_REVISION	0x02
+
+/* Extension header pointed by ExtHeaderOffset of volume header */
+struct fv_ext_header {
+	/* firmware volume name */
+	efi_guid_t		fv_name;
+	/* Size of the rest of the extension header including this structure */
+	u32			ext_hdr_size;
+};
+
+#endif

source/bootloader/u-boot-2020.01/arch/x86/include/asm/fsp/fsp_hob.h

@@ -0,0 +1,102 @@
+/* SPDX-License-Identifier: Intel */
+/*
+ * Copyright (C) 2013, Intel Corporation
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#ifndef __FSP_HOB_H__
+#define __FSP_HOB_H__
+
+#include <asm/hob.h>
+
+enum pixel_format {
+	pixel_rgbx_8bpc,	/* RGB 8 bit per color */
+	pixel_bgrx_8bpc,	/* BGR 8 bit per color */
+	pixel_bitmask,
+};
+
+struct __packed hob_graphics_info {
+	phys_addr_t fb_base;	/* framebuffer base address */
+	u32 fb_size;		/* framebuffer size */
+	u32 version;
+	u32 width;
+	u32 height;
+	enum pixel_format pixel_format;
+	u32 red_mask;
+	u32 green_mask;
+	u32 blue_mask;
+	u32 reserved_mask;
+	u32 pixels_per_scanline;
+};
+
+/* FSP specific GUID HOB definitions */
+#define FSP_GUID_DATA1		0x912740be
+#define FSP_GUID_DATA2		0x2284
+#define FSP_GUID_DATA3		0x4734
+#define FSP_GUID_DATA4_0	0xb9
+#define FSP_GUID_DATA4_1	0x71
+#define FSP_GUID_DATA4_2	0x84
+#define FSP_GUID_DATA4_3	0xb0
+#define FSP_GUID_DATA4_4	0x27
+#define FSP_GUID_DATA4_5	0x35
+#define FSP_GUID_DATA4_6	0x3f
+#define FSP_GUID_DATA4_7	0x0c
+
+#define FSP_GUID_BYTE0		0xbe
+#define FSP_GUID_BYTE1		0x40
+#define FSP_GUID_BYTE2		0x27
+#define FSP_GUID_BYTE3		0x91
+#define FSP_GUID_BYTE4		0x84
+#define FSP_GUID_BYTE5		0x22
+#define FSP_GUID_BYTE6		0x34
+#define FSP_GUID_BYTE7		0x47
+#define FSP_GUID_BYTE8		FSP_GUID_DATA4_0
+#define FSP_GUID_BYTE9		FSP_GUID_DATA4_1
+#define FSP_GUID_BYTE10		FSP_GUID_DATA4_2
+#define FSP_GUID_BYTE11		FSP_GUID_DATA4_3
+#define FSP_GUID_BYTE12		FSP_GUID_DATA4_4
+#define FSP_GUID_BYTE13		FSP_GUID_DATA4_5
+#define FSP_GUID_BYTE14		FSP_GUID_DATA4_6
+#define FSP_GUID_BYTE15		FSP_GUID_DATA4_7
+
+#define FSP_HEADER_GUID \
+	EFI_GUID(FSP_GUID_DATA1, FSP_GUID_DATA2, FSP_GUID_DATA3, \
+		FSP_GUID_DATA4_0, FSP_GUID_DATA4_1, FSP_GUID_DATA4_2, \
+		FSP_GUID_DATA4_3, FSP_GUID_DATA4_4, FSP_GUID_DATA4_5, \
+		FSP_GUID_DATA4_6, FSP_GUID_DATA4_7)
+
+#define FSP_NON_VOLATILE_STORAGE_HOB_GUID \
+	EFI_GUID(0x721acf02, 0x4d77, 0x4c2a, \
+		0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0)
+
+#define FSP_VARIABLE_NV_DATA_HOB_GUID \
+	EFI_GUID(0xa034147d, 0x690c, 0x4154, \
+		0x8d, 0xe6, 0xc0, 0x44, 0x64, 0x1d, 0xe9, 0x42)
+
+#define FSP_BOOTLOADER_TEMP_MEM_HOB_GUID \
+	EFI_GUID(0xbbcff46c, 0xc8d3, 0x4113, \
+		0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e)
+
+#define FSP_HOB_RESOURCE_OWNER_FSP_GUID \
+	EFI_GUID(0x69a79759, 0x1373, 0x4367, \
+		0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e)
+
+#define FSP_HOB_RESOURCE_OWNER_TSEG_GUID \
+	EFI_GUID(0xd038747c, 0xd00c, 0x4980, \
+		0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55)
+
+#define FSP_HOB_RESOURCE_OWNER_GRAPHICS_GUID \
+	EFI_GUID(0x9c7c3aa7, 0x5332, 0x4917, \
+		0x82, 0xb9, 0x56, 0xa5, 0xf3, 0xe6, 0x2a, 0x07)
+
+/* The following GUIDs are newly introduced in FSP spec 1.1 */
+
+#define FSP_HOB_RESOURCE_OWNER_BOOTLOADER_TOLUM_GUID \
+	EFI_GUID(0x73ff4f56, 0xaa8e, 0x4451, \
+		0xb3, 0x16, 0x36, 0x35, 0x36, 0x67, 0xad, 0x44)
+
+#define FSP_GRAPHICS_INFO_HOB_GUID \
+	EFI_GUID(0x39f62cce, 0x6825, 0x4669, \
+		0xbb, 0x56, 0x54, 0x1a, 0xba, 0x75, 0x3a, 0x07)
+
+#endif

source/bootloader/u-boot-2020.01/arch/x86/include/asm/fsp/fsp_infoheader.h

@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: Intel */
+/*
+ * Copyright (C) 2013, Intel Corporation
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#ifndef _FSP_HEADER_H_
+#define _FSP_HEADER_H_
+
+#define FSP_HEADER_OFF	0x94	/* Fixed FSP header offset in the FSP image */
+
+struct __packed fsp_header {
+	u32	sign;			/* 'FSPH' */
+	u32	hdr_len;		/* header length */
+	u8	reserved1[3];
+	u8	hdr_rev;		/* header rev */
+	u32	img_rev;		/* image rev */
+	char	img_id[8];		/* signature string */
+	u32	img_size;		/* image size */
+	u32	img_base;		/* image base */
+	u32	img_attr;		/* image attribute */
+	u32	cfg_region_off;		/* configuration region offset */
+	u32	cfg_region_size;	/* configuration region size */
+	u32	api_num;		/* number of API entries */
+	u32	fsp_tempram_init;	/* tempram_init offset */
+	u32	fsp_init;		/* fsp_init offset */
+	u32	fsp_notify;		/* fsp_notify offset */
+	u32	fsp_mem_init;		/* fsp_mem_init offset */
+	u32	fsp_tempram_exit;	/* fsp_tempram_exit offset */
+	u32	fsp_silicon_init;	/* fsp_silicon_init offset */
+};
+
+#define FSP_HEADER_REVISION_1		1
+#define FSP_HEADER_REVISION_2		2
+
+enum fsp_type {
+	FSP_ATTR_COMP_TYPE_FSP_T	= 1,
+	FSP_ATTR_COMP_TYPE_FSP_M	= 2,
+	FSP_ATTR_COMP_TYPE_FSP_S	= 3,
+};
+
+enum {
+	FSP_ATTR_GRAPHICS_SUPPORT	= 1 << 0,
+	FSP_ATTR_COMP_TYPE_SHIFT	= 28,
+	FSP_ATTR_COMP_TYPE_MASK		= 0xfU << FSP_ATTR_COMP_TYPE_SHIFT,
+
+};
+
+#define EFI_FSPH_SIGNATURE		SIGNATURE_32('F', 'S', 'P', 'H')
+
+#endif

source/bootloader/u-boot-2020.01/arch/x86/include/asm/fsp/fsp_support.h

@@ -0,0 +1,163 @@
+/* SPDX-License-Identifier: Intel */
+/*
+ * Copyright (C) 2013, Intel Corporation
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#ifndef __FSP_SUPPORT_H__
+#define __FSP_SUPPORT_H__
+
+#include <asm/fsp/fsp_bootmode.h>
+#include <asm/fsp/fsp_fv.h>
+#include <asm/fsp/fsp_hob.h>
+#include <asm/fsp/fsp_infoheader.h>
+#include <asm/fsp/fsp_types.h>
+#include <asm/fsp_arch.h>
+#include <asm/fsp/fsp_azalia.h>
+
+#define FSP_LOWMEM_BASE		0x100000UL
+#define FSP_HIGHMEM_BASE	0x100000000ULL
+#define UPD_TERMINATOR		0x55AA
+
+/**
+ * fsp_find_header() - Find FSP header offset in FSP image
+ *
+ * @return the offset of FSP header. If signature is invalid, returns 0.
+ */
+struct fsp_header *fsp_find_header(void);
+
+/**
+ * fsp_notify() - FSP notification wrapper function
+ *
+ * @fsp_hdr: Pointer to FSP information header
+ * @phase:   FSP initialization phase defined in enum fsp_phase
+ *
+ * @return compatible status code with EFI_STATUS defined in PI spec
+ */
+u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase);
+
+/**
+ * fsp_get_usable_lowmem_top() - retrieves the top of usable low memory
+ *
+ * @hob_list: A HOB list pointer.
+ *
+ * @return Usable low memory top.
+ */
+u32 fsp_get_usable_lowmem_top(const void *hob_list);
+
+/**
+ * fsp_get_usable_highmem_top() - retrieves the top of usable high memory
+ *
+ * @hob_list: A HOB list pointer.
+ *
+ * @return Usable high memory top.
+ */
+u64 fsp_get_usable_highmem_top(const void *hob_list);
+
+/**
+ * fsp_get_reserved_mem_from_guid() - retrieves a special reserved memory region
+ *
+ * @hob_list: A HOB list pointer.
+ * @len:      A pointer to the GUID HOB data buffer length.
+ *            If the GUID HOB is located, the length will be updated.
+ * @guid:     A pointer to the owner guild.
+ *
+ * @return Reserved region start address.
+ *            0 if this region does not exist.
+ */
+u64 fsp_get_reserved_mem_from_guid(const void *hob_list,
+				   u64 *len, const efi_guid_t *guid);
+
+/**
+ * fsp_get_fsp_reserved_mem() - retrieves the FSP reserved normal memory
+ *
+ * @hob_list: A HOB list pointer.
+ * @len:      A pointer to the FSP reserved memory length buffer.
+ *            If the GUID HOB is located, the length will be updated.
+ * @return FSP reserved memory base
+ *            0 if this region does not exist.
+ */
+u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len);
+
+/**
+ * fsp_get_tseg_reserved_mem() - retrieves the TSEG reserved normal memory
+ *
+ * @hob_list:      A HOB list pointer.
+ * @len:           A pointer to the TSEG reserved memory length buffer.
+ *                 If the GUID HOB is located, the length will be updated.
+ *
+ * @return NULL:   Failed to find the TSEG reserved memory.
+ * @return others: TSEG reserved memory base.
+ */
+u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len);
+
+/**
+ * fsp_get_nvs_data() - retrieves FSP Non-volatile Storage HOB buffer and size
+ *
+ * @hob_list:      A HOB list pointer.
+ * @len:           A pointer to the NVS data buffer length.
+ *                 If the HOB is located, the length will be updated.
+ *
+ * @return NULL:   Failed to find the NVS HOB.
+ * @return others: FSP NVS data buffer pointer.
+ */
+void *fsp_get_nvs_data(const void *hob_list, u32 *len);
+
+/**
+ * fsp_get_var_nvs_data() - get FSP variable Non-volatile Storage HOB buffer
+ *
+ * @hob_list:      A HOB list pointer.
+ * @len:           A pointer to the NVS data buffer length.
+ *                 If the HOB is located, the length will be updated.
+ *
+ * @return NULL:   Failed to find the NVS HOB.
+ * @return others: FSP NVS data buffer pointer.
+ */
+void *fsp_get_var_nvs_data(const void *hob_list, u32 *len);
+
+/**
+ * fsp_get_graphics_info() - retrieves graphics information.
+ *
+ * @hob_list:      A HOB list pointer.
+ * @len:           A pointer to the graphics info HOB length.
+ *                 If the HOB is located, the length will be updated.
+ *
+ * @return NULL:   Failed to find the graphics info HOB.
+ * @return others: A pointer to struct hob_graphics_info.
+ */
+void *fsp_get_graphics_info(const void *hob_list, u32 *len);
+
+/**
+ * fsp_init_phase_pci() - Tell the FSP that we have completed PCI init
+ *
+ * @return 0 if OK, -EPERM if the FSP gave an error.
+ */
+int fsp_init_phase_pci(void);
+
+/**
+ * fsp_scan_for_ram_size() - Scan the HOB list to find the RAM size
+ *
+ * This sets gd->ram_size based on what it finds.
+ *
+ * @return 0 if OK, -ve on error
+ */
+int fsp_scan_for_ram_size(void);
+
+/**
+ * fsp_prepare_mrc_cache() - Find the DRAM training data from the MRC cache
+ *
+ * @return pointer to data, or NULL if no cache or no data found in the cache
+ */
+void *fsp_prepare_mrc_cache(void);
+
+/**
+ * fsp_notify() - FSP notification wrapper function
+ *
+ * @fsp_hdr: Pointer to FSP information header
+ * @phase:   FSP initialization phase defined in enum fsp_phase
+ *
+ * @return compatible status code with EFI_STATUS defined in PI spec
+ */
+u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase);
+
+#endif

source/bootloader/u-boot-2020.01/arch/x86/include/asm/fsp/fsp_types.h

@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: Intel */
+/*
+ * Copyright (C) 2013, Intel Corporation
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#ifndef __FSP_TYPES_H__
+#define __FSP_TYPES_H__
+
+/**
+ * Returns a 16-bit signature built from 2 ASCII characters.
+ *
+ * This macro returns a 16-bit value built from the two ASCII characters
+ * specified by A and B.
+ *
+ * @A: The first ASCII character.
+ * @B: The second ASCII character.
+ *
+ * @return: A 16-bit value built from the two ASCII characters specified by
+ *          A and B.
+ */
+#define SIGNATURE_16(A, B)	((A) | (B << 8))
+
+/**
+ * Returns a 32-bit signature built from 4 ASCII characters.
+ *
+ * This macro returns a 32-bit value built from the four ASCII characters
+ * specified by A, B, C, and D.
+ *
+ * @A: The first ASCII character.
+ * @B: The second ASCII character.
+ * @C: The third ASCII character.
+ * @D: The fourth ASCII character.
+ *
+ * @return: A 32-bit value built from the two ASCII characters specified by
+ *          A, B, C and D.
+ */
+#define SIGNATURE_32(A, B, C, D)	\
+	(SIGNATURE_16(A, B) | (SIGNATURE_16(C, D) << 16))
+
+/**
+ * Returns a 64-bit signature built from 8 ASCII characters.
+ *
+ * This macro returns a 64-bit value built from the eight ASCII characters
+ * specified by A, B, C, D, E, F, G,and H.
+ *
+ * @A: The first ASCII character.
+ * @B: The second ASCII character.
+ * @C: The third ASCII character.
+ * @D: The fourth ASCII character.
+ * @E: The fifth ASCII character.
+ * @F: The sixth ASCII character.
+ * @G: The seventh ASCII character.
+ * @H: The eighth ASCII character.
+ *
+ * @return: A 64-bit value built from the two ASCII characters specified by
+ *          A, B, C, D, E, F, G and H.
+ */
+#define SIGNATURE_64(A, B, C, D, E, F, G, H)	\
+	(SIGNATURE_32(A, B, C, D) | ((u64)(SIGNATURE_32(E, F, G, H)) << 32))
+
+#endif