GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)
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if TARGET_SOM_DB5800_SOM_6867
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config SYS_BOARD
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default "som-db5800-som-6867"
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config SYS_VENDOR
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default "advantech"
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config SYS_SOC
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default "baytrail"
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config SYS_CONFIG_NAME
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default "som-db5800-som-6867"
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config SYS_TEXT_BASE
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default 0xfff00000
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select X86_RESET_VECTOR
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select INTEL_BAYTRAIL
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select BOARD_ROMSIZE_KB_8192
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select BOARD_EARLY_INIT_F
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select SPI_FLASH_MACRONIX
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config PCIE_ECAM_BASE
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default 0xe0000000
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endif
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Advantech SOM-DB5800-SOM-6867
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M: George McCollister <george.mccollister@gmail.com>
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S: Maintained
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F: board/advantech/som-db5800-som-6867
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F: include/configs/som-db5800-som-6867.h
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F: configs/som-db5800-som-6867_defconfig
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F: arch/x86/dts/baytrail_som-db5800-som-6867.dts
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# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (C) 2015, Google, Inc
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obj-y += som-db5800-som-6867.o start.o
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obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
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+10
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
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*/
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/* Power Button */
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Device (PWRB)
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{
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Name(_HID, EISAID("PNP0C0C"))
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}
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
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*/
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DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x00010000)
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{
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/* platform specific */
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#include <asm/arch/acpi/platform.asl>
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/* board specific */
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#include "acpi/mainboard.asl"
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}
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+129
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Stefan Roese <sr@denx.de>
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* Copyright (C) 2016 George McCollister <george.mccollister@gmail.com>
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*/
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#include <common.h>
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#include <asm/fsp1/fsp_support.h>
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/* ALC262 Verb Table - 10EC0262 */
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static const u32 verb_table_data13[] = {
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/* Pin Complex (NID 0x11) */
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0x01171cf0,
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0x01171d11,
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0x01171e11,
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0x01171f41,
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/* Pin Complex (NID 0x12) */
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0x01271cf0,
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0x01271d11,
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0x01271e11,
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0x01271f41,
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/* Pin Complex (NID 0x14) */
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0x01471c10,
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0x01471d40,
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0x01471e01,
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0x01471f01,
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/* Pin Complex (NID 0x15) */
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0x01571cf0,
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0x01571d11,
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0x01571e11,
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0x01571f41,
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/* Pin Complex (NID 0x16) */
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0x01671cf0,
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0x01671d11,
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0x01671e11,
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0x01671f41,
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/* Pin Complex (NID 0x18) */
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0x01871c20,
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0x01871d98,
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0x01871ea1,
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0x01871f01,
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/* Pin Complex (NID 0x19) */
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0x01971c21,
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0x01971d98,
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0x01971ea1,
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0x01971f02,
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/* Pin Complex (NID 0x1A) */
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0x01a71c2f,
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0x01a71d30,
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0x01a71e81,
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0x01a71f01,
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/* Pin Complex */
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0x01b71c1f,
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0x01b71d40,
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0x01b71e21,
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0x01b71f02,
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/* Pin Complex */
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0x01c71cf0,
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0x01c71d11,
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0x01c71e11,
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0x01c71f41,
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/* Pin Complex */
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0x01d71c01,
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0x01d71dc6,
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0x01d71e14,
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0x01d71f40,
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/* Pin Complex */
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0x01e71cf0,
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0x01e71d11,
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0x01e71e11,
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0x01e71f41,
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/* Pin Complex */
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0x01f71cf0,
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0x01f71d11,
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0x01f71e11,
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0x01f71f41,
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};
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/*
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* This needs to be in ROM since if we put it in CAR, FSP init loses it when
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* it drops CAR.
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*
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* VerbTable: (RealTek ALC262)
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* Revision ID = 0xFF, support all steps
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* Codec Verb Table For AZALIA
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* Codec Address: CAd value (0/1/2)
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* Codec Vendor: 0x10EC0262
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*/
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static const struct azalia_verb_table azalia_verb_table[] = {
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{
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{
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0x10ec0262,
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0x0000,
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0xff,
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0x01,
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0x000b,
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0x0002,
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},
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verb_table_data13
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}
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};
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static const struct azalia_config azalia_config = {
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.pme_enable = 1,
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.docking_supported = 1,
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.docking_attached = 0,
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.hdmi_codec_enable = 1,
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.azalia_v_ci_enable = 1,
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.rsvdbits = 0,
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.verb_table_num = 1,
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.verb_table = azalia_verb_table,
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.reset_wait_timer_ms = 300
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};
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void update_fsp_azalia_configs(const struct azalia_config **azalia)
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{
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*azalia = &azalia_config;
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}
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int board_early_init_f(void)
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{
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/*
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* The FSP enables the BayTrail internal legacy UART (again).
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* Disable it again, so that the one on the EC can be used.
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*/
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setup_internal_uart(0);
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return 0;
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}
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@@ -0,0 +1,8 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2015, Google, Inc
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*/
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.globl early_board_init
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early_board_init:
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jmp early_board_init_ret
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