GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)

source/bootloader/u-boot-2020.01/board/broadcom/bcm11130/MAINTAINERS

@@ -0,0 +1,6 @@
+BCM11130 BOARD
+M:	Steve Rae <steve.rae@raedomain.com>
+S:	Maintained
+F:	board/broadcom/bcm28155_ap/
+F:	include/configs/bcm_ep_board.h
+F:	configs/bcm11130_defconfig

source/bootloader/u-boot-2020.01/board/broadcom/bcm11130_nand/MAINTAINERS

@@ -0,0 +1,6 @@
+BCM11130_NAND BOARD
+M:	Steve Rae <steve.rae@raedomain.com>
+S:	Maintained
+F:	board/broadcom/bcm28155_ap/
+F:	include/configs/bcm_ep_board.h
+F:	configs/bcm11130_nand_defconfig

source/bootloader/u-boot-2020.01/board/broadcom/bcm23550_w1d/Kconfig

@@ -0,0 +1,15 @@
+if TARGET_BCM23550_W1D
+
+config SYS_BOARD
+	default "bcm23550_w1d"
+
+config SYS_VENDOR
+	default "broadcom"
+
+config SYS_SOC
+	default "bcm235xx"
+
+config SYS_CONFIG_NAME
+	default "bcm23550_w1d"
+
+endif

source/bootloader/u-boot-2020.01/board/broadcom/bcm23550_w1d/MAINTAINERS

@@ -0,0 +1,6 @@
+BCM23550_W1D BOARD
+M:	Steve Rae <steve.rae@raedomain.com>
+S:	Maintained
+F:	board/broadcom/bcm23550_w1d/
+F:	include/configs/bcm23550_w1d.h
+F:	configs/bcm23550_w1d_defconfig

source/bootloader/u-boot-2020.01/board/broadcom/bcm23550_w1d/Makefile

@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright 2013 Broadcom Corporation.
+
+obj-y	+= bcm23550_w1d.o

source/bootloader/u-boot-2020.01/board/broadcom/bcm23550_w1d/bcm23550_w1d.c

@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2013 Broadcom Corporation.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/mach-types.h>
+#include <env.h>
+#include <mmc.h>
+#include <asm/kona-common/kona_sdhci.h>
+#include <asm/kona-common/clk.h>
+#include <asm/arch/sysmap.h>
+
+#include <usb.h>
+#include <usb/dwc2_udc.h>
+#include <g_dnl.h>
+
+#define SECWATCHDOG_SDOGCR_OFFSET	0x00000000
+#define SECWATCHDOG_SDOGCR_EN_SHIFT	27
+#define SECWATCHDOG_SDOGCR_SRSTEN_SHIFT	26
+#define SECWATCHDOG_SDOGCR_CLKS_SHIFT	20
+#define SECWATCHDOG_SDOGCR_LD_SHIFT	0
+
+#ifndef CONFIG_USB_SERIALNO
+#define CONFIG_USB_SERIALNO "1234567890"
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * board_init - early hardware init
+ */
+int board_init(void)
+{
+	printf("Relocation Offset is: %08lx\n", gd->reloc_off);
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+	clk_init();
+
+	return 0;
+}
+
+/*
+ * misc_init_r - miscellaneous platform dependent initializations
+ */
+int misc_init_r(void)
+{
+	return 0;
+}
+
+/*
+ * dram_init - sets uboots idea of sdram size
+ */
+int dram_init(void)
+{
+	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+				    CONFIG_SYS_SDRAM_SIZE);
+	return 0;
+}
+
+/* This is called after dram_init() so use get_ram_size result */
+int dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = gd->ram_size;
+
+	return 0;
+}
+
+#ifdef CONFIG_MMC_SDHCI_KONA
+/*
+ * mmc_init - Initializes mmc
+ */
+int board_mmc_init(bd_t *bis)
+{
+	int ret = 0;
+
+	/* Register eMMC - SDIO2 */
+	ret = kona_sdhci_init(1, 400000, 0);
+	if (ret)
+		return ret;
+
+	/* Register SD Card - SDIO4 kona_mmc_init assumes 0 based index */
+	ret = kona_sdhci_init(3, 400000, 0);
+	return ret;
+}
+#endif
+
+#ifdef CONFIG_USB_GADGET
+static struct dwc2_plat_otg_data bcm_otg_data = {
+	.regs_otg	= HSOTG_BASE_ADDR
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	debug("%s: performing dwc2_udc_probe\n", __func__);
+	return dwc2_udc_probe(&bcm_otg_data);
+}
+
+int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
+{
+	debug("%s\n", __func__);
+	if (!env_get("serial#"))
+		g_dnl_set_serialnumber(CONFIG_USB_SERIALNO);
+	return 0;
+}
+
+int g_dnl_get_board_bcd_device_number(int gcnum)
+{
+	debug("%s\n", __func__);
+	return 1;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	debug("%s\n", __func__);
+	return 0;
+}
+#endif

source/bootloader/u-boot-2020.01/board/broadcom/bcm28155_ap/Kconfig

@@ -0,0 +1,15 @@
+if TARGET_BCM28155_AP
+
+config SYS_BOARD
+	default "bcm28155_ap"
+
+config SYS_VENDOR
+	default "broadcom"
+
+config SYS_SOC
+	default "bcm281xx"
+
+config SYS_CONFIG_NAME
+	default "bcm28155_ap"
+
+endif

source/bootloader/u-boot-2020.01/board/broadcom/bcm28155_ap/MAINTAINERS

@@ -0,0 +1,6 @@
+BCM28155_AP BOARD
+M:	Steve Rae <steve.rae@raedomain.com>
+S:	Maintained
+F:	board/broadcom/bcm28155_ap/
+F:	include/configs/bcm28155_ap.h
+F:	configs/bcm28155_ap_defconfig

source/bootloader/u-boot-2020.01/board/broadcom/bcm28155_ap/Makefile

@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright 2013 Broadcom Corporation.
+
+obj-y	+= bcm28155_ap.o

source/bootloader/u-boot-2020.01/board/broadcom/bcm28155_ap/bcm28155_ap.c

@@ -0,0 +1,129 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2013 Broadcom Corporation.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/mach-types.h>
+#include <env.h>
+#include <mmc.h>
+#include <asm/kona-common/kona_sdhci.h>
+#include <asm/kona-common/clk.h>
+#include <asm/arch/sysmap.h>
+
+#include <usb.h>
+#include <usb/dwc2_udc.h>
+#include <g_dnl.h>
+
+#define SECWATCHDOG_SDOGCR_OFFSET	0x00000000
+#define SECWATCHDOG_SDOGCR_EN_SHIFT	27
+#define SECWATCHDOG_SDOGCR_SRSTEN_SHIFT	26
+#define SECWATCHDOG_SDOGCR_CLKS_SHIFT	20
+#define SECWATCHDOG_SDOGCR_LD_SHIFT	0
+
+#ifndef CONFIG_USB_SERIALNO
+#define CONFIG_USB_SERIALNO "1234567890"
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * board_init - early hardware init
+ */
+int board_init(void)
+{
+	printf("Relocation Offset is: %08lx\n", gd->reloc_off);
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+	clk_init();
+
+	return 0;
+}
+
+/*
+ * misc_init_r - miscellaneous platform dependent initializations
+ */
+int misc_init_r(void)
+{
+	/* Disable watchdog reset - watchdog unused */
+	writel((0 << SECWATCHDOG_SDOGCR_EN_SHIFT) |
+	       (0 << SECWATCHDOG_SDOGCR_SRSTEN_SHIFT) |
+	       (4 << SECWATCHDOG_SDOGCR_CLKS_SHIFT) |
+	       (0x5a0 << SECWATCHDOG_SDOGCR_LD_SHIFT),
+	       (SECWD_BASE_ADDR + SECWATCHDOG_SDOGCR_OFFSET));
+
+	return 0;
+}
+
+/*
+ * dram_init - sets uboots idea of sdram size
+ */
+int dram_init(void)
+{
+	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+				    CONFIG_SYS_SDRAM_SIZE);
+	return 0;
+}
+
+/* This is called after dram_init() so use get_ram_size result */
+int dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = gd->ram_size;
+
+	return 0;
+}
+
+#ifdef CONFIG_MMC_SDHCI_KONA
+/*
+ * mmc_init - Initializes mmc
+ */
+int board_mmc_init(bd_t *bis)
+{
+	int ret = 0;
+
+	/* Register eMMC - SDIO2 */
+	ret = kona_sdhci_init(1, 400000, 0);
+	if (ret)
+		return ret;
+
+	/* Register SD Card - SDIO4 kona_mmc_init assumes 0 based index */
+	ret = kona_sdhci_init(3, 400000, 0);
+	return ret;
+}
+#endif
+
+#ifdef CONFIG_USB_GADGET
+static struct dwc2_plat_otg_data bcm_otg_data = {
+	.regs_otg	= HSOTG_BASE_ADDR
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	debug("%s: performing dwc2_udc_probe\n", __func__);
+	return dwc2_udc_probe(&bcm_otg_data);
+}
+
+int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
+{
+	debug("%s\n", __func__);
+	if (!env_get("serial#"))
+		g_dnl_set_serialnumber(CONFIG_USB_SERIALNO);
+	return 0;
+}
+
+int g_dnl_get_board_bcd_device_number(int gcnum)
+{
+	debug("%s\n", __func__);
+	return 1;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	debug("%s\n", __func__);
+	return 0;
+}
+#endif

source/bootloader/u-boot-2020.01/board/broadcom/bcm28155_w1d/MAINTAINERS

@@ -0,0 +1,6 @@
+BCM28155_W1D BOARD
+M:	Steve Rae <steve.rae@raedomain.com>
+S:	Maintained
+F:	board/broadcom/bcm28155_ap/
+F:	include/configs/bcm28155_ap.h
+F:	configs/bcm28155_w1d_defconfig

source/bootloader/u-boot-2020.01/board/broadcom/bcm911360_entphn-ns/MAINTAINERS

@@ -0,0 +1,6 @@
+BCM911360_ENTPHN-NS BOARD
+M:	Steve Rae <steve.rae@raedomain.com>
+S:	Maintained
+F:	board/broadcom/bcmcygnus/
+F:	include/configs/bcm_ep_board.h
+F:	configs/bcm911360_entphn-ns_defconfig

source/bootloader/u-boot-2020.01/board/broadcom/bcm911360_entphn/MAINTAINERS

@@ -0,0 +1,6 @@
+BCM911360_ENTPHN BOARD
+M:	Steve Rae <steve.rae@raedomain.com>
+S:	Maintained
+F:	board/broadcom/bcmcygnus/
+F:	include/configs/bcm_ep_board.h
+F:	configs/bcm911360_entphn_defconfig

source/bootloader/u-boot-2020.01/board/broadcom/bcm911360k/MAINTAINERS

@@ -0,0 +1,6 @@
+BCM911360K BOARD
+M:	Steve Rae <steve.rae@raedomain.com>
+S:	Maintained
+F:	board/broadcom/bcmcygnus/
+F:	include/configs/bcm_ep_board.h
+F:	configs/bcm911360k_defconfig

source/bootloader/u-boot-2020.01/board/broadcom/bcm958300k-ns/MAINTAINERS

@@ -0,0 +1,6 @@
+BCM958300K-NS BOARD
+M:	Steve Rae <steve.rae@raedomain.com>
+S:	Maintained
+F:	board/broadcom/bcmcygnus/
+F:	include/configs/bcm_ep_board.h
+F:	configs/bcm958300k-ns_defconfig

source/bootloader/u-boot-2020.01/board/broadcom/bcm958300k/MAINTAINERS

@@ -0,0 +1,6 @@
+BCM958300K BOARD
+M:	Steve Rae <steve.rae@raedomain.com>
+S:	Maintained
+F:	board/broadcom/bcmcygnus/
+F:	include/configs/bcm_ep_board.h
+F:	configs/bcm958300k_defconfig

source/bootloader/u-boot-2020.01/board/broadcom/bcm958305k/MAINTAINERS

@@ -0,0 +1,6 @@
+BCM958305K BOARD
+M:	Steve Rae <steve.rae@raedomain.com>
+S:	Maintained
+F:	board/broadcom/bcmcygnus/
+F:	include/configs/bcm_ep_board.h
+F:	configs/bcm958305k_defconfig

source/bootloader/u-boot-2020.01/board/broadcom/bcm958622hr/MAINTAINERS

@@ -0,0 +1,6 @@
+BCM958622HR BOARD
+M:	Steve Rae <steve.rae@raedomain.com>
+S:	Maintained
+F:	board/broadcom/bcmnsp/
+F:	include/configs/bcm_ep_board.h
+F:	configs/bcm958622hr_defconfig

source/bootloader/u-boot-2020.01/board/broadcom/bcm958712k/MAINTAINERS

@@ -0,0 +1,6 @@
+BCM958712K BOARD
+M:	Jon Mason <jon.mason@broadcom.com>
+S:	Maintained
+F:	board/broadcom/bcmns2/
+F:	include/configs/bcm_northstar2.h
+F:	configs/bcm958712k_defconfig

source/bootloader/u-boot-2020.01/board/broadcom/bcm963158/Kconfig

@@ -0,0 +1,17 @@
+if TARGET_BCM963158
+
+config SYS_VENDOR
+	default "broadcom"
+
+config SYS_BOARD
+	default "bcm963158"
+
+config SYS_CONFIG_NAME
+	default "broadcom_bcm963158"
+
+endif
+
+config TARGET_BCM963158
+	bool "Support Broadcom bcm963158"
+	depends on ARCH_BCM63158
+	select ARM64

source/bootloader/u-boot-2020.01/board/broadcom/bcm963158/MAINTAINERS

@@ -0,0 +1,6 @@
+BROADCOM BCM963158
+M:	Philippe Reynes <philippe.reynes@softathome.com>
+S:	Maintained
+F:	board/broadcom/bcm963158/
+F:	include/configs/broadcom_bcm963158.h
+F:	configs/bcm963158_ram_defconfig

source/bootloader/u-boot-2020.01/board/broadcom/bcm963158/Makefile

@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y	+= bcm963158.o

source/bootloader/u-boot-2020.01/board/broadcom/bcm963158/bcm963158.c

@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Philippe Reynes <philippe.reynes@softathome.com>
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <linux/io.h>
+
+#ifdef CONFIG_ARM64
+#include <asm/armv8/mmu.h>
+
+static struct mm_region broadcom_bcm963158_mem_map[] = {
+	{
+		/* RAM */
+		.virt = 0x00000000UL,
+		.phys = 0x00000000UL,
+		.size = 8UL * SZ_1G,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		/* SoC */
+		.virt = 0x80000000UL,
+		.phys = 0x80000000UL,
+		.size = 0xff80000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
+struct mm_region *mem_map = broadcom_bcm963158_mem_map;
+#endif
+
+int board_init(void)
+{
+	return 0;
+}
+
+int dram_init(void)
+{
+	if (fdtdec_setup_mem_size_base() != 0)
+		printf("fdtdec_setup_mem_size_base() has failed\n");
+
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	fdtdec_setup_memory_banksize();
+
+	return 0;
+}
+
+int print_cpuinfo(void)
+{
+	return 0;
+}

source/bootloader/u-boot-2020.01/board/broadcom/bcm968380gerg/Kconfig

@@ -0,0 +1,12 @@
+if BOARD_BROADCOM_BCM968380GERG
+
+config SYS_BOARD
+	default "bcm968380gerg"
+
+config SYS_VENDOR
+	default "broadcom"
+
+config SYS_CONFIG_NAME
+	default "broadcom_bcm968380gerg"
+
+endif

source/bootloader/u-boot-2020.01/board/broadcom/bcm968380gerg/MAINTAINERS

@@ -0,0 +1,6 @@
+BCM968380GERG BOARD
+M:	Philippe Reynes <philippe.reynes@softathome.com>
+S:	Maintained
+F:	board/broadcom/bcm968380gerg/
+F:	include/configs/broadcom_bcm968380gerg.h
+F:	configs/bcm968380gerg_ram_defconfig

source/bootloader/u-boot-2020.01/board/broadcom/bcm968380gerg/Makefile

@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y += bcm968380gerg.o

source/bootloader/u-boot-2020.01/board/broadcom/bcm968380gerg/bcm968380gerg.c

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Philippe Reynes <philippe.reynes@softathome.com>
+ */
+
+#include <common.h>

source/bootloader/u-boot-2020.01/board/broadcom/bcm968380gerg/board.c

@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Philippe Reynes <philippe.reynes@softathome.com>
+ */
+
+#include <common.h>

source/bootloader/u-boot-2020.01/board/broadcom/bcm968580xref/Kconfig

@@ -0,0 +1,17 @@
+if ARCH_BCM6858
+
+config SYS_VENDOR
+	default "broadcom"
+
+config SYS_BOARD
+	default "bcm968580xref"
+
+config SYS_CONFIG_NAME
+	default "broadcom_bcm968580xref"
+
+endif
+
+config TARGET_BCM968580XREF
+	bool "Support Broadcom bcm968580xref"
+	depends on ARCH_BCM6858
+	select ARM64

source/bootloader/u-boot-2020.01/board/broadcom/bcm968580xref/MAINTAINERS

@@ -0,0 +1,6 @@
+BCM968580XREF BOARD
+M:	Philippe Reynes <philippe.reynes@softathome.com>
+S:	Maintained
+F:	board/broadcom/bcm968580xref/
+F:	include/configs/broadcom_bcm968580xref.h
+F:	configs/bcm968580xref_ram_defconfig

source/bootloader/u-boot-2020.01/board/broadcom/bcm968580xref/Makefile

@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y	+= bcm968580xref.o

source/bootloader/u-boot-2020.01/board/broadcom/bcm968580xref/bcm968580xref.c

@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Philippe Reynes <philippe.reynes@softathome.com>
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <linux/io.h>
+
+#ifdef CONFIG_ARM64
+#include <asm/armv8/mmu.h>
+
+static struct mm_region broadcom_bcm968580xref_mem_map[] = {
+	{
+		/* RAM */
+		.virt = 0x00000000UL,
+		.phys = 0x00000000UL,
+		.size = 8UL * SZ_1G,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		/* SoC */
+		.virt = 0x80000000UL,
+		.phys = 0x80000000UL,
+		.size = 0xff80000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
+struct mm_region *mem_map = broadcom_bcm968580xref_mem_map;
+#endif
+
+int board_init(void)
+{
+	return 0;
+}
+
+int dram_init(void)
+{
+	if (fdtdec_setup_mem_size_base() != 0)
+		printf("fdtdec_setup_mem_size_base() has failed\n");
+
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	fdtdec_setup_memory_banksize();
+
+	return 0;
+}
+
+int print_cpuinfo(void)
+{
+	return 0;
+}

source/bootloader/u-boot-2020.01/board/broadcom/bcm_ep/Makefile

@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright 2014 Broadcom Corporation.
+
+obj-y	+= board.o

source/bootloader/u-boot-2020.01/board/broadcom/bcm_ep/board.c

@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2014 Broadcom Corporation.
+ */
+
+#include <common.h>
+#include <cpu_func.h>
+#include <asm/io.h>
+#include <config.h>
+#include <netdev.h>
+#include <asm/system.h>
+#include <asm/iproc-common/armpll.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * board_init - early hardware init
+ */
+int board_init(void)
+{
+	/*
+	 * Address of boot parameters passed to kernel
+	 * Use default offset 0x100
+	 */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+	return 0;
+}
+
+/*
+ * dram_init - sets u-boot's idea of sdram size
+ */
+int dram_init(void)
+{
+	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+				    CONFIG_SYS_SDRAM_SIZE);
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = gd->ram_size;
+
+	return 0;
+}
+
+int board_early_init_f(void)
+{
+	uint32_t status = 0;
+
+	/* Setup PLL if required */
+#if defined(CONFIG_ARMCLK)
+	armpll_config(CONFIG_ARMCLK);
+#endif
+
+	return status;
+}
+
+#ifdef CONFIG_ARMV7_NONSEC
+void smp_set_core_boot_addr(unsigned long addr, int corenr)
+{
+}
+
+void smp_kick_all_cpus(void)
+{
+}
+
+void smp_waitloop(unsigned previous_address)
+{
+}
+#endif
+
+#ifdef CONFIG_BCM_SF2_ETH
+int board_eth_init(bd_t *bis)
+{
+	int rc = -1;
+	printf("Registering BCM sf2 eth\n");
+	rc = bcm_sf2_eth_register(bis, 0);
+	return rc;
+}
+#endif

source/bootloader/u-boot-2020.01/board/broadcom/bcmcygnus/Kconfig

@@ -0,0 +1,15 @@
+if TARGET_BCMCYGNUS
+
+config SYS_BOARD
+	default "bcm_ep"
+
+config SYS_VENDOR
+	default "broadcom"
+
+config SYS_SOC
+	default "bcmcygnus"
+
+config SYS_CONFIG_NAME
+	default "bcm_ep_board"
+
+endif

source/bootloader/u-boot-2020.01/board/broadcom/bcmns2/Kconfig

@@ -0,0 +1,15 @@
+if TARGET_BCMNS2
+
+config SYS_BOARD
+	default "bcmns2"
+
+config SYS_VENDOR
+	default "broadcom"
+
+config SYS_SOC
+	default "ns2"
+
+config SYS_CONFIG_NAME
+	default "bcm_northstar2"
+
+endif

source/bootloader/u-boot-2020.01/board/broadcom/bcmns2/Makefile

@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright 2016 Broadcom Ltd.
+
+obj-y	:= northstar2.o

source/bootloader/u-boot-2020.01/board/broadcom/bcmns2/northstar2.c

@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2016 Broadcom Ltd.
+ */
+#include <common.h>
+#include <asm/system.h>
+#include <asm/armv8/mmu.h>
+
+static struct mm_region ns2_mem_map[] = {
+	{
+		.virt = 0x0UL,
+		.phys = 0x0UL,
+		.size = 0x80000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		.virt = 0x80000000UL,
+		.phys = 0x80000000UL,
+		.size = 0xff80000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
+struct mm_region *mem_map = ns2_mem_map;
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+				    PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE);
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_1_SIZE;
+	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+
+	return 0;
+}
+
+void reset_cpu(ulong addr)
+{
+	psci_system_reset();
+}

source/bootloader/u-boot-2020.01/board/broadcom/bcmnsp/Kconfig

@@ -0,0 +1,15 @@
+if TARGET_BCMNSP
+
+config SYS_BOARD
+	default "bcm_ep"
+
+config SYS_VENDOR
+	default "broadcom"
+
+config SYS_SOC
+	default "bcmnsp"
+
+config SYS_CONFIG_NAME
+	default "bcm_ep_board"
+
+endif

source/bootloader/u-boot-2020.01/board/broadcom/bcmstb/MAINTAINERS

@@ -0,0 +1,15 @@
+BCM7445 BOARD
+M:	Thomas Fitzsimmons <fitzsim@fitzsim.org>
+S:	Maintained
+F:	board/broadcom/bcmstb/
+F:	include/configs/bcmstb.h
+F:	include/configs/bcm7445.h
+F:	configs/bcm7445_defconfig
+
+BCM7260 BOARD
+M:	Thomas Fitzsimmons <fitzsim@fitzsim.org>
+S:	Maintained
+F:	board/broadcom/bcmstb/
+F:	include/configs/bcmstb.h
+F:	include/configs/bcm7260.h
+F:	configs/bcm7260_defconfig

source/bootloader/u-boot-2020.01/board/broadcom/bcmstb/Makefile

@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2018  Cisco Systems, Inc.
+#
+# Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
+#
+
+obj-y	:= bcmstb.o

source/bootloader/u-boot-2020.01/board/broadcom/bcmstb/bcmstb.c

@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2018  Cisco Systems, Inc.
+ * (C) Copyright 2019  Synamedia
+ *
+ * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
+ */
+
+#include <cpu_func.h>
+#include <init.h>
+#include <time.h>
+#include <linux/types.h>
+#include <common.h>
+#include <env.h>
+#include <asm/io.h>
+#include <asm/bootm.h>
+#include <mach/timer.h>
+#include <mmc.h>
+#include <fdtdec.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BCMSTB_DATA_SECTION __attribute__((section(".data")))
+
+struct bcmstb_boot_parameters bcmstb_boot_parameters BCMSTB_DATA_SECTION;
+
+phys_addr_t prior_stage_fdt_address BCMSTB_DATA_SECTION;
+
+union reg_value_union {
+	const char *data;
+	const phys_addr_t *address;
+};
+
+int board_init(void)
+{
+	return 0;
+}
+
+u32 get_board_rev(void)
+{
+	return 0;
+}
+
+void reset_cpu(ulong ignored)
+{
+}
+
+int print_cpuinfo(void)
+{
+	return 0;
+}
+
+int dram_init(void)
+{
+	if (fdtdec_setup_mem_size_base() != 0)
+		return -EINVAL;
+
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	fdtdec_setup_memory_banksize();
+
+	/*
+	 * On this SoC, U-Boot is running as an ELF file.  Change the
+	 * relocation address to CONFIG_SYS_TEXT_BASE, so that in
+	 * setup_reloc, gd->reloc_off works out to 0, effectively
+	 * disabling relocation.  Otherwise U-Boot hangs in the setup
+	 * instructions just before relocate_code in
+	 * arch/arm/lib/crt0.S.
+	 */
+	gd->relocaddr = CONFIG_SYS_TEXT_BASE;
+
+	return 0;
+}
+
+void enable_caches(void)
+{
+	/*
+	 * This port assumes that the prior stage bootloader has
+	 * enabled I-cache and D-cache already.  Implementing this
+	 * function silences the warning in the default function.
+	 */
+}
+
+int timer_init(void)
+{
+	gd->arch.timer_rate_hz = readl(BCMSTB_TIMER_FREQUENCY);
+
+	return 0;
+}
+
+ulong get_tbclk(void)
+{
+	return gd->arch.timer_rate_hz;
+}
+
+uint64_t get_ticks(void)
+{
+	gd->timebase_h = readl(BCMSTB_TIMER_HIGH);
+	gd->timebase_l = readl(BCMSTB_TIMER_LOW);
+
+	return ((uint64_t)gd->timebase_h << 32) | gd->timebase_l;
+}
+
+int board_late_init(void)
+{
+	debug("Arguments from prior stage bootloader:\n");
+	debug("General Purpose Register 0: 0x%x\n", bcmstb_boot_parameters.r0);
+	debug("General Purpose Register 1: 0x%x\n", bcmstb_boot_parameters.r1);
+	debug("General Purpose Register 2: 0x%x\n", bcmstb_boot_parameters.r2);
+	debug("General Purpose Register 3: 0x%x\n", bcmstb_boot_parameters.r3);
+	debug("Stack Pointer Register:     0x%x\n", bcmstb_boot_parameters.sp);
+	debug("Link Register:              0x%x\n", bcmstb_boot_parameters.lr);
+	debug("Assuming timer frequency register at: 0x%p\n",
+	      (void *)BCMSTB_TIMER_FREQUENCY);
+	debug("Read timer frequency (in Hz): %ld\n", gd->arch.timer_rate_hz);
+	debug("Prior stage provided DTB at: 0x%p\n",
+	      (void *)prior_stage_fdt_address);
+
+	/*
+	 * Set fdtcontroladdr in the environment so that scripts can
+	 * refer to it, for example, to reuse it for fdtaddr.
+	 */
+	env_set_hex("fdtcontroladdr", prior_stage_fdt_address);
+
+	/*
+	 * Do not set machid to the machine identifier value provided
+	 * by the prior stage bootloader (bcmstb_boot_parameters.r1)
+	 * because we're using a device tree to boot Linux.
+	 */
+
+	return 0;
+}