GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)

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lai
2026-09-06 03:52:57 +08:00
commit b1928b41c0
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# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
if VENDOR_CONGATEC
choice
prompt "Mainboard model"
optional
config TARGET_CONGA_QEVAL20_QA3_E3845
bool "congatec QEVAL 2.0 & conga-QA3/E3845"
select BOARD_LATE_INIT
imply SCSI
help
This is the congatec Qseven 2.0 evaluation carrier board
(conga-QEVAL) equipped with the conga-QA3/E3845-4G SoM.
It contains an Atom E3845 with Ethernet, micro-SD, USB 2,
USB 3, SATA, serial console and HDMI 1.3 video out.
It requires some binary blobs - see README.x86 for details.
Note that PCIE_ECAM_BASE is set up by the FSP so the value used
by U-Boot matches that value.
config TARGET_THEADORABLE_X86_CONGA_QA3_E3845
bool "theadorable-x86 baseboard & conga-QA3/E3845"
help
This is the theadorable-x86 baseboard board equipped with the
conga-QA3/E3845-4G SoM. It contains an Atom E3845 with Ethernet,
micro-SD, USB 2, USB 3, SATA, serial console and HDMI 1.3 video
out. It requires some binary blobs - see README.x86 for details.
Note that PCIE_ECAM_BASE is set up by the FSP so the value used
by U-Boot matches that value.
endchoice
source "board/congatec/conga-qeval20-qa3-e3845/Kconfig"
endif
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if TARGET_CGTQMX6EVAL
config SYS_BOARD
default "cgtqmx6eval"
config SYS_VENDOR
default "congatec"
config SYS_CONFIG_NAME
default "cgtqmx6eval"
endif
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CGTQMX6EVAL BOARD
M: Otavio Salvador <otavio@ossystems.com.br>
S: Maintained
F: board/congatec/cgtqmx6eval/
F: include/configs/cgtqmx6eval.h
F: configs/cgtqmx6eval_defconfig
@@ -0,0 +1,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
#
# (C) Copyright 2011 Freescale Semiconductor, Inc.
# (C) Copyright 2013 Adeneo Embedded <www.adeneo-embedded.com>
obj-y := cgtqmx6eval.o
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U-Boot for the Congatec QMX6 boards
This file contains information for the port of U-Boot to the Congatec
QMX6 boards.
1. Building U-Boot
------------------
- Build U-Boot for Congatec QMX6 boards:
$ make mrproper
$ make cgtqmx6eval_defconfig
$ make
This will generate the following binaries:
- SPL
- u-boot.img
2. Flashing U-Boot in the SPI NOR
---------------------------------
Copy SPL and u-boot.img to the exported TFTP directory of the
host PC (/tftpboot , for example).
=> sf probe
=> setenv serverip <server_ip_address>
=> setenv ipaddr <board_ip_address>
=> tftp 0x12000000 SPL
=> sf erase 0x0 0x10000
=> sf write 0x12000000 0x400 0x10000
=> tftp 0x12000000 u-boot.img
=> sf erase 0x10000 0x70000
=> sf write 0x12000000 0x10000 0x70000
Reboot the board and the new U-Boot should come up.
3. Booting from the SD card
---------------------------
- Flash the SPL image into the SD card:
sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync
- Flash the u-boot.img image into the SD card:
sudo dd if=u-boot.img of=/dev/mmcblk0 bs=1k seek=69; sync
- Insert the SD card into the big slot.
The boot medium of Congatec QMX6 boards is the SPI NOR flash, so boot
the board from SPI first.
It is also possible to boot from the SD card slot by using the 'bmode'
command:
=> bmode esdhc4
And then the U-Boot from the big slot will boot.
Note: If the "bmode" command is not available from your pre-installed U-Boot,
these instruction will produce the same effect:
=> mw.l 0x20d8040 0x3850
=> mw.l 0x020d8044 0x10000000
=> reset
File diff suppressed because it is too large Load Diff
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config SYS_BOARD
default "conga-qeval20-qa3-e3845"
config SYS_VENDOR
default "congatec"
config SYS_SOC
default "baytrail"
config SYS_CONFIG_NAME
default "conga-qeval20-qa3-e3845" if TARGET_CONGA_QEVAL20_QA3_E3845
default "theadorable-x86-conga-qa3-e3845" if TARGET_THEADORABLE_X86_CONGA_QA3_E3845
config SYS_TEXT_BASE
default 0xfff00000
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
select INTEL_BAYTRAIL
select BOARD_ROMSIZE_KB_8192
select BOARD_EARLY_INIT_F
select BOARD_LATE_INIT
select SPI_FLASH_STMICRO
imply SPI_FLASH_SPANSION
imply SPI_FLASH_WINBOND
select SERIAL_RX_BUFFER
config PCIE_ECAM_BASE
default 0xe0000000
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congatec EVAL20-QA3-E3845
M: Stefan Roese <sr@denx.de>
S: Maintained
F: board/congatec/conga-qeval20-qa3-e3845
F: include/configs/conga-qeval20-qa3-e3845.h
F: include/configs/theadorable-x86-conga-qa3-e3845.h
F: configs/conga-qeval20-qa3-e3845_defconfig
F: configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
F: configs/theadorable-x86-conga-qa3-e3845_defconfig
F: configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
F: arch/x86/dts/conga-qeval20-qa3-e3845.dts
@@ -0,0 +1,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2015, Google, Inc
obj-y += conga-qeval20-qa3.o start.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
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------------------------------
U-Boot console UART selection:
------------------------------
The U-Boot port for this congatec board currently supports two different
configurations (defconfig files). The only difference is the UART that
is used as the U-Boot console UART. The default defconfig file:
conga-qeval20-qa3-e3845_defconfig
provides this console on the UART0 which is provided via a Winbond
Super-IO chip connected on the congatec Qseven 2.0 evaluation carrier
board (conga-QEVAL). This UART is the one provided with a SubD9
connector on the mainboard (the low one). The 2nd defconfig file:
conga-qeval20-qa3-e3845-internal-uart_defconfig
provides the U-Boot console on the BayTrail internal legacy UART,
which is routed from the QSeven SoM to the X300 connector on the
baseboard. Here is called COM2. The baseboard already provides the
RS232 level shifters. So a TTL-USB UART adapter does not work in
this case. The signals need to get connected directly to the
RS232 level signals of the PC UART via some adapter cable.
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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
*/
/* Power Button */
Device (PWRB)
{
Name(_HID, EISAID("PNP0C0C"))
}
/* TODO: Need add Winbond SuperIO chipset W83627 ASL codes */
@@ -0,0 +1,68 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
#include <common.h>
#include <i2c.h>
#include <init.h>
#include <winbond_w83627.h>
#include <asm/gpio.h>
#include <asm/ibmpc.h>
#include <asm/pnp_def.h>
int board_early_init_f(void)
{
#ifndef CONFIG_INTERNAL_UART
/*
* The FSP enables the BayTrail internal legacy UART (again).
* Disable it again, so that the Winbond one can be used.
*/
setup_internal_uart(0);
/* Enable the legacy UART in the Winbond W83627 Super IO chip */
winbond_enable_serial(PNP_DEV(WINBOND_IO_PORT, W83627DHG_SP1),
UART0_BASE, UART0_IRQ);
#endif
return 0;
}
int board_late_init(void)
{
struct udevice *dev;
u8 buf[8];
int ret;
/* Configure SMSC USB2513 USB Hub: 7bit address 0x2c */
ret = i2c_get_chip_for_busnum(0, 0x2c, 1, &dev);
if (ret) {
printf("Cannot find USB2513: %d\n", ret);
return 0;
}
/*
* The first access to the USB Hub fails sometimes, so lets read
* a dummy byte to be sure here
*/
dm_i2c_read(dev, 0x00, buf, 1);
/*
* The SMSC hub is not visible on the I2C bus after the first
* configuration at power-up. The following code deliberately
* does not report upon failure of these I2C write calls.
*/
buf[0] = 0x93;
dm_i2c_write(dev, 0x06, buf, 1);
buf[0] = 0xaa;
dm_i2c_write(dev, 0xf8, buf, 1);
buf[0] = 0x0f;
dm_i2c_write(dev, 0xfa, buf, 1);
buf[0] = 0x01;
dm_i2c_write(dev, 0xff, buf, 1);
return 0;
}
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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
*/
DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x00010000)
{
/* platform specific */
#include <asm/arch/acpi/platform.asl>
/* board specific */
#include "acpi/mainboard.asl"
}
@@ -0,0 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015, Google, Inc
*/
.globl early_board_init
early_board_init:
jmp early_board_init_ret