GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)
This commit is contained in:
@@ -0,0 +1,15 @@
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if TARGET_M54418TWR
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config SYS_CPU
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default "mcf5445x"
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config SYS_BOARD
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default "m54418twr"
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config SYS_VENDOR
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default "freescale"
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config SYS_CONFIG_NAME
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default "M54418TWR"
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endif
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@@ -0,0 +1,11 @@
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M54418TWR BOARD
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#M: -
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S: Maintained
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F: board/freescale/m54418twr/
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F: include/configs/M54418TWR.h
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F: configs/M54418TWR_defconfig
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F: configs/M54418TWR_nand_mii_defconfig
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F: configs/M54418TWR_nand_rmii_defconfig
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F: configs/M54418TWR_nand_rmii_lowfreq_defconfig
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F: configs/M54418TWR_serial_mii_defconfig
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F: configs/M54418TWR_serial_rmii_defconfig
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@@ -0,0 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0+
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# Copyright 2010-2012 Freescale Semiconductor, Inc.
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# TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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obj-y = m54418twr.o
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extra-y += sbf_dram_init.o
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@@ -0,0 +1,114 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2010-2012 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*/
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#include <common.h>
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#include <spi.h>
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#include <asm/io.h>
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#include <asm/immap.h>
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#include <mmc.h>
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#include <fsl_esdhc_imx.h>
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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/*
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* need to to:
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* Check serial flash size. if 2mb evb, else 8mb demo
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*/
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puts("Board: ");
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puts("Freescale MCF54418 Tower System\n");
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return 0;
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};
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int dram_init(void)
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{
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u32 dramsize;
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#if defined(CONFIG_SERIAL_BOOT)
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/*
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* Serial Boot: The dram is already initialized in start.S
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* only require to return DRAM size
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*/
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dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
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#else
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sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM);
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ccm_t *ccm = (ccm_t *)MMAP_CCM;
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gpio_t *gpio = (gpio_t *) MMAP_GPIO;
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pm_t *pm = (pm_t *) MMAP_PM;
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u32 i;
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dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
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for (i = 0x13; i < 0x20; i++) {
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if (dramsize == (1 << i))
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break;
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}
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out_8(&pm->pmcr0, 0x2E);
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out_8(&gpio->mscr_sdram, 1);
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clrbits_be16(&ccm->misccr2, CCM_MISCCR2_FBHALF);
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setbits_be16(&ccm->misccr2, CCM_MISCCR2_DDR2CLK);
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out_be32(&sdram->rcrcr, 0x40000000);
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out_be32(&sdram->padcr, 0x01030203);
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out_be32(&sdram->cr00, 0x01010101);
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out_be32(&sdram->cr01, 0x00000101);
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out_be32(&sdram->cr02, 0x01010100);
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out_be32(&sdram->cr03, 0x01010000);
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out_be32(&sdram->cr04, 0x00010101);
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out_be32(&sdram->cr06, 0x00010100);
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out_be32(&sdram->cr07, 0x00000001);
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out_be32(&sdram->cr08, 0x01000001);
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out_be32(&sdram->cr09, 0x00000100);
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out_be32(&sdram->cr10, 0x00010001);
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out_be32(&sdram->cr11, 0x00000200);
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out_be32(&sdram->cr12, 0x01000002);
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out_be32(&sdram->cr13, 0x00000000);
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out_be32(&sdram->cr14, 0x00000100);
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out_be32(&sdram->cr15, 0x02000100);
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out_be32(&sdram->cr16, 0x02000407);
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out_be32(&sdram->cr17, 0x02030007);
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out_be32(&sdram->cr18, 0x02000100);
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out_be32(&sdram->cr19, 0x0A030203);
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out_be32(&sdram->cr20, 0x00020708);
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out_be32(&sdram->cr21, 0x00050008);
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out_be32(&sdram->cr22, 0x04030002);
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out_be32(&sdram->cr23, 0x00000004);
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out_be32(&sdram->cr24, 0x020A0000);
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out_be32(&sdram->cr25, 0x0C00000E);
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out_be32(&sdram->cr26, 0x00002004);
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out_be32(&sdram->cr28, 0x00100010);
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out_be32(&sdram->cr29, 0x00100010);
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out_be32(&sdram->cr31, 0x07990000);
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out_be32(&sdram->cr40, 0x00000000);
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out_be32(&sdram->cr41, 0x00C80064);
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out_be32(&sdram->cr42, 0x44520002);
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out_be32(&sdram->cr43, 0x00C80023);
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out_be32(&sdram->cr45, 0x0000C350);
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out_be32(&sdram->cr56, 0x04000000);
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out_be32(&sdram->cr57, 0x03000304);
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out_be32(&sdram->cr58, 0x40040000);
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out_be32(&sdram->cr59, 0xC0004004);
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out_be32(&sdram->cr60, 0x0642C000);
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out_be32(&sdram->cr61, 0x00000642);
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asm("tpf");
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out_be32(&sdram->cr09, 0x01000100);
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udelay(100);
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#endif
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gd->ram_size = dramsize;
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return 0;
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};
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int testdram(void)
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{
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return 0;
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}
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@@ -0,0 +1,85 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Board-specific sbf ddr/sdram init.
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*
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* (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
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*/
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.global sbf_dram_init
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.text
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sbf_dram_init:
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move.l #0xFC04002D, %a1
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move.b #46, (%a1) /* DDR */
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/* slew settings */
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move.l #0xEC094060, %a1
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move.b #0, (%a1)
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/* use vco instead of cpu*2 clock for ddr clock */
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move.l #0xEC09001A, %a1
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move.w #0xE01D, (%a1)
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/* DDR settings */
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move.l #0xFC0B8180, %a1
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move.l #0x00000000, (%a1)
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move.l #0x40000000, (%a1)
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move.l #0xFC0B81AC, %a1
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move.l #0x01030203, (%a1)
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move.l #0xFC0B8000, %a1
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move.l #0x01010101, (%a1)+ /* 0x00 */
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move.l #0x00000101, (%a1)+ /* 0x04 */
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move.l #0x01010100, (%a1)+ /* 0x08 */
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move.l #0x01010000, (%a1)+ /* 0x0C */
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move.l #0x00010101, (%a1)+ /* 0x10 */
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move.l #0xFC0B8018, %a1
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move.l #0x00010100, (%a1)+ /* 0x18 */
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move.l #0x00000001, (%a1)+ /* 0x1C */
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move.l #0x01000001, (%a1)+ /* 0x20 */
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move.l #0x00000100, (%a1)+ /* 0x24 */
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move.l #0x00010001, (%a1)+ /* 0x28 */
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move.l #0x00000200, (%a1)+ /* 0x2C */
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move.l #0x01000002, (%a1)+ /* 0x30 */
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move.l #0x00000000, (%a1)+ /* 0x34 */
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move.l #0x00000100, (%a1)+ /* 0x38 */
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move.l #0x02000100, (%a1)+ /* 0x3C */
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move.l #0x02000407, (%a1)+ /* 0x40 */
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move.l #0x02030007, (%a1)+ /* 0x44 */
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move.l #0x02000100, (%a1)+ /* 0x48 */
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move.l #0x0A030203, (%a1)+ /* 0x4C */
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move.l #0x00020708, (%a1)+ /* 0x50 */
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move.l #0x00050008, (%a1)+ /* 0x54 */
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move.l #0x04030002, (%a1)+ /* 0x58 */
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move.l #0x00000004, (%a1)+ /* 0x5C */
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move.l #0x020A0000, (%a1)+ /* 0x60 */
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move.l #0x0C00000E, (%a1)+ /* 0x64 */
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move.l #0x00002004, (%a1)+ /* 0x68 */
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move.l #0x00000000, (%a1)+ /* 0x6C */
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move.l #0x00100010, (%a1)+ /* 0x70 */
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move.l #0x00100010, (%a1)+ /* 0x74 */
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move.l #0x00000000, (%a1)+ /* 0x78 */
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move.l #0x07990000, (%a1)+ /* 0x7C */
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move.l #0xFC0B80A0, %a1
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move.l #0x00000000, (%a1)+ /* 0xA0 */
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move.l #0x00C80064, (%a1)+ /* 0xA4 */
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move.l #0x44520002, (%a1)+ /* 0xA8 */
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move.l #0x00C80023, (%a1)+ /* 0xAC */
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move.l #0xFC0B80B4, %a1
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move.l #0x0000C350, (%a1) /* 0xB4 */
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move.l #0xFC0B80E0, %a1
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move.l #0x04000000, (%a1)+ /* 0xE0 */
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move.l #0x03000304, (%a1)+ /* 0xE4 */
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move.l #0x40040000, (%a1)+ /* 0xE8 */
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move.l #0xC0004004, (%a1)+ /* 0xEC */
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move.l #0x0642C000, (%a1)+ /* 0xF0 */
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move.l #0x00000642, (%a1)+ /* 0xF4 */
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move.l #0xFC0B8024, %a1
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tpf
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move.l #0x01000100, (%a1) /* 0x24 */
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move.l #0x2000, %d1
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bsr asm_delay
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rts
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