GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)
This commit is contained in:
@@ -0,0 +1,15 @@
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if TARGET_HIKEY960
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config SYS_BOARD
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default "hikey960"
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config SYS_VENDOR
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default "hisilicon"
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config SYS_SOC
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default "hi3660"
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config SYS_CONFIG_NAME
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default "hikey960"
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endif
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@@ -0,0 +1,6 @@
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HIKEY960 BOARD
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M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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S: Maintained
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F: board/hisilicon/hikey960
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F: include/configs/hikey960.h
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F: configs/hikey960_defconfig
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@@ -0,0 +1,3 @@
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# SPDX-License-Identifier: GPL-2.0+
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obj-y := hikey960.o
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@@ -0,0 +1,247 @@
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Introduction
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============
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HiKey960 is one of the 96Boards Consumer Edition board from HiSilicon.
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The board/SoC has: -
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* HiSilicon Kirin960 (HI3660) SoC with 4xCortex-A73 and 4xCortex-A53
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* ARM Mali G71 MP8 GPU
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* 3GB LPDDR4 SDRAM
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* 32GB UFS Flash Storage
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* microSD
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* 802.11a/b/g/n WiFi, Bluetooth
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More information about this board can be found in 96Boards website:
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https://www.96boards.org/product/hikey960/
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Currently the u-boot port supports: -
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* SD card
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Compile from source
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===================
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First get all the sources
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> mkdir -p ~/hikey960/src ~/hikey960/bin
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> cd ~/hikey960/src
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> git clone https://github.com/ARM-software/arm-trusted-firmware
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> git clone https://github.com/96boards-hikey/OpenPlatformPkg -b testing/hikey960_v1.3.4
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> git clone https://github.com/96boards-hikey/l-loader -b testing/hikey960_v1.2
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> wget http://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey960/release/config
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> wget http://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey960/release/hisi-sec_usb_xloader.img
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> wget http://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey960/release/hisi-sec_uce_boot.img
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> wget http://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey960/release/sec_xloader.img
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> wget http://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey960/release/recovery.bin
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> wget http://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey960/release/hikey_idt
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Get the SCP_BL2 lpm3.img binary. It is shipped as part of the UEFI source.
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The latest version can be obtained from the OpenPlatformPkg repo.
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> cp OpenPlatformPkg/Platforms/Hisilicon/HiKey960/Binary/lpm3.img ~/hikey960/bin/
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Compile U-Boot
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==============
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> cd ~/hikey960/src/u-boot
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> make CROSS_COMPILE=aarch64-linux-gnu- hikey960_defconfig
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> make CROSS_COMPILE=aarch64-linux-gnu-
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> cp u-boot.bin ~/hikey960/bin/
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Compile ARM Trusted Firmware (ATF)
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==================================
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> cd ~/hikey960/src/arm-trusted-firmware
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> make CROSS_COMPILE=aarch64-linux-gnu- all fip \
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SCP_BL2=~/hikey960/bin/lpm3.img \
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BL33=~/hikey960/bin/u-boot.bin DEBUG=1 PLAT=hikey960
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Copy the resulting FIP binary
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> cp build/hikey960/debug/fip.bin ~/hikey960/bin
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Compile l-loader
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================
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> cd ~/hikey960/src/l-loader
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> ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/bl1.bin
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> ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/bl2.bin
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> ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/fip.bin
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> ln -sf ~/hikey960/bin/u-boot.bin
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> make hikey960 PTABLE_LST=linux-32g NS_BL1U=u-boot.bin
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Copy the resulting binaries
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> cp *.img ~/hikey960/bin
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> cp l-loader.bin ~/hikey960/bin
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These instructions are adapted from
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https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/plat/hikey960.rst
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Setup Console
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=============
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Install ser2net. Use telnet as the console since UEFI in recovery mode
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output window fails to display in minicom.
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> sudo apt-get install ser2net
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Configure ser2net
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> sudo vi /etc/ser2net.conf
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Append one line for serial-over-USB in #ser2net.conf
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> 2004:telnet:0:/dev/ttyUSB0:115200 8DATABITS NONE 1STOPBIT banner
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Start ser2net
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> sudo killall ser2net
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> sudo ser2net -u
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Open the console.
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> telnet localhost 2004
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And you could open the console remotely, too.
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Flashing
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========
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1. Boot Hikey960 into recovery mode as per the below document:
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https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey960/installation/board-recovery.md
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Once Hikey960 is in recovery mode, flash the recovery binary:
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> cd ~/hikey960/src
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> chmod +x ./hikey_idt
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> sudo ./hikey_idt -c config -p /dev/ttyUSB1
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Now move to the Hikey960 console and press `f` during UEFI boot. This
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will allow the board to boot into fastboot mode. Once the board is in
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fastboot mode, you should see the ID of the HiKey960 board using the
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following command
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> sudo fastboot devices
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1ED3822A018E3372 fastboot
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3. Flash the images
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Now, the images can be flashed using fastboot:
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> sudo fastboot flash ptable ~/hikey960/bin/prm_ptable.img
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> sudo fastboot flash xloader ~/hikey960/bin/sec_xloader.img
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> sudo fastboot flash fastboot ~/hikey960/bin/l-loader.bin
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> sudo fastboot flash fip ~/hikey960/bin/fip.bin
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4. Set the "Boot Mode" switch to OFF position for normal boot mode.
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Then power on HiKey960
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Observe the console traces using UART6 on the Low Speed Expansion header:
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NOTICE: BL2: v2.1(debug):v2.1-531-g3ee48f40
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NOTICE: BL2: Built : 18:15:58, Aug 2 2019
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INFO: BL2: Doing platform setup
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INFO: UFS LUN0 contains 1024 blocks with 4096-byte size
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INFO: UFS LUN1 contains 1024 blocks with 4096-byte size
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INFO: UFS LUN2 contains 2048 blocks with 4096-byte size
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INFO: UFS LUN3 contains 7805952 blocks with 4096-byte size
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INFO: ufs: change power mode success
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INFO: BL2: Loading image id 2
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INFO: Loading image id=2 at address 0x89c80000
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INFO: Image id=2 loaded: 0x89c80000 - 0x89cb5088
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INFO: BL2: Initiating SCP_BL2 transfer to SCP
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INFO: BL2: SCP_BL2: 0x89c80000@0x35088
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INFO: BL2: SCP_BL2 HEAD:
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INFO: BL2: SCP_BL2 0x7000 0x179 0x159 0x149
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INFO: BL2: SCP_BL2 0x189 0x18b 0x18d 0x0
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INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x18f
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INFO: BL2: SCP_BL2 0x191 0x0 0x193 0x195
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INFO: BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd
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INFO: BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd
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INFO: BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd
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INFO: BL2: SCP_BL2 0x4d454355 0x43494741 0x424d554e 0x21215245
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INFO: BL2: SCP_BL2 0x4a054904 0x42912000 0xf841bfbc 0xe7fa0b04
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INFO: BL2: SCP_BL2 0xb88cf000 0x3b18 0x3d1c 0x6809493e
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INFO: BL2: SCP_BL2 0x4613680a 0x201f102 0xf0002a04 0x600a804c
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INFO: BL2: SCP_BL2 0x204f04f 0xf203fb02 0xf102440a 0x60100204
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INFO: BL2: SCP_BL2 0x160f04f 0xf103fb01 0x68004834 0x61044408
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INFO: BL2: SCP_BL2 0x61866145 0xf8c061c7 0xf8c08020 0xf8c09024
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INFO: BL2: SCP_BL2 0xf8c0a028 0xf3efb02c 0xf3ef8208 0x68118309
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INFO: BL2: SCP_BL2 0xf1026401 0xf0110204 0xbf070f04 0x46113220
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INFO: BL2: SCP_BL2 TAIL:
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INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
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INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
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INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
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INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
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INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
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INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
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INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
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INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
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INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
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INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
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INFO: BL2: SCP_BL2 0x0 0x19cad151 0x19b80040 0x0
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INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
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INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
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INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
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INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
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INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
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INFO: BL2: SCP_BL2 transferred to SCP
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INFO: start fw loading
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INFO: fw load success
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WARNING: BL2: Platform setup already done!!
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INFO: BL2: Loading image id 3
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INFO: Loading image id=3 at address 0x1ac58000
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INFO: Image id=3 loaded: 0x1ac58000 - 0x1ac63024
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INFO: BL2: Loading image id 5
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INFO: Loading image id=5 at address 0x1ac98000
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INFO: Image id=5 loaded: 0x1ac98000 - 0x1ad0819c
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NOTICE: BL2: Booting BL31
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INFO: Entry point address = 0x1ac58000
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INFO: SPSR = 0x3cd
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NOTICE: BL31: v2.1(debug):v2.1-531-g3ee48f40
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NOTICE: BL31: Built : 18:16:01, Aug 2 2019
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INFO: ARM GICv2 driver initialized
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INFO: BL31: Initializing runtime services
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INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
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INFO: plat_setup_psci_ops: sec_entrypoint=0x1ac580fc
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INFO: BL31: Preparing for EL3 exit to normal world
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INFO: Entry point address = 0x1ac98000
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INFO: SPSR = 0x3c9
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U-Boot 2019.07-00628-g286f05a6fc-dirty (Aug 02 2019 - 17:14:05 +0530)
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Hikey960
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DRAM: 3 GiB
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PSCI: v1.1
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MMC: dwmmc1@ff37f000: 0
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Loading Environment from EXT4... ** File not found /uboot.env **
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** Unable to read "/uboot.env" from mmc0:2 **
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In: serial@fff32000
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Out: serial@fff32000
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Err: serial@fff32000
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Net: Net Initialization Skipped
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No ethernet found.
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Hit any key to stop autoboot: 0
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switch to partitions #0, OK
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mmc0 is current device
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Scanning mmc 0:1...
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Found /extlinux/extlinux.conf
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Retrieving file: /extlinux/extlinux.conf
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201 bytes read in 12 ms (15.6 KiB/s)
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1: hikey960-kernel
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Retrieving file: /Image
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24689152 bytes read in 4377 ms (5.4 MiB/s)
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append: earlycon=pl011,mmio32,0xfff32000 console=ttyAMA6,115200 rw root=/dev/mmcblk0p2 rot
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Retrieving file: /hi3660-hikey960.dtb
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35047 bytes read in 14 ms (2.4 MiB/s)
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## Flattened Device Tree blob at 10000000
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Booting using the fdt blob at 0x10000000
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Using Device Tree in place at 0000000010000000, end 000000001000b8e6
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|
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Starting kernel ...
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|
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[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
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[ 0.000000] Linux version 5.2.0-03138-gd75da80dce39 (mani@Mani-XPS-13-9360) (gcc versi9
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[ 0.000000] Machine model: HiKey960
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[ 0.000000] earlycon: pl11 at MMIO32 0x00000000fff32000 (options '')
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[ 0.000000] printk: bootconsole [pl11] enabled
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[ 0.000000] efi: Getting EFI parameters from FDT:
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@@ -0,0 +1,186 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
|
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* (C) Copyright 2019 Linaro
|
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* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
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*/
|
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|
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#include <common.h>
|
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#include <dm.h>
|
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#include <errno.h>
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#include <asm/io.h>
|
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#include <asm/arch/hi3660.h>
|
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#include <asm/armv8/mmu.h>
|
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#include <asm/psci.h>
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#include <linux/arm-smccc.h>
|
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#include <linux/psci.h>
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|
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#define PMIC_REG_TO_BUS_ADDR(x) (x << 2)
|
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#define PMIC_VSEL_MASK 0x7
|
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|
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DECLARE_GLOBAL_DATA_PTR;
|
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|
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#if !CONFIG_IS_ENABLED(OF_CONTROL)
|
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#include <dm/platform_data/serial_pl01x.h>
|
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|
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static const struct pl01x_serial_platdata serial_platdata = {
|
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.base = HI3660_UART6_BASE,
|
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.type = TYPE_PL011,
|
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.clock = 19200000
|
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};
|
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|
||||
U_BOOT_DEVICE(hikey960_serial0) = {
|
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.name = "serial_pl01x",
|
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.platdata = &serial_platdata,
|
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};
|
||||
#endif
|
||||
|
||||
static struct mm_region hikey_mem_map[] = {
|
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{
|
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.virt = 0x0UL, /* DDR */
|
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.phys = 0x0UL,
|
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.size = 0xC0000000UL,
|
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.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
|
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PTE_BLOCK_INNER_SHARE
|
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}, {
|
||||
.virt = 0xE0000000UL, /* Peripheral block */
|
||||
.phys = 0xE0000000UL,
|
||||
.size = 0x20000000UL,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* List terminator */
|
||||
0,
|
||||
}
|
||||
};
|
||||
|
||||
struct mm_region *mem_map = hikey_mem_map;
|
||||
|
||||
int board_early_init_f(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int misc_init_r(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int dram_init(void)
|
||||
{
|
||||
gd->ram_size = PHYS_SDRAM_1_SIZE;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int dram_init_banksize(void)
|
||||
{
|
||||
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
|
||||
gd->bd->bi_dram[0].size = gd->ram_size;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void hikey960_sd_init(void)
|
||||
{
|
||||
u32 data;
|
||||
|
||||
/* Enable FPLL0 */
|
||||
data = readl(SCTRL_SCFPLLCTRL0);
|
||||
data |= SCTRL_SCFPLLCTRL0_FPLL0_EN;
|
||||
writel(data, SCTRL_SCFPLLCTRL0);
|
||||
|
||||
/* Configure LDO16 */
|
||||
data = readl(PMU_REG_BASE + PMIC_REG_TO_BUS_ADDR(0x79)) &
|
||||
PMIC_VSEL_MASK;
|
||||
data |= 6;
|
||||
writel(data, PMU_REG_BASE + PMIC_REG_TO_BUS_ADDR(0x79));
|
||||
|
||||
data = readl(PMU_REG_BASE + PMIC_REG_TO_BUS_ADDR(0x78));
|
||||
data |= 2;
|
||||
writel(data, PMU_REG_BASE + PMIC_REG_TO_BUS_ADDR(0x78));
|
||||
|
||||
udelay(100);
|
||||
|
||||
/* Configure LDO9 */
|
||||
data = readl(PMU_REG_BASE + PMIC_REG_TO_BUS_ADDR(0x6b)) &
|
||||
PMIC_VSEL_MASK;
|
||||
data |= 5;
|
||||
writel(data, PMU_REG_BASE + PMIC_REG_TO_BUS_ADDR(0x6b));
|
||||
|
||||
data = readl(PMU_REG_BASE + PMIC_REG_TO_BUS_ADDR(0x6a));
|
||||
data |= 2;
|
||||
writel(data, PMU_REG_BASE + PMIC_REG_TO_BUS_ADDR(0x6a));
|
||||
|
||||
udelay(100);
|
||||
|
||||
/* GPIO CD */
|
||||
writel(0, PINMUX4_SDDET);
|
||||
|
||||
/* SD Pinconf */
|
||||
writel(15 << 4, PINCONF3_SDCLK);
|
||||
writel((1 << 0) | (8 << 4), PINCONF3_SDCMD);
|
||||
writel((1 << 0) | (8 << 4), PINCONF3_SDDATA0);
|
||||
writel((1 << 0) | (8 << 4), PINCONF3_SDDATA1);
|
||||
writel((1 << 0) | (8 << 4), PINCONF3_SDDATA2);
|
||||
writel((1 << 0) | (8 << 4), PINCONF3_SDDATA3);
|
||||
|
||||
/* Set SD clock mux */
|
||||
do {
|
||||
data = readl(CRG_REG_BASE + 0xb8);
|
||||
data |= ((1 << 6) | (1 << 6 << 16) | (0 << 4) | (3 << 4 << 16));
|
||||
writel(data, CRG_REG_BASE + 0xb8);
|
||||
|
||||
data = readl(CRG_REG_BASE + 0xb8);
|
||||
} while ((data & ((1 << 6) | (3 << 4))) != ((1 << 6) | (0 << 4)));
|
||||
|
||||
/* Take SD out of reset */
|
||||
writel(1 << 18, CRG_PERRSTDIS4);
|
||||
do {
|
||||
data = readl(CRG_PERRSTSTAT4);
|
||||
} while ((data & (1 << 18)) == (1 << 18));
|
||||
|
||||
/* Enable hclk_gate_sd */
|
||||
data = readl(CRG_REG_BASE + 0);
|
||||
data |= (1 << 30);
|
||||
writel(data, CRG_REG_BASE + 0);
|
||||
|
||||
/* Enable clk_andgt_mmc */
|
||||
data = readl(CRG_REG_BASE + 0xf4);
|
||||
data |= ((1 << 3) | (1 << 3 << 16));
|
||||
writel(data, CRG_REG_BASE + 0xf4);
|
||||
|
||||
/* Enable clk_gate_sd */
|
||||
data = readl(CRG_PEREN4);
|
||||
data |= (1 << 17);
|
||||
writel(data, CRG_PEREN4);
|
||||
do {
|
||||
data = readl(CRG_PERCLKEN4);
|
||||
} while ((data & (1 << 17)) != (1 << 17));
|
||||
}
|
||||
|
||||
static void show_psci_version(void)
|
||||
{
|
||||
struct arm_smccc_res res;
|
||||
|
||||
arm_smccc_smc(ARM_PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0, 0, 0, 0, 0, &res);
|
||||
|
||||
printf("PSCI: v%ld.%ld\n",
|
||||
PSCI_VERSION_MAJOR(res.a0),
|
||||
PSCI_VERSION_MINOR(res.a0));
|
||||
}
|
||||
|
||||
int board_init(void)
|
||||
{
|
||||
/* Init SD */
|
||||
hikey960_sd_init();
|
||||
|
||||
show_psci_version();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void reset_cpu(ulong addr)
|
||||
{
|
||||
psci_system_reset();
|
||||
}
|
||||
Reference in New Issue
Block a user