GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)

source/bootloader/u-boot-2020.01/board/imgtec/boston/Kconfig

@@ -0,0 +1,16 @@
+if TARGET_BOSTON
+
+config SYS_BOARD
+	default "boston"
+
+config SYS_VENDOR
+	default "imgtec"
+
+config SYS_CONFIG_NAME
+	default "boston"
+
+config SYS_TEXT_BASE
+	default 0x9fc00000 if 32BIT
+	default 0xffffffff9fc00000 if 64BIT
+
+endif

source/bootloader/u-boot-2020.01/board/imgtec/boston/MAINTAINERS

@@ -0,0 +1,13 @@
+BOSTON BOARD
+M:	Paul Burton <paul.burton@mips.com>
+S:	Maintained
+F:	board/imgtec/boston/
+F:	include/configs/boston.h
+F:	configs/boston32r2_defconfig
+F:	configs/boston32r2el_defconfig
+F:	configs/boston32r6_defconfig
+F:	configs/boston32r6el_defconfig
+F:	configs/boston64r2_defconfig
+F:	configs/boston64r2el_defconfig
+F:	configs/boston64r6_defconfig
+F:	configs/boston64r6el_defconfig

source/bootloader/u-boot-2020.01/board/imgtec/boston/Makefile

@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Copyright (C) 2016 Imagination Technologies
+
+obj-y += checkboard.o
+obj-y += ddr.o
+obj-y += dt.o
+obj-y += lowlevel_init.o

source/bootloader/u-boot-2020.01/board/imgtec/boston/boston-lcd.h

@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ */
+
+#ifndef __BOARD_BOSTON_LCD_H__
+#define __BOARD_BOSTON_LCD_H__
+
+/**
+ * lowlevel_display() - Display a message on Boston's LCD
+ * @msg: The string to display
+ *
+ * Display the string @msg on the 7 character LCD display of the Boston board.
+ * This is typically used for debug or to present some form of status
+ * indication to the user, allowing faults to be identified when things go
+ * wrong early enough that the UART isn't up.
+ */
+void lowlevel_display(const char msg[static 8]);
+
+#endif /* __BOARD_BOSTON_LCD_H__ */

source/bootloader/u-boot-2020.01/board/imgtec/boston/boston-regs.h

@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ */
+
+#ifndef __BOARD_BOSTON_REGS_H__
+#define __BOARD_BOSTON_REGS_H__
+
+#include <asm/addrspace.h>
+
+#define BOSTON_PLAT_BASE		CKSEG1ADDR(0x17ffd000)
+#define BOSTON_LCD_BASE			CKSEG1ADDR(0x17fff000)
+
+/*
+ * Platform Register Definitions
+ */
+#define BOSTON_PLAT_CORE_CL		(BOSTON_PLAT_BASE + 0x04)
+
+#define BOSTON_PLAT_DDR3STAT		(BOSTON_PLAT_BASE + 0x14)
+# define BOSTON_PLAT_DDR3STAT_CALIB	(1 << 2)
+
+#define BOSTON_PLAT_DDRCONF0		(BOSTON_PLAT_BASE + 0x38)
+# define BOSTON_PLAT_DDRCONF0_SIZE	(0xf << 0)
+
+#endif /* __BOARD_BOSTON_REGS_H__ */

source/bootloader/u-boot-2020.01/board/imgtec/boston/checkboard.c

@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ */
+
+#include <common.h>
+
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+
+#include "boston-lcd.h"
+#include "boston-regs.h"
+
+int checkboard(void)
+{
+	u32 changelist;
+
+	lowlevel_display("U-boot  ");
+
+	printf("Board: MIPS Boston\n");
+
+	printf("CPU:   0x%08x", read_c0_prid());
+	changelist = __raw_readl((uint32_t *)BOSTON_PLAT_CORE_CL);
+	if (changelist > 1)
+		printf(" cl%x", changelist);
+	putc('\n');
+
+	return 0;
+}

source/bootloader/u-boot-2020.01/board/imgtec/boston/config.mk

@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+quiet_cmd_srec_cat = SRECCAT $@
+      cmd_srec_cat = srec_cat -output $@ -$2 \
+			$< -binary \
+			-fill 0x00 -within $< -binary -range-pad 16 \
+			-offset $3
+
+u-boot.mcs: u-boot.bin
+	$(call cmd,srec_cat,intel,0x7c00000)
+
+# if srec_cat is present build u-boot.mcs by default
+has_srec_cat = $(call try-run,srec_cat -VERSion,y,n)
+ALL-$(has_srec_cat) += u-boot.mcs
+CLEAN_FILES += u-boot.mcs

source/bootloader/u-boot-2020.01/board/imgtec/boston/ddr.c

@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ */
+
+#include <common.h>
+#include <init.h>
+
+#include <asm/io.h>
+
+#include "boston-regs.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+	u32 ddrconf0 = __raw_readl((uint32_t *)BOSTON_PLAT_DDRCONF0);
+
+	gd->ram_size = (phys_size_t)(ddrconf0 & BOSTON_PLAT_DDRCONF0_SIZE) <<
+			30;
+
+	return 0;
+}
+
+ulong board_get_usable_ram_top(ulong total_size)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+
+	if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) {
+		/* 2GB wrapped around to 0 */
+		return CKSEG0ADDR(256 << 20);
+	}
+
+	return min_t(unsigned long, gd->ram_top, CKSEG0ADDR(256 << 20));
+}

source/bootloader/u-boot-2020.01/board/imgtec/boston/dt.c

@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ */
+
+#include <common.h>
+#include <fdt_support.h>
+
+int ft_board_setup(void *blob, bd_t *bd)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+	u64 mem_start[2], mem_size[2];
+	int mem_regions;
+
+	mem_start[0] = 0;
+	mem_size[0] = min_t(u64, 256llu << 20, gd->ram_size);
+	mem_regions = 1;
+
+	if (gd->ram_size > mem_size[0]) {
+		mem_start[1] = 0x80000000 + mem_size[0];
+		mem_size[1] = gd->ram_size - mem_size[0];
+		mem_regions++;
+	}
+
+	return fdt_fixup_memory_banks(blob, mem_start, mem_size, mem_regions);
+}

source/bootloader/u-boot-2020.01/board/imgtec/boston/lowlevel_init.S

@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ */
+
+#include <config.h>
+
+#include <asm/addrspace.h>
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+
+#include "boston-regs.h"
+
+.data
+
+msg_ddr_cal:	.ascii "DDR Cal "
+msg_ddr_ok:	.ascii "DDR OK  "
+
+.text
+
+LEAF(lowlevel_init)
+	move	s0, ra
+
+	PTR_LA	a0, msg_ddr_cal
+	bal	lowlevel_display
+
+	PTR_LI	t0, BOSTON_PLAT_DDR3STAT
+1:	lw	t1, 0(t0)
+	andi	t1, t1, BOSTON_PLAT_DDR3STAT_CALIB
+	beqz	t1, 1b
+
+	PTR_LA	a0, msg_ddr_ok
+	bal	lowlevel_display
+
+	jr	s0
+	END(lowlevel_init)
+
+LEAF(lowlevel_display)
+	.set	push
+	.set	noat
+	PTR_LI	AT, BOSTON_LCD_BASE
+#ifdef CONFIG_64BIT
+	ld	k1, 0(a0)
+	sd	k1, 0(AT)
+#else
+	lw	k1, 0(a0)
+	sw	k1, 0(AT)
+	lw	k1, 4(a0)
+	sw	k1, 4(AT)
+#endif
+	.set	pop
+	jr	ra
+	END(lowlevel_display)