GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)
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// SPDX-License-Identifier: GPL-2.0+
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#include <common.h>
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#include <command.h>
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#include <malloc.h>
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#include <linux/io.h>
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#include "ddr_if.h"
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#include "linux/lotus/i2c.h"
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#include "linux/lotus/securec.h"
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#define DDR_CMD_DATAEYE_STR "dataeye"
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#define DDR_CMD_GCAI_INFO "gcai-info"
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static struct ddr_training_result *g_ddrtr_result;
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static int ddr_map_show(void);
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static int cmd_ddr_match(const char *str, int *cmd)
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{
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if (!strncmp(str, DDR_CMD_DATAEYE_STR, sizeof(DDR_CMD_DATAEYE_STR))) {
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*cmd = DDR_TRAINING_CMD_DATAEYE;
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} else if (!strncmp(str, DDR_CMD_GCAI_INFO,
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sizeof(DDR_CMD_GCAI_INFO))) {
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*cmd = DDR_CMD_SHOW_GCAI_INFO;
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} else {
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printf("Command [ddr %s] is not supported\n", str);
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return -1;
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}
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return 0;
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}
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static int cmd_ddr_handle(int cmd)
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{
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if (cmd == DDR_TRAINING_CMD_DATAEYE)
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return get_result(g_ddrtr_result);
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return 0;
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}
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static int cmd_ddr_dispatch(int cmd)
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{
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int result;
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result = cmd_ddr_handle(cmd);
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if (result < 0)
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return -1;
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switch (cmd) {
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case DDR_TRAINING_CMD_DATAEYE:
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ddr_cmd_result_display(g_ddrtr_result, DDR_TRAINING_CMD_DATAEYE);
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break;
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case DDR_CMD_SHOW_GCAI_INFO:
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ddr_map_show();
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break;
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default:
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break;
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}
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return result;
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}
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static int do_ddr_training(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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const char *str = NULL;
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int cmd;
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int ret = 0;
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if (argc != 2)
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return -1;
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str = argv[1];
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if (cmd_ddr_match(str, &cmd)) {
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ret = -1;
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goto out;
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}
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g_ddrtr_result = malloc(sizeof(struct ddr_training_result));
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if (g_ddrtr_result == NULL) {
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printf("Fail to alloc DDR Training result memory!\n");
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ret = -1;
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goto out;
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}
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if (cmd_ddr_dispatch(cmd)) {
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ret = -1;
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goto out;
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}
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out:
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if (g_ddrtr_result)
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free(g_ddrtr_result);
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return ret;
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}
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static int get_ddr4_bank_group_cnt(void)
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{
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u32 reg;
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reg = readl(DDRC_AXI_BASE + DDRC_DDR_INFO_REG_OFFSET);
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reg &= DDR_BG_NUM_MASK;
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return reg ? 4 : 2; /* 1:4-bg, 0: 2-bg */
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}
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static int get_ddr_type(void)
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{
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u32 type = DDR3_TYPE;
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u32 v = readl(DDRC_TOP_FEATURE) & 0x7;
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switch (v) {
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case 1:
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type = DDR3_TYPE;
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break;
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case 2:
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type = DDR4_TYPE;
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break;
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case 3:
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type = LPDDR4_TYPE;
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break;
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default:
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type = v;
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break;
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}
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return type;
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}
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static int get_ddr_bank_cnt(int rank_cnt)
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{
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int type, bank_cnt;
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type = get_ddr_type();
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switch (type) {
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case LPDDR4_TYPE:
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/* GCAI DDR support 2-chans */
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bank_cnt = LPDDR4_CHANNEL_NUM * rank_cnt *
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LPDDR4_BANK_NUM_OF_RANK;
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break;
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case DDR4_TYPE:
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/* Get DDR4 bank group cnt */
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int bg_cnt;
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bg_cnt = get_ddr4_bank_group_cnt();
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bank_cnt = DDR4_BANK_NUM_OF_BG * bg_cnt;
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break;
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case DDR3_TYPE:
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/* DDR3 support single channel multi ranks */
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bank_cnt = rank_cnt * LPDDR4_BANK_NUM_OF_RANK;
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default:
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bank_cnt = -1;
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break;
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}
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return bank_cnt;
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}
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static int show_ddr_info(char *buf, unsigned int *rank_cnt,
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unsigned int *bank_cnt, unsigned int *block_cnt)
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{
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struct gcai_base_info *gcaiinfo;
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int ret;
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gcaiinfo = (struct gcai_base_info *)buf;
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*rank_cnt = (unsigned int)gcaiinfo->cs_num;
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*bank_cnt = get_ddr_bank_cnt(*rank_cnt);
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if (*bank_cnt <= 0) {
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printf("%s-%d: get_ddr_bank_cnt err\n", __func__, __LINE__);
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return -1;
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}
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*block_cnt = (*bank_cnt) * 8;
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ret = get_ddr_type();
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if (ret == LPDDR4_TYPE)
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printf("GCAI LPDDR4: channel=2, ");
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else if (ret == DDR4_TYPE)
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printf("GCAI DDR4: channel=1, ");
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else {
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printf("not support GCAI DDR type!\n");
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return -1;
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}
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printf("rank=%u, bank=%u, block=%u\n", *rank_cnt, *bank_cnt,
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*block_cnt);
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return 0;
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}
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static int show_gcai_bad_blk_info(char *bad_blk_info, int expect_len)
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{
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#ifdef CONFIG_LOTUS_I2C
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int ret = 0, i = 0, actual_len = 64;
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struct i2c_client client;
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char *read_ptr = bad_blk_info;
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hal_i2c_init(0); /* i2c0 init */
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client.i2c_num = 0; /* read by i2c0 */
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client.dev_addr = 0x50; /* dev addr without RD flag */
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client.reg_width = 1; /* per reg addr width is 1-Byte */
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printf("=======begin to show GCAI DDR info=======\n");
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for (i = 0; i < expect_len; i++) {
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/* read reg addr start from [0x0, 0x63] */
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client.reg_addr = i;
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/* per reg read return 1-byte data */
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ret = hal_i2c_recv(&client, (void *)read_ptr, 1);
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if (ret) {
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printf("%s: i2c recv err, ret=%d\n", __func__, ret);
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break;
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}
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read_ptr++;
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}
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for (i = 0; i < actual_len; i++)
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printf("bad_blk_info[%d]: 0x%x\n", i, bad_blk_info[i]);
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return ret;
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#else
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printf("%s: i2c is not enabled.\n", __func__);
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return 0;
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#endif
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}
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static void show_bad_blk_config_reg(void)
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{
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int i;
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u32 reg, offset;
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for (i = 0; i < BAD_BLK_MAP_REG_NUM; i++) {
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offset = i * 4;
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reg = readl(CHAN0_BAD_BLK_MAP_REG0 + offset);
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printf("ch0: reg%d(0x%x): 0x%x\n", i, CHAN0_BAD_BLK_MAP_REG0 + offset,
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reg);
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}
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for (i = 0; i < BAD_BLK_MAP_REG_NUM; i++) {
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offset = i * 4;
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reg = readl(CHAN1_BAD_BLK_MAP_REG0 + offset);
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printf("ch1: reg%d(0x%x): 0x%x\n", i, CHAN1_BAD_BLK_MAP_REG0 + offset,
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reg);
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}
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printf("=======end of show GCAI DDR info=======\n");
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}
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/*
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* is_gcai_ddr - Identify whether use GCAI DDR.
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* 1:GCAI DDR, 0:non-GCAI DDR.
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*/
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static int is_gcai_ddr(void)
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{
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u32 reg;
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reg = readl(REG_BASE_SCTL + GCAI_FLAG_REG_OFFSET);
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return (reg & GCAI_FLAG_MASK) ? 1 : 0;
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}
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/*
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* ddr_map_show - GCAI DDR bad blk remap info.
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*/
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static int ddr_map_show(void)
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{
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char *bad_blk_info = NULL;
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int ret, read_len = 256;
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unsigned int rank_cnt, bank_cnt, blk_cnt;
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if (!is_gcai_ddr()) {
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printf("%s: not GCAI DDR, show nothing.\n", __func__);
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ret = 0;
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goto out;
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}
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bad_blk_info = malloc(read_len * sizeof(char));
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if (bad_blk_info == NULL) {
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printf("%s: out of memory!\n", __func__);
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ret = -1;
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goto out;
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}
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memset_s(bad_blk_info, read_len, 0xEE, read_len);
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/* show bad blk info that read from i2c */
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ret = show_gcai_bad_blk_info(bad_blk_info, read_len);
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if (ret)
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goto free_mem;
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/* show ddr detail info */
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ret = show_ddr_info(bad_blk_info, &rank_cnt, &bank_cnt, &blk_cnt);
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if (ret)
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goto free_mem;
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/* show all bad blk config reg */
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show_bad_blk_config_reg();
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free_mem:
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free(bad_blk_info);
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out:
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return ret;
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}
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U_BOOT_CMD(
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ddr, CONFIG_SYS_MAXARGS, 0, do_ddr_training,
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"ddr training cmd",
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"dataeye - DDR dataeye training.\n"
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"gcai-info - show GCAI DDR bad block remap info.\n"
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);
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