GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)
This commit is contained in:
@@ -0,0 +1,5 @@
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ifneq ($(MCU), )
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include Makefile.riscv
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else
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include Makefile.linux
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endif
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@@ -0,0 +1,20 @@
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ISP_DIR := $(shell cd ../.. && /bin/pwd)
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SDK_DIR ?= $(shell cd $(ISP_DIR)/../../../.. && /bin/pwd)
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include $(SDK_DIR)/build/base.mk
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include $(ISP_DIR)/sensor/plat.mk
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LIB_NAME := libsns_sc200ai
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SRCS := $(wildcard *.c)
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SDK_USR_CFLAGS += -I$(GMP_DIR)/include
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SDK_USR_CFLAGS += -I$(GMP_DIR)/usr/include
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SDK_USR_CFLAGS += -I$(ISP_DIR)/include
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SDK_USR_CFLAGS += -I$(ISP_DIR)/../include
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SDK_USR_CFLAGS += -I.
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AT := @
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$(info SRCS=$(SRCS))
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include $(SDK_DIR)/build/sdk_lib_rules.mk
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@@ -0,0 +1,4 @@
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SRCS-y += sc200ai.c
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SRCS-y += sc200ai_ctrl.c
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+1714
File diff suppressed because it is too large
Load Diff
+77
@@ -0,0 +1,77 @@
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#ifndef __SC200AI_H__
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#define __SC200AI_H__
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#include "sns_comm.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define SC200AI_VMAX_1M_LINEAR 0x2ee
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#define SC200AI_VMAX_1M_WDR 0x8cc
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#define SC200AI_VMAX_2M_LINEAR 0x465 // default value0x465 0x4b0
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#define SC200AI_VMAX_2M_WDR 0x8ca
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#define SC200AI_S_EXP_MAX_DEFAULT_720P 0x0088
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#define SC200AI_S_EXP_MAX_DEFAULT_1080P 0x0088
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// the value of the sc200ai exposure register is in half line units, (<< 1) for AE calculation, (>> 1) for EXP reg
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#define SC200AI_EXP_SHIFT 1
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#define SC200AI_EXP_OFFSET_LINEAR 8
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#define SC200AI_EXP_OFFSET_WDR 10
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#define SC200AI_REG_ADDR_EXP_H 0x3e00
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#define SC200AI_REG_ADDR_EXP_M 0x3e01
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#define SC200AI_REG_ADDR_EXP_L 0x3e02
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#define SC200AI_REG_ADDR_S_EXP_H 0x3e22
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#define SC200AI_REG_ADDR_S_EXP_M 0x3e04
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#define SC200AI_REG_ADDR_S_EXP_L 0x3e05
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#define SC200AI_REG_ADDR_S_EXP_MAX_H 0x3e23
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#define SC200AI_REG_ADDR_S_EXP_MAX_L 0x3e24
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#define SC200AI_REG_ADDR_AGAIN_H 0x3e08
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#define SC200AI_REG_ADDR_AGAIN_L 0x3e09
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#define SC200AI_REG_ADDR_DGAIN_H 0x3e06
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#define SC200AI_REG_ADDR_DGAIN_L 0x3e07
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#define SC200AI_REG_ADDR_S_AGAIN_H 0x3e12
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#define SC200AI_REG_ADDR_S_AGAIN_L 0x3e13
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#define SC200AI_REG_ADDR_S_DGAIN_H 0x3e10
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#define SC200AI_REG_ADDR_S_DGAIN_L 0x3e11
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#define SC200AI_REG_ADDR_VMAX_H 0x320e
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#define SC200AI_REG_ADDR_VMAX_L 0x320f
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typedef enum {
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SC200AI_REG_EXP_H = 0,
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SC200AI_REG_EXP_M,
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SC200AI_REG_EXP_L,
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SC200AI_REG_DGC_H,
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SC200AI_REG_DGC_L,
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SC200AI_REG_AGC_H,
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SC200AI_REG_AGC_L,
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SC200AI_REG_VMAX_H,
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SC200AI_REG_VMAX_L,
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SC200AI_REG_L_MAX_NUM,
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// short frame reg info from here
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SC200AI_REG_S_EXP_H = SC200AI_REG_L_MAX_NUM,
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SC200AI_REG_S_EXP_M,
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SC200AI_REG_S_EXP_L,
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SC200AI_REG_S_DGC_H,
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SC200AI_REG_S_DGC_L,
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SC200AI_REG_S_AGC_H,
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SC200AI_REG_S_AGC_L,
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SC200AI_REG_S_EXP_MAX_H,
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SC200AI_REG_S_EXP_MAX_L,
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SC200AI_REG_MAX_NUM
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} sc200ai_reg_info;
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#define SC200AI_FULL_LINES_MAX 0xFFFF
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#ifdef __cplusplus
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}
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#endif
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#endif // __SC200AI_H__
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+967
@@ -0,0 +1,967 @@
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#include <stdio.h>
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#include <string.h>
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#include "i2c_dev.h"
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#include "sc200ai_ctrl.h"
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#define sc200ai_REG_ADDR_MIRROR_FLIP 0x3221
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static xmedia_s32 g_sc200ai_i2c_fd[XMEDIA_SENSOR_DEV_MAX_NUM] = { [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] =
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SENSOR_I2C_INVALID };
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static xmedia_s32 g_sc200ai_i2c_addr[XMEDIA_SENSOR_DEV_MAX_NUM] = { [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] =
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SENSOR_I2C_INVALID };
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/*
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* 函数功能: sc200ai MIPI 2lanes 720p线性初始化序列 - 1280x720@21.548fps
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* 函数参数:
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* dev - senor 设备号
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* 返回值:
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*
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*/
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#ifdef FPGA
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xmedia_s32 sc200ai_2lane_linear_1280x720_init(xmedia_u32 dev)
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{
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xmedia_s32 ret = XMEDIA_SUCCESS;
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ret |= sc200ai_write_reg(dev, 0x0103, 0x01);
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ret |= sc200ai_write_reg(dev, 0x0100, 0x00);
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ret |= sc200ai_write_reg(dev, 0x36e9, 0x80);
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ret |= sc200ai_write_reg(dev, 0x36f9, 0x80);
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ret |= sc200ai_write_reg(dev, 0x301f, 0xf9);
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ret |= sc200ai_write_reg(dev, 0x3200, 0x01);
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ret |= sc200ai_write_reg(dev, 0x3201, 0x40);
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ret |= sc200ai_write_reg(dev, 0x3202, 0x00);
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ret |= sc200ai_write_reg(dev, 0x3203, 0xb4);
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ret |= sc200ai_write_reg(dev, 0x3204, 0x06);
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ret |= sc200ai_write_reg(dev, 0x3205, 0x47);
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ret |= sc200ai_write_reg(dev, 0x3206, 0x03);
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ret |= sc200ai_write_reg(dev, 0x3207, 0x8b);
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ret |= sc200ai_write_reg(dev, 0x3208, 0x05);
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ret |= sc200ai_write_reg(dev, 0x3209, 0x00);
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ret |= sc200ai_write_reg(dev, 0x320a, 0x02);
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ret |= sc200ai_write_reg(dev, 0x320b, 0xd0);
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ret |= sc200ai_write_reg(dev, 0x320c, 0x03);
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ret |= sc200ai_write_reg(dev, 0x320d, 0xde);
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ret |= sc200ai_write_reg(dev, 0x320e, 0x02);
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ret |= sc200ai_write_reg(dev, 0x320f, 0xee);
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ret |= sc200ai_write_reg(dev, 0x3210, 0x00);
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ret |= sc200ai_write_reg(dev, 0x3211, 0x04);
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ret |= sc200ai_write_reg(dev, 0x3212, 0x00);
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ret |= sc200ai_write_reg(dev, 0x3213, 0x04);
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ret |= sc200ai_write_reg(dev, 0x3243, 0x01);
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ret |= sc200ai_write_reg(dev, 0x3248, 0x02);
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ret |= sc200ai_write_reg(dev, 0x3249, 0x09);
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ret |= sc200ai_write_reg(dev, 0x3253, 0x08);
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ret |= sc200ai_write_reg(dev, 0x3271, 0x0a);
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ret |= sc200ai_write_reg(dev, 0x3301, 0x06);
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ret |= sc200ai_write_reg(dev, 0x3302, 0x0c);
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ret |= sc200ai_write_reg(dev, 0x3303, 0x08);
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ret |= sc200ai_write_reg(dev, 0x3304, 0x50);
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ret |= sc200ai_write_reg(dev, 0x3306, 0x28);
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ret |= sc200ai_write_reg(dev, 0x3308, 0x10);
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ret |= sc200ai_write_reg(dev, 0x3309, 0x60);
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ret |= sc200ai_write_reg(dev, 0x330b, 0x78);
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ret |= sc200ai_write_reg(dev, 0x330d, 0x0c);
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ret |= sc200ai_write_reg(dev, 0x330e, 0x1c);
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ret |= sc200ai_write_reg(dev, 0x330f, 0x02);
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ret |= sc200ai_write_reg(dev, 0x3310, 0x02);
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ret |= sc200ai_write_reg(dev, 0x331c, 0x04);
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ret |= sc200ai_write_reg(dev, 0x331e, 0x41);
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ret |= sc200ai_write_reg(dev, 0x331f, 0x51);
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ret |= sc200ai_write_reg(dev, 0x3320, 0x07);
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ret |= sc200ai_write_reg(dev, 0x3333, 0x10);
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ret |= sc200ai_write_reg(dev, 0x334c, 0x08);
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ret |= sc200ai_write_reg(dev, 0x3356, 0x09);
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ret |= sc200ai_write_reg(dev, 0x3364, 0x17);
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ret |= sc200ai_write_reg(dev, 0x3390, 0x08);
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ret |= sc200ai_write_reg(dev, 0x3391, 0x18);
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ret |= sc200ai_write_reg(dev, 0x3392, 0x38);
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ret |= sc200ai_write_reg(dev, 0x3393, 0x06);
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ret |= sc200ai_write_reg(dev, 0x3394, 0x06);
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ret |= sc200ai_write_reg(dev, 0x3395, 0x06);
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ret |= sc200ai_write_reg(dev, 0x3396, 0x08);
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ret |= sc200ai_write_reg(dev, 0x3397, 0x18);
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ret |= sc200ai_write_reg(dev, 0x3398, 0x38);
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ret |= sc200ai_write_reg(dev, 0x3399, 0x06);
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ret |= sc200ai_write_reg(dev, 0x339a, 0x0a);
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ret |= sc200ai_write_reg(dev, 0x339b, 0x10);
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ret |= sc200ai_write_reg(dev, 0x339c, 0x20);
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ret |= sc200ai_write_reg(dev, 0x33ac, 0x08);
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ret |= sc200ai_write_reg(dev, 0x33ae, 0x10);
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ret |= sc200ai_write_reg(dev, 0x33af, 0x19);
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ret |= sc200ai_write_reg(dev, 0x3621, 0xe8);
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ret |= sc200ai_write_reg(dev, 0x3622, 0x16);
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ret |= sc200ai_write_reg(dev, 0x3630, 0xa0);
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ret |= sc200ai_write_reg(dev, 0x3637, 0x36);
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ret |= sc200ai_write_reg(dev, 0x363a, 0x1f);
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ret |= sc200ai_write_reg(dev, 0x363b, 0xc6);
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ret |= sc200ai_write_reg(dev, 0x363c, 0x0e);
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ret |= sc200ai_write_reg(dev, 0x3670, 0x0a);
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ret |= sc200ai_write_reg(dev, 0x3674, 0x82);
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ret |= sc200ai_write_reg(dev, 0x3675, 0x76);
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ret |= sc200ai_write_reg(dev, 0x3676, 0x78);
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ret |= sc200ai_write_reg(dev, 0x367c, 0x48);
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ret |= sc200ai_write_reg(dev, 0x367d, 0x58);
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ret |= sc200ai_write_reg(dev, 0x3690, 0x34);
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ret |= sc200ai_write_reg(dev, 0x3691, 0x33);
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ret |= sc200ai_write_reg(dev, 0x3692, 0x44);
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ret |= sc200ai_write_reg(dev, 0x369c, 0x40);
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ret |= sc200ai_write_reg(dev, 0x369d, 0x48);
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ret |= sc200ai_write_reg(dev, 0x36ea, 0x36);
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ret |= sc200ai_write_reg(dev, 0x36eb, 0x3c);
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ret |= sc200ai_write_reg(dev, 0x36ec, 0x0c);
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ret |= sc200ai_write_reg(dev, 0x36ed, 0x14);
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ret |= sc200ai_write_reg(dev, 0x36fa, 0x38);
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ret |= sc200ai_write_reg(dev, 0x36fb, 0x00);
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ret |= sc200ai_write_reg(dev, 0x36fc, 0x11);
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ret |= sc200ai_write_reg(dev, 0x36fd, 0x14);
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ret |= sc200ai_write_reg(dev, 0x3901, 0x02);
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ret |= sc200ai_write_reg(dev, 0x3904, 0x04);
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ret |= sc200ai_write_reg(dev, 0x3908, 0x41);
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ret |= sc200ai_write_reg(dev, 0x391f, 0x10);
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ret |= sc200ai_write_reg(dev, 0x3e01, 0x5d);
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ret |= sc200ai_write_reg(dev, 0x3e02, 0x40);
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ret |= sc200ai_write_reg(dev, 0x3e16, 0x00);
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ret |= sc200ai_write_reg(dev, 0x3e17, 0x80);
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ret |= sc200ai_write_reg(dev, 0x3f09, 0x48);
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ret |= sc200ai_write_reg(dev, 0x4800, 0x44);
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ret |= sc200ai_write_reg(dev, 0x4819, 0x03);
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ret |= sc200ai_write_reg(dev, 0x481b, 0x02);
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ret |= sc200ai_write_reg(dev, 0x481d, 0x05);
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ret |= sc200ai_write_reg(dev, 0x481f, 0x01);
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ret |= sc200ai_write_reg(dev, 0x4821, 0x07);
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ret |= sc200ai_write_reg(dev, 0x4823, 0x01);
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ret |= sc200ai_write_reg(dev, 0x4825, 0x01);
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ret |= sc200ai_write_reg(dev, 0x4827, 0x02);
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ret |= sc200ai_write_reg(dev, 0x4829, 0x02);
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ret |= sc200ai_write_reg(dev, 0x5787, 0x10);
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ret |= sc200ai_write_reg(dev, 0x5788, 0x06);
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ret |= sc200ai_write_reg(dev, 0x578a, 0x10);
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ret |= sc200ai_write_reg(dev, 0x578b, 0x06);
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ret |= sc200ai_write_reg(dev, 0x5790, 0x10);
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ret |= sc200ai_write_reg(dev, 0x5791, 0x10);
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ret |= sc200ai_write_reg(dev, 0x5792, 0x00);
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ret |= sc200ai_write_reg(dev, 0x5793, 0x10);
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ret |= sc200ai_write_reg(dev, 0x5794, 0x10);
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ret |= sc200ai_write_reg(dev, 0x5795, 0x00);
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ret |= sc200ai_write_reg(dev, 0x5799, 0x00);
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ret |= sc200ai_write_reg(dev, 0x57c7, 0x10);
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ret |= sc200ai_write_reg(dev, 0x57c8, 0x06);
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ret |= sc200ai_write_reg(dev, 0x57ca, 0x10);
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ret |= sc200ai_write_reg(dev, 0x57cb, 0x06);
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ret |= sc200ai_write_reg(dev, 0x57d1, 0x10);
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ret |= sc200ai_write_reg(dev, 0x57d4, 0x10);
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ret |= sc200ai_write_reg(dev, 0x57d9, 0x00);
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ret |= sc200ai_write_reg(dev, 0x59e0, 0x60);
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ret |= sc200ai_write_reg(dev, 0x59e1, 0x08);
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ret |= sc200ai_write_reg(dev, 0x59e2, 0x3f);
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ret |= sc200ai_write_reg(dev, 0x59e3, 0x18);
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ret |= sc200ai_write_reg(dev, 0x59e4, 0x18);
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ret |= sc200ai_write_reg(dev, 0x59e5, 0x3f);
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ret |= sc200ai_write_reg(dev, 0x59e6, 0x06);
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ret |= sc200ai_write_reg(dev, 0x59e7, 0x02);
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ret |= sc200ai_write_reg(dev, 0x59e8, 0x38);
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ret |= sc200ai_write_reg(dev, 0x59e9, 0x10);
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ret |= sc200ai_write_reg(dev, 0x59ea, 0x0c);
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ret |= sc200ai_write_reg(dev, 0x59eb, 0x10);
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ret |= sc200ai_write_reg(dev, 0x59ec, 0x04);
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ret |= sc200ai_write_reg(dev, 0x59ed, 0x02);
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ret |= sc200ai_write_reg(dev, 0x59ee, 0xa0);
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ret |= sc200ai_write_reg(dev, 0x59ef, 0x08);
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ret |= sc200ai_write_reg(dev, 0x59f4, 0x18);
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ret |= sc200ai_write_reg(dev, 0x59f5, 0x10);
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ret |= sc200ai_write_reg(dev, 0x59f6, 0x0c);
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ret |= sc200ai_write_reg(dev, 0x59f7, 0x10);
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ret |= sc200ai_write_reg(dev, 0x59f8, 0x06);
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ret |= sc200ai_write_reg(dev, 0x59f9, 0x02);
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ret |= sc200ai_write_reg(dev, 0x59fa, 0x18);
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ret |= sc200ai_write_reg(dev, 0x59fb, 0x10);
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ret |= sc200ai_write_reg(dev, 0x59fc, 0x0c);
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ret |= sc200ai_write_reg(dev, 0x59fd, 0x10);
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ret |= sc200ai_write_reg(dev, 0x59fe, 0x04);
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ret |= sc200ai_write_reg(dev, 0x59ff, 0x02);
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ret |= sc200ai_write_reg(dev, 0x36e9, 0x44);
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ret |= sc200ai_write_reg(dev, 0x36f9, 0x44);
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ret |= sc200ai_write_reg(dev, 0x0100, 0x01);
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printf("============================================================================================\n");
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printf("===== SC200AI_MIPI_24Minput_160Mbps_2lane_10bit_1280x720_21.548fps linear init success! ====\n");
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printf("============================================================================================\n");
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return ret;
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}
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/*
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* 函数功能: sc200ai MIPI 2lanes 1080p线性初始化序列 - 1920x1080@12.929fps
|
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* 函数参数:
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* dev - senor 设备号
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* 返回值:
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*
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*/
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xmedia_s32 sc200ai_2lane_linear_1920x1080_init(xmedia_u32 dev)
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{
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xmedia_s32 ret = XMEDIA_SUCCESS;
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ret |= sc200ai_write_reg(dev, 0x0103, 0x01);
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ret |= sc200ai_write_reg(dev, 0x0100, 0x00);
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ret |= sc200ai_write_reg(dev, 0x36e9, 0x80);
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ret |= sc200ai_write_reg(dev, 0x36f9, 0x80);
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ret |= sc200ai_write_reg(dev, 0x301f, 0xf8);
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ret |= sc200ai_write_reg(dev, 0x3243, 0x01);
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ret |= sc200ai_write_reg(dev, 0x3248, 0x02);
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ret |= sc200ai_write_reg(dev, 0x3249, 0x09);
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ret |= sc200ai_write_reg(dev, 0x3253, 0x08);
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ret |= sc200ai_write_reg(dev, 0x3271, 0x0a);
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||||
ret |= sc200ai_write_reg(dev, 0x3301, 0x20);
|
||||
ret |= sc200ai_write_reg(dev, 0x3304, 0x40);
|
||||
ret |= sc200ai_write_reg(dev, 0x3306, 0x32);
|
||||
ret |= sc200ai_write_reg(dev, 0x330b, 0x88);
|
||||
ret |= sc200ai_write_reg(dev, 0x330f, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x331e, 0x39);
|
||||
ret |= sc200ai_write_reg(dev, 0x3333, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x3621, 0xe8);
|
||||
ret |= sc200ai_write_reg(dev, 0x3622, 0x16);
|
||||
ret |= sc200ai_write_reg(dev, 0x3637, 0x1b);
|
||||
ret |= sc200ai_write_reg(dev, 0x363a, 0x1f);
|
||||
ret |= sc200ai_write_reg(dev, 0x363b, 0xc6);
|
||||
ret |= sc200ai_write_reg(dev, 0x363c, 0x0e);
|
||||
ret |= sc200ai_write_reg(dev, 0x3670, 0x0a);
|
||||
ret |= sc200ai_write_reg(dev, 0x3674, 0x82);
|
||||
ret |= sc200ai_write_reg(dev, 0x3675, 0x76);
|
||||
ret |= sc200ai_write_reg(dev, 0x3676, 0x78);
|
||||
ret |= sc200ai_write_reg(dev, 0x367c, 0x48);
|
||||
ret |= sc200ai_write_reg(dev, 0x367d, 0x58);
|
||||
ret |= sc200ai_write_reg(dev, 0x3690, 0x34);
|
||||
ret |= sc200ai_write_reg(dev, 0x3691, 0x33);
|
||||
ret |= sc200ai_write_reg(dev, 0x3692, 0x44);
|
||||
ret |= sc200ai_write_reg(dev, 0x369c, 0x40);
|
||||
ret |= sc200ai_write_reg(dev, 0x369d, 0x48);
|
||||
ret |= sc200ai_write_reg(dev, 0x36ea, 0x36);
|
||||
ret |= sc200ai_write_reg(dev, 0x36eb, 0x3c);
|
||||
ret |= sc200ai_write_reg(dev, 0x36ec, 0x0c);
|
||||
ret |= sc200ai_write_reg(dev, 0x36ed, 0x14);
|
||||
ret |= sc200ai_write_reg(dev, 0x36fa, 0x38);
|
||||
ret |= sc200ai_write_reg(dev, 0x36fb, 0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x36fc, 0x11);
|
||||
ret |= sc200ai_write_reg(dev, 0x36fd, 0x14);
|
||||
ret |= sc200ai_write_reg(dev, 0x3901, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x3904, 0x04);
|
||||
ret |= sc200ai_write_reg(dev, 0x3908, 0x41);
|
||||
ret |= sc200ai_write_reg(dev, 0x391d, 0x14);
|
||||
ret |= sc200ai_write_reg(dev, 0x391f, 0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e01, 0x8c);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e02, 0x20);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e16, 0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e17, 0x80);
|
||||
ret |= sc200ai_write_reg(dev, 0x3f09, 0x48);
|
||||
ret |= sc200ai_write_reg(dev, 0x4819, 0x03);
|
||||
ret |= sc200ai_write_reg(dev, 0x481b, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x481d, 0x05);
|
||||
ret |= sc200ai_write_reg(dev, 0x481f, 0x01);
|
||||
ret |= sc200ai_write_reg(dev, 0x4821, 0x07);
|
||||
ret |= sc200ai_write_reg(dev, 0x4823, 0x01);
|
||||
ret |= sc200ai_write_reg(dev, 0x4825, 0x01);
|
||||
ret |= sc200ai_write_reg(dev, 0x4827, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x4829, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x5787, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5788, 0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x578a, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x578b, 0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x5790, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5791, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5792, 0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x5793, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5794, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5795, 0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x5799, 0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x57c7, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x57c8, 0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x57ca, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x57cb, 0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x57d1, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x57d4, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x57d9, 0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e0, 0x60);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e1, 0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e2, 0x3f);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e3, 0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e4, 0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e5, 0x3f);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e6, 0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e7, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e8, 0x38);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e9, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ea, 0x0c);
|
||||
ret |= sc200ai_write_reg(dev, 0x59eb, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ec, 0x04);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ed, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ee, 0xa0);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ef, 0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f4, 0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f5, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f6, 0x0c);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f7, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f8, 0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f9, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fa, 0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fb, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fc, 0x0c);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fd, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fe, 0x04);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ff, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x36e9, 0x44);
|
||||
ret |= sc200ai_write_reg(dev, 0x36f9, 0x44);
|
||||
ret |= sc200ai_write_reg(dev, 0x0100, 0x01);
|
||||
|
||||
printf("===========================================================================================\n");
|
||||
printf("===== SC200AI_MIPI_24Minput_160Mbps_2lane_10bit_1920x1080_12.929fps linear success! =======\n");
|
||||
printf("===========================================================================================\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
xmedia_s32 sc200ai_2lane_wdr_comm_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
ret |= sc200ai_write_reg(dev, 0x36e9, 0x80);
|
||||
ret |= sc200ai_write_reg(dev, 0x36f9, 0x80);
|
||||
ret |= sc200ai_write_reg(dev, 0x301f, 0xf7);
|
||||
ret |= sc200ai_write_reg(dev, 0x320e, 0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x320f, 0xcc);
|
||||
ret |= sc200ai_write_reg(dev, 0x3220, 0x53);
|
||||
ret |= sc200ai_write_reg(dev, 0x3243, 0x01);
|
||||
ret |= sc200ai_write_reg(dev, 0x3248, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x3249, 0x09);
|
||||
ret |= sc200ai_write_reg(dev, 0x3250, 0x3f);
|
||||
ret |= sc200ai_write_reg(dev, 0x3253, 0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x3271, 0x0a);
|
||||
ret |= sc200ai_write_reg(dev, 0x3301, 0x20);
|
||||
ret |= sc200ai_write_reg(dev, 0x3304, 0x40);
|
||||
ret |= sc200ai_write_reg(dev, 0x3306, 0x32);
|
||||
ret |= sc200ai_write_reg(dev, 0x330b, 0x88);
|
||||
ret |= sc200ai_write_reg(dev, 0x330f, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x331e, 0x39);
|
||||
ret |= sc200ai_write_reg(dev, 0x3333, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x3347, 0x77);
|
||||
ret |= sc200ai_write_reg(dev, 0x336c, 0xcc);
|
||||
ret |= sc200ai_write_reg(dev, 0x3621, 0xe8);
|
||||
ret |= sc200ai_write_reg(dev, 0x3622, 0x16);
|
||||
ret |= sc200ai_write_reg(dev, 0x3637, 0x1b);
|
||||
ret |= sc200ai_write_reg(dev, 0x363a, 0x1f);
|
||||
ret |= sc200ai_write_reg(dev, 0x363b, 0xc6);
|
||||
ret |= sc200ai_write_reg(dev, 0x363c, 0x0e);
|
||||
ret |= sc200ai_write_reg(dev, 0x3670, 0x0a);
|
||||
ret |= sc200ai_write_reg(dev, 0x3674, 0x82);
|
||||
ret |= sc200ai_write_reg(dev, 0x3675, 0x76);
|
||||
ret |= sc200ai_write_reg(dev, 0x3676, 0x78);
|
||||
ret |= sc200ai_write_reg(dev, 0x367c, 0x48);
|
||||
ret |= sc200ai_write_reg(dev, 0x367d, 0x58);
|
||||
ret |= sc200ai_write_reg(dev, 0x3690, 0x34);
|
||||
ret |= sc200ai_write_reg(dev, 0x3691, 0x33);
|
||||
ret |= sc200ai_write_reg(dev, 0x3692, 0x44);
|
||||
ret |= sc200ai_write_reg(dev, 0x369c, 0x40);
|
||||
ret |= sc200ai_write_reg(dev, 0x369d, 0x48);
|
||||
ret |= sc200ai_write_reg(dev, 0x36ea, 0x36);
|
||||
ret |= sc200ai_write_reg(dev, 0x36eb, 0x3c);
|
||||
ret |= sc200ai_write_reg(dev, 0x36ec, 0x0c);
|
||||
ret |= sc200ai_write_reg(dev, 0x36ed, 0x14);
|
||||
ret |= sc200ai_write_reg(dev, 0x36fa, 0x38);
|
||||
ret |= sc200ai_write_reg(dev, 0x36fb, 0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x36fc, 0x11);
|
||||
ret |= sc200ai_write_reg(dev, 0x36fd, 0x14);
|
||||
ret |= sc200ai_write_reg(dev, 0x3901, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x3904, 0x04);
|
||||
ret |= sc200ai_write_reg(dev, 0x3908, 0x41);
|
||||
ret |= sc200ai_write_reg(dev, 0x391d, 0x14);
|
||||
ret |= sc200ai_write_reg(dev, 0x391f, 0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e00, 0x01);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e01, 0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e02, 0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e04, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e05, 0x60);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e06, 0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e07, 0x80);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e08, 0x03);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e09, 0x40);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e10, 0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e11, 0x80);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e12, 0x03);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e13, 0x40);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e16, 0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e17, 0x80);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e23, 0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e24, 0x88);
|
||||
ret |= sc200ai_write_reg(dev, 0x3f09, 0x48);
|
||||
ret |= sc200ai_write_reg(dev, 0x4816, 0xb1);
|
||||
ret |= sc200ai_write_reg(dev, 0x4819, 0x03);
|
||||
ret |= sc200ai_write_reg(dev, 0x481b, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x481d, 0x05);
|
||||
ret |= sc200ai_write_reg(dev, 0x481f, 0x01);
|
||||
ret |= sc200ai_write_reg(dev, 0x4821, 0x07);
|
||||
ret |= sc200ai_write_reg(dev, 0x4823, 0x01);
|
||||
ret |= sc200ai_write_reg(dev, 0x4825, 0x01);
|
||||
ret |= sc200ai_write_reg(dev, 0x4827, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x4829, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x5787, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5788, 0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x578a, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x578b, 0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x5790, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5791, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5792, 0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x5793, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5794, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5795, 0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x5799, 0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x57c7, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x57c8, 0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x57ca, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x57cb, 0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x57d1, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x57d4, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x57d9, 0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e0, 0x60);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e1, 0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e2, 0x3f);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e3, 0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e4, 0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e5, 0x3f);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e6, 0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e7, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e8, 0x38);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e9, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ea, 0x0c);
|
||||
ret |= sc200ai_write_reg(dev, 0x59eb, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ec, 0x04);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ed, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ee, 0xa0);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ef, 0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f4, 0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f5, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f6, 0x0c);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f7, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f8, 0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f9, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fa, 0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fb, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fc, 0x0c);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fd, 0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fe, 0x04);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ff, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x36e9, 0x44);
|
||||
ret |= sc200ai_write_reg(dev, 0x36f9, 0x44);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* 函数功能: sc200ai MIPI 2lanes 720p WDR初始化序列 -从 1080p wdr crop
|
||||
* 函数参数:
|
||||
* dev - senor 设备号
|
||||
* 返回值:
|
||||
*
|
||||
*/
|
||||
xmedia_s32 sc200ai_2lane_wdr_1280x720_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
ret |= sc200ai_write_reg(dev, 0x0103, 0x01);
|
||||
ret |= sc200ai_write_reg(dev, 0x0100, 0x00);
|
||||
ret |= sc200ai_2lane_wdr_comm_init(dev);
|
||||
ret |= sc200ai_write_reg(dev, 0x3208, 0x05);
|
||||
ret |= sc200ai_write_reg(dev, 0x3209, 0x00); // output window width
|
||||
ret |= sc200ai_write_reg(dev, 0x320a, 0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x320b, 0xd0); // output window height
|
||||
ret |= sc200ai_write_reg(dev, 0x0100, 0x01);
|
||||
|
||||
printf("===========================================================================================\n");
|
||||
printf("===== SC200AI_MIPI_VC_24Minput_160Mbps_2lane_10bit_1280x720_6.459fps wdr success! =========\n");
|
||||
printf("===========================================================================================\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* 函数功能: sc200ai MIPI 2lanes 1080p线性初始化序列 - 1920x1080@6.459fps
|
||||
* 函数参数:
|
||||
* dev - senor 设备号
|
||||
* 返回值:
|
||||
*
|
||||
*/
|
||||
xmedia_s32 sc200ai_2lane_wdr_1920x1080_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
ret |= sc200ai_write_reg(dev, 0x0103, 0x01);
|
||||
ret |= sc200ai_write_reg(dev, 0x0100, 0x00);
|
||||
ret |= sc200ai_2lane_wdr_comm_init(dev);
|
||||
ret |= sc200ai_write_reg(dev, 0x0100, 0x01);
|
||||
|
||||
printf("===========================================================================================\n");
|
||||
printf("===== SC200AI_MIPI_24Minput_160Mbps_2lane_10bit_1920x1080_6.459fps wdr success! ===========\n");
|
||||
printf("===========================================================================================\n");
|
||||
return ret;
|
||||
}
|
||||
#else
|
||||
xmedia_void sc200ai_delay_ms(xmedia_s32 ms)
|
||||
{
|
||||
usleep(ms * 1000);
|
||||
}
|
||||
|
||||
xmedia_s32 sc200ai_2lane_linear_1280x720_init(xmedia_u32 dev)
|
||||
{
|
||||
SENSOR_PRINT("======================================================================================\n");
|
||||
SENSOR_PRINT("==================================== SC200AI LINEAR NOT SUPPORT! =====================\n");
|
||||
SENSOR_PRINT("======================================================================================\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
xmedia_s32 sc200ai_2lane_wdr_1280x720_init(xmedia_u32 dev)
|
||||
{
|
||||
SENSOR_PRINT("======================================================================================\n");
|
||||
SENSOR_PRINT("==================================== SC200AI WDR NOT SUPPORT! ========================\n");
|
||||
SENSOR_PRINT("======================================================================================\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
xmedia_s32 sc200ai_2lane_linear_1920x1080_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
//cleaned_0x03_FT_SC200AI_MIPI_27MInput_371.25Mbps_2lane_10bit_1920x1080_30fps
|
||||
ret |= sc200ai_write_reg(dev, 0x0103,0x01);
|
||||
ret |= sc200ai_write_reg(dev, 0x0100,0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x36e9,0x80);
|
||||
ret |= sc200ai_write_reg(dev, 0x36f9,0x80);
|
||||
ret |= sc200ai_write_reg(dev, 0x301f,0x03);
|
||||
ret |= sc200ai_write_reg(dev, 0x320e,0x04);
|
||||
ret |= sc200ai_write_reg(dev, 0x320f,0x65);
|
||||
ret |= sc200ai_write_reg(dev, 0x3243,0x01);
|
||||
ret |= sc200ai_write_reg(dev, 0x3248,0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x3249,0x09);
|
||||
ret |= sc200ai_write_reg(dev, 0x3253,0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x3271,0x0a);
|
||||
ret |= sc200ai_write_reg(dev, 0x3301,0x20);
|
||||
ret |= sc200ai_write_reg(dev, 0x3304,0x40);
|
||||
ret |= sc200ai_write_reg(dev, 0x3306,0x32);
|
||||
ret |= sc200ai_write_reg(dev, 0x330b,0x88);
|
||||
ret |= sc200ai_write_reg(dev, 0x330f,0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x331e,0x39);
|
||||
ret |= sc200ai_write_reg(dev, 0x3333,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x3621,0xe8);
|
||||
ret |= sc200ai_write_reg(dev, 0x3622,0x16);
|
||||
ret |= sc200ai_write_reg(dev, 0x3637,0x1b);
|
||||
ret |= sc200ai_write_reg(dev, 0x363a,0x1f);
|
||||
ret |= sc200ai_write_reg(dev, 0x363b,0xc6);
|
||||
ret |= sc200ai_write_reg(dev, 0x363c,0x0e);
|
||||
ret |= sc200ai_write_reg(dev, 0x3670,0x0a);
|
||||
ret |= sc200ai_write_reg(dev, 0x3674,0x82);
|
||||
ret |= sc200ai_write_reg(dev, 0x3675,0x76);
|
||||
ret |= sc200ai_write_reg(dev, 0x3676,0x78);
|
||||
ret |= sc200ai_write_reg(dev, 0x367c,0x48);
|
||||
ret |= sc200ai_write_reg(dev, 0x367d,0x58);
|
||||
ret |= sc200ai_write_reg(dev, 0x3690,0x34);
|
||||
ret |= sc200ai_write_reg(dev, 0x3691,0x33);
|
||||
ret |= sc200ai_write_reg(dev, 0x3692,0x44);
|
||||
ret |= sc200ai_write_reg(dev, 0x369c,0x40);
|
||||
ret |= sc200ai_write_reg(dev, 0x369d,0x48);
|
||||
ret |= sc200ai_write_reg(dev, 0x3901,0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x3904,0x04);
|
||||
ret |= sc200ai_write_reg(dev, 0x3908,0x41);
|
||||
ret |= sc200ai_write_reg(dev, 0x391d,0x14);
|
||||
ret |= sc200ai_write_reg(dev, 0x391f,0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e01,0x8c);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e02,0x20);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e16,0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e17,0x80);
|
||||
ret |= sc200ai_write_reg(dev, 0x3f09,0x48);
|
||||
ret |= sc200ai_write_reg(dev, 0x5787,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5788,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x578a,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x578b,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x5790,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5791,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5792,0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x5793,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5794,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5795,0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x5799,0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x57c7,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x57c8,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x57ca,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x57cb,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x57d1,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x57d4,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x57d9,0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e0,0x60);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e1,0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e2,0x3f);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e3,0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e4,0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e5,0x3f);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e6,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e7,0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e8,0x38);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e9,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ea,0x0c);
|
||||
ret |= sc200ai_write_reg(dev, 0x59eb,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ec,0x04);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ed,0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ee,0xa0);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ef,0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f4,0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f5,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f6,0x0c);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f7,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f8,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f9,0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fa,0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fb,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fc,0x0c);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fd,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fe,0x04);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ff,0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x36e9,0x20);
|
||||
ret |= sc200ai_write_reg(dev, 0x36f9,0x27);
|
||||
|
||||
sc200ai_delay_ms(20);
|
||||
ret |= sc200ai_write_reg(dev, 0x0100,0x01);
|
||||
|
||||
printf("====================================================================================\n");
|
||||
printf("===sc200ai_27MInput_371.25Mbps_2lane sensor 1080P30fps 10bit linear init success!===\n");
|
||||
printf("====================================================================================\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
xmedia_s32 sc200ai_2lane_wdr_1920x1080_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
ret |= sc200ai_write_reg(dev, 0x0103,0x01);
|
||||
ret |= sc200ai_write_reg(dev, 0x0100,0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x36e9,0x80);
|
||||
ret |= sc200ai_write_reg(dev, 0x36f9,0x80);
|
||||
ret |= sc200ai_write_reg(dev, 0x301f,0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x320e,0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x320f,0xca);
|
||||
ret |= sc200ai_write_reg(dev, 0x3220,0x53);
|
||||
ret |= sc200ai_write_reg(dev, 0x3243,0x01);
|
||||
ret |= sc200ai_write_reg(dev, 0x3248,0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x3249,0x09);
|
||||
ret |= sc200ai_write_reg(dev, 0x3250,0x3f);
|
||||
ret |= sc200ai_write_reg(dev, 0x3253,0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x3271,0x0a);
|
||||
ret |= sc200ai_write_reg(dev, 0x3301,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x3302,0x0c);
|
||||
ret |= sc200ai_write_reg(dev, 0x3303,0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x3304,0x60);
|
||||
ret |= sc200ai_write_reg(dev, 0x3306,0x30);
|
||||
ret |= sc200ai_write_reg(dev, 0x3308,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x3309,0x70);
|
||||
ret |= sc200ai_write_reg(dev, 0x330b,0x80);
|
||||
ret |= sc200ai_write_reg(dev, 0x330d,0x16);
|
||||
ret |= sc200ai_write_reg(dev, 0x330e,0x1c);
|
||||
ret |= sc200ai_write_reg(dev, 0x330f,0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x3310,0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x331c,0x04);
|
||||
ret |= sc200ai_write_reg(dev, 0x331e,0x51);
|
||||
ret |= sc200ai_write_reg(dev, 0x331f,0x61);
|
||||
ret |= sc200ai_write_reg(dev, 0x3320,0x07);
|
||||
ret |= sc200ai_write_reg(dev, 0x3333,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x3347,0x77);
|
||||
ret |= sc200ai_write_reg(dev, 0x334c,0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x3356,0x09);
|
||||
ret |= sc200ai_write_reg(dev, 0x3364,0x17);
|
||||
ret |= sc200ai_write_reg(dev, 0x336c,0xcc);
|
||||
ret |= sc200ai_write_reg(dev, 0x3390,0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x3391,0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x3392,0x38);
|
||||
ret |= sc200ai_write_reg(dev, 0x3393,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x3394,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x3395,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x3396,0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x3397,0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x3398,0x38);
|
||||
ret |= sc200ai_write_reg(dev, 0x3399,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x339a,0x0a);
|
||||
ret |= sc200ai_write_reg(dev, 0x339b,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x339c,0x20);
|
||||
ret |= sc200ai_write_reg(dev, 0x33ac,0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x33ae,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x33af,0x19);
|
||||
ret |= sc200ai_write_reg(dev, 0x3621,0xe8);
|
||||
ret |= sc200ai_write_reg(dev, 0x3622,0x16);
|
||||
ret |= sc200ai_write_reg(dev, 0x3630,0xa0);
|
||||
ret |= sc200ai_write_reg(dev, 0x3637,0x36);
|
||||
ret |= sc200ai_write_reg(dev, 0x363a,0x1f);
|
||||
ret |= sc200ai_write_reg(dev, 0x363b,0xc6);
|
||||
ret |= sc200ai_write_reg(dev, 0x363c,0x0e);
|
||||
ret |= sc200ai_write_reg(dev, 0x3670,0x0a);
|
||||
ret |= sc200ai_write_reg(dev, 0x3674,0x82);
|
||||
ret |= sc200ai_write_reg(dev, 0x3675,0x76);
|
||||
ret |= sc200ai_write_reg(dev, 0x3676,0x78);
|
||||
ret |= sc200ai_write_reg(dev, 0x367c,0x48);
|
||||
ret |= sc200ai_write_reg(dev, 0x367d,0x58);
|
||||
ret |= sc200ai_write_reg(dev, 0x3690,0x34);
|
||||
ret |= sc200ai_write_reg(dev, 0x3691,0x33);
|
||||
ret |= sc200ai_write_reg(dev, 0x3692,0x44);
|
||||
ret |= sc200ai_write_reg(dev, 0x369c,0x40);
|
||||
ret |= sc200ai_write_reg(dev, 0x369d,0x48);
|
||||
ret |= sc200ai_write_reg(dev, 0x36eb,0x0c);
|
||||
ret |= sc200ai_write_reg(dev, 0x36ec,0x0c);
|
||||
ret |= sc200ai_write_reg(dev, 0x36fd,0x14);
|
||||
ret |= sc200ai_write_reg(dev, 0x3901,0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x3904,0x04);
|
||||
ret |= sc200ai_write_reg(dev, 0x3908,0x41);
|
||||
ret |= sc200ai_write_reg(dev, 0x391f,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e00,0x01); //LEF {3e00[3:0],3e01[7:0],3e02[7:4]}
|
||||
ret |= sc200ai_write_reg(dev, 0x3e01,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e02,0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e04,0x10); //SEF {3e22[3:0],3e04[7:0],3e05[7:4]}
|
||||
ret |= sc200ai_write_reg(dev, 0x3e05,0x60);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e06,0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e07,0x80);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e08,0x03);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e09,0x40);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e10,0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e11,0x80);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e12,0x03);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e13,0x40);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e16,0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e17,0x80);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e23,0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x3e24,0x88);//0x88 0x87 0xa3
|
||||
ret |= sc200ai_write_reg(dev, 0x3f09,0x48);
|
||||
ret |= sc200ai_write_reg(dev, 0x4816,0xb1);
|
||||
ret |= sc200ai_write_reg(dev, 0x4819,0x09);
|
||||
ret |= sc200ai_write_reg(dev, 0x481b,0x05);
|
||||
ret |= sc200ai_write_reg(dev, 0x481d,0x14);
|
||||
ret |= sc200ai_write_reg(dev, 0x481f,0x04);
|
||||
ret |= sc200ai_write_reg(dev, 0x4821,0x0a);
|
||||
ret |= sc200ai_write_reg(dev, 0x4823,0x05);
|
||||
ret |= sc200ai_write_reg(dev, 0x4825,0x04);
|
||||
ret |= sc200ai_write_reg(dev, 0x4827,0x05);
|
||||
ret |= sc200ai_write_reg(dev, 0x4829,0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x5787,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5788,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x578a,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x578b,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x5790,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5791,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5792,0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x5793,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5794,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x5795,0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x5799,0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x57c7,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x57c8,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x57ca,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x57cb,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x57d1,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x57d4,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x57d9,0x00);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e0,0x60);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e1,0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e2,0x3f);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e3,0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e4,0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e5,0x3f);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e6,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e7,0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e8,0x38);
|
||||
ret |= sc200ai_write_reg(dev, 0x59e9,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ea,0x0c);
|
||||
ret |= sc200ai_write_reg(dev, 0x59eb,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ec,0x04);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ed,0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ee,0xa0);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ef,0x08);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f4,0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f5,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f6,0x0c);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f7,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f8,0x06);
|
||||
ret |= sc200ai_write_reg(dev, 0x59f9,0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fa,0x18);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fb,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fc,0x0c);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fd,0x10);
|
||||
ret |= sc200ai_write_reg(dev, 0x59fe,0x04);
|
||||
ret |= sc200ai_write_reg(dev, 0x59ff,0x02);
|
||||
ret |= sc200ai_write_reg(dev, 0x36e9,0x20);
|
||||
ret |= sc200ai_write_reg(dev, 0x36f9,0x24);
|
||||
|
||||
sc200ai_delay_ms(20);
|
||||
ret |= sc200ai_write_reg(dev, 0x0100,0x01);
|
||||
|
||||
printf("==========================================================================\n");
|
||||
printf("===SC200ai_MIPI_27MInput_742.5Mbps_2lane_10bit_1920x1080_HDR 30fps(VC)====\n");
|
||||
printf("==========================================================================\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
xmedia_s32 sc200ai_init_image(xmedia_u32 dev, xmedia_u8 image_mode)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
switch(image_mode) {
|
||||
case SC200AI_1M_20FPS_10BIT_LINEAR_MODE:
|
||||
ret = sc200ai_2lane_linear_1280x720_init(dev);
|
||||
break;
|
||||
|
||||
case SC200AI_1M_6FPS_10BIT_WDR_MODE:
|
||||
ret = sc200ai_2lane_wdr_1280x720_init(dev);
|
||||
break;
|
||||
|
||||
case SC200AI_2M_12FPS_10BIT_LINEAR_MODE:
|
||||
ret = sc200ai_2lane_linear_1920x1080_init(dev);
|
||||
break;
|
||||
|
||||
case SC200AI_2M_6FPS_10BIT_WDR_MODE:
|
||||
ret = sc200ai_2lane_wdr_1920x1080_init(dev);
|
||||
break;
|
||||
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support, please check image param!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 sc200ai_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_sc200ai_i2c_fd[dev] < 0) {
|
||||
SENSOR_PRINT("Sensor dev [%d], i2c not open. please init i2c at first.\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_set_slave_addr(g_sc200ai_i2c_fd[dev], slave_addr);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
|
||||
i2c_close(g_sc200ai_i2c_fd[dev]);
|
||||
g_sc200ai_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
g_sc200ai_i2c_addr[dev] = slave_addr;
|
||||
SENSOR_PRINT("Sensor dev [%d] set slave addr 0x%x success.\n", dev, slave_addr);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 sc200ai_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_sc200ai_i2c_fd[dev] >= 0) {
|
||||
SENSOR_PRINT("====== Sensor dev [%d], i2c already init !=======\n", dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
if (i2c_dev == SENSOR_I2C_INVALID) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Sensor i2c dev invalid! Please set i2c dev at first!\n");
|
||||
return XMEDIA_ERRCODE_NOT_CONFIG;
|
||||
}
|
||||
|
||||
g_sc200ai_i2c_fd[dev] = i2c_open(i2c_dev);
|
||||
if (g_sc200ai_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Open /dev/i2c_drv-%u error!\n", i2c_dev);
|
||||
return XMEDIA_ERRCODE_OPEN_FAILED;
|
||||
}
|
||||
|
||||
ret = sc200ai_set_slave_addr(dev, i2c_addr);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
SENSOR_PRINT("====== i2c[%d] init success!=======\n", i2c_dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 sc200ai_i2c_exit(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
ret = i2c_close(g_sc200ai_i2c_fd[dev]);
|
||||
if(ret < 0 ) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] close i2c failed!\n", dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
g_sc200ai_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 sc200ai_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[SC200AI_DATA_BYTE];
|
||||
|
||||
if (g_sc200ai_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_read(g_sc200ai_i2c_fd[dev], g_sc200ai_i2c_addr[dev], addr, SC200AI_ADDR_BYTE, buf, SC200AI_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] read i2c addr [0x%X] failed!\n", dev, addr);
|
||||
return ret;
|
||||
}
|
||||
|
||||
*data = buf[0]; //SC200AI_DATA_BYTE == 1
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 sc200ai_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data)
|
||||
{
|
||||
xmedia_u32 idx = 0;
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[8];
|
||||
|
||||
if (g_sc200ai_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
buf[idx] = (addr >> 8) & 0xff;
|
||||
idx++;
|
||||
buf[idx] = addr & 0xff;
|
||||
idx++;
|
||||
buf[idx] = data & 0xff;
|
||||
|
||||
ret = i2c_write(g_sc200ai_i2c_fd[dev], g_sc200ai_i2c_addr[dev], buf, SC200AI_ADDR_BYTE + SC200AI_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_WRITE error!\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
xmedia_s32 sc200ai_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u32 mirror_flip_type;
|
||||
|
||||
sc200ai_read_reg(dev, sc200ai_REG_ADDR_MIRROR_FLIP, &mirror_flip_type);
|
||||
|
||||
if (mirror_en) {
|
||||
mirror_flip_type |= 0x06;
|
||||
} else {
|
||||
mirror_flip_type &= 0xf9;
|
||||
}
|
||||
|
||||
if (flip_en) {
|
||||
mirror_flip_type |= 0x60;
|
||||
} else {
|
||||
mirror_flip_type &= 0x9f;
|
||||
}
|
||||
|
||||
ret = sc200ai_write_reg(dev, sc200ai_REG_ADDR_MIRROR_FLIP, mirror_flip_type);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sc200ai_write_reg failed\n");
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
@@ -0,0 +1,32 @@
|
||||
#ifndef __SC200AI_CTRL_H__
|
||||
#define __SC200AI_CTRL_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define SC200AI_I2C_ADDR 0x60
|
||||
#define SC200AI_ADDR_BYTE 2
|
||||
#define SC200AI_DATA_BYTE 1
|
||||
|
||||
// sc200ai specs list
|
||||
#define SC200AI_1M_20FPS_10BIT_LINEAR_MODE 1 // 1280x720x21.548fps
|
||||
#define SC200AI_1M_6FPS_10BIT_WDR_MODE 2 // 1280x720x6.459fps
|
||||
#define SC200AI_2M_12FPS_10BIT_LINEAR_MODE 3 // 1920x1080x12.929fps
|
||||
#define SC200AI_2M_6FPS_10BIT_WDR_MODE 4 // 1920x1080x6.459fps
|
||||
|
||||
xmedia_s32 sc200ai_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr);
|
||||
xmedia_s32 sc200ai_i2c_exit(xmedia_u32 dev);
|
||||
xmedia_s32 sc200ai_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data);
|
||||
xmedia_s32 sc200ai_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data);
|
||||
xmedia_s32 sc200ai_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en);
|
||||
xmedia_s32 sc200ai_init_image(xmedia_u32 dev, xmedia_u8 img_mode);
|
||||
xmedia_s32 sc200ai_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //__SC200AI_CTRL_H__
|
||||
+669
@@ -0,0 +1,669 @@
|
||||
#ifndef __SC200AI_EX_H__
|
||||
#define __SC200AI_EX_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// Piris attr
|
||||
static const xmedia_isp_piris_attr g_sc200ai_piris_attr = {
|
||||
0, // bStepFNOTableChange
|
||||
1, // bZeroIsMax
|
||||
94, // u16TotalStep
|
||||
62, // u16StepCount
|
||||
// Step-F number mapping table. Must be from small to large. F1.0 is 1024 and F32.0 is 1
|
||||
{30, 35, 40, 45, 50, 56, 61, 67, 73, 79, 85, 92, 98, 105, 112, 120, 127, 135, 143, 150, 158,
|
||||
166, 174, 183, 191, 200, 208, 217, 225, 234, 243, 252, 261, 270, 279, 289, 298, 307, 316, 325, 335, 344,
|
||||
353, 362, 372, 381, 390, 399, 408, 417, 426, 435, 444, 453, 462, 470, 478, 486, 493, 500, 506, 512},
|
||||
XMEDIA_ISP_IRIS_F_NO_1_4, // enMaxIrisFNOTarget
|
||||
XMEDIA_ISP_IRIS_F_NO_5_6 // enMinIrisFNOTarget
|
||||
};
|
||||
|
||||
static xmedia_isp_awb_ccm g_sc200ai_awb_ccm = {
|
||||
4,
|
||||
{
|
||||
#if 0
|
||||
{
|
||||
4900,
|
||||
{
|
||||
0x01C4, 0x80B8, 0x800C,
|
||||
0x804D, 0x0164, 0x8017,
|
||||
0x8001, 0x80C5, 0x01C6
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
3850,
|
||||
{
|
||||
0x01C0, 0x80AB, 0x8015,
|
||||
0x8041, 0x0164, 0x8023,
|
||||
0x8001, 0x80DA, 0x01DB
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
2650,
|
||||
{
|
||||
0x0198, 0x807A, 0x801E,
|
||||
0x8056, 0x017D, 0x8027,
|
||||
0x8001, 0x8158, 0x0258
|
||||
},
|
||||
},
|
||||
#else
|
||||
{
|
||||
6500,
|
||||
{
|
||||
468,33016,36,
|
||||
32809,392,32863,
|
||||
27,33006,467
|
||||
},
|
||||
},
|
||||
{
|
||||
4670,
|
||||
{
|
||||
481,32943,32818,
|
||||
32830,406,32856,
|
||||
32769,33030,519
|
||||
},
|
||||
},
|
||||
{
|
||||
3810,
|
||||
{
|
||||
344,32878,22,
|
||||
32914,388,14,
|
||||
20,33066,534
|
||||
},
|
||||
},
|
||||
{
|
||||
2840,
|
||||
{
|
||||
330,32864,22,
|
||||
32950,421,17,
|
||||
33,33096,551
|
||||
},
|
||||
},
|
||||
#endif
|
||||
},
|
||||
};
|
||||
|
||||
#if 0
|
||||
static xmedia_isp_blc_attr g_sc200ai_blc=
|
||||
{
|
||||
0,// op_type;
|
||||
{
|
||||
{256,256,256,256}
|
||||
},// manual_attr;
|
||||
{
|
||||
16,// iso_num;
|
||||
{100,200,400,800,1600,3200,6400,12800,25600,51200,102400,204800,409600,819200,1638400,3276800},// iso_level[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{
|
||||
{256,256,256,256},
|
||||
{256,256,256,256},
|
||||
{256,256,256,256},
|
||||
{256,256,256,256},
|
||||
{256,256,256,256},
|
||||
{256,256,256,256},
|
||||
{256,256,256,256},
|
||||
{256,256,256,256},
|
||||
{256,256,256,256},
|
||||
{256,256,256,256},
|
||||
{256,256,256,256},
|
||||
{256,256,256,256},
|
||||
{256,256,256,256},
|
||||
{256,256,256,256},
|
||||
{256,256,256,256},
|
||||
{256,256,256,256}
|
||||
} //black_level
|
||||
} // auto_attr;
|
||||
};
|
||||
static xmedia_isp_bnr_attr g_sc200ai_bnr = {
|
||||
1,// enable;
|
||||
0,//pilot ainr_pos_switch;
|
||||
0,//pilot coring_pos_switch;
|
||||
0,//pilot noise_reserve_enable;
|
||||
{0,8,15,19,24,32,46,70,100,138,176,205,231,256,279,299,318,338,355,367,377,390,403,412,419,424,429,434,438,441,444,447,449},//pilot noise_reserve_lut[XMEDIA_ISP_BNR_POINT_MAX_COUNT];
|
||||
0,//pilot noise_profile_thd;
|
||||
{0},//pilot noise_profile_coef0[XMEDIA_ISP_BNR_CALIB_POINT_MAX_COUNT]; // low_iso_noise_coef
|
||||
{0},//pilot noise_profile_coef1[XMEDIA_ISP_BNR_CALIB_POINT_MAX_COUNT]; // high_iso_noise_coef
|
||||
0,//pilot tnr_enable;
|
||||
0,//pilot tnr_luma_comp_enable;
|
||||
0,//pilot tnr_wdr_comp_enable;
|
||||
1,// op_type;
|
||||
{
|
||||
16,// iso_num;
|
||||
{100,200,400,800,1600,3200,6400,12800,25600,51200,102400,204800,409600,819200,1638400,3276800},// iso_level[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{
|
||||
{0,0,0,0},
|
||||
{0,0,0,0},
|
||||
{0,0,0,0},
|
||||
{0,0,0,0},
|
||||
{0,0,0,0},
|
||||
{0,0,0,0},
|
||||
{0,0,0,0},
|
||||
{0,0,0,0},
|
||||
{0,0,0,0},
|
||||
{0,0,0,0},
|
||||
{0,0,0,0},
|
||||
{0,0,0,0},
|
||||
{0,0,0,0},
|
||||
{0,0,0,0},
|
||||
{0,0,0,0},
|
||||
{0,0,0,0}
|
||||
},// chroma_strength[XMEDIA_ISP_ISO_MAX_COUNT][XMEDIA_ISP_BAYER_PATTERN_NUM];
|
||||
{48,48,40,32,22,22,22,22,22,22,22,22,22,22,22,22},// fine_strength[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{
|
||||
{1024,1024,1024,1024},
|
||||
{1024,1024,1024,1024},
|
||||
{1024,1024,1024,1024},
|
||||
{512,512,512,512},
|
||||
{512,512,512,512},
|
||||
{512,512,512,512},
|
||||
{512,512,512,512},
|
||||
{256,256,256,256},
|
||||
{127,127,127,127},
|
||||
{127,127,127,127},
|
||||
{127,127,127,127},
|
||||
{127,127,127,127},
|
||||
{127,127,127,127},
|
||||
{127,127,127,127},
|
||||
{127,127,127,127},
|
||||
{127,127,127,127}
|
||||
},// coarse_strength
|
||||
{64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64} // coring_wgt[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
},// auto_attr;
|
||||
{
|
||||
{0,0,0,0},// chroma_strength[XMEDIA_ISP_BAYER_PATTERN_NUM];
|
||||
48,// fine_strength;
|
||||
{2048,2048,2048,2048},// coarse_strength[XMEDIA_ISP_BAYER_PATTERN_NUM];
|
||||
64 // coring_wgt;
|
||||
},// manual_attr;
|
||||
{
|
||||
{0,0}// wdr_frame_strength[XMEDIA_ISP_WDR_CHN_MAX_NUM]
|
||||
} // wdr;
|
||||
};
|
||||
static xmedia_isp_dehaze_attr g_sc200ai_dehaze={
|
||||
1,// enable;
|
||||
0,// op_type;
|
||||
{0},
|
||||
0,
|
||||
{
|
||||
100,
|
||||
{361, 350, 341, 330, 320, 311, 300, 291, 280, 271, 265, 258, 255, 255, 255, 256, 256},
|
||||
{256, 256, 256, 256, 256, 256, 257, 258, 260, 263, 266, 269, 273, 276, 278, 280, 256},
|
||||
},//manual
|
||||
{
|
||||
16,
|
||||
{100,200,400,800,1600,3200,6400,12800,25600},
|
||||
{100,100,100,100,100,100,100,100,100,100,100},
|
||||
{
|
||||
{361, 350, 341, 330, 320, 311, 300, 291, 280, 271, 265, 258, 255, 255, 255, 256, 256},
|
||||
{361, 350, 341, 330, 320, 311, 300, 291, 280, 271, 265, 258, 255, 255, 255, 256, 256},
|
||||
{361, 350, 341, 330, 320, 311, 300, 291, 280, 271, 265, 258, 255, 255, 255, 256, 256},
|
||||
{361, 350, 341, 330, 320, 311, 300, 291, 280, 271, 265, 258, 255, 255, 255, 256, 256},
|
||||
{361, 350, 341, 330, 320, 311, 300, 291, 280, 271, 265, 258, 255, 255, 255, 256, 256},
|
||||
{361, 350, 341, 330, 320, 311, 300, 291, 280, 271, 265, 258, 255, 255, 255, 256, 256},
|
||||
{361, 350, 341, 330, 320, 311, 300, 291, 280, 271, 265, 258, 255, 255, 255, 256, 256},
|
||||
{361, 350, 341, 330, 320, 311, 300, 291, 280, 271, 265, 258, 255, 255, 255, 256, 256},
|
||||
{361, 350, 341, 330, 320, 311, 300, 291, 280, 271, 265, 258, 255, 255, 255, 256, 256},
|
||||
{361, 350, 341, 330, 320, 311, 300, 291, 280, 271, 265, 258, 255, 255, 255, 256, 256},
|
||||
{361, 350, 341, 330, 320, 311, 300, 291, 280, 271, 265, 258, 255, 255, 255, 256, 256},
|
||||
{361, 350, 341, 330, 320, 311, 300, 291, 280, 271, 265, 258, 255, 255, 255, 256, 256},
|
||||
{361, 350, 341, 330, 320, 311, 300, 291, 280, 271, 265, 258, 255, 255, 255, 256, 256},
|
||||
{361, 350, 341, 330, 320, 311, 300, 291, 280, 271, 265, 258, 255, 255, 255, 256, 256},
|
||||
{361, 350, 341, 330, 320, 311, 300, 291, 280, 271, 265, 258, 255, 255, 255, 256, 256},
|
||||
{361, 350, 341, 330, 320, 311, 300, 291, 280, 271, 265, 258, 255, 255, 255, 256, 256}},
|
||||
{
|
||||
{256, 256, 256, 256, 256, 256, 257, 258, 260, 263, 266, 269, 273, 276, 278, 280, 256},
|
||||
{256, 260, 264, 268, 270, 272, 274, 276, 278, 280, 280, 280, 280, 280, 280, 280, 256},
|
||||
{256, 260, 264, 268, 270, 272, 274, 276, 278, 280, 280, 280, 280, 280, 280, 280, 256},
|
||||
{256, 260, 264, 268, 270, 272, 274, 276, 278, 280, 280, 280, 280, 280, 280, 280, 256},
|
||||
{256, 260, 264, 268, 270, 272, 274, 276, 278, 280, 280, 280, 280, 280, 280, 280, 256},
|
||||
{256, 258, 260, 262, 264, 266, 268, 270, 272, 272, 272, 272, 272, 272, 272, 272, 256},
|
||||
{256, 258, 260, 262, 264, 266, 268, 270, 272, 272, 272, 272, 272, 272, 272, 272, 256},
|
||||
{256, 258, 260, 262, 264, 266, 268, 270, 272, 272, 272, 272, 272, 272, 272, 272, 256},
|
||||
{256, 257, 258, 259, 260, 262, 264, 266, 268, 268, 268, 268, 268, 268, 268, 268, 256},
|
||||
{256, 257, 258, 259, 260, 262, 264, 266, 268, 268, 268, 268, 268, 268, 268, 268, 256},
|
||||
{256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256},
|
||||
{256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256},
|
||||
{256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256},
|
||||
{256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256},
|
||||
{256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256},
|
||||
{256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256, 256}},
|
||||
},//auto
|
||||
0,
|
||||
0
|
||||
};
|
||||
static xmedia_isp_demosaic_attr g_sc200ai_dms = {
|
||||
1,// enable;
|
||||
0,// op_type;
|
||||
{
|
||||
16,// iso_num;
|
||||
{100,200,400,800,1600,3200,6400,12800,25600,51200,102400,204800,409600,819200,1638400,3276800},// iso_level[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64},// mf_de_str[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3},// hf_de_str
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},// mf_de_osh_str[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},// mf_de_ush_str[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},// detail_smooth_range[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},// detail_smooth_str[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},// color_noise_thd_f[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},// color_noise_str_f[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},// color_noise_thd_y[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},// color_noise_str_y[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
},// auto_attr;
|
||||
{
|
||||
19,// mf_de_str;
|
||||
3,// hf_de_str;
|
||||
0,// mf_de_osh_str;
|
||||
0,// mf_de_ush_str;
|
||||
1,// detail_smooth_range;
|
||||
0,// detail_smooth_str;
|
||||
0,// color_noise_thd_f;
|
||||
0,// color_noise_str_f;
|
||||
0,// color_noise_thd_y;
|
||||
0// color_noise_str_y;
|
||||
} //manual_attr;
|
||||
};
|
||||
static xmedia_isp_cr_attr g_sc200ai_crosstalk = {
|
||||
1,// enable;
|
||||
XMEDIA_VIDEO_OPERATION_MODE_AUTO,// op_type;
|
||||
{
|
||||
31,// slope;
|
||||
100,// threshold;
|
||||
0// np_offset;
|
||||
},// manual_attr;
|
||||
{
|
||||
16,// iso_num;
|
||||
{100,200,400,800,1600,3200,6400,12800,25600,51200,102400,204800,409600,819200,1638400,3276800},// iso_level[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{31,31,31,31,31,31,31,31,31,31,31,31,31,31,31},// slope[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100},// threshold[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,}// np_offset[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
} // auto_attr;
|
||||
};
|
||||
static xmedia_isp_csc_attr g_sc200ai_csc={
|
||||
1,//// enable;
|
||||
1,// color_gamut;
|
||||
50,// hue;
|
||||
50,// luma;
|
||||
50,// contr;
|
||||
50,// satu;
|
||||
0,// limited_range_en;
|
||||
1,// ext_csc_en;
|
||||
1,// ct_mode_en;
|
||||
{
|
||||
{0,0,0},// csc_idc[XMEDIA_ISP_CSC_INPUT_DC_NUM];
|
||||
{0,128,128},// csc_odc[XMEDIA_ISP_CSC_OUTPUT_DC_NUM];
|
||||
{213,715,72,-117,-394,511,511,-464,-47}
|
||||
}// csc_magtrx;
|
||||
};
|
||||
static xmedia_isp_global_cac_attr g_sc200ai_gcac={
|
||||
1,// enable;
|
||||
719,// ver_coordinate;
|
||||
1279,// hor_coordinate;
|
||||
22,// param_red_a;
|
||||
-29,// param_red_b;
|
||||
52,// param_red_c;
|
||||
9,// param_blue_a;
|
||||
35,// param_blue_b;
|
||||
6,// param_blue_c;
|
||||
0,// ver_norm_shift;
|
||||
64,// ver_norm_factor;
|
||||
0,// hor_norm_shift;
|
||||
64,// hor_norm_factor;
|
||||
0 // cor_var_thr;
|
||||
};
|
||||
static xmedia_isp_dpc_dynamic_attr g_sc200ai_dpc={
|
||||
1,// enable;
|
||||
0,// sup_twinkle_en;
|
||||
0,// soft_thr;
|
||||
0,// soft_slope;
|
||||
XMEDIA_VIDEO_OPERATION_MODE_AUTO,// op_type;
|
||||
{
|
||||
88,//new add str
|
||||
2048,// threshold;
|
||||
1// slope;
|
||||
},// manual_attr;
|
||||
{
|
||||
16,// iso_num;
|
||||
{100,200,400,800,1600,3200,6400,12800,25600,51200,102400,204800,409600,819200,1638400,3276800},// iso_level
|
||||
{48,48,68,68,76,80,84,88,92,96,100,104,108,108,108,108}, // //new add str
|
||||
{63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63}, //threshold
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, //slope
|
||||
}// auto_attr;
|
||||
};
|
||||
static xmedia_isp_drc_attr g_sc200ai_drc={
|
||||
0,// drc_en;
|
||||
1,// ltmc_en;
|
||||
0,// pilot new add detail_enhance_en;
|
||||
1,// tm_type;
|
||||
0,// op_type;
|
||||
{
|
||||
3000,// rang_fil_coef;
|
||||
145,// spatial_fil_coef;
|
||||
102,// rang_rate1;
|
||||
1015,// rang_rate2;
|
||||
3000,// luma_th1;
|
||||
20000,// rang_slope;
|
||||
2000,// local_mixing_bright_min;
|
||||
2000 ,// local_mixing_bright_max;
|
||||
400 ,// local_mixing_bright_thr;
|
||||
4000 ,// local_mixing_bright_thr2;
|
||||
2000,// local_mixing_dark_min;
|
||||
2000,// local_mixing_dark_max;
|
||||
400,// local_mixing_dark_thr;
|
||||
4000,// local_mixing_dark_thr2;
|
||||
16,// ltmc_strength;
|
||||
64,// drc_strength;
|
||||
{0x1,0x96,0x1E,0x64}, //pilot asymmetry_curve;
|
||||
{0x1,0x96,0x1E,0x64}, //pilot asymmetry_max_curve;
|
||||
{0}, //pilot tm_value_user[XMEDIA_ISP_DRC_TM_VALUE_NUM_FULL];
|
||||
{0}, //pilot tm_value_max_user[XMEDIA_ISP_DRC_TM_VALUE_NUM_FULL];
|
||||
},// manual_attr;
|
||||
{
|
||||
16,// iso_num;
|
||||
{100,200,400,800,1600,3200,6400,12800,25600,51200,102400,204800,409600,819200,1638400,3276800},// iso_level[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{3000,3000,3000,3000,3000,3000,3000,3000,3000,3000,3000,3000,3000,3000,3000,3000},// rang_fil_coef[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{145,145,145,145,145,145,145,145,145,145,145,145,145,145,145,145}, //spatial_fil_coef[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{102,102,102,102,102,102,102,102,102,102,102,102,102,102,102},// rang_rate1
|
||||
{1015,1015,1015,1015,1015,1015,1015,1015,1015,1015,1015,1015,1015,1015,1015,1015},// rang_rate2
|
||||
{3000,3000,3000,3000,3000,3000,3000,3000,3000,3000,3000,3000,3000,3000,3000,3000},// luma_th1
|
||||
{20000,20000,20000,20000,20000,20000,20000,20000,20000,20000,20000,20000,20000,20000,20000,20000},// luma_th2
|
||||
{2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000},// local_mixing_bright_min
|
||||
{2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000},// local_mixing_bright_max[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{400 ,400 ,400 ,400 ,400 ,400 ,400 ,400 ,400 ,400 ,400 ,400 ,400 ,400 ,400 ,400 },// local_mixing_bright_thr[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{4000 ,4000 ,4000 ,4000 ,4000 ,4000 ,4000 ,4000 ,4000 ,4000 ,4000 ,4000 ,4000 ,4000 ,4000 ,4000 },// local_mixing_bright_thr2
|
||||
{2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000},// local_mixing_dark_min[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000,2000},// local_mixing_dark_max[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{400,400,400,400,400,400,400,400,400,400,400,400,400,400,400,400},// local_mixing_dark_thr[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{4000,4000,4000,4000,4000,4000,4000,4000,4000,4000,4000,4000,4000,4000,4000,4000},// local_mixing_dark_thr2[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2}, //ltmc_strength
|
||||
{8,8,8,8,8,8,6,4,0,0,0,0,0,0,0,0}, //drc_strength
|
||||
{{0x1,0x96,0x1E,0x64}}, //pilot asymmetry_curve[XMEDIA_ISP_EXP_RATIO_MAX_COUNT];
|
||||
{{0x1,0x96,0x1E,0x64}}, //pilot asymmetry_max_curve[XMEDIA_ISP_EXP_RATIO_MAX_COUNT];
|
||||
{{0}}, //pilot tm_value_user[XMEDIA_ISP_EXP_RATIO_MAX_COUNT][XMEDIA_ISP_DRC_TM_VALUE_NUM_FULL];
|
||||
{{0}}, //pilot tm_value_max_user[XMEDIA_ISP_EXP_RATIO_MAX_COUNT][XMEDIA_ISP_DRC_TM_VALUE_NUM_FULL];
|
||||
} // auto_attr;
|
||||
};
|
||||
static xmedia_isp_gamma_attr g_sc200ai_gamma={
|
||||
1,// enable;
|
||||
2,// exp_num;
|
||||
{100,1600},// exp_level[XMEDIA_ISP_EXP_MAX_COUNT];
|
||||
{
|
||||
{
|
||||
0, 20, 40, 61, 81, 102, 123, 144, 164, 185, 206, 227, 249, 270, 291, 312, 334, 355, 377, 398, 419, 441, 462, 484, 505, 527, 548, 569, 591, 612, 633, 654, 676,
|
||||
697, 718, 739, 760, 780, 801, 822, 842, 862, 883, 903, 923, 943, 962, 982, 1001,1021,1040,1059, 1077,1096,1114,1133, 1151,1169,1186,1204, 1221,1238,1254,1271, 1287,1303,
|
||||
1319,1335, 1350,1365,1380,1396, 1410,1425,1440,1454, 1468,1482,1496,1510, 1524,1537,1551,1564, 1577,1590,1603,1616, 1628,1641,1653,1665, 1678,1690,1702,1713, 1725,1737,1748,
|
||||
1760, 1771,1782,1793,1805, 1816,1826,1837,1848, 1859,1869,1880,1890, 1901,1911,1921,1932, 1942,1952,1962,1972, 1982,1992,2002,2011, 2021,2031,2041,2050, 2060,2070,2079,2088,
|
||||
2098,2107,2116,2125, 2134,2142,2151,2160, 2168,2176,2185,2193, 2201,2209,2217,2225, 2232,2240,2248,2255, 2263,2270,2277,2285, 2292,2299,2306,2313, 2320,2327,2334,2340, 2347,
|
||||
2354,2360,2367, 2373,2380,2386,2393, 2399,2405,2412,2418, 2424,2430,2436,2443, 2449,2455,2461,2467, 2473,2479,2485,2491, 2497,2503,2509,2515, 2521,2527,2533,2539, 2544,2550,
|
||||
2556,2562, 2567,2573,2578,2584, 2589,2594,2600,2605, 2610,2615,2621,2626, 2631,2636,2641,2646, 2651,2656,2660,2665, 2670,2675,2679,2684, 2689,2693,2698,2702, 2707,2711,2716,
|
||||
2720, 2725,2729,2734,2738, 2742,2747,2751,2755, 2759,2764,2768,2772, 2776,2780,2784,2788, 2793,2797,2801,2805, 2809,2813,2817,2821, 2825,2829,2833,2837, 2841,2845,2849,2852,
|
||||
2856,2860,2864,2867, 2871,2875,2878,2882, 2885,2889,2892,2896, 2899,2903,2906,2910, 2913,2916,2920,2923, 2926,2930,2933,2936, 2939,2943,2946,2949, 2952,2955,2958,2961, 2964,
|
||||
2968,2971,2974, 2977,2980,2983,2986, 2989,2992,2995,2998, 3000,3003,3006,3009, 3012,3015,3018,3021, 3024,3026,3029,3032, 3035,3038,3041,3043, 3046,3049,3052,3054, 3057,3060,
|
||||
3062,3065, 3067,3070,3073,3075, 3078,3080,3083,3085, 3088,3090,3093,3095, 3097,3100,3102,3104, 3107,3109,3112,3114, 3116,3119,3121,3123, 3125,3128,3130,3132, 3135,3137,3139,
|
||||
3141, 3144,3146,3148,3150, 3153,3155,3157,3159, 3162,3164,3166,3168, 3171,3173,3175,3177, 3180,3182,3184,3187, 3189,3191,3194,3196, 3198,3200,3203,3205, 3207,3209,3212,3214,
|
||||
3216,3219,3221,3223, 3225,3228,3230,3232, 3235,3237,3239,3241, 3244,3246,3248,3250, 3253,3255,3257,3259, 3262,3264,3266,3268, 3271,3273,3275,3277, 3280,3282,3284,3286, 3289,
|
||||
3291,3293,3295, 3297,3300,3302,3304, 3306,3308,3311,3313, 3315,3317,3319,3321, 3323,3326,3328,3330, 3332,3334,3336,3338, 3340,3342,3345,3347, 3349,3351,3353,3355, 3357,3359,
|
||||
3361,3363, 3365,3367,3369,3371, 3373,3375,3377,3380, 3382,3384,3386,3388, 3390,3392,3394,3396, 3398,3400,3402,3404, 3406,3408,3410,3412, 3414,3416,3418,3420, 3422,3424,3426,
|
||||
3428, 3430,3432,3434,3435, 3437,3439,3441,3443, 3445,3447,3449,3451, 3453,3454,3456,3458, 3460,3462,3464,3465, 3467,3469,3471,3472, 3474,3476,3478,3480, 3482,3483,3485,3487,
|
||||
3488,3490,3492,3493, 3495,3497,3498,3500, 3501,3503,3504,3506, 3508,3509,3511,3513, 3515,3516,3518,3519, 3521,3522,3524,3525, 3527,3529,3530,3532, 3533,3535,3536,3538, 3539,
|
||||
3541,3543,3544, 3546,3547,3549,3551, 3552,3553,3555,3556, 3558,3559,3561,3562, 3564,3565,3567,3568, 3570,3571,3573,3574, 3576,3578,3579,3581, 3582,3584,3585,3586, 3588,3589,
|
||||
3591,3592, 3594,3595,3597,3598, 3600,3601,3603,3604, 3605,3607,3608,3610, 3611,3613,3614,3615, 3617,3618,3620,3621, 3622,3624,3625,3627, 3628,3629,3631,3632, 3634,3635,3637,
|
||||
3638, 3639,3641,3642,3644, 3645,3646,3648,3649, 3650,3652,3653,3655, 3656,3657,3659,3660, 3662,3663,3665,3667, 3668,3669,3671,3672, 3673,3675,3676,3678, 3679,3681,3682,3684,
|
||||
3685,3687,3688,3690, 3691,3692,3694,3695, 3697,3698,3700,3702, 3703,3705,3706,3708, 3709,3710,3711,3713, 3715,3716,3717,3719, 3720,3721,3723,3724, 3726,3727,3729,3731, 3732,
|
||||
3734,3735,3736, 3737,3738,3739,3741, 3742,3744,3745,3747, 3748,3749,3751,3752, 3754,3755,3756,3757, 3759,3760,3761,3763, 3764,3766,3767,3768, 3770,3771,3772,3773, 3775,3776,
|
||||
3778,3779, 3780,3781,3782,3784, 3785,3786,3788,3789, 3791,3792,3793,3795, 3796,3797,3798,3799, 3800,3801,3803,3804, 3805,3807,3808,3809, 3811,3812,3814,3815, 3816,3818,3819,
|
||||
3820, 3821,3822,3823,3824, 3825,3827,3828,3829, 3831,3832,3833,3835, 3836,3837,3838,3839, 3840,3842,3843,3844, 3846,3847,3848,3849, 3850,3851,3853,3853, 3854,3856,3857,3858,
|
||||
3860,3861,3862,3863, 3865,3866,3867,3869, 3869,3870,3871,3872, 3873,3874,3876,3877, 3878,3880,3881,3882, 3883,3884,3885,3886, 3888,3889,3890,3891, 3892,3893,3894,3895, 3896,
|
||||
3897,3898,3899, 3901,3902,3903,3904, 3906,3907,3908,3909, 3911,3911,3912,3913, 3914,3915,3916,3917, 3919,3920,3921,3922, 3923,3924,3925,3926, 3927,3928,3929,3930, 3931,3933,
|
||||
3934,3935, 3936,3936,3938,3939, 3940,3941,3943,3944, 3945,3946,3946,3948, 3949,3950,3950,3951, 3953,3954,3955,3956, 3957,3958,3959,3960, 3961,3962,3962,3964, 3965,3966,3967,
|
||||
3968, 3969,3971,3971,3972, 3973,3974,3975,3977, 3978,3979,3979,3980, 3981,3983,3984,3985, 3986,3987,3987,3989, 3990,3991,3992,3993, 3994,3995,3996,3997, 3998,3999,3999,4000,
|
||||
4001,4003,4004,4005, 4006,4007,4008,4009, 4010,4011,4012,4013, 4014,4015,4016,4017, 4018,4019,4020,4021, 4022,4023,4024,4025, 4026,4026,4028,4029, 4030,4031,4032,4033, 4034,
|
||||
4035,4036,4037, 4037,4038,4039,4040, 4041,4042,4043,4044, 4045,4046,4047,4048, 4049,4050,4050,4051, 4052,4053,4054,4055, 4056,4057,4058,4059, 4060,4061,4062,4063, 4064,4064,
|
||||
4065,4066, 4067,4068,4068,4069, 4070,4071,4073,4074, 4074,4075,4075,4076, 4077,4078,4079,4080, 4081,4082,4083,4083, 4084,4085,4085,4086, 4087,4088,4089,4090, 4091,4092,4093,
|
||||
4094, 4095
|
||||
},
|
||||
{
|
||||
0, 15, 31, 48, 64, 80, 97, 113, 130, 146, 163, 180, 197, 213, 230, 247, 264, 281, 298, 315, 333, 350, 367, 384, 401, 419, 436, 453, 471, 488, 506, 523,
|
||||
541, 558, 576, 593, 611, 628, 646, 663, 681, 698, 716, 733, 751, 769, 786, 804, 821, 839, 856, 874, 891, 909, 926, 944, 961, 979, 996,1013, 1031,1048,1065,1083,
|
||||
1100,1117,1134,1151, 1168,1185,1202,1219, 1236,1253,1270,1287, 1303,1320,1337,1353, 1369,1386,1402,1419, 1435,1451,1467,1483, 1499,1515,1531,1546, 1562,1578,1593,1608,
|
||||
1624,1639,1654,1669, 1684,1699,1714,1728, 1743,1757,1772,1786, 1800,1814,1828,1842, 1856,1869,1883,1896, 1910,1923,1936,1949, 1961,1974,1987,1999, 2011,2023,2035,2047,
|
||||
2060,2072,2083,2095, 2106,2117,2128,2139, 2150,2161,2172,2182, 2193,2203,2214,2224, 2234,2244,2254,2264, 2274,2283,2293,2303, 2312,2321,2331,2340, 2349,2358,2367,2376,
|
||||
2385,2393,2402,2411, 2419,2427,2436,2444, 2452,2460,2468,2476, 2484,2492,2500,2508, 2515,2523,2530,2538, 2545,2553,2560,2567, 2574,2581,2588,2595, 2602,2609,2616,2623,
|
||||
2629,2636,2643,2649, 2656,2662,2669,2675, 2681,2688,2694,2700, 2706,2712,2718,2724, 2730,2736,2742,2748, 2754,2760,2765,2771, 2777,2783,2788,2794, 2799,2805,2810,2816,
|
||||
2821,2827,2832,2838, 2843,2848,2854,2859, 2864,2869,2875,2880, 2885,2890,2895,2901, 2906,2911,2916,2921, 2926,2931,2936,2942, 2947,2952,2957,2962, 2967,2972,2977,2982,
|
||||
2987,2992,2997,3002, 3007,3012,3016,3021, 3026,3030,3035,3039, 3044,3048,3052,3056, 3061,3065,3069,3073, 3077,3081,3085,3089, 3093,3096,3100,3104, 3107,3111,3115,3118,
|
||||
3122,3125,3128,3132, 3135,3138,3142,3145, 3148,3151,3154,3157, 3160,3163,3166,3169, 3172,3175,3178,3181, 3183,3186,3189,3192, 3194,3197,3200,3202, 3205,3207,3210,3212,
|
||||
3215,3217,3220,3222, 3224,3227,3229,3232, 3234,3236,3238,3241, 3243,3245,3247,3250, 3252,3254,3256,3258, 3260,3262,3265,3267, 3269,3271,3273,3275, 3277,3279,3281,3283,
|
||||
3285,3287,3289,3291, 3294,3296,3298,3300, 3302,3304,3306,3308, 3310,3312,3314,3316, 3318,3320,3322,3324, 3326,3328,3330,3333, 3335,3337,3339,3341, 3343,3345,3348,3350,
|
||||
3352,3354,3356,3359, 3361,3363,3365,3367, 3369,3371,3373,3375, 3377,3379,3381,3383, 3385,3387,3389,3391, 3393,3395,3397,3399, 3401,3403,3404,3406, 3408,3410,3412,3414,
|
||||
3415,3417,3419,3421, 3422,3424,3426,3427, 3429,3431,3432,3434, 3436,3437,3439,3441, 3442,3444,3445,3447, 3449,3450,3452,3453, 3455,3456,3458,3459, 3461,3462,3464,3465,
|
||||
3467,3468,3470,3471, 3473,3474,3475,3477, 3478,3480,3481,3483, 3484,3485,3487,3488, 3490,3491,3492,3494, 3495,3496,3498,3499, 3501,3502,3503,3505, 3506,3507,3509,3510,
|
||||
3511,3513,3514,3515, 3517,3518,3519,3521, 3522,3523,3525,3526, 3527,3529,3530,3531, 3533,3534,3535,3537, 3538,3539,3541,3542, 3544,3545,3546,3548, 3549,3550,3552,3553,
|
||||
3554,3556,3557,3558, 3560,3561,3563,3564, 3565,3567,3568,3569, 3570,3572,3573,3574, 3576,3577,3578,3580, 3581,3582,3583,3585, 3586,3587,3588,3590, 3591,3592,3593,3595,
|
||||
3596,3597,3598,3599, 3601,3602,3603,3604, 3606,3607,3608,3609, 3610,3611,3613,3614, 3615,3616,3617,3618, 3620,3621,3622,3623, 3624,3625,3627,3628, 3629,3630,3631,3632,
|
||||
3633,3634,3636,3637, 3638,3639,3640,3641, 3642,3643,3645,3646, 3647,3648,3649,3650, 3651,3652,3653,3654, 3656,3657,3658,3659, 3660,3661,3662,3663, 3664,3665,3666,3667,
|
||||
3669,3670,3671,3672, 3673,3674,3675,3676, 3677,3678,3679,3680, 3681,3683,3684,3685, 3686,3687,3688,3689, 3690,3691,3692,3693, 3694,3695,3697,3698, 3699,3700,3701,3702,
|
||||
3703,3704,3705,3706, 3707,3708,3709,3710, 3712,3713,3714,3715, 3716,3717,3718,3719, 3720,3721,3722,3723, 3724,3725,3726,3727, 3728,3729,3730,3731, 3732,3733,3734,3735,
|
||||
3736,3737,3738,3739, 3740,3741,3742,3743, 3744,3745,3746,3747, 3748,3749,3750,3751, 3752,3753,3754,3755, 3756,3757,3758,3759, 3760,3761,3762,3763, 3764,3765,3765,3766,
|
||||
3767,3768,3769,3770, 3771,3772,3773,3774, 3775,3776,3777,3778, 3779,3780,3781,3782, 3783,3784,3785,3786, 3787,3788,3789,3790, 3791,3792,3793,3794, 3795,3796,3797,3798,
|
||||
3798,3799,3800,3801, 3802,3803,3804,3805, 3806,3807,3808,3809, 3810,3811,3812,3813, 3814,3815,3817,3818, 3819,3820,3821,3822, 3823,3824,3825,3826, 3827,3828,3829,3830,
|
||||
3831,3832,3833,3833, 3834,3835,3836,3837, 3840,3840,3841,3842, 3843,3844,3845,3846, 3847,3848,3849,3851, 3852,3853,3854,3855, 3856,3857,3858,3859, 3860,3862,3863,3864,
|
||||
3865,3866,3867,3868, 3869,3871,3872,3873, 3874,3875,3876,3877, 3879,3880,3881,3882, 3883,3884,3885,3887, 3888,3889,3890,3891, 3892,3893,3895,3896, 3897,3898,3899,3900,
|
||||
3901,3903,3904,3905, 3906,3907,3908,3909, 3911,3912,3913,3914, 3915,3916,3917,3918, 3920,3921,3922,3923, 3924,3925,3926,3928, 3929,3930,3931,3932, 3933,3934,3935,3936,
|
||||
3938,3939,3940,3941, 3942,3943,3944,3945, 3946,3948,3950,3951, 3951,3952,3953,3954, 3955,3956,3957,3958, 3959,3960,3963,3964, 3965,3966,3967,3968, 3969,3969,3971,3972,
|
||||
3973,3974,3975,3977, 3978,3979,3979,3980, 3981,3983,3984,3985, 3986,3987,3987,3989, 3990,3991,3992,3993, 3994,3995,3996,3997, 3998,3999,3999,4000, 4001,4003,4004,4005,
|
||||
4006,4007,4008,4009, 4010,4011,4012,4013, 4014,4015,4016,4017, 4018,4019,4020,4021, 4022,4023,4024,4025, 4026,4026,4028,4029, 4030,4031,4032,4033, 4034,4035,4036,4037,
|
||||
4037,4038,4039,4040, 4041,4042,4043,4044, 4045,4046,4047,4048, 4049,4050,4050,4051, 4052,4053,4054,4055, 4056,4057,4058,4059, 4060,4061,4062,4063, 4064,4064,4065,4066,
|
||||
4067,4068,4068,4069, 4070,4071,4073,4074, 4074,4075,4075,4076, 4077,4078,4079,4080, 4081,4082,4083,4083, 4084,4085,4085,4086, 4087,4088,4089,4090, 4091,4092,4093,4094,
|
||||
4095
|
||||
}
|
||||
} ,// table[XMEDIA_ISP_EXP_MAX_COUNT][XMEDIA_ISP_GAMMA_NODE_NUM];
|
||||
3 // curve_type;
|
||||
};
|
||||
|
||||
static xmedia_isp_lce_attr g_sc200ai_lce={
|
||||
1,// enable;
|
||||
0,// op_type;
|
||||
0,// pilot sat_en;
|
||||
0,// pilot sat_lce_gain_en;
|
||||
{125,123,120,117,113,109,105,101,97,93,89,86,83,80,78,76,74,73,72,73,73,73,73,72,72,72,71,71,71,71,70,69,69}, //sat_y_limit
|
||||
{125,123,120,117,113,109,105,101,97,93,89,86,83,80,78,76,74,73,72,73,73,73,73,72,72,72,71,71,71,70,70,70,69},// uv_limit_max[XMEDIA_ISP_LCE_MAX_CURVE_POINT_NUM];
|
||||
1, //input_di_mode_en
|
||||
1, //output_di_mode_en
|
||||
{
|
||||
15, //contrast_str
|
||||
{-30,1}, //contrast_blc_slope
|
||||
{0,1}, // contrast_wht_slope[XMEDIA_ISP_LCE_CONTRAST_SLOPE_NUM];
|
||||
128, //tpr_incr_coef
|
||||
128, //tpr_decr_coef
|
||||
{1,1,1,1,8,1,1,1,1},// flat_filter_strength[XMEDIA_ISP_LCE_FLAT_FILTER_SIZE];
|
||||
0,// halo_str;
|
||||
12, //blending_fmax
|
||||
919,// blending_sigma_division;
|
||||
25,// blending_mean;
|
||||
15,// blending_blcctrl_strength;
|
||||
32,// blending_blcctrl_value;
|
||||
14,// blending_whtctrl_strength;
|
||||
4,// blending_whtctrl_value;
|
||||
2,// sat_strength;
|
||||
{0,0}, //black_luma_expand
|
||||
{0,0}, //white_luma_expand
|
||||
},// manual_attr;
|
||||
{
|
||||
16,// iso_num;
|
||||
{100,200,400,800,1600,3200,6400,12800,25600,51200,102400,204800,409600,819200,1638400,3276800},// iso_level[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{15,15,18,22,28,28,28,22,22,22,22,22,22,22,22,22}, //contrast_str
|
||||
{
|
||||
{-30,1}, //contrast_blc_slop[0]
|
||||
{-30,1}, //contrast_blc_slop[1]
|
||||
{-20,1}, //contrast_blc_slop[2]
|
||||
{0,1},
|
||||
{0,1},
|
||||
{0,1},
|
||||
{0,1},
|
||||
{5,1}, //contrast_blc_slop[7]
|
||||
{10,1}, //contrast_blc_slop[8]
|
||||
{15,1}, //contrast_blc_slop[9]
|
||||
{15,1}, //contrast_blc_slop[10]
|
||||
{20,1}, //contrast_blc_slop[11]
|
||||
{20,1}, //contrast_blc_slop[12]
|
||||
{20,1}, //contrast_blc_slop[13]
|
||||
{20,1}, //contrast_blc_slop[14]
|
||||
{20,1}, //contrast_blc_slop[15]
|
||||
},// contrast_blc_slope[XMEDIA_ISP_ISO_MAX_COUNT][XMEDIA_ISP_LCE_CONTRAST_SLOPE_NUM];
|
||||
{
|
||||
{0,1},
|
||||
{0,1},
|
||||
{0,1},
|
||||
{0,1},
|
||||
{0,1},
|
||||
{0,1},
|
||||
{0,1},
|
||||
{0,1},
|
||||
{0,1},
|
||||
{0,1},
|
||||
{0,1},
|
||||
{0,1},
|
||||
{0,1},
|
||||
{0,1},
|
||||
{0,1},
|
||||
{0,1}, //contrast_wht_slope[15]
|
||||
},// contrast_wht_slope[XMEDIA_ISP_ISO_MAX_COUNT][XMEDIA_ISP_LCE_CONTRAST_SLOPE_NUM];
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tpr_incr_coef
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},// tpr_decr_coef[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{
|
||||
{1,1,1,1,8,1,1,1,1},
|
||||
{1,1,1,1,8,1,1,1,1},
|
||||
{1,1,1,1,8,1,1,1,1},
|
||||
{1,1,1,1,8,1,1,1,1},
|
||||
{1,1,1,1,8,1,1,1,1},
|
||||
{1,1,1,1,8,1,1,1,1},
|
||||
{1,1,1,1,8,1,1,1,1},
|
||||
{1,1,1,1,8,1,1,1,1},
|
||||
{1,1,1,1,8,1,1,1,1},
|
||||
{1,1,1,1,8,1,1,1,1},
|
||||
{1,1,1,1,8,1,1,1,1},
|
||||
{1,1,1,1,8,1,1,1,1},
|
||||
{1,1,1,1,8,1,1,1,1},
|
||||
{1,1,1,1,8,1,1,1,1},
|
||||
{1,1,1,1,8,1,1,1,1},
|
||||
{1,1,1,1,8,1,1,1,1}, //flat_filter_str[15]
|
||||
},// flat_filter_strength[XMEDIA_ISP_ISO_MAX_COUNT][XMEDIA_ISP_LCE_FLAT_FILTER_SIZE];
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},// halo_str[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{15,15,15,15,15,12,10,10,8,8,8,8,6,6,6,6}, //blending_fmax
|
||||
{9998,9998,9998,9998,919,919,919,919,919,919,919,919,919,919,919,919}, //blending_sigma_div
|
||||
{10,10,10,10,10,10,10,10,10,10,10,10,10,25,25,25}, //blending_mean
|
||||
{15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15},// blending_blcctrl_strength[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32},// blending_blcctrl_value[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{14,14,14,48,63,63,63,63,63,63,63,63,63,14,14,14}, //blending_wht_str
|
||||
{4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4},// blending_whtctrl_value[XMEDIA_ISP_ISO_MAX_COUNT];
|
||||
{5,5,5,5,5,2,2,2,2,2,2,2,2,2,2,0}, //sat_str
|
||||
{
|
||||
{0,0}, //black_luma_expand[0]
|
||||
{0,0}, //black_luma_expand[1]
|
||||
{0,0}, //black_luma_expand[2]
|
||||
{0,0}, //black_luma_expand[3]
|
||||
{0,0}, //black_luma_expand[4]
|
||||
{0,0}, //black_luma_expand[5]
|
||||
{0,0}, //black_luma_expand[6]
|
||||
{0,0}, //black_luma_expand[7]
|
||||
{0,0}, //black_luma_expand[8]
|
||||
{0,0}, //black_luma_expand[9]
|
||||
{0,0}, //black_luma_expand[10]
|
||||
{0,0}, //black_luma_expand[11]
|
||||
{0,0}, //black_luma_expand[12]
|
||||
{0,0}, //black_luma_expand[13]
|
||||
{0,0}, //black_luma_expand[14]
|
||||
{0,0}, //black_luma_expand[15]
|
||||
}, //black_luma_expand
|
||||
{
|
||||
{0,0}, //white_luma_expand[0]
|
||||
{0,0}, //white_luma_expand[1]
|
||||
{0,0}, //white_luma_expand[2]
|
||||
{0,0}, //white_luma_expand[3]
|
||||
{0,0}, //white_luma_expand[4]
|
||||
{0,0}, //white_luma_expand[5]
|
||||
{0,0}, //white_luma_expand[6]
|
||||
{0,0}, //white_luma_expand[7]
|
||||
{0,0}, //white_luma_expand[8]
|
||||
{0,0}, //white_luma_expand[9]
|
||||
{0,0}, //white_luma_expand[10]
|
||||
{0,0}, //white_luma_expand[11]
|
||||
{0,0}, //white_luma_expand[12]
|
||||
{0,0}, //white_luma_expand[13]
|
||||
{0,0}, //white_luma_expand[14]
|
||||
{0,0}, //white_luma_expand[15]
|
||||
}, //white_luma_expand
|
||||
}, //auto_attr
|
||||
};
|
||||
#endif
|
||||
|
||||
static const xmedia_isp_awb_ccm g_sc200ai_awb_wdr_ccm ={
|
||||
5,
|
||||
{
|
||||
{
|
||||
6800,
|
||||
{
|
||||
0x0134, 0x8075, 0x0041,
|
||||
0x802B, 0x0140, 0x8015,
|
||||
0x0010, 0x805A, 0x014A
|
||||
},
|
||||
},
|
||||
{
|
||||
6000,
|
||||
{
|
||||
0x0164, 0x80A5, 0x0041,
|
||||
0x802F, 0x0162, 0x8033,
|
||||
0x000F, 0x8075, 0x0166
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
4850,
|
||||
{
|
||||
0x0159, 0x8085, 0x002C,
|
||||
0x803E, 0x017A, 0x803C,
|
||||
0x001E, 0x807E, 0x0160
|
||||
},
|
||||
},
|
||||
{
|
||||
3650,
|
||||
{
|
||||
0x01A7, 0x80C7, 0x0020,
|
||||
0x8038, 0x0149, 0x8011,
|
||||
0x0016, 0x8088, 0x0172
|
||||
},
|
||||
},
|
||||
{
|
||||
2650,
|
||||
{
|
||||
0x0167, 0x80A2, 0x003B,
|
||||
0x8033, 0x0135, 0x8002,
|
||||
0x0014, 0x80AC, 0x0198
|
||||
},
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_sc200ai_awb_agc_table = {
|
||||
// bvalid
|
||||
1,
|
||||
|
||||
// saturation
|
||||
// 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768
|
||||
{ 125, 125, 125, 120, 120, 120, 120, 120, 115, 110, 105, 105, 105, 105, 105, 105}
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_sc200ai_awb_wdr_agc_table = {
|
||||
// bvalid
|
||||
1,
|
||||
|
||||
// saturation
|
||||
{ 120,120,115,115,110,110,105,100,100,96,96,96,96,96,96,96 }
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __SC200AI_EX_H__ */
|
||||
Reference in New Issue
Block a user