GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)
This commit is contained in:
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ifneq ($(MCU), )
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include Makefile.riscv
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else
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include Makefile.linux
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endif
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+20
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ISP_DIR := $(shell cd ../.. && /bin/pwd)
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SDK_DIR ?= $(shell cd $(ISP_DIR)/../../../.. && /bin/pwd)
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include $(SDK_DIR)/build/base.mk
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include $(ISP_DIR)/sensor/plat.mk
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LIB_NAME := libsns_imx307
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SRCS := $(wildcard *.c)
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SDK_USR_CFLAGS += -I$(GMP_DIR)/include
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SDK_USR_CFLAGS += -I$(GMP_DIR)/usr/include
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SDK_USR_CFLAGS += -I$(ISP_DIR)/include
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SDK_USR_CFLAGS += -I$(ISP_DIR)/../include
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SDK_USR_CFLAGS += -I.
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AT := @
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$(info SRCS=$(SRCS))
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include $(SDK_DIR)/build/sdk_lib_rules.mk
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@@ -0,0 +1,4 @@
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SRCS-y += imx307.c
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SRCS-y += imx307_ctrl.c
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+1624
File diff suppressed because it is too large
Load Diff
+83
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#ifndef _IMX307_COMM_H_
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#define _IMX307_COMM_H_
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#include "sns_comm.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Imx307 Register Address */
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#define IMX307_REG_ADDR_SHS1_L 0x3020//***积分时间设置寄存器
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#define IMX307_REG_ADDR_SHS1_M 0x3021
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#define IMX307_REG_ADDR_SHS1_H 0x3022
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#define IMX307_REG_ADDR_GAIN 0x3014//增益调节
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#define IMX307_REG_ADDR_HCG 0x3009//LCG与HCG的设置
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#define IMX307_REG_ADDR_VMAX_L 0x3018
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#define IMX307_REG_ADDR_VMAX_M 0x3019
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#define IMX307_REG_ADDR_VMAX_H 0x301A
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#define IMX307_REG_ADDR_SHS2_L 0x3024//长曝光的积分时间设置
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#define IMX307_REG_ADDR_SHS2_M 0x3025
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#define IMX307_REG_ADDR_SHS2_H 0x3026
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#define IMX307_REG_ADDR_RHS1_L 0x3030//读出时间
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#define IMX307_REG_ADDR_RHS1_M 0x3031
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#define IMX307_REG_ADDR_RHS1_H 0x3032
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#define IMX307_REG_ADDR_Y_OUT_SIZE 0x3418
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#define IMX307_REG_ADDR_Y_OUT_SIZE_H 0x3419
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#define IMX307_HMAX_ADDR 0x301c
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typedef enum {
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IMX307_REG_SHS1_L = 0,
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IMX307_REG_SHS1_M,
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IMX307_REG_SHS1_H,
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IMX307_REG_GAIN,
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IMX307_REG_HCG,
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IMX307_REG_VMAX_L,
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IMX307_REG_VMAX_M,
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IMX307_REG_VMAX_H,
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IMX307_REG_L_MAX_NUM,
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// short frame reg info from here
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IMX307_REG_SHS2_L = IMX307_REG_L_MAX_NUM,
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IMX307_REG_SHS2_M,
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IMX307_REG_SHS2_H,
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IMX307_REG_RHS1_L,
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IMX307_REG_RHS1_M,
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IMX307_REG_RHS1_H,
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IMX307_REG__Y_OUT_SIZE,
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IMX307_REG__Y_OUT_SIZE_H,
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IMX307_REG_MAX_NUM
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}imx307_reg_info;
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typedef struct {
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xmedia_u8 u8Hcg;
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xmedia_u32 u32BRL;
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xmedia_u32 u32RHS1_MAX;
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xmedia_u32 u32RHS2_MAX;
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} IMX307_STATE_S;
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#define IMX307_LINEAR_REG_INFO_MAX_NUM IMX307_REG_L_MAX_NUM
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#define IMX307_2TO1_WDR_REG_INFO_MAX_NUM IMX307_REG_MAX_NUM
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/****************************************************************************
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* local variables *
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****************************************************************************/
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#define IMX307_FULL_LINES_MAX (0x3FFFF)
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#define IMX307_FULL_LINES_MAX_2TO1_WDR (0x8AA) // considering the YOUT_SIZE and bad frame
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//imx307_init被使用
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#define IMX307_VMAX_1080P30_LINEAR 1125
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#define IMX307_VMAX_2L_1080P60TO30_WDR 1125
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#define IMX307_VMAX_4L_1080P60TO30_WDR 1465
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extern sensor_context *g_imx307_ctx[XMEDIA_SENSOR_DEV_MAX_NUM];
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#define IMX307_GET_CTX(dev, ctx) ctx = g_imx307_ctx[dev]
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#ifdef __cplusplus
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}
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#endif
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#endif
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+495
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#include <stdio.h>
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#include <string.h>
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#include "i2c_dev.h"
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#include "imx307.h"
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#include "imx307_ctrl.h"
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static xmedia_s32 g_imx307_i2c_addr[XMEDIA_SENSOR_DEV_MAX_NUM] =
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{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
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static xmedia_s32 g_imx307_i2c_fd[XMEDIA_SENSOR_DEV_MAX_NUM] =
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{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
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#define IMX307_REG_ADDR_MIRROR_FLIP 0x3007
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xmedia_void imx307_delay_ms(xmedia_s32 ms)
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{
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usleep(ms * 1000);
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}
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// 1080P30 and 1080P25
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xmedia_s32 imx307_2l_linear_1080p30_init(xmedia_u32 dev)
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{
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// Enter Standby
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imx307_write_reg(dev, 0x3000, 0x01); // Standby mode
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imx307_write_reg(dev, 0x3002, 0x00); // XMSTA
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imx307_write_reg(dev, 0x3005, 0x00); // ADBIT-10bit
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imx307_write_reg(dev, 0x3007, 0x00); // VREVERSE & HREVERSE & WINMODE
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imx307_write_reg(dev, 0x3009, 0x02); // FRSEL & FDG_SEL
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imx307_write_reg(dev, 0x300A, 0x3C); // BLKLEVEL
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imx307_write_reg(dev, 0x3011, 0x0A);
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imx307_write_reg(dev, 0x3018, 0x65); // VMAX
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imx307_write_reg(dev, 0x3019, 0x04); // VMAX
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imx307_write_reg(dev, 0x301C, 0x30); // HMAX;
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imx307_write_reg(dev, 0x301D, 0x11); // HMAX;
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imx307_write_reg(dev, 0x3046, 0x00); // ODBIT & OPORTSEL
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imx307_write_reg(dev, 0x304B, 0x0A); // XVSOUTSEL & XHSOUTSEL
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imx307_write_reg(dev, 0x305C, 0x18); // INCKSEL1 37.125MHz
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imx307_write_reg(dev, 0x305D, 0x03); // INCKSEL2
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imx307_write_reg(dev, 0x305E, 0x20);
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imx307_write_reg(dev, 0x305F, 0x01);
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imx307_write_reg(dev, 0x309E, 0x4A);
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imx307_write_reg(dev, 0x309F, 0x4A);
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imx307_write_reg(dev, 0x311C, 0x0E);
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imx307_write_reg(dev, 0x3128, 0x04);
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imx307_write_reg(dev, 0x3129, 0x1D); // ADBIT1
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imx307_write_reg(dev, 0x313B, 0x41);
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imx307_write_reg(dev, 0x315E, 0x1A); // INCKSEL5 37.125MHz INCK5 Setting
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imx307_write_reg(dev, 0x3164, 0x1A); // INCKSEL6 37.125MHz
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imx307_write_reg(dev, 0x317C, 0x12); // ADBIT2
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imx307_write_reg(dev, 0x31EC, 0x37); // ADBIT3
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imx307_write_reg(dev, 0x3405, 0x10); // REPETITION
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imx307_write_reg(dev, 0x3407, 0x01); // PHYSICAL_LANE_NUM
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imx307_write_reg(dev, 0x3414, 0x0A); // OPB_SIZE_V
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imx307_write_reg(dev, 0x3418, 0x49); // Y_OUT_SIZE
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imx307_write_reg(dev, 0x3419, 0x04); // Y_OUT_SIZE
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imx307_write_reg(dev, 0x3441, 0x0A); // CSI_DT_FMT
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imx307_write_reg(dev, 0x3442, 0x0A); // CSI_DT_FMT
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imx307_write_reg(dev, 0x3443, 0x01); // CSI_LANE_MODE---mipi通道数
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imx307_write_reg(dev, 0x3444, 0x20); // EXTCK_FREQ
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imx307_write_reg(dev, 0x3445, 0x25); // EXTCK_FREQ
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imx307_write_reg(dev, 0x3446, 0x57); // TCLKPOST
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imx307_write_reg(dev, 0x3447, 0x00);
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imx307_write_reg(dev, 0x3448, 0x37); // THSZERO
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imx307_write_reg(dev, 0x3449, 0x00);
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imx307_write_reg(dev, 0x344A, 0x1F); // THSPREPARE
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imx307_write_reg(dev, 0x344B, 0x00);
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imx307_write_reg(dev, 0x344C, 0x1F); // TCLKTRAIL
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imx307_write_reg(dev, 0x344D, 0x00);
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imx307_write_reg(dev, 0x344E, 0x1F); // THSTRAIL
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imx307_write_reg(dev, 0x344F, 0x00);
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imx307_write_reg(dev, 0x3450, 0x77); // TCLKZERO
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imx307_write_reg(dev, 0x3451, 0x00);
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imx307_write_reg(dev, 0x3452, 0x1F); // TCLKPREPARE
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imx307_write_reg(dev, 0x3453, 0x00);
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imx307_write_reg(dev, 0x3454, 0x17); // TLPX
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imx307_write_reg(dev, 0x3455, 0x00);
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imx307_write_reg(dev, 0x3472, 0x9C); // X_OUT_SIZE
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imx307_write_reg(dev, 0x3473, 0x07); // X_OUT_SIZE
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imx307_write_reg(dev, 0x3480, 0x49); // INCKSEL7
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// Standby Cancel
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imx307_write_reg(dev, 0x3000, 0x00); // standby
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printf("=====================================================================\n");
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printf("=====Sony imx307_2l sensor 1080P30fps(MIPI) Linear init success!=====\n");
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printf("=====================================================================\n");
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return XMEDIA_SUCCESS;
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}
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xmedia_s32 imx307_2l_wdr_1080p30_2to1_init(xmedia_u32 dev)
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{
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// 10bit
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imx307_write_reg(dev, 0x3000, 0x01); // standby
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imx307_write_reg(dev, 0x3002, 0x00); // XMSTA;
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imx307_write_reg(dev, 0x3005, 0x00); // ADBIT 0x00->10Bit;
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imx307_write_reg(dev, 0x3007, 0x00); // VREVERSE & HREVERSE & WINMODE
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imx307_write_reg(dev, 0x3009, 0x01); // FRSEL & FDG SEL
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imx307_write_reg(dev, 0x300A, 0x3C); // BLKLEVEL
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imx307_write_reg(dev, 0x300C, 0x11);
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imx307_write_reg(dev, 0x3011, 0x0A); // Change after reset;
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imx307_write_reg(dev, 0x3018, 0x65); // VMAX[7:0]
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imx307_write_reg(dev, 0x3019, 0x04); // VMAX[15:8]
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imx307_write_reg(dev, 0x301C, 0x98); // HMAX[7:0] 0x14a0->25fps;
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imx307_write_reg(dev, 0x301D, 0x08); // HMAX[15:8] 0x1130->30fps;
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imx307_write_reg(dev, 0x3020, 0x02); // SHS1
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imx307_write_reg(dev, 0x3021, 0x00); // SHS1
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imx307_write_reg(dev, 0x3024, 0x49); // SHS2
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imx307_write_reg(dev, 0x3025, 0x08); // SHS2
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imx307_write_reg(dev, 0x3030, 0x0B); // RHS1
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imx307_write_reg(dev, 0x3031, 0x00); // RHS1
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imx307_write_reg(dev, 0x3045, 0x05); // DOLSCDEN & DOLSYDINFOEN & HINFOEN
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imx307_write_reg(dev, 0x3046, 0x00); // OPORTSEL & ODBIT
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imx307_write_reg(dev, 0x304B, 0x0A); // XVSOUTSEL & XHSOUTSEL
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imx307_write_reg(dev, 0x305C, 0x18); // INCKSEL1,1080P,CSI-2,37.125MHz;74.25MHz->0x0C
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imx307_write_reg(dev, 0x305D, 0x03); // INCKSEL2,1080P,CSI-2,37.125MHz;74.25MHz->0x03
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imx307_write_reg(dev, 0x305E, 0x20); // INCKSEL3,1080P,CSI-2,37.125MHz;74.25MHz->0x10
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imx307_write_reg(dev, 0x305F, 0x01); // INCKSEL4,1080P,CSI-2,37.125MHz;74.25MHz->0x01
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imx307_write_reg(dev, 0x309E, 0x4A);
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imx307_write_reg(dev, 0x309F, 0x4A);
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imx307_write_reg(dev, 0x3106, 0x11);
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imx307_write_reg(dev, 0x311C, 0x0E);
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imx307_write_reg(dev, 0x3128, 0x04);
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imx307_write_reg(dev, 0x3129, 0x1D); // ADBIT1,12Bit; 0x1D->10Bit;
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imx307_write_reg(dev, 0x313B, 0x41);
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imx307_write_reg(dev, 0x315E, 0x1A); // INCKSEL5,1080P,CSI-2,37.125MHz;74.25MHz->0x1B
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imx307_write_reg(dev, 0x3164, 0x1A); // INCKSEL6,1080P,CSI-2,37.125MHz;74.25MHz->0x1B
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imx307_write_reg(dev, 0x317C, 0x12); // ADBIT2,12Bit;0x12->10Bit;
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imx307_write_reg(dev, 0x31EC, 0x37); // ADBIT3,12Bit;0x37->10Bit;
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// MIPI setting
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imx307_write_reg(dev, 0x3405, 0x00); // REPETITION
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imx307_write_reg(dev, 0x3407, 0x01); // VREVERSE & HREVERSE & WINMODE
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imx307_write_reg(dev, 0x3414, 0x0A); // OPB_SIZE_V
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imx307_write_reg(dev, 0x3415, 0x00);
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imx307_write_reg(dev, 0x3418, 0x9C); // Y_OUT_SIZE
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imx307_write_reg(dev, 0x3419, 0x08); // Y_OUT_SIZE
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imx307_write_reg(dev, 0x3441, 0x0A); // CSI_DT_FMT 10Bit
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imx307_write_reg(dev, 0x3442, 0x0A);
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imx307_write_reg(dev, 0x3443, 0x01); // CSI_LANE_MODE
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imx307_write_reg(dev, 0x3444, 0x20); // EXTCK_FREQ
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imx307_write_reg(dev, 0x3445, 0x25); // EXTCK_FREQ
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imx307_write_reg(dev, 0x3446, 0x77); // TCLKPOST
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imx307_write_reg(dev, 0x3447, 0x00);
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imx307_write_reg(dev, 0x3448, 0x67); // THSZERO
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imx307_write_reg(dev, 0x3449, 0x00);
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imx307_write_reg(dev, 0x344A, 0x47); // THSPREPARE
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imx307_write_reg(dev, 0x344B, 0x00);
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imx307_write_reg(dev, 0x344C, 0x37); // TCLKTRAIL
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imx307_write_reg(dev, 0x344D, 0x00);
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imx307_write_reg(dev, 0x344E, 0x3F); // THSTRAIL
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imx307_write_reg(dev, 0x344F, 0x00);
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imx307_write_reg(dev, 0x3450, 0xFF); // TCLKZERO
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imx307_write_reg(dev, 0x3451, 0x00);
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imx307_write_reg(dev, 0x3452, 0x3F); // TCLKPREPARE
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imx307_write_reg(dev, 0x3453, 0x00);
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imx307_write_reg(dev, 0x3454, 0x37); // TLPX
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imx307_write_reg(dev, 0x3455, 0x00);
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imx307_write_reg(dev, 0x3472, 0xA0); // X_OUT_SIZE
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imx307_write_reg(dev, 0x3473, 0x07);
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imx307_write_reg(dev, 0x347B, 0x23);
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imx307_write_reg(dev, 0x3480, 0x49); // INCKSEL7,1080P,CSI-2,37.125MHz;74.25MHz->0x92
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imx307_write_reg(dev, 0x3000, 0x00); // Standby Cancel
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printf("============================================================================\n");
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printf("===Imx307_2l sensor 1080P30fps 10bit 2to1 WDR(60fps->30fps) init success!===\n");
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printf("============================================================================\n");
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return XMEDIA_SUCCESS;
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}
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/* 1080P30 and 1080P25 */
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xmedia_s32 imx307_4l_linear_1080p30_init(xmedia_u32 dev)
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{
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// Enter Standby
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imx307_write_reg(dev, 0x3000, 0x01); // Standby mode
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imx307_write_reg(dev, 0x3002, 0x01); // Master mode stop
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// Mode register setting
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imx307_write_reg(dev, 0x3005, 0x01); //12bit
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imx307_write_reg(dev, 0x3007, 0x00);
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imx307_write_reg(dev, 0x3009, 0x02); // 60fps;0x00->120fps
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imx307_write_reg(dev, 0x300c, 0x00);
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imx307_write_reg(dev, 0x3010, 0x21);
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imx307_write_reg(dev, 0x3011, 0x0a);
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imx307_write_reg(dev, 0x3014, 0x00); // gain
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imx307_write_reg(dev, 0x3018, 0x65); // VMAX
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imx307_write_reg(dev, 0x3019, 0x04);
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imx307_write_reg(dev, 0x301c, 0x30); // HMAX;
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imx307_write_reg(dev, 0x301d, 0x11); // HMAX;
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imx307_write_reg(dev, 0x3020, 0x01); // SHS1
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imx307_write_reg(dev, 0x3021, 0x00); // SHS1
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imx307_write_reg(dev, 0x3022, 0x00); // SHS1
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imx307_write_reg(dev, 0x3030, 0x0B); // RHS1
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imx307_write_reg(dev, 0x3031, 0x00); // RHS1
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imx307_write_reg(dev, 0x3032, 0x00); // RHS1
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imx307_write_reg(dev, 0x3024, 0x00); // SHS2
|
||||
imx307_write_reg(dev, 0x3025, 0x00); // SHS2
|
||||
imx307_write_reg(dev, 0x3026, 0x00); // SHS2
|
||||
imx307_write_reg(dev, 0x3045, 0x01);
|
||||
imx307_write_reg(dev, 0x3046, 0x01); // MIPI
|
||||
imx307_write_reg(dev, 0x305c, 0x18); // 37.125MHz INCK Setting
|
||||
imx307_write_reg(dev, 0x305d, 0x03);
|
||||
imx307_write_reg(dev, 0x305e, 0x20);
|
||||
imx307_write_reg(dev, 0x305f, 0x01);
|
||||
imx307_write_reg(dev, 0x309e, 0x4a);
|
||||
imx307_write_reg(dev, 0x309f, 0x4a);
|
||||
imx307_write_reg(dev, 0x3106, 0x00);
|
||||
imx307_write_reg(dev, 0x311c, 0x0e);
|
||||
imx307_write_reg(dev, 0x3128, 0x04);
|
||||
imx307_write_reg(dev, 0x3129, 0x00);
|
||||
imx307_write_reg(dev, 0x313b, 0x41);
|
||||
imx307_write_reg(dev, 0x315e, 0x1a); // 37.125MHz INCK5 Setting
|
||||
imx307_write_reg(dev, 0x3164, 0x1a);
|
||||
imx307_write_reg(dev, 0x3480, 0x49); // 37.125MHz INCK7 Setting
|
||||
imx307_write_reg(dev, 0x3129, 0x00); // ADBIT1,12Bit;
|
||||
imx307_write_reg(dev, 0x317c, 0x00); // ADBIT2,12Bit;
|
||||
imx307_write_reg(dev, 0x31ec, 0x0e); // ADBIT3,12Bit;
|
||||
|
||||
// Standby Cancel
|
||||
imx307_write_reg(dev, 0x3000, 0x00); // standby
|
||||
usleep(20000); // DELAY20mS
|
||||
imx307_write_reg(dev, 0x3002, 0x00); // master mode start
|
||||
imx307_write_reg(dev, 0x304B, 0x0a); // XVSOUTSEL XHSOUTSEL enable output
|
||||
usleep(20000);
|
||||
|
||||
printf("===================================================================\n");
|
||||
printf("===Sony imx307_4L sensor 1080P30fps(MIPI) Linear init success!=====\n");
|
||||
printf("===================================================================\n");
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
xmedia_s32 imx307_4l_wdr_1080p30_2to1_init(xmedia_u32 dev)
|
||||
{
|
||||
// 10bit
|
||||
imx307_write_reg(dev, 0x3000, 0x01); // standby
|
||||
imx307_delay_ms(200);
|
||||
|
||||
imx307_write_reg(dev, 0x3005, 0x00); // 12Bit, 0x00,10Bit;
|
||||
imx307_write_reg(dev, 0x3007, 0x40); // VREVERSE & HREVERSE & WINMODE
|
||||
imx307_write_reg(dev, 0x3009, 0x01); // FRSEL&HCG
|
||||
imx307_write_reg(dev, 0x300A, 0x3C); // BLKLEVEL
|
||||
imx307_write_reg(dev, 0x300C, 0x11);
|
||||
imx307_write_reg(dev, 0x3011, 0x0A); // Change after reset;
|
||||
imx307_write_reg(dev, 0x3014, 0x0D); // Gain
|
||||
imx307_write_reg(dev, 0x3018, 0xB9); // VMAX[7:0]
|
||||
imx307_write_reg(dev, 0x3019, 0x05); // VMAX[15:8]
|
||||
imx307_write_reg(dev, 0x301A, 0x00); // VMAX[16]
|
||||
imx307_write_reg(dev, 0x301C, 0xEC); // HMAX[7:0] 0x14a0->25fps;
|
||||
imx307_write_reg(dev, 0x301D, 0x07); // HMAX[15:8] 0x1130->30fps;
|
||||
|
||||
imx307_write_reg(dev, 0x3020, 0x02); // SHS1
|
||||
imx307_write_reg(dev, 0x3021, 0x00);
|
||||
imx307_write_reg(dev, 0x3022, 0x00);
|
||||
imx307_write_reg(dev, 0x3024, 0x83); // SHS2
|
||||
imx307_write_reg(dev, 0x3025, 0x01);
|
||||
imx307_write_reg(dev, 0x3026, 0x00);
|
||||
imx307_write_reg(dev, 0x3030, 0x79); // RHS1
|
||||
imx307_write_reg(dev, 0x3031, 0x01);
|
||||
imx307_write_reg(dev, 0x3032, 0x00);
|
||||
imx307_write_reg(dev, 0x303A, 0x08);
|
||||
imx307_write_reg(dev, 0x303C, 0x04); // WINPV
|
||||
imx307_write_reg(dev, 0x303D, 0x00);
|
||||
imx307_write_reg(dev, 0x303E, 0x41); // WINWV
|
||||
imx307_write_reg(dev, 0x303F, 0x04);
|
||||
imx307_write_reg(dev, 0x3045, 0x05); // DOLSCDEN & DOLSYDINFOEN & HINFOEN
|
||||
imx307_write_reg(dev, 0x3046, 0x00); // OPORTSE & ODBIT
|
||||
imx307_write_reg(dev, 0x304B, 0x0A); // XVSOUTSEL & XHSOUTSEL
|
||||
imx307_write_reg(dev, 0x305C, 0x18); // INCKSEL1,1080P,CSI-2,37.125MHz;74.25MHz->0x0C
|
||||
imx307_write_reg(dev, 0x305D, 0x03); // INCKSEL2,1080P,CSI-2,37.125MHz;74.25MHz->0x03
|
||||
imx307_write_reg(dev, 0x305E, 0x20); // INCKSEL3,1080P,CSI-2,37.125MHz;74.25MHz->0x10
|
||||
imx307_write_reg(dev, 0x305F, 0x01); // INCKSEL4,1080P,CSI-2,37.125MHz;74.25MHz->0x01
|
||||
imx307_write_reg(dev, 0x309E, 0x4A);
|
||||
imx307_write_reg(dev, 0x309F, 0x4A);
|
||||
|
||||
imx307_write_reg(dev, 0x3106, 0x11);
|
||||
imx307_write_reg(dev, 0x311C, 0x0E);
|
||||
imx307_write_reg(dev, 0x3128, 0x04);
|
||||
imx307_write_reg(dev, 0x3129, 0x1D); // ADBIT1,12Bit;0x1D->10Bit;
|
||||
imx307_write_reg(dev, 0x313B, 0x41);
|
||||
imx307_write_reg(dev, 0x315E, 0x1A); // INCKSEL5,1080P,CSI-2,37.125MHz;74.25MHz->0x1B
|
||||
imx307_write_reg(dev, 0x3164, 0x1A); // INCKSEL6,1080P,CSI-2,37.125MHz;74.25MHz->0x1B
|
||||
imx307_write_reg(dev, 0x317C, 0x12); // ADBIT2,12Bit;0x12->10Bit;
|
||||
imx307_write_reg(dev, 0x31EC, 0x37); // ADBIT3,12Bit;0x37->10Bit;
|
||||
|
||||
// MIPI setting
|
||||
imx307_write_reg(dev, 0x3405, 0x10); // REPETITION
|
||||
imx307_write_reg(dev, 0x3407, 0x03);
|
||||
imx307_write_reg(dev, 0x3414, 0x00);
|
||||
imx307_write_reg(dev, 0x3415, 0x00);
|
||||
imx307_write_reg(dev, 0x3418, 0x7A); // Y_OUT_SIZE
|
||||
imx307_write_reg(dev, 0x3419, 0x09); // Y_OUT_SIZE
|
||||
imx307_write_reg(dev, 0x3441, 0x0A); // CSI_DT_FMT 10Bit
|
||||
imx307_write_reg(dev, 0x3442, 0x0A);
|
||||
imx307_write_reg(dev, 0x3443, 0x03); // CSI_LANE_MODE MIPI 4CH
|
||||
imx307_write_reg(dev, 0x3444, 0x20); // EXTCK_FREQ
|
||||
imx307_write_reg(dev, 0x3445, 0x25);
|
||||
imx307_write_reg(dev, 0x3446, 0x57);
|
||||
imx307_write_reg(dev, 0x3447, 0x00);
|
||||
imx307_write_reg(dev, 0x3448, 0x37);
|
||||
imx307_write_reg(dev, 0x3449, 0x00);
|
||||
imx307_write_reg(dev, 0x344A, 0x1F); // THSPREPARE
|
||||
imx307_write_reg(dev, 0x344B, 0x00);
|
||||
imx307_write_reg(dev, 0x344C, 0x1F);
|
||||
imx307_write_reg(dev, 0x344D, 0x00);
|
||||
imx307_write_reg(dev, 0x344E, 0x1F); // THSTRAIL
|
||||
imx307_write_reg(dev, 0x344F, 0x00);
|
||||
imx307_write_reg(dev, 0x3450, 0x77); // TCLKZERO
|
||||
imx307_write_reg(dev, 0x3451, 0x00);
|
||||
imx307_write_reg(dev, 0x3452, 0x1F); // TCLKPREPARE
|
||||
imx307_write_reg(dev, 0x3453, 0x00);
|
||||
imx307_write_reg(dev, 0x3454, 0x17); // TIPX
|
||||
imx307_write_reg(dev, 0x3455, 0x00);
|
||||
imx307_write_reg(dev, 0x3472, 0xA0); // X_OUT_SIZE
|
||||
imx307_write_reg(dev, 0x3473, 0x07);
|
||||
imx307_write_reg(dev, 0x347B, 0x23);
|
||||
imx307_write_reg(dev, 0x3480, 0x49); // INCKSEL7,1080P,CSI-2,37.125MHz;74.25MHz->0x92
|
||||
|
||||
imx307_delay_ms(200);
|
||||
imx307_write_reg(dev, 0x3000, 0x00); // Standby Cancel
|
||||
imx307_write_reg(dev, 0x3002, 0x00);
|
||||
imx307_write_reg(dev, 0x304b, 0x0a);
|
||||
|
||||
printf("============================================================================\n");
|
||||
printf("===Imx307_4L sensor 1080P30fps 10bit 2to1 WDR(60fps->30fps) init success!===\n");
|
||||
printf("============================================================================\n");
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
xmedia_s32 imx307_init_image(xmedia_u32 dev, xmedia_u8 image_mode)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
switch(image_mode) {
|
||||
case IMX307_2M_2L_10BIT_LINEAR_MODE:
|
||||
ret = imx307_2l_linear_1080p30_init(dev);
|
||||
break;
|
||||
case IMX307_2M_4L_10BIT_LINEAR_MODE:
|
||||
ret = imx307_4l_linear_1080p30_init(dev);
|
||||
break;
|
||||
case IMX307_2M_2L_10BIT_2TO1_WDR_MODE:
|
||||
ret = imx307_2l_wdr_1080p30_2to1_init(dev);
|
||||
break;
|
||||
case IMX307_2M_4L_10BIT_2TO1_WDR_MODE:
|
||||
ret = imx307_4l_wdr_1080p30_2to1_init(dev);
|
||||
break;
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support, please check image param!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 imx307_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_imx307_i2c_fd[dev] < 0) {
|
||||
SENSOR_PRINT("Sensor dev [%d], i2c not open. please init i2c at first.\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_set_slave_addr(g_imx307_i2c_fd[dev], slave_addr);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
|
||||
i2c_close(g_imx307_i2c_fd[dev]);
|
||||
g_imx307_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
g_imx307_i2c_addr[dev] = slave_addr;
|
||||
SENSOR_PRINT("Sensor dev [%d] set slave addr 0x%x success.\n", dev, slave_addr);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 imx307_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_imx307_i2c_fd[dev] >= 0) {
|
||||
SENSOR_PRINT("====== Sensor dev [%d], i2c already init !=======\n", dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
if (i2c_dev == SENSOR_I2C_INVALID) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Sensor i2c dev invalid! Please set i2c dev at first!\n");
|
||||
return XMEDIA_ERRCODE_NOT_CONFIG;
|
||||
}
|
||||
|
||||
g_imx307_i2c_fd[dev] = i2c_open(i2c_dev);
|
||||
if (g_imx307_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Open /dev/i2c_drv-%u error!\n", i2c_dev);
|
||||
return XMEDIA_ERRCODE_OPEN_FAILED;
|
||||
}
|
||||
|
||||
ret = imx307_set_slave_addr(dev, i2c_addr);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
SENSOR_PRINT("====== i2c[%d] init success!=======\n", i2c_dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 imx307_i2c_exit(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
ret = i2c_close(g_imx307_i2c_fd[dev]);
|
||||
if(ret < 0 ) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] close i2c failed!\n", dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
g_imx307_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 imx307_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[IMX307_DATA_BYTE];
|
||||
|
||||
if (g_imx307_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_read(g_imx307_i2c_fd[dev], g_imx307_i2c_addr[dev], addr, IMX307_ADDR_BYTE, buf, IMX307_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] read i2c addr [0x%X] failed!\n", dev, addr);
|
||||
return ret;
|
||||
}
|
||||
|
||||
*data = buf[0]; //IMX307_DATA_BYTE == 1
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 imx307_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data)
|
||||
{
|
||||
xmedia_u32 idx = 0;
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[8];
|
||||
|
||||
if (g_imx307_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
buf[idx] = (addr >> 8) & 0xff;
|
||||
idx++;
|
||||
buf[idx] = addr & 0xff;
|
||||
idx++;
|
||||
buf[idx] = data & 0xff;
|
||||
|
||||
ret = i2c_write(g_imx307_i2c_fd[dev], g_imx307_i2c_addr[dev], buf, IMX307_ADDR_BYTE + IMX307_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_WRITE error!\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
xmedia_s32 imx307_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u32 mirror_flip_type;
|
||||
|
||||
imx307_read_reg(dev, IMX307_REG_ADDR_MIRROR_FLIP, &mirror_flip_type);
|
||||
|
||||
if (mirror_en) {
|
||||
mirror_flip_type |= 0x02;
|
||||
} else {
|
||||
mirror_flip_type &= 0xfd;
|
||||
}
|
||||
|
||||
if (flip_en) {
|
||||
mirror_flip_type |= 0x01;
|
||||
} else {
|
||||
mirror_flip_type &= 0xfe;
|
||||
}
|
||||
|
||||
ret = imx307_write_reg(dev, IMX307_REG_ADDR_MIRROR_FLIP, mirror_flip_type);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "imx307_write_reg failed\n");
|
||||
}
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
+35
@@ -0,0 +1,35 @@
|
||||
#ifndef __IMX307_CTRL_H__
|
||||
#define __IMX307_CTRL_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define IMX307_I2C_ADDR 0x34 // I2C Address of IMX307
|
||||
#define IMX307_ADDR_BYTE 2
|
||||
#define IMX307_DATA_BYTE 1
|
||||
|
||||
// imx307 specs list
|
||||
#define IMX307_2M_2L_10BIT_LINEAR_MODE 1
|
||||
#define IMX307_2M_4L_10BIT_LINEAR_MODE 2
|
||||
#define IMX307_2M_2L_10BIT_2TO1_WDR_MODE 3
|
||||
#define IMX307_2M_4L_10BIT_2TO1_WDR_MODE 4
|
||||
|
||||
#define SENSOR_HIGHER_16BITS(x) (((x)&0x30000) >> 16)
|
||||
|
||||
xmedia_s32 imx307_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr);
|
||||
xmedia_s32 imx307_i2c_exit(xmedia_u32 dev);
|
||||
xmedia_s32 imx307_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data);
|
||||
xmedia_s32 imx307_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data);
|
||||
xmedia_s32 imx307_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en);
|
||||
xmedia_s32 imx307_init_image(xmedia_u32 dev, xmedia_u8 img_mode);
|
||||
xmedia_s32 imx307_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr);
|
||||
xmedia_void imx307_delay_ms(xmedia_s32 ms);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //__SC8238_CTRL_H__
|
||||
+90
@@ -0,0 +1,90 @@
|
||||
/*
|
||||
* Copyright (c) XMEDIA. All rights reserved.
|
||||
*/
|
||||
|
||||
/* Piris attr */
|
||||
static xmedia_isp_piris_attr g_piris_attr = {
|
||||
/*
|
||||
0, // bStepFNOTableChange
|
||||
1, // bZeroIsMax
|
||||
94, // u16TotalStep
|
||||
62, // u16StepCount
|
||||
// Step-F number mapping table. Must be from small to large. F1.0 is 1024 and F32.0 is 1
|
||||
{30, 35, 40, 45, 50, 56, 61, 67, 73, 79, 85, 92, 98, 105, 112, 120, 127, 135, 143, 150, 158, 166, 174, 183, 191, 200, 208, 217, 225, 234, 243, 252, 261, 270, 279, 289, 298, 307, 316, 325, 335, 344, 353, 362, 372, 381, 390, 399, 408, 417, 426, 435, 444, 453, 462, 470, 478, 486, 493, 500, 506, 512},
|
||||
ISP_IRIS_F_NO_1_4, // enMaxIrisFNOTarget
|
||||
ISP_IRIS_F_NO_5_6 // enMinIrisFNOTarget
|
||||
*/
|
||||
};
|
||||
|
||||
static xmedia_isp_awb_ccm g_awb_ccm = {
|
||||
4,
|
||||
{
|
||||
{
|
||||
6420,
|
||||
{ 577, 33064, 32793, 32872, 425, 32833, 5, 33063, 546 },
|
||||
},
|
||||
{
|
||||
4850,
|
||||
{ 565, 33043, 32802, 32886, 413, 32807, 11, 33075, 552 },
|
||||
},
|
||||
{
|
||||
3630,
|
||||
{ 549, 33037, 32792, 32890, 393, 32783, 34, 33075, 529 },
|
||||
},
|
||||
{
|
||||
2525,
|
||||
{ 449, 32878, 32851, 32883, 398, 32795, 15, 33276, 749 },
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
static xmedia_isp_awb_agc_table g_awb_agc_table = {
|
||||
/* bvalid */
|
||||
1,
|
||||
|
||||
/* 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768 */
|
||||
/* saturation */
|
||||
{ 128, 128, 128, 128, 124, 120, 116, 112, 108, 104, 100, 94, 90, 90, 90, 90 }
|
||||
};
|
||||
|
||||
static xmedia_isp_awb_ccm g_awb_ccm_wdr = {
|
||||
3,
|
||||
{
|
||||
{
|
||||
4900,
|
||||
{ 0x0163, 0x8073, 0x10, 0x8062, 0x018d, 0x802b, 0x8018, 0x80a9, 0x01c1 },
|
||||
},
|
||||
{
|
||||
3850,
|
||||
{ 0x018d, 0x808c, 0x8001, 0x806e, 0x017e, 0x8010, 0x800d, 0x80df, 0x01ec },
|
||||
},
|
||||
{
|
||||
2650,
|
||||
{ 0x0217, 0x8113, 0x8004, 0x806C, 0x0180, 0x8014, 0x800A, 0x80D9, 0x01E3 },
|
||||
},
|
||||
{
|
||||
2100,
|
||||
{ 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 },
|
||||
},
|
||||
{
|
||||
1600,
|
||||
{ 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 },
|
||||
},
|
||||
{
|
||||
1400,
|
||||
{ 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 },
|
||||
},
|
||||
{
|
||||
1000,
|
||||
{ 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 },
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
static xmedia_isp_awb_agc_table g_awb_agc_table_wdr = {
|
||||
/* bvalid */
|
||||
1,
|
||||
/* saturation */
|
||||
{ 115, 115, 110, 100, 85, 75, 75, 70, 70, 70, 70, 70, 70, 70, 65, 60}
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user