GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)

This commit is contained in:
lai
2026-09-06 03:52:57 +08:00
commit b1928b41c0
21813 changed files with 4413081 additions and 0 deletions
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ifneq ($(MCU), )
include Makefile.riscv
else
include Makefile.linux
endif
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ISP_DIR := $(shell cd ../.. && /bin/pwd)
SDK_DIR ?= $(shell cd $(ISP_DIR)/../../../.. && /bin/pwd)
include $(SDK_DIR)/build/base.mk
include $(ISP_DIR)/sensor/plat.mk
LIB_NAME := libsns_imx678
SRCS := $(wildcard *.c)
SDK_USR_CFLAGS += -I$(GMP_DIR)/include
SDK_USR_CFLAGS += -I$(GMP_DIR)/usr/include
SDK_USR_CFLAGS += -I$(ISP_DIR)/include
SDK_USR_CFLAGS += -I$(ISP_DIR)/../include
SDK_USR_CFLAGS += -I.
AT := @
$(info SRCS=$(SRCS))
include $(SDK_DIR)/build/sdk_lib_rules.mk
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SRCS-y += imx678.c
SRCS-y += imx678_ctrl.c
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#ifndef _IMX678_COMM_H_
#define _IMX678_COMM_H_
#include "sns_comm.h"
#ifdef __cplusplus
extern "C" {
#endif
// Imx678 Register Address
#define IMX678_REG_ADDR_SHR0_H 0x3050
#define IMX678_REG_ADDR_SHR0_M 0x3051
#define IMX678_REG_ADDR_SHR0_L 0x3052
#define IMX678_REG_ADDR_GAIN 0x3070 //增益调节
#define IMX678_REG_ADDR_HCG 0x3030 //LCG与HCG的设置
#define IMX678_REG_ADDR_VMAX_H 0x3028
#define IMX678_REG_ADDR_VMAX_M 0x3029
#define IMX678_REG_ADDR_VMAX_L 0x302A
#define IMX678_REG_ADDR_SHR1_H 0x3054
#define IMX678_REG_ADDR_SHR1_M 0x3055
#define IMX678_REG_ADDR_SHR1_L 0x3056
#define IMX678_REG_ADDR_RHS1_H 0x3060
#define IMX678_REG_ADDR_RHS1_M 0x3061
#define IMX678_REG_ADDR_RHS1_L 0x3062
#define IMX678_REG_ADDR_HCG_SEL1 0x3031
#define IMX678_REG_ADDR_HCG_SEL2 0x3032
#define IMX678_HMAX_ADDR 0x302c
#define IMX678_WDR_BRL 2210
typedef enum {
IMX678_REG_SHR0_H = 0,
IMX678_REG_SHR0_M,
IMX678_REG_SHR0_L,
IMX678_REG_GAIN,
IMX678_REG_HCG,
IMX678_REG_VMAX_H,
IMX678_REG_VMAX_M,
IMX678_REG_VMAX_L,
IMX678_REG_L_MAX_NUM,
// short frame reg info from here
IMX678_REG_SHR1_H = IMX678_REG_L_MAX_NUM,
IMX678_REG_SHR1_M,
IMX678_REG_SHR1_L,
IMX678_REG_RHS1_H,
IMX678_REG_RHS1_M,
IMX678_REG_RHS1_L,
IMX678_REG__HCG_SEL1,
IMX678_REG__HCG_SEL2,
IMX678_REG_MAX_NUM
}imx678_reg_info;
typedef struct {
xmedia_u8 hcg;
xmedia_u32 brl;
xmedia_u32 rhs1_max;
xmedia_u32 rhs2_max;
} imx678_state_s;
#define IMX678_LINEAR_REG_INFO_MAX_NUM IMX678_REG_L_MAX_NUM
#define IMX678_2TO1_WDR_REG_INFO_MAX_NUM IMX678_REG_MAX_NUM
// local variables
#define IMX678_FULL_LINES_MAX 0xFFFFF
#define IMX678_FULL_LINES_MAX_2TO1_WDR 9000
#define IMX678_VMAX_8M_LINEAR 3750
#define IMX678_VMAX_8M_WDR 2250 // 10bit
extern sensor_context *g_imx678_ctx[XMEDIA_SENSOR_DEV_MAX_NUM];
#define IMX678_GET_CTX(dev, ctx) ctx = g_imx678_ctx[dev]
#ifdef __cplusplus
}
#endif
#endif
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#ifndef __IMX678_CTRL_H__
#define __IMX678_CTRL_H__
#include "sns_comm.h"
#ifdef __cplusplus
extern "C" {
#endif
#define IMX678_I2C_ADDR 0x34 // I2C Address of IMX678
#define IMX678_ADDR_BYTE 2
#define IMX678_DATA_BYTE 1
// imx678 specs list
#define IMX678_8M_12BIT_LINEAR_MODE 1
#define IMX678_8M_10BIT_WDR_MODE 2
#define SENSOR_HIGHER_16BITS(x) (((x)&0x30000) >> 16)
xmedia_s32 imx678_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr);
xmedia_s32 imx678_i2c_exit(xmedia_u32 dev);
xmedia_s32 imx678_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data);
xmedia_s32 imx678_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data);
xmedia_s32 imx678_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en);
xmedia_s32 imx678_init_image(xmedia_u32 dev, xmedia_u8 img_mode);
xmedia_s32 imx678_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr);
xmedia_void imx678_delay_ms(xmedia_s32 ms);
#ifdef __cplusplus
}
#endif
#endif //__SC8238_CTRL_H__
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/*
* Copyright (c) XMEDIA. All rights reserved.
*/
/* Piris attr */
static xmedia_isp_piris_attr g_piris_attr = {
/*
0, // bStepFNOTableChange
1, // bZeroIsMax
94, // u16TotalStep
62, // u16StepCount
// Step-F number mapping table. Must be from small to large. F1.0 is 1024 and F32.0 is 1
{30, 35, 40, 45, 50, 56, 61, 67, 73, 79, 85, 92, 98, 105, 112, 120, 127, 135, 143, 150, 158, 166, 174, 183, 191, 200, 208, 217, 225, 234, 243, 252, 261, 270, 279, 289, 298, 307, 316, 325, 335, 344, 353, 362, 372, 381, 390, 399, 408, 417, 426, 435, 444, 453, 462, 470, 478, 486, 493, 500, 506, 512},
ISP_IRIS_F_NO_1_4, // enMaxIrisFNOTarget
ISP_IRIS_F_NO_5_6 // enMinIrisFNOTarget
*/
};
static xmedia_isp_awb_ccm g_awb_ccm = {
4,
{
{
6420,
{ 577, 33064, 32793, 32872, 425, 32833, 5, 33063, 546 },
},
{
4850,
{ 565, 33043, 32802, 32886, 413, 32807, 11, 33075, 552 },
},
{
3630,
{ 549, 33037, 32792, 32890, 393, 32783, 34, 33075, 529 },
},
{
2525,
{ 449, 32878, 32851, 32883, 398, 32795, 15, 33276, 749 },
},
},
};
static xmedia_isp_awb_agc_table g_awb_agc_table = {
/* bvalid */
1,
/* 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768 */
/* saturation */
{ 128, 128, 128, 128, 124, 120, 116, 112, 108, 104, 100, 94, 90, 90, 90, 90 }
};
static xmedia_isp_awb_ccm g_awb_ccm_wdr = {
3,
{
{
4900,
{ 0x0163, 0x8073, 0x10, 0x8062, 0x018d, 0x802b, 0x8018, 0x80a9, 0x01c1 },
},
{
3850,
{ 0x018d, 0x808c, 0x8001, 0x806e, 0x017e, 0x8010, 0x800d, 0x80df, 0x01ec },
},
{
2650,
{ 0x0217, 0x8113, 0x8004, 0x806C, 0x0180, 0x8014, 0x800A, 0x80D9, 0x01E3 },
},
{
2100,
{ 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 },
},
{
1600,
{ 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 },
},
{
1400,
{ 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 },
},
{
1000,
{ 0x0100, 0x0000, 0x0000, 0x0000, 0x0100, 0x0000, 0x0000, 0x0000, 0x0100 },
},
},
};
static xmedia_isp_awb_agc_table g_awb_agc_table_wdr = {
/* bvalid */
1,
/* saturation */
{ 115, 115, 110, 100, 85, 75, 75, 70, 70, 70, 70, 70, 70, 70, 65, 60}
};