GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)
This commit is contained in:
@@ -0,0 +1,127 @@
|
||||
/*
|
||||
* Copyright (c) 2016-2022, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include <arch.h>
|
||||
#include <asm_macros.S>
|
||||
#include <common/bl_common.h>
|
||||
|
||||
.globl bl2u_vector_table
|
||||
.globl bl2u_entrypoint
|
||||
|
||||
|
||||
vector_base bl2u_vector_table
|
||||
b bl2u_entrypoint
|
||||
b report_exception /* Undef */
|
||||
b report_exception /* SVC call */
|
||||
b report_prefetch_abort /* Prefetch abort */
|
||||
b report_data_abort /* Data abort */
|
||||
b report_exception /* Reserved */
|
||||
b report_exception /* IRQ */
|
||||
b report_exception /* FIQ */
|
||||
|
||||
|
||||
func bl2u_entrypoint
|
||||
/*---------------------------------------------
|
||||
* Save from r1 the extents of the trusted ram
|
||||
* available to BL2U for future use.
|
||||
* r0 is not currently used.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
mov r11, r1
|
||||
mov r10, r2
|
||||
|
||||
/* ---------------------------------------------
|
||||
* Set the exception vector to something sane.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
ldr r0, =bl2u_vector_table
|
||||
stcopr r0, VBAR
|
||||
isb
|
||||
|
||||
/* --------------------------------------------------------
|
||||
* Enable the instruction cache - disable speculative loads
|
||||
* --------------------------------------------------------
|
||||
*/
|
||||
ldcopr r0, SCTLR
|
||||
orr r0, r0, #SCTLR_I_BIT
|
||||
bic r0, r0, #SCTLR_DSSBS_BIT
|
||||
stcopr r0, SCTLR
|
||||
isb
|
||||
|
||||
/* ---------------------------------------------
|
||||
* Since BL2U executes after BL1, it is assumed
|
||||
* here that BL1 has already has done the
|
||||
* necessary register initializations.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
|
||||
/* ---------------------------------------------
|
||||
* Invalidate the RW memory used by the BL2U
|
||||
* image. This includes the data and NOBITS
|
||||
* sections. This is done to safeguard against
|
||||
* possible corruption of this memory by dirty
|
||||
* cache lines in a system cache as a result of
|
||||
* use by an earlier boot loader stage.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
ldr r0, =__RW_START__
|
||||
ldr r1, =__RW_END__
|
||||
sub r1, r1, r0
|
||||
bl inv_dcache_range
|
||||
|
||||
/* ---------------------------------------------
|
||||
* Zero out NOBITS sections. There are 2 of them:
|
||||
* - the .bss section;
|
||||
* - the coherent memory section.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
ldr r0, =__BSS_START__
|
||||
ldr r1, =__BSS_END__
|
||||
sub r1, r1, r0
|
||||
bl zeromem
|
||||
|
||||
/* --------------------------------------------
|
||||
* Allocate a stack whose memory will be marked
|
||||
* as Normal-IS-WBWA when the MMU is enabled.
|
||||
* There is no risk of reading stale stack
|
||||
* memory after enabling the MMU as only the
|
||||
* primary cpu is running at the moment.
|
||||
* --------------------------------------------
|
||||
*/
|
||||
bl plat_set_my_stack
|
||||
|
||||
/* ---------------------------------------------
|
||||
* Initialize the stack protector canary before
|
||||
* any C code is called.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
#if STACK_PROTECTOR_ENABLED
|
||||
bl update_stack_protector_canary
|
||||
#endif
|
||||
|
||||
/* ---------------------------------------------
|
||||
* Perform early platform setup & platform
|
||||
* specific early arch. setup e.g. mmu setup
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
mov r0, r11
|
||||
mov r1, r10
|
||||
bl bl2u_early_platform_setup
|
||||
bl bl2u_plat_arch_setup
|
||||
|
||||
/* ---------------------------------------------
|
||||
* Jump to main function.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
bl bl2u_main
|
||||
|
||||
/* ---------------------------------------------
|
||||
* Should never reach this point.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
no_ret plat_panic_handler
|
||||
|
||||
endfunc bl2u_entrypoint
|
||||
@@ -0,0 +1,129 @@
|
||||
/*
|
||||
* Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include <arch.h>
|
||||
#include <asm_macros.S>
|
||||
#include <common/bl_common.h>
|
||||
|
||||
.globl bl2u_entrypoint
|
||||
|
||||
|
||||
func bl2u_entrypoint
|
||||
/*---------------------------------------------
|
||||
* Store the extents of the tzram available to
|
||||
* BL2U and other platform specific information
|
||||
* for future use. x0 is currently not used.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
mov x20, x1
|
||||
mov x21, x2
|
||||
|
||||
/* ---------------------------------------------
|
||||
* Set the exception vector to something sane.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
adr x0, early_exceptions
|
||||
msr vbar_el1, x0
|
||||
isb
|
||||
|
||||
/* ---------------------------------------------
|
||||
* Enable the SError interrupt now that the
|
||||
* exception vectors have been setup.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
msr daifclr, #DAIF_ABT_BIT
|
||||
|
||||
/* ---------------------------------------------
|
||||
* Enable the instruction cache, stack pointer
|
||||
* and data access alignment checks and disable
|
||||
* speculative loads.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
mov x1, #(SCTLR_I_BIT | SCTLR_A_BIT | SCTLR_SA_BIT)
|
||||
mrs x0, sctlr_el1
|
||||
orr x0, x0, x1
|
||||
bic x0, x0, #SCTLR_DSSBS_BIT
|
||||
msr sctlr_el1, x0
|
||||
isb
|
||||
|
||||
/* ---------------------------------------------
|
||||
* Invalidate the RW memory used by the BL2U
|
||||
* image. This includes the data and NOBITS
|
||||
* sections. This is done to safeguard against
|
||||
* possible corruption of this memory by dirty
|
||||
* cache lines in a system cache as a result of
|
||||
* use by an earlier boot loader stage.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
adr x0, __RW_START__
|
||||
adr x1, __RW_END__
|
||||
sub x1, x1, x0
|
||||
bl inv_dcache_range
|
||||
|
||||
/* ---------------------------------------------
|
||||
* Zero out NOBITS sections. There are 2 of them:
|
||||
* - the .bss section;
|
||||
* - the coherent memory section.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
adrp x0, __BSS_START__
|
||||
add x0, x0, :lo12:__BSS_START__
|
||||
adrp x1, __BSS_END__
|
||||
add x1, x1, :lo12:__BSS_END__
|
||||
sub x1, x1, x0
|
||||
bl zeromem
|
||||
|
||||
/* --------------------------------------------
|
||||
* Allocate a stack whose memory will be marked
|
||||
* as Normal-IS-WBWA when the MMU is enabled.
|
||||
* There is no risk of reading stale stack
|
||||
* memory after enabling the MMU as only the
|
||||
* primary cpu is running at the moment.
|
||||
* --------------------------------------------
|
||||
*/
|
||||
bl plat_set_my_stack
|
||||
|
||||
/* ---------------------------------------------
|
||||
* Initialize the stack protector canary before
|
||||
* any C code is called.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
#if STACK_PROTECTOR_ENABLED
|
||||
bl update_stack_protector_canary
|
||||
#endif
|
||||
|
||||
/* ---------------------------------------------
|
||||
* Perform early platform setup & platform
|
||||
* specific early arch. setup e.g. mmu setup
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
mov x0, x20
|
||||
mov x1, x21
|
||||
bl bl2u_early_platform_setup
|
||||
bl bl2u_plat_arch_setup
|
||||
|
||||
#if ENABLE_PAUTH
|
||||
/* ---------------------------------------------
|
||||
* Program APIAKey_EL1
|
||||
* and enable pointer authentication.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
bl pauth_init_enable_el1
|
||||
#endif
|
||||
|
||||
/* ---------------------------------------------
|
||||
* Jump to bl2u_main function.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
bl bl2u_main
|
||||
|
||||
/* ---------------------------------------------
|
||||
* Should never reach this point.
|
||||
* ---------------------------------------------
|
||||
*/
|
||||
no_ret plat_panic_handler
|
||||
|
||||
endfunc bl2u_entrypoint
|
||||
@@ -0,0 +1,118 @@
|
||||
/*
|
||||
* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include <platform_def.h>
|
||||
|
||||
#include <common/bl_common.ld.h>
|
||||
#include <lib/xlat_tables/xlat_tables_defs.h>
|
||||
|
||||
OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT)
|
||||
OUTPUT_ARCH(PLATFORM_LINKER_ARCH)
|
||||
ENTRY(bl2u_entrypoint)
|
||||
|
||||
MEMORY {
|
||||
RAM (rwx): ORIGIN = BL2U_BASE, LENGTH = BL2U_LIMIT - BL2U_BASE
|
||||
}
|
||||
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = BL2U_BASE;
|
||||
ASSERT(. == ALIGN(PAGE_SIZE),
|
||||
"BL2U_BASE address is not aligned on a page boundary.")
|
||||
|
||||
#if SEPARATE_CODE_AND_RODATA
|
||||
.text . : {
|
||||
__TEXT_START__ = .;
|
||||
*bl2u_entrypoint.o(.text*)
|
||||
*(SORT_BY_ALIGNMENT(.text*))
|
||||
*(.vectors)
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
__TEXT_END__ = .;
|
||||
} >RAM
|
||||
|
||||
/* .ARM.extab and .ARM.exidx are only added because Clang need them */
|
||||
.ARM.extab . : {
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} >RAM
|
||||
|
||||
.ARM.exidx . : {
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} >RAM
|
||||
|
||||
.rodata . : {
|
||||
__RODATA_START__ = .;
|
||||
*(SORT_BY_ALIGNMENT(.rodata*))
|
||||
|
||||
RODATA_COMMON
|
||||
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
__RODATA_END__ = .;
|
||||
} >RAM
|
||||
#else
|
||||
ro . : {
|
||||
__RO_START__ = .;
|
||||
*bl2u_entrypoint.o(.text*)
|
||||
*(SORT_BY_ALIGNMENT(.text*))
|
||||
*(SORT_BY_ALIGNMENT(.rodata*))
|
||||
|
||||
RODATA_COMMON
|
||||
|
||||
*(.vectors)
|
||||
__RO_END_UNALIGNED__ = .;
|
||||
/*
|
||||
* Memory page(s) mapped to this section will be marked as
|
||||
* read-only, executable. No RW data from the next section must
|
||||
* creep in. Ensure the rest of the current memory page is unused.
|
||||
*/
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
__RO_END__ = .;
|
||||
} >RAM
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Define a linker symbol to mark start of the RW memory area for this
|
||||
* image.
|
||||
*/
|
||||
__RW_START__ = . ;
|
||||
|
||||
DATA_SECTION >RAM
|
||||
STACK_SECTION >RAM
|
||||
BSS_SECTION >RAM
|
||||
XLAT_TABLE_SECTION >RAM
|
||||
|
||||
#if USE_COHERENT_MEM
|
||||
/*
|
||||
* The base address of the coherent memory section must be page-aligned (4K)
|
||||
* to guarantee that the coherent data are stored on their own pages and
|
||||
* are not mixed with normal data. This is required to set up the correct
|
||||
* memory attributes for the coherent data page tables.
|
||||
*/
|
||||
coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
|
||||
__COHERENT_RAM_START__ = .;
|
||||
*(tzfw_coherent_mem)
|
||||
__COHERENT_RAM_END_UNALIGNED__ = .;
|
||||
/*
|
||||
* Memory page(s) mapped to this section will be marked
|
||||
* as device memory. No other unexpected data must creep in.
|
||||
* Ensure the rest of the current memory page is unused.
|
||||
*/
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
__COHERENT_RAM_END__ = .;
|
||||
} >RAM
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Define a linker symbol to mark end of the RW memory area for this
|
||||
* image.
|
||||
*/
|
||||
__RW_END__ = .;
|
||||
__BL2U_END__ = .;
|
||||
|
||||
__BSS_SIZE__ = SIZEOF(.bss);
|
||||
|
||||
ASSERT(. <= BL2U_LIMIT, "BL2U image has exceeded its limit.")
|
||||
}
|
||||
@@ -0,0 +1,15 @@
|
||||
#
|
||||
# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-3-Clause
|
||||
#
|
||||
|
||||
BL2U_SOURCES += bl2u/bl2u_main.c \
|
||||
bl2u/${ARCH}/bl2u_entrypoint.S \
|
||||
plat/common/${ARCH}/platform_up_stack.S
|
||||
|
||||
ifeq (${ARCH},aarch64)
|
||||
BL2U_SOURCES += common/aarch64/early_exceptions.S
|
||||
endif
|
||||
|
||||
BL2U_LINKERFILE := bl2u/bl2u.ld.S
|
||||
@@ -0,0 +1,65 @@
|
||||
/*
|
||||
* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include <assert.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#include <platform_def.h>
|
||||
|
||||
#include <arch.h>
|
||||
#include <arch_helpers.h>
|
||||
#include <bl1/bl1.h>
|
||||
#include <bl2u/bl2u.h>
|
||||
#include <common/bl_common.h>
|
||||
#include <common/debug.h>
|
||||
#include <drivers/auth/auth_mod.h>
|
||||
#include <drivers/console.h>
|
||||
#include <plat/common/platform.h>
|
||||
|
||||
/*******************************************************************************
|
||||
* This function is responsible to:
|
||||
* Load SCP_BL2U if platform has defined SCP_BL2U_BASE
|
||||
* Perform platform setup.
|
||||
* Go back to EL3.
|
||||
******************************************************************************/
|
||||
void bl2u_main(void)
|
||||
{
|
||||
NOTICE("BL2U: %s\n", version_string);
|
||||
NOTICE("BL2U: %s\n", build_message);
|
||||
|
||||
#if SCP_BL2U_BASE
|
||||
int rc;
|
||||
/* Load the subsequent bootloader images */
|
||||
rc = bl2u_plat_handle_scp_bl2u();
|
||||
if (rc != 0) {
|
||||
ERROR("Failed to load SCP_BL2U (%i)\n", rc);
|
||||
panic();
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Perform platform setup in BL2U after loading SCP_BL2U */
|
||||
bl2u_platform_setup();
|
||||
|
||||
console_flush();
|
||||
|
||||
#ifndef __aarch64__
|
||||
/*
|
||||
* For AArch32 state BL1 and BL2U share the MMU setup.
|
||||
* Given that BL2U does not map BL1 regions, MMU needs
|
||||
* to be disabled in order to go back to BL1.
|
||||
*/
|
||||
disable_mmu_icache_secure();
|
||||
#endif /* !__aarch64__ */
|
||||
|
||||
/*
|
||||
* Indicate that BL2U is done and resume back to
|
||||
* normal world via an SMC to BL1.
|
||||
* x1 could be passed to Normal world,
|
||||
* so DO NOT pass any secret information.
|
||||
*/
|
||||
smc(FWU_SMC_SEC_IMAGE_DONE, 0, 0, 0, 0, 0, 0, 0);
|
||||
wfi();
|
||||
}
|
||||
Reference in New Issue
Block a user