GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)
This commit is contained in:
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/*
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* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#pragma message __FILE__ " is deprecated, use gicv2.mk instead"
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#include <assert.h>
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#include <drivers/arm/gic_common.h>
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#include <lib/mmio.h>
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#include "gic_common_private.h"
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/*******************************************************************************
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* GIC Distributor interface accessors for reading entire registers
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******************************************************************************/
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/*
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* Accessor to read the GIC Distributor IGROUPR corresponding to the interrupt
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* `id`, 32 interrupt ids at a time.
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*/
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unsigned int gicd_read_igroupr(uintptr_t base, unsigned int id)
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{
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unsigned int n = id >> IGROUPR_SHIFT;
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return mmio_read_32(base + GICD_IGROUPR + (n << 2));
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}
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/*
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* Accessor to read the GIC Distributor ISENABLER corresponding to the
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* interrupt `id`, 32 interrupt ids at a time.
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*/
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unsigned int gicd_read_isenabler(uintptr_t base, unsigned int id)
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{
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unsigned int n = id >> ISENABLER_SHIFT;
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return mmio_read_32(base + GICD_ISENABLER + (n << 2));
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}
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/*
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* Accessor to read the GIC Distributor ICENABLER corresponding to the
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* interrupt `id`, 32 interrupt IDs at a time.
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*/
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unsigned int gicd_read_icenabler(uintptr_t base, unsigned int id)
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{
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unsigned int n = id >> ICENABLER_SHIFT;
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return mmio_read_32(base + GICD_ICENABLER + (n << 2));
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}
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/*
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* Accessor to read the GIC Distributor ISPENDR corresponding to the
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* interrupt `id`, 32 interrupt IDs at a time.
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*/
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unsigned int gicd_read_ispendr(uintptr_t base, unsigned int id)
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{
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unsigned int n = id >> ISPENDR_SHIFT;
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return mmio_read_32(base + GICD_ISPENDR + (n << 2));
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}
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/*
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* Accessor to read the GIC Distributor ICPENDR corresponding to the
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* interrupt `id`, 32 interrupt IDs at a time.
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*/
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unsigned int gicd_read_icpendr(uintptr_t base, unsigned int id)
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{
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unsigned int n = id >> ICPENDR_SHIFT;
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return mmio_read_32(base + GICD_ICPENDR + (n << 2));
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}
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/*
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* Accessor to read the GIC Distributor ISACTIVER corresponding to the
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* interrupt `id`, 32 interrupt IDs at a time.
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*/
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unsigned int gicd_read_isactiver(uintptr_t base, unsigned int id)
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{
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unsigned int n = id >> ISACTIVER_SHIFT;
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return mmio_read_32(base + GICD_ISACTIVER + (n << 2));
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}
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/*
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* Accessor to read the GIC Distributor ICACTIVER corresponding to the
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* interrupt `id`, 32 interrupt IDs at a time.
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*/
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unsigned int gicd_read_icactiver(uintptr_t base, unsigned int id)
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{
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unsigned int n = id >> ICACTIVER_SHIFT;
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return mmio_read_32(base + GICD_ICACTIVER + (n << 2));
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}
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/*
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* Accessor to read the GIC Distributor IPRIORITYR corresponding to the
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* interrupt `id`, 4 interrupt IDs at a time.
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*/
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unsigned int gicd_read_ipriorityr(uintptr_t base, unsigned int id)
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{
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unsigned int n = id >> IPRIORITYR_SHIFT;
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return mmio_read_32(base + GICD_IPRIORITYR + (n << 2));
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}
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/*
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* Accessor to read the GIC Distributor ICGFR corresponding to the
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* interrupt `id`, 16 interrupt IDs at a time.
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*/
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unsigned int gicd_read_icfgr(uintptr_t base, unsigned int id)
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{
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unsigned int n = id >> ICFGR_SHIFT;
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return mmio_read_32(base + GICD_ICFGR + (n << 2));
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}
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/*
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* Accessor to read the GIC Distributor NSACR corresponding to the
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* interrupt `id`, 16 interrupt IDs at a time.
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*/
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unsigned int gicd_read_nsacr(uintptr_t base, unsigned int id)
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{
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unsigned int n = id >> NSACR_SHIFT;
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return mmio_read_32(base + GICD_NSACR + (n << 2));
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}
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/*******************************************************************************
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* GIC Distributor interface accessors for writing entire registers
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******************************************************************************/
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/*
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* Accessor to write the GIC Distributor IGROUPR corresponding to the
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* interrupt `id`, 32 interrupt IDs at a time.
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*/
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void gicd_write_igroupr(uintptr_t base, unsigned int id, unsigned int val)
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{
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unsigned int n = id >> IGROUPR_SHIFT;
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mmio_write_32(base + GICD_IGROUPR + (n << 2), val);
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}
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/*
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* Accessor to write the GIC Distributor ISENABLER corresponding to the
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* interrupt `id`, 32 interrupt IDs at a time.
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*/
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void gicd_write_isenabler(uintptr_t base, unsigned int id, unsigned int val)
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{
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unsigned int n = id >> ISENABLER_SHIFT;
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mmio_write_32(base + GICD_ISENABLER + (n << 2), val);
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}
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/*
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* Accessor to write the GIC Distributor ICENABLER corresponding to the
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* interrupt `id`, 32 interrupt IDs at a time.
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*/
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void gicd_write_icenabler(uintptr_t base, unsigned int id, unsigned int val)
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{
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unsigned int n = id >> ICENABLER_SHIFT;
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mmio_write_32(base + GICD_ICENABLER + (n << 2), val);
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}
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/*
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* Accessor to write the GIC Distributor ISPENDR corresponding to the
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* interrupt `id`, 32 interrupt IDs at a time.
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*/
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void gicd_write_ispendr(uintptr_t base, unsigned int id, unsigned int val)
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{
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unsigned int n = id >> ISPENDR_SHIFT;
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mmio_write_32(base + GICD_ISPENDR + (n << 2), val);
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}
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/*
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* Accessor to write the GIC Distributor ICPENDR corresponding to the
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* interrupt `id`, 32 interrupt IDs at a time.
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*/
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void gicd_write_icpendr(uintptr_t base, unsigned int id, unsigned int val)
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{
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unsigned int n = id >> ICPENDR_SHIFT;
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mmio_write_32(base + GICD_ICPENDR + (n << 2), val);
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}
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/*
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* Accessor to write the GIC Distributor ISACTIVER corresponding to the
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* interrupt `id`, 32 interrupt IDs at a time.
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*/
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void gicd_write_isactiver(uintptr_t base, unsigned int id, unsigned int val)
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{
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unsigned int n = id >> ISACTIVER_SHIFT;
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mmio_write_32(base + GICD_ISACTIVER + (n << 2), val);
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}
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/*
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* Accessor to write the GIC Distributor ICACTIVER corresponding to the
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* interrupt `id`, 32 interrupt IDs at a time.
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*/
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void gicd_write_icactiver(uintptr_t base, unsigned int id, unsigned int val)
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{
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unsigned int n = id >> ICACTIVER_SHIFT;
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mmio_write_32(base + GICD_ICACTIVER + (n << 2), val);
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}
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/*
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* Accessor to write the GIC Distributor IPRIORITYR corresponding to the
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* interrupt `id`, 4 interrupt IDs at a time.
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*/
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void gicd_write_ipriorityr(uintptr_t base, unsigned int id, unsigned int val)
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{
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unsigned int n = id >> IPRIORITYR_SHIFT;
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mmio_write_32(base + GICD_IPRIORITYR + (n << 2), val);
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}
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/*
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* Accessor to write the GIC Distributor ICFGR corresponding to the
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* interrupt `id`, 16 interrupt IDs at a time.
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*/
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void gicd_write_icfgr(uintptr_t base, unsigned int id, unsigned int val)
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{
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unsigned int n = id >> ICFGR_SHIFT;
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mmio_write_32(base + GICD_ICFGR + (n << 2), val);
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}
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/*
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* Accessor to write the GIC Distributor NSACR corresponding to the
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* interrupt `id`, 16 interrupt IDs at a time.
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*/
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void gicd_write_nsacr(uintptr_t base, unsigned int id, unsigned int val)
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{
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unsigned int n = id >> NSACR_SHIFT;
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mmio_write_32(base + GICD_NSACR + (n << 2), val);
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}
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/*******************************************************************************
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* GIC Distributor functions for accessing the GIC registers
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* corresponding to a single interrupt ID. These functions use bitwise
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* operations or appropriate register accesses to modify or return
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* the bit-field corresponding the single interrupt ID.
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******************************************************************************/
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unsigned int gicd_get_igroupr(uintptr_t base, unsigned int id)
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{
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unsigned int bit_num = id & ((1U << IGROUPR_SHIFT) - 1U);
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unsigned int reg_val = gicd_read_igroupr(base, id);
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return (reg_val >> bit_num) & 0x1U;
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}
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void gicd_set_igroupr(uintptr_t base, unsigned int id)
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{
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unsigned int bit_num = id & ((1U << IGROUPR_SHIFT) - 1U);
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unsigned int reg_val = gicd_read_igroupr(base, id);
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gicd_write_igroupr(base, id, reg_val | (1U << bit_num));
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}
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void gicd_clr_igroupr(uintptr_t base, unsigned int id)
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{
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unsigned int bit_num = id & ((1U << IGROUPR_SHIFT) - 1U);
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unsigned int reg_val = gicd_read_igroupr(base, id);
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gicd_write_igroupr(base, id, reg_val & ~(1U << bit_num));
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}
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void gicd_set_isenabler(uintptr_t base, unsigned int id)
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{
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unsigned int bit_num = id & ((1U << ISENABLER_SHIFT) - 1U);
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gicd_write_isenabler(base, id, (1U << bit_num));
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}
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void gicd_set_icenabler(uintptr_t base, unsigned int id)
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{
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unsigned int bit_num = id & ((1U << ICENABLER_SHIFT) - 1U);
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gicd_write_icenabler(base, id, (1U << bit_num));
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}
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void gicd_set_ispendr(uintptr_t base, unsigned int id)
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{
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unsigned int bit_num = id & ((1U << ISPENDR_SHIFT) - 1U);
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gicd_write_ispendr(base, id, (1U << bit_num));
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}
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void gicd_set_icpendr(uintptr_t base, unsigned int id)
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{
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unsigned int bit_num = id & ((1U << ICPENDR_SHIFT) - 1U);
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gicd_write_icpendr(base, id, (1U << bit_num));
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}
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unsigned int gicd_get_isactiver(uintptr_t base, unsigned int id)
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{
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unsigned int bit_num = id & ((1U << ISACTIVER_SHIFT) - 1U);
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unsigned int reg_val = gicd_read_isactiver(base, id);
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return (reg_val >> bit_num) & 0x1U;
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}
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void gicd_set_isactiver(uintptr_t base, unsigned int id)
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{
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unsigned int bit_num = id & ((1U << ISACTIVER_SHIFT) - 1U);
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gicd_write_isactiver(base, id, (1U << bit_num));
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}
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void gicd_set_icactiver(uintptr_t base, unsigned int id)
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{
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unsigned int bit_num = id & ((1U << ICACTIVER_SHIFT) - 1U);
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gicd_write_icactiver(base, id, (1U << bit_num));
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}
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void gicd_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri)
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{
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uint8_t val = pri & GIC_PRI_MASK;
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mmio_write_8(base + GICD_IPRIORITYR + id, val);
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}
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void gicd_set_icfgr(uintptr_t base, unsigned int id, unsigned int cfg)
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{
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/* Interrupt configuration is a 2-bit field */
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unsigned int bit_num = id & ((1U << ICFGR_SHIFT) - 1U);
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unsigned int bit_shift = bit_num << 1;
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uint32_t reg_val = gicd_read_icfgr(base, id);
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/* Clear the field, and insert required configuration */
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reg_val &= ~(GIC_CFG_MASK << bit_shift);
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reg_val |= ((cfg & GIC_CFG_MASK) << bit_shift);
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gicd_write_icfgr(base, id, reg_val);
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}
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+89
@@ -0,0 +1,89 @@
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/*
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* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef GIC_COMMON_PRIVATE_H
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#define GIC_COMMON_PRIVATE_H
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#include <stdint.h>
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#include <drivers/arm/gic_common.h>
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#include <lib/mmio.h>
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/*******************************************************************************
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* GIC Distributor interface register accessors that are common to GICv3 & GICv2
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******************************************************************************/
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static inline unsigned int gicd_read_ctlr(uintptr_t base)
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{
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return mmio_read_32(base + GICD_CTLR);
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}
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static inline unsigned int gicd_read_typer(uintptr_t base)
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{
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return mmio_read_32(base + GICD_TYPER);
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}
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static inline unsigned int gicd_read_iidr(uintptr_t base)
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{
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return mmio_read_32(base + GICD_IIDR);
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}
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static inline void gicd_write_ctlr(uintptr_t base, unsigned int val)
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{
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mmio_write_32(base + GICD_CTLR, val);
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}
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/*******************************************************************************
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* GIC Distributor function prototypes for accessing entire registers.
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* Note: The raw register values correspond to multiple interrupt IDs and
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* the number of interrupt IDs involved depends on the register accessed.
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******************************************************************************/
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unsigned int gicd_read_igroupr(uintptr_t base, unsigned int id);
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unsigned int gicd_read_isenabler(uintptr_t base, unsigned int id);
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unsigned int gicd_read_icenabler(uintptr_t base, unsigned int id);
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unsigned int gicd_read_ispendr(uintptr_t base, unsigned int id);
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unsigned int gicd_read_icpendr(uintptr_t base, unsigned int id);
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unsigned int gicd_read_isactiver(uintptr_t base, unsigned int id);
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unsigned int gicd_read_icactiver(uintptr_t base, unsigned int id);
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unsigned int gicd_read_ipriorityr(uintptr_t base, unsigned int id);
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unsigned int gicd_read_icfgr(uintptr_t base, unsigned int id);
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unsigned int gicd_read_nsacr(uintptr_t base, unsigned int id);
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unsigned int gicd_read_spendsgir(uintptr_t base, unsigned int id);
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unsigned int gicd_read_cpendsgir(uintptr_t base, unsigned int id);
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unsigned int gicd_read_itargetsr(uintptr_t base, unsigned int id);
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void gicd_write_igroupr(uintptr_t base, unsigned int id, unsigned int val);
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void gicd_write_isenabler(uintptr_t base, unsigned int id, unsigned int val);
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void gicd_write_icenabler(uintptr_t base, unsigned int id, unsigned int val);
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void gicd_write_ispendr(uintptr_t base, unsigned int id, unsigned int val);
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void gicd_write_icpendr(uintptr_t base, unsigned int id, unsigned int val);
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void gicd_write_isactiver(uintptr_t base, unsigned int id, unsigned int val);
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void gicd_write_icactiver(uintptr_t base, unsigned int id, unsigned int val);
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void gicd_write_ipriorityr(uintptr_t base, unsigned int id, unsigned int val);
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void gicd_write_icfgr(uintptr_t base, unsigned int id, unsigned int val);
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void gicd_write_nsacr(uintptr_t base, unsigned int id, unsigned int val);
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void gicd_write_spendsgir(uintptr_t base, unsigned int id, unsigned int val);
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void gicd_write_cpendsgir(uintptr_t base, unsigned int id, unsigned int val);
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void gicd_write_itargetsr(uintptr_t base, unsigned int id, unsigned int val);
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/*******************************************************************************
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* GIC Distributor function prototypes for accessing the GIC registers
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* corresponding to a single interrupt ID. These functions use bitwise
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* operations or appropriate register accesses to modify or return
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* the bit-field corresponding the single interrupt ID.
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******************************************************************************/
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unsigned int gicd_get_igroupr(uintptr_t base, unsigned int id);
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void gicd_set_igroupr(uintptr_t base, unsigned int id);
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void gicd_clr_igroupr(uintptr_t base, unsigned int id);
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void gicd_set_isenabler(uintptr_t base, unsigned int id);
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void gicd_set_icenabler(uintptr_t base, unsigned int id);
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void gicd_set_ispendr(uintptr_t base, unsigned int id);
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void gicd_set_icpendr(uintptr_t base, unsigned int id);
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unsigned int gicd_get_isactiver(uintptr_t base, unsigned int id);
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void gicd_set_isactiver(uintptr_t base, unsigned int id);
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void gicd_set_icactiver(uintptr_t base, unsigned int id);
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void gicd_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri);
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void gicd_set_icfgr(uintptr_t base, unsigned int id, unsigned int cfg);
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#endif /* GIC_COMMON_PRIVATE_H */
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