GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)

This commit is contained in:
lai
2026-09-06 03:52:57 +08:00
commit b1928b41c0
21813 changed files with 4413081 additions and 0 deletions
@@ -0,0 +1,95 @@
/*
* Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_BL_COMMON_EXP_H
#define ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_BL_COMMON_EXP_H
/* EXPORT HEADER -- See include/export/README for details! -- EXPORT HEADER */
#include "ep_info_exp.h"
#include "tbbr/tbbr_img_def_exp.h"
/*
* The following are used for image state attributes.
* Image can only be in one of the following state.
*/
#define IMAGE_STATE_RESET U(0)
#define IMAGE_STATE_COPIED U(1)
#define IMAGE_STATE_COPYING U(2)
#define IMAGE_STATE_AUTHENTICATED U(3)
#define IMAGE_STATE_EXECUTED U(4)
#define IMAGE_STATE_INTERRUPTED U(5)
#define IMAGE_ATTRIB_SKIP_LOADING U(0x02)
#define IMAGE_ATTRIB_PLAT_SETUP U(0x04)
#define INVALID_IMAGE_ID U(0xFFFFFFFF)
#ifndef __ASSEMBLER__
/*****************************************************************************
* Image info binary provides information from the image loader that
* can be used by the firmware to manage available trusted RAM.
* More advanced firmware image formats can provide additional
* information that enables optimization or greater flexibility in the
* common firmware code
*****************************************************************************/
typedef struct image_info {
param_header_t h;
uintptr_t image_base; /* physical address of base of image */
uint32_t image_size; /* bytes read from image file */
uint32_t image_max_size;
} image_info_t;
/* BL image node in the BL image execution sequence */
typedef struct bl_params_node {
unsigned int image_id;
image_info_t *image_info;
entry_point_info_t *ep_info;
struct bl_params_node *next_params_info;
} bl_params_node_t;
/*
* BL image head node in the BL image execution sequence
* It is also used to pass information to next BL image.
*/
typedef struct bl_params {
param_header_t h;
bl_params_node_t *head;
} bl_params_t;
/*****************************************************************************
* The image descriptor struct definition.
*****************************************************************************/
typedef struct image_desc {
/* Contains unique image id for the image. */
unsigned int image_id;
/*
* This member contains Image state information.
* Refer IMAGE_STATE_XXX defined above.
*/
unsigned int state;
uint32_t copied_size; /* image size copied in blocks */
image_info_t image_info;
entry_point_info_t ep_info;
} image_desc_t;
/* BL image node in the BL image loading sequence */
typedef struct bl_load_info_node {
unsigned int image_id;
image_info_t *image_info;
struct bl_load_info_node *next_load_info;
} bl_load_info_node_t;
/* BL image head node in the BL image loading sequence */
typedef struct bl_load_info {
param_header_t h;
bl_load_info_node_t *head;
} bl_load_info_t;
#endif /* __ASSEMBLER__ */
#endif /* ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_BL_COMMON_EXP_H */
@@ -0,0 +1,119 @@
/*
* Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_EP_INFO_EXP_H
#define ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_EP_INFO_EXP_H
/* EXPORT HEADER -- See include/export/README for details! -- EXPORT HEADER */
#include "../lib/utils_def_exp.h"
#include "param_header_exp.h"
/*******************************************************************************
* Constants that allow assembler code to access members of and the
* 'entry_point_info' structure at their correct offsets.
******************************************************************************/
#define ENTRY_POINT_INFO_PC_OFFSET U(0x08)
#ifdef __aarch64__
#define ENTRY_POINT_INFO_ARGS_OFFSET U(0x18)
#else
#define ENTRY_POINT_INFO_LR_SVC_OFFSET U(0x10)
#define ENTRY_POINT_INFO_ARGS_OFFSET U(0x14)
#endif
/*
* Security state of the image. Bit 0 and
* bit 5 are used to determine the security
* state of the image as follows:
*
* ---------------------------------
* Bit 5 | Bit 0 | Security state
* ---------------------------------
* 0 0 EP_SECURE
* 0 1 EP_NON_SECURE
* 1 1 EP_REALM
*/
#define EP_SECURITY_MASK UL(0x21)
#define EP_SECURITY_SHIFT UL(0)
#define EP_SECURE UL(0x0)
#define EP_NON_SECURE UL(0x1)
#define EP_REALM UL(0x21)
/* Endianness of the image. */
#define EP_EE_MASK U(0x2)
#define EP_EE_SHIFT U(1)
#define EP_EE_LITTLE U(0x0)
#define EP_EE_BIG U(0x2)
#define EP_GET_EE(x) ((x) & EP_EE_MASK)
#define EP_SET_EE(x, ee) ((x) = ((x) & ~EP_EE_MASK) | (ee))
/* Enable or disable access to the secure timer from secure images. */
#define EP_ST_MASK U(0x4)
#define EP_ST_SHIFT U(2)
#define EP_ST_DISABLE U(0x0)
#define EP_ST_ENABLE U(0x4)
#define EP_GET_ST(x) ((x) & EP_ST_MASK)
#define EP_SET_ST(x, ee) ((x) = ((x) & ~EP_ST_MASK) | (ee))
/* Determine if an image is executable or not. */
#define EP_EXE_MASK U(0x8)
#define EP_EXE_SHIFT U(3)
#define EP_NON_EXECUTABLE U(0x0)
#define EP_EXECUTABLE U(0x8)
#define EP_GET_EXE(x) ((x) & EP_EXE_MASK)
#define EP_SET_EXE(x, ee) ((x) = ((x) & ~EP_EXE_MASK) | (ee))
/* Flag to indicate the first image that is executed. */
#define EP_FIRST_EXE_MASK U(0x10)
#define EP_FIRST_EXE_SHIFT U(4)
#define EP_FIRST_EXE U(0x10)
#define EP_GET_FIRST_EXE(x) ((x) & EP_FIRST_EXE_MASK)
#define EP_SET_FIRST_EXE(x, ee) ((x) = ((x) & ~EP_FIRST_EXE_MASK) | (ee))
#ifndef __ASSEMBLER__
typedef struct aapcs64_params {
uint64_t arg0;
uint64_t arg1;
uint64_t arg2;
uint64_t arg3;
uint64_t arg4;
uint64_t arg5;
uint64_t arg6;
uint64_t arg7;
} aapcs64_params_t;
typedef struct aapcs32_params {
uint32_t arg0;
uint32_t arg1;
uint32_t arg2;
uint32_t arg3;
} aapcs32_params_t;
/*****************************************************************************
* This structure represents the superset of information needed while
* switching exception levels. The only two mechanisms to do so are
* ERET & SMC. Security state is indicated using bit zero of header
* attribute
* NOTE: BL1 expects entrypoint followed by spsr at an offset from the start
* of this structure defined by the macro `ENTRY_POINT_INFO_PC_OFFSET` while
* processing SMC to jump to BL31.
*****************************************************************************/
typedef struct entry_point_info {
param_header_t h;
uintptr_t pc;
uint32_t spsr;
#ifdef __aarch64__
aapcs64_params_t args;
#else
uintptr_t lr_svc;
aapcs32_params_t args;
#endif
} entry_point_info_t;
#endif /*__ASSEMBLER__*/
#endif /* ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_EP_INFO_EXP_H */
@@ -0,0 +1,42 @@
/*
* Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_PARAM_HEADER_EXP_H
#define ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_PARAM_HEADER_EXP_H
/* EXPORT HEADER -- See include/export/README for details! -- EXPORT HEADER */
#include "../lib/utils_def_exp.h"
/* Param header types */
#define PARAM_EP U(0x01)
#define PARAM_IMAGE_BINARY U(0x02)
#define PARAM_BL31 U(0x03)
#define PARAM_BL_LOAD_INFO U(0x04)
#define PARAM_BL_PARAMS U(0x05)
#define PARAM_PSCI_LIB_ARGS U(0x06)
#define PARAM_SP_IMAGE_BOOT_INFO U(0x07)
/* Param header version */
#define PARAM_VERSION_1 U(0x01)
#define PARAM_VERSION_2 U(0x02)
#ifndef __ASSEMBLER__
/***************************************************************************
* This structure provides version information and the size of the
* structure, attributes for the structure it represents
***************************************************************************/
typedef struct param_header {
uint8_t type; /* type of the structure */
uint8_t version; /* version of this structure */
uint16_t size; /* size of this structure in bytes */
uint32_t attr; /* attributes: unused bits SBZ */
} param_header_t;
#endif /*__ASSEMBLER__*/
#endif /* ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_PARAM_HEADER_EXP_H */
@@ -0,0 +1,119 @@
/*
* Copyright (c) 2019-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_TBBR_TBBR_IMG_DEF_EXP_H
#define ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_TBBR_TBBR_IMG_DEF_EXP_H
/* EXPORT HEADER -- See include/export/README for details! -- EXPORT HEADER */
#include "../../lib/utils_def_exp.h"
/* Firmware Image Package */
#define FIP_IMAGE_ID U(0)
/* Trusted Boot Firmware BL2 */
#define BL2_IMAGE_ID U(1)
/* SCP Firmware SCP_BL2 */
#define SCP_BL2_IMAGE_ID U(2)
/* EL3 Runtime Firmware BL31 */
#define BL31_IMAGE_ID U(3)
/* Secure Payload BL32 (Trusted OS) */
#define BL32_IMAGE_ID U(4)
/* Non-Trusted Firmware BL33 */
#define BL33_IMAGE_ID U(5)
/* Certificates */
#define TRUSTED_BOOT_FW_CERT_ID U(6)
#define TRUSTED_KEY_CERT_ID U(7)
#define SCP_FW_KEY_CERT_ID U(8)
#define SOC_FW_KEY_CERT_ID U(9)
#define TRUSTED_OS_FW_KEY_CERT_ID U(10)
#define NON_TRUSTED_FW_KEY_CERT_ID U(11)
#define SCP_FW_CONTENT_CERT_ID U(12)
#define SOC_FW_CONTENT_CERT_ID U(13)
#define TRUSTED_OS_FW_CONTENT_CERT_ID U(14)
#define NON_TRUSTED_FW_CONTENT_CERT_ID U(15)
/* Non-Trusted ROM Firmware NS_BL1U */
#define NS_BL1U_IMAGE_ID U(16)
/* Trusted FWU Certificate */
#define FWU_CERT_ID U(17)
/* Trusted FWU SCP Firmware SCP_BL2U */
#define SCP_BL2U_IMAGE_ID U(18)
/* Trusted FWU Boot Firmware BL2U */
#define BL2U_IMAGE_ID U(19)
/* Non-Trusted FWU Firmware NS_BL2U */
#define NS_BL2U_IMAGE_ID U(20)
/* Secure Payload BL32_EXTRA1 (Trusted OS Extra1) */
#define BL32_EXTRA1_IMAGE_ID U(21)
/* Secure Payload BL32_EXTRA2 (Trusted OS Extra2) */
#define BL32_EXTRA2_IMAGE_ID U(22)
/* HW_CONFIG (e.g. Kernel DT) */
#define HW_CONFIG_ID U(23)
/* TB_FW_CONFIG */
#define TB_FW_CONFIG_ID U(24)
/* SOC_FW_CONFIG */
#define SOC_FW_CONFIG_ID U(25)
/* TOS_FW_CONFIG */
#define TOS_FW_CONFIG_ID U(26)
/* NT_FW_CONFIG */
#define NT_FW_CONFIG_ID U(27)
/* GPT Partition */
#define GPT_IMAGE_ID U(28)
/* Binary with STM32 header */
#define STM32_IMAGE_ID U(29)
/* Encrypted image identifier */
#define ENC_IMAGE_ID U(30)
/* FW_CONFIG */
#define FW_CONFIG_ID U(31)
/*
* Primary FWU metadata image ID
*/
#define FWU_METADATA_IMAGE_ID U(32)
/*
* Backup FWU metadata image ID
*/
#define BKUP_FWU_METADATA_IMAGE_ID U(33)
/* Realm Monitor Manager (RMM) */
#define RMM_IMAGE_ID U(34)
/* CCA Content Certificate ID */
#define CCA_CONTENT_CERT_ID U(35)
/* Core SWD Key Certificate ID */
#define CORE_SWD_KEY_CERT_ID U(36)
/* Platform Key Certificate ID */
#define PLAT_KEY_CERT_ID U(37)
/* Max Images */
#define MAX_IMAGE_IDS U(38)
#endif /* ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_TBBR_TBBR_IMG_DEF_EXP_H */