GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)

This commit is contained in:
lai
2026-09-06 03:52:57 +08:00
commit b1928b41c0
21813 changed files with 4413081 additions and 0 deletions
@@ -0,0 +1,20 @@
/*
* Copyright (c) 2018-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef ARM_ARCH_SVC_H
#define ARM_ARCH_SVC_H
#define SMCCC_VERSION U(0x80000000)
#define SMCCC_ARCH_FEATURES U(0x80000001)
#define SMCCC_ARCH_SOC_ID U(0x80000002)
#define SMCCC_ARCH_WORKAROUND_1 U(0x80008000)
#define SMCCC_ARCH_WORKAROUND_2 U(0x80007FFF)
#define SMCCC_ARCH_WORKAROUND_3 U(0x80003FFF)
#define SMCCC_GET_SOC_VERSION U(0)
#define SMCCC_GET_SOC_REVISION U(1)
#endif /* ARM_ARCH_SVC_H */
@@ -0,0 +1,241 @@
/*
* Copyright (c) 2022 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
* DRTM service
*
* Authors:
* Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
* Brian Nezvadovitz <brinez@microsoft.com> 2021-02-01
*
*/
#ifndef ARM_DRTM_SVC_H
#define ARM_DRTM_SVC_H
/*
* SMC function IDs for DRTM Service
* Upper word bits set: Fast call, SMC64, Standard Secure Svc. Call (OEN = 4)
*/
#define DRTM_FID(func_num) \
((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT) | \
(SMC_64 << FUNCID_CC_SHIFT) | \
(OEN_STD_START << FUNCID_OEN_SHIFT) | \
((func_num) << FUNCID_NUM_SHIFT))
#define DRTM_FNUM_SVC_VERSION U(0x110)
#define DRTM_FNUM_SVC_FEATURES U(0x111)
#define DRTM_FNUM_SVC_UNPROTECT_MEM U(0x113)
#define DRTM_FNUM_SVC_DYNAMIC_LAUNCH U(0x114)
#define DRTM_FNUM_SVC_CLOSE_LOCALITY U(0x115)
#define DRTM_FNUM_SVC_GET_ERROR U(0x116)
#define DRTM_FNUM_SVC_SET_ERROR U(0x117)
#define DRTM_FNUM_SVC_SET_TCB_HASH U(0x118)
#define DRTM_FNUM_SVC_LOCK_TCB_HASH U(0x119)
#define ARM_DRTM_SVC_VERSION DRTM_FID(DRTM_FNUM_SVC_VERSION)
#define ARM_DRTM_SVC_FEATURES DRTM_FID(DRTM_FNUM_SVC_FEATURES)
#define ARM_DRTM_SVC_UNPROTECT_MEM DRTM_FID(DRTM_FNUM_SVC_UNPROTECT_MEM)
#define ARM_DRTM_SVC_DYNAMIC_LAUNCH DRTM_FID(DRTM_FNUM_SVC_DYNAMIC_LAUNCH)
#define ARM_DRTM_SVC_CLOSE_LOCALITY DRTM_FID(DRTM_FNUM_SVC_CLOSE_LOCALITY)
#define ARM_DRTM_SVC_GET_ERROR DRTM_FID(DRTM_FNUM_SVC_GET_ERROR)
#define ARM_DRTM_SVC_SET_ERROR DRTM_FID(DRTM_FNUM_SVC_SET_ERROR)
#define ARM_DRTM_SVC_SET_TCB_HASH DRTM_FID(DRTM_FNUM_SVC_SET_TCB_HASH)
#define ARM_DRTM_SVC_LOCK_TCB_HASH DRTM_FID(DRTM_FNUM_SVC_LOCK_TCB_HASH)
#define ARM_DRTM_FEATURES_TPM U(0x1)
#define ARM_DRTM_FEATURES_MEM_REQ U(0x2)
#define ARM_DRTM_FEATURES_DMA_PROT U(0x3)
#define ARM_DRTM_FEATURES_BOOT_PE_ID U(0x4)
#define ARM_DRTM_FEATURES_TCB_HASHES U(0x5)
#define is_drtm_fid(_fid) \
(((_fid) >= ARM_DRTM_SVC_VERSION) && ((_fid) <= ARM_DRTM_SVC_LOCK_TCB_HASH))
/* ARM DRTM Service Calls version numbers */
#define ARM_DRTM_VERSION_MAJOR U(0)
#define ARM_DRTM_VERSION_MAJOR_SHIFT 16
#define ARM_DRTM_VERSION_MAJOR_MASK U(0x7FFF)
#define ARM_DRTM_VERSION_MINOR U(1)
#define ARM_DRTM_VERSION_MINOR_SHIFT 0
#define ARM_DRTM_VERSION_MINOR_MASK U(0xFFFF)
#define ARM_DRTM_VERSION \
((((ARM_DRTM_VERSION_MAJOR) & ARM_DRTM_VERSION_MAJOR_MASK) << \
ARM_DRTM_VERSION_MAJOR_SHIFT) \
| (((ARM_DRTM_VERSION_MINOR) & ARM_DRTM_VERSION_MINOR_MASK) << \
ARM_DRTM_VERSION_MINOR_SHIFT))
#define ARM_DRTM_FUNC_SHIFT U(63)
#define ARM_DRTM_FUNC_MASK ULL(0x1)
#define ARM_DRTM_FUNC_ID U(0x0)
#define ARM_DRTM_FEAT_ID U(0x1)
#define ARM_DRTM_FEAT_ID_MASK ULL(0xff)
/*
* Definitions for DRTM features as per DRTM beta0 section 3.3,
* Table 6 DRTM_FEATURES
*/
#define ARM_DRTM_TPM_FEATURES_PCR_SCHEMA_SHIFT U(33)
#define ARM_DRTM_TPM_FEATURES_PCR_SCHEMA_MASK ULL(0xF)
#define ARM_DRTM_TPM_FEATURES_PCR_SCHEMA_DEFAULT ULL(0x1)
#define ARM_DRTM_TPM_FEATURES_TPM_HASH_SHIFT U(32)
#define ARM_DRTM_TPM_FEATURES_TPM_HASH_MASK ULL(0x1)
#define ARM_DRTM_TPM_FEATURES_TPM_HASH_NOT_SUPPORTED ULL(0x0)
#define ARM_DRTM_TPM_FEATURES_TPM_HASH_SUPPORTED ULL(0x1)
#define ARM_DRTM_TPM_FEATURES_FW_HASH_SHIFT U(0)
#define ARM_DRTM_TPM_FEATURES_FW_HASH_MASK ULL(0xFFFFFFFF)
#define ARM_DRTM_TPM_FEATURES_FW_HASH_SHA256 ULL(0xB)
#define ARM_DRTM_TPM_FEATURES_FW_HASH_SHA384 ULL(0xC)
#define ARM_DRTM_TPM_FEATURES_FW_HASH_SHA512 ULL(0xD)
#define ARM_DRTM_MIN_MEM_REQ_DCE_SIZE_SHIFT U(32)
#define ARM_DRTM_MIN_MEM_REQ_DCE_SIZE_MASK ULL(0xFFFFFFFF)
#define ARM_DRTM_MIN_MEM_REQ_MIN_DLME_DATA_SIZE_SHIFT U(0)
#define ARM_DRTM_MIN_MEM_REQ_MIN_DLME_DATA_SIZE_MASK ULL(0xFFFFFFFF)
#define ARM_DRTM_DMA_PROT_FEATURES_MAX_REGIONS_SHIFT U(8)
#define ARM_DRTM_DMA_PROT_FEATURES_MAX_REGIONS_MASK ULL(0xF)
#define ARM_DRTM_DMA_PROT_FEATURES_DMA_SUPPORT_SHIFT U(0)
#define ARM_DRTM_DMA_PROT_FEATURES_DMA_SUPPORT_MASK ULL(0xFF)
#define ARM_DRTM_DMA_PROT_FEATURES_DMA_SUPPORT_COMPLETE ULL(0x1)
#define ARM_DRTM_DMA_PROT_FEATURES_DMA_SUPPORT_REGION ULL(0x2)
#define ARM_DRTM_TCB_HASH_FEATURES_MAX_NUM_HASHES_SHIFT U(0)
#define ARM_DRTM_TCB_HASH_FEATURES_MAX_NUM_HASHES_MASK ULL(0xFF)
#define ARM_DRTM_TPM_FEATURES_SET_PCR_SCHEMA(reg, val) \
do { \
reg = (((reg) & ~(ARM_DRTM_TPM_FEATURES_PCR_SCHEMA_MASK \
<< ARM_DRTM_TPM_FEATURES_PCR_SCHEMA_SHIFT)) | (((val) & \
ARM_DRTM_TPM_FEATURES_PCR_SCHEMA_MASK) << \
ARM_DRTM_TPM_FEATURES_PCR_SCHEMA_SHIFT)); \
} while (false)
#define ARM_DRTM_TPM_FEATURES_SET_TPM_HASH(reg, val) \
do { \
reg = (((reg) & ~(ARM_DRTM_TPM_FEATURES_TPM_HASH_MASK \
<< ARM_DRTM_TPM_FEATURES_TPM_HASH_SHIFT)) | (((val) & \
ARM_DRTM_TPM_FEATURES_TPM_HASH_MASK) << \
ARM_DRTM_TPM_FEATURES_TPM_HASH_SHIFT)); \
} while (false)
#define ARM_DRTM_TPM_FEATURES_SET_FW_HASH(reg, val) \
do { \
reg = (((reg) & ~(ARM_DRTM_TPM_FEATURES_FW_HASH_MASK \
<< ARM_DRTM_TPM_FEATURES_FW_HASH_SHIFT)) | (((val) & \
ARM_DRTM_TPM_FEATURES_FW_HASH_MASK) << \
ARM_DRTM_TPM_FEATURES_FW_HASH_SHIFT)); \
} while (false)
#define ARM_DRTM_MIN_MEM_REQ_SET_DCE_SIZE(reg, val) \
do { \
reg = (((reg) & ~(ARM_DRTM_MIN_MEM_REQ_DCE_SIZE_MASK \
<< ARM_DRTM_MIN_MEM_REQ_DCE_SIZE_SHIFT)) | (((val) & \
ARM_DRTM_MIN_MEM_REQ_DCE_SIZE_MASK) << \
ARM_DRTM_MIN_MEM_REQ_DCE_SIZE_SHIFT)); \
} while (false)
#define ARM_DRTM_MIN_MEM_REQ_SET_MIN_DLME_DATA_SIZE(reg, val) \
do { \
reg = (((reg) & \
~(ARM_DRTM_MIN_MEM_REQ_MIN_DLME_DATA_SIZE_MASK << \
ARM_DRTM_MIN_MEM_REQ_MIN_DLME_DATA_SIZE_SHIFT)) | \
(((val) & ARM_DRTM_MIN_MEM_REQ_MIN_DLME_DATA_SIZE_MASK) \
<< ARM_DRTM_MIN_MEM_REQ_MIN_DLME_DATA_SIZE_SHIFT)); \
} while (false)
#define ARM_DRTM_DMA_PROT_FEATURES_SET_MAX_REGIONS(reg, val) \
do { \
reg = (((reg) & \
~(ARM_DRTM_DMA_PROT_FEATURES_MAX_REGIONS_MASK << \
ARM_DRTM_DMA_PROT_FEATURES_MAX_REGIONS_SHIFT)) | \
(((val) & ARM_DRTM_DMA_PROT_FEATURES_MAX_REGIONS_MASK) \
<< ARM_DRTM_DMA_PROT_FEATURES_MAX_REGIONS_SHIFT)); \
} while (false)
#define ARM_DRTM_DMA_PROT_FEATURES_SET_DMA_SUPPORT(reg, val) \
do { \
reg = (((reg) & \
~(ARM_DRTM_DMA_PROT_FEATURES_DMA_SUPPORT_MASK << \
ARM_DRTM_DMA_PROT_FEATURES_DMA_SUPPORT_SHIFT)) | \
(((val) & ARM_DRTM_DMA_PROT_FEATURES_DMA_SUPPORT_MASK) \
<< ARM_DRTM_DMA_PROT_FEATURES_DMA_SUPPORT_SHIFT)); \
} while (false)
#define ARM_DRTM_TCB_HASH_FEATURES_SET_MAX_NUM_HASHES(reg, val) \
do { \
reg = (((reg) & \
~(ARM_DRTM_TCB_HASH_FEATURES_MAX_NUM_HASHES_MASK << \
ARM_DRTM_TCB_HASH_FEATURES_MAX_NUM_HASHES_SHIFT)) | \
(((val) & \
ARM_DRTM_TCB_HASH_FEATURES_MAX_NUM_HASHES_MASK) << \
ARM_DRTM_TCB_HASH_FEATURES_MAX_NUM_HASHES_SHIFT)); \
} while (false)
/* Definitions for DRTM address map */
#define ARM_DRTM_REGION_SIZE_TYPE_CACHEABILITY_SHIFT U(55)
#define ARM_DRTM_REGION_SIZE_TYPE_CACHEABILITY_MASK ULL(0x3)
#define ARM_DRTM_REGION_SIZE_TYPE_CACHEABILITY_NC ULL(0)
#define ARM_DRTM_REGION_SIZE_TYPE_CACHEABILITY_WC ULL(1)
#define ARM_DRTM_REGION_SIZE_TYPE_CACHEABILITY_WT ULL(2)
#define ARM_DRTM_REGION_SIZE_TYPE_CACHEABILITY_WB ULL(3)
#define ARM_DRTM_REGION_SIZE_TYPE_REGION_TYPE_SHIFT U(52)
#define ARM_DRTM_REGION_SIZE_TYPE_REGION_TYPE_MASK ULL(0x7)
#define ARM_DRTM_REGION_SIZE_TYPE_REGION_TYPE_NORMAL ULL(0)
#define ARM_DRTM_REGION_SIZE_TYPE_REGION_TYPE_NCAR ULL(1)
#define ARM_DRTM_REGION_SIZE_TYPE_REGION_TYPE_DEVICE ULL(2)
#define ARM_DRTM_REGION_SIZE_TYPE_REGION_TYPE_NV ULL(3)
#define ARM_DRTM_REGION_SIZE_TYPE_REGION_TYPE_RSVD ULL(4)
#define ARM_DRTM_REGION_SIZE_TYPE_4K_PAGE_NUM_SHIFT U(0)
#define ARM_DRTM_REGION_SIZE_TYPE_4K_PAGE_NUM_MASK ULL(0xFFFFFFFFFFFFF)
#define ARM_DRTM_REGION_SIZE_TYPE_SET_CACHEABILITY(reg, val) \
do { \
reg = (((reg) & \
~(ARM_DRTM_REGION_SIZE_TYPE_CACHEABILITY_MASK << \
ARM_DRTM_REGION_SIZE_TYPE_CACHEABILITY_SHIFT)) | \
(((val) & \
ARM_DRTM_REGION_SIZE_TYPE_CACHEABILITY_MASK) << \
ARM_DRTM_REGION_SIZE_TYPE_CACHEABILITY_SHIFT)); \
} while (false)
#define ARM_DRTM_REGION_SIZE_TYPE_SET_REGION_TYPE(reg, val) \
do { \
reg = (((reg) & \
~(ARM_DRTM_REGION_SIZE_TYPE_REGION_TYPE_MASK << \
ARM_DRTM_REGION_SIZE_TYPE_REGION_TYPE_SHIFT)) | \
(((val) & ARM_DRTM_REGION_SIZE_TYPE_REGION_TYPE_MASK) \
<< ARM_DRTM_REGION_SIZE_TYPE_REGION_TYPE_SHIFT)); \
} while (false)
#define ARM_DRTM_REGION_SIZE_TYPE_SET_4K_PAGE_NUM(reg, val) \
do { \
reg = (((reg) & \
~(ARM_DRTM_REGION_SIZE_TYPE_4K_PAGE_NUM_MASK << \
ARM_DRTM_REGION_SIZE_TYPE_4K_PAGE_NUM_SHIFT)) | \
(((val) & ARM_DRTM_REGION_SIZE_TYPE_4K_PAGE_NUM_MASK) \
<< ARM_DRTM_REGION_SIZE_TYPE_4K_PAGE_NUM_SHIFT)); \
} while (false)
/* Initialization routine for the DRTM service */
int drtm_setup(void);
/* Handler to be called to handle DRTM SMC calls */
uint64_t drtm_smc_handler(uint32_t smc_fid,
uint64_t x1,
uint64_t x2,
uint64_t x3,
uint64_t x4,
void *cookie,
void *handle,
uint64_t flags);
#endif /* ARM_DRTM_SVC_H */
@@ -0,0 +1,258 @@
/*
* Copyright (c) 2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef EL3_SPMC_FFA_MEM_H
#define EL3_SPMC_FFA_MEM_H
#include <assert.h>
/*
* Subset of Arm Firmware Framework for Armv8-A
* (https://developer.arm.com/docs/den0077/a) needed for shared memory.
*/
/**
* typedef ffa_endpoint_id16_t - Endpoint ID
*
* Current implementation only supports VM IDs. FF-A spec also support stream
* endpoint ids.
*/
typedef uint16_t ffa_endpoint_id16_t;
/**
* struct ffa_cons_mrd - Constituent memory region descriptor
* @address:
* Start address of contiguous memory region. Must be 4K page aligned.
* @page_count:
* Number of 4K pages in region.
* @reserved_12_15:
* Reserve bytes 12-15 to pad struct size to 16 bytes.
*/
struct ffa_cons_mrd {
uint64_t address;
uint32_t page_count;
uint32_t reserved_12_15;
};
CASSERT(sizeof(struct ffa_cons_mrd) == 16, assert_ffa_cons_mrd_size_mismatch);
/**
* struct ffa_comp_mrd - Composite memory region descriptor
* @total_page_count:
* Number of 4k pages in memory region. Must match sum of
* @address_range_array[].page_count.
* @address_range_count:
* Number of entries in @address_range_array.
* @reserved_8_15:
* Reserve bytes 8-15 to pad struct size to 16 byte alignment and
* make @address_range_array 16 byte aligned.
* @address_range_array:
* Array of &struct ffa_cons_mrd entries.
*/
struct ffa_comp_mrd {
uint32_t total_page_count;
uint32_t address_range_count;
uint64_t reserved_8_15;
struct ffa_cons_mrd address_range_array[];
};
CASSERT(sizeof(struct ffa_comp_mrd) == 16, assert_ffa_comp_mrd_size_mismatch);
/**
* typedef ffa_mem_attr8_t - Memory region attributes v1.0.
* typedef ffa_mem_attr16_t - Memory region attributes v1.1.
*
* * @FFA_MEM_ATTR_NS_BIT:
* Memory security state.
* * @FFA_MEM_ATTR_DEVICE_NGNRNE:
* Device-nGnRnE.
* * @FFA_MEM_ATTR_DEVICE_NGNRE:
* Device-nGnRE.
* * @FFA_MEM_ATTR_DEVICE_NGRE:
* Device-nGRE.
* * @FFA_MEM_ATTR_DEVICE_GRE:
* Device-GRE.
* * @FFA_MEM_ATTR_NORMAL_MEMORY_UNCACHED
* Normal memory. Non-cacheable.
* * @FFA_MEM_ATTR_NORMAL_MEMORY_CACHED_WB
* Normal memory. Write-back cached.
* * @FFA_MEM_ATTR_NON_SHAREABLE
* Non-shareable. Combine with FFA_MEM_ATTR_NORMAL_MEMORY_*.
* * @FFA_MEM_ATTR_OUTER_SHAREABLE
* Outer Shareable. Combine with FFA_MEM_ATTR_NORMAL_MEMORY_*.
* * @FFA_MEM_ATTR_INNER_SHAREABLE
* Inner Shareable. Combine with FFA_MEM_ATTR_NORMAL_MEMORY_*.
*/
typedef uint8_t ffa_mem_attr8_t;
typedef uint16_t ffa_mem_attr16_t;
#define FFA_MEM_ATTR_NS_BIT (0x1U << 6)
#define FFA_MEM_ATTR_DEVICE_NGNRNE ((1U << 4) | (0x0U << 2))
#define FFA_MEM_ATTR_DEVICE_NGNRE ((1U << 4) | (0x1U << 2))
#define FFA_MEM_ATTR_DEVICE_NGRE ((1U << 4) | (0x2U << 2))
#define FFA_MEM_ATTR_DEVICE_GRE ((1U << 4) | (0x3U << 2))
#define FFA_MEM_ATTR_NORMAL_MEMORY_UNCACHED ((2U << 4) | (0x1U << 2))
#define FFA_MEM_ATTR_NORMAL_MEMORY_CACHED_WB ((2U << 4) | (0x3U << 2))
#define FFA_MEM_ATTR_NON_SHAREABLE (0x0U << 0)
#define FFA_MEM_ATTR_OUTER_SHAREABLE (0x2U << 0)
#define FFA_MEM_ATTR_INNER_SHAREABLE (0x3U << 0)
/**
* typedef ffa_mem_perm8_t - Memory access permissions
*
* * @FFA_MEM_ATTR_RO
* Request or specify read-only mapping.
* * @FFA_MEM_ATTR_RW
* Request or allow read-write mapping.
* * @FFA_MEM_PERM_NX
* Deny executable mapping.
* * @FFA_MEM_PERM_X
* Request executable mapping.
*/
typedef uint8_t ffa_mem_perm8_t;
#define FFA_MEM_PERM_RO (1U << 0)
#define FFA_MEM_PERM_RW (1U << 1)
#define FFA_MEM_PERM_NX (1U << 2)
#define FFA_MEM_PERM_X (1U << 3)
/**
* typedef ffa_mem_flag8_t - Endpoint memory flags
*
* * @FFA_MEM_FLAG_NON_RETRIEVAL_BORROWER
* Non-retrieval Borrower. Memory region must not be or was not retrieved on
* behalf of this endpoint.
*/
typedef uint8_t ffa_mem_flag8_t;
#define FFA_MEM_FLAG_NON_RETRIEVAL_BORROWER (1U << 0)
/**
* typedef ffa_mtd_flag32_t - Memory transaction descriptor flags
*
* * @FFA_MTD_FLAG_ZERO_MEMORY
* Zero memory after unmapping from sender (must be 0 for share).
* * @FFA_MTD_FLAG_TIME_SLICING
* Not supported by this implementation.
* * @FFA_MTD_FLAG_ZERO_MEMORY_AFTER_RELINQUISH
* Zero memory after unmapping from borrowers (must be 0 for share).
* * @FFA_MTD_FLAG_TYPE_MASK
* Bit-mask to extract memory management transaction type from flags.
* * @FFA_MTD_FLAG_TYPE_SHARE_MEMORY
* Share memory transaction flag.
* Used by @SMC_FC_FFA_MEM_RETRIEVE_RESP to indicate that memory came from
* @SMC_FC_FFA_MEM_SHARE and by @SMC_FC_FFA_MEM_RETRIEVE_REQ to specify that
* it must have.
* * @FFA_MTD_FLAG_ADDRESS_RANGE_ALIGNMENT_HINT_MASK
* Not supported by this implementation.
*/
typedef uint32_t ffa_mtd_flag32_t;
#define FFA_MTD_FLAG_ZERO_MEMORY (1U << 0)
#define FFA_MTD_FLAG_TIME_SLICING (1U << 1)
#define FFA_MTD_FLAG_ZERO_MEMORY_AFTER_RELINQUISH (1U << 2)
#define FFA_MTD_FLAG_TYPE_MASK (3U << 3)
#define FFA_MTD_FLAG_TYPE_SHARE_MEMORY (1U << 3)
#define FFA_MTD_FLAG_TYPE_LEND_MEMORY (1U << 4)
#define FFA_MTD_FLAG_ADDRESS_RANGE_ALIGNMENT_HINT_MASK (0x1FU << 5)
/**
* struct ffa_mapd - Memory access permissions descriptor
* @endpoint_id:
* Endpoint id that @memory_access_permissions and @flags apply to.
* (&typedef ffa_endpoint_id16_t).
* @memory_access_permissions:
* FFA_MEM_PERM_* values or'ed together (&typedef ffa_mem_perm8_t).
* @flags:
* FFA_MEM_FLAG_* values or'ed together (&typedef ffa_mem_flag8_t).
*/
struct ffa_mapd {
ffa_endpoint_id16_t endpoint_id;
ffa_mem_perm8_t memory_access_permissions;
ffa_mem_flag8_t flags;
};
CASSERT(sizeof(struct ffa_mapd) == 4, assert_ffa_mapd_size_mismatch);
/**
* struct ffa_emad_v1_0 - Endpoint memory access descriptor.
* @mapd: &struct ffa_mapd.
* @comp_mrd_offset:
* Offset of &struct ffa_comp_mrd from start of &struct ffa_mtd_v1_0.
* @reserved_8_15:
* Reserved bytes 8-15. Must be 0.
*/
struct ffa_emad_v1_0 {
struct ffa_mapd mapd;
uint32_t comp_mrd_offset;
uint64_t reserved_8_15;
};
CASSERT(sizeof(struct ffa_emad_v1_0) == 16, assert_ffa_emad_v1_0_size_mismatch);
/**
* struct ffa_mtd_v1_0 - Memory transaction descriptor.
* @sender_id:
* Sender endpoint id.
* @memory_region_attributes:
* FFA_MEM_ATTR_* values or'ed together (&typedef ffa_mem_attr8_t).
* @reserved_3:
* Reserved bytes 3. Must be 0.
* @flags:
* FFA_MTD_FLAG_* values or'ed together (&typedef ffa_mtd_flag32_t).
* @handle:
* Id of shared memory object. Must be 0 for MEM_SHARE or MEM_LEND.
* @tag: Client allocated tag. Must match original value.
* @reserved_24_27:
* Reserved bytes 24-27. Must be 0.
* @emad_count:
* Number of entries in @emad.
* @emad:
* Endpoint memory access descriptor array (see @struct ffa_emad_v1_0).
*/
struct ffa_mtd_v1_0 {
ffa_endpoint_id16_t sender_id;
ffa_mem_attr8_t memory_region_attributes;
uint8_t reserved_3;
ffa_mtd_flag32_t flags;
uint64_t handle;
uint64_t tag;
uint32_t reserved_24_27;
uint32_t emad_count;
struct ffa_emad_v1_0 emad[];
};
CASSERT(sizeof(struct ffa_mtd_v1_0) == 32, assert_ffa_mtd_size_v1_0_mismatch);
/**
* struct ffa_mtd - Memory transaction descriptor for FF-A v1.1.
* @sender_id:
* Sender endpoint id.
* @memory_region_attributes:
* FFA_MEM_ATTR_* values or'ed together (&typedef ffa_mem_attr16_t).
* @flags:
* FFA_MTD_FLAG_* values or'ed together (&typedef ffa_mtd_flag32_t).
* @handle:
* Id of shared memory object. Must be 0 for MEM_SHARE or MEM_LEND.
* @tag: Client allocated tag. Must match original value.
* @emad_size:
* Size of the emad descriptor.
* @emad_count:
* Number of entries in the emad array.
* @emad_offset:
* Offset from the beginning of the descriptor to the location of the
* memory access descriptor array (see @struct ffa_emad_v1_0).
* @reserved_36_39:
* Reserved bytes 36-39. Must be 0.
* @reserved_40_47:
* Reserved bytes 44-47. Must be 0.
*/
struct ffa_mtd {
ffa_endpoint_id16_t sender_id;
ffa_mem_attr16_t memory_region_attributes;
ffa_mtd_flag32_t flags;
uint64_t handle;
uint64_t tag;
uint32_t emad_size;
uint32_t emad_count;
uint32_t emad_offset;
uint32_t reserved_36_39;
uint64_t reserved_40_47;
};
CASSERT(sizeof(struct ffa_mtd) == 48, assert_ffa_mtd_size_mismatch);
#endif /* EL3_SPMC_FFA_MEM_H */
@@ -0,0 +1,60 @@
/*
* Copyright (c) 2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef EL3_SP_H
#define EL3_SP_H
#include <common/bl_common.h>
#include <lib/cassert.h>
/*******************************************************************************
* Structure definition, typedefs & constants for the Logical SPs.
******************************************************************************/
typedef uint64_t (*direct_msg_handler)(uint32_t smc_fid, bool secure_origin,
uint64_t x1, uint64_t x2, uint64_t x3,
uint64_t x4, void *cookie, void *handle,
uint64_t flags);
/* Prototype for logical partition initializing function. */
typedef int32_t (*ffa_partition_init_t)(void);
/* Logical Partition Descriptor. */
struct el3_lp_desc {
ffa_partition_init_t init;
uint16_t sp_id;
uint32_t properties;
uint32_t uuid[4]; /* Little Endian. */
direct_msg_handler direct_req;
const char *debug_name;
};
/* Convenience macro to declare a logical partition descriptor. */
#define DECLARE_LOGICAL_PARTITION(_name, _init, _sp_id, _uuid, _properties, \
_direct_req) \
static const struct el3_lp_desc __partition_desc_ ## _name \
__section("el3_lp_descs") __used = { \
.debug_name = #_name, \
.init = (_init), \
.sp_id = (_sp_id), \
.uuid = _uuid, \
.properties = (_properties), \
.direct_req = (_direct_req), \
}
/*******************************************************************************
* Function & variable prototypes.
******************************************************************************/
int el3_sp_desc_validate(void);
uintptr_t handle_el3_sp(uint32_t smc_fid, void *cookie, void *handle,
unsigned int flags);
IMPORT_SYM(uintptr_t, __EL3_LP_DESCS_START__, EL3_LP_DESCS_START);
IMPORT_SYM(uintptr_t, __EL3_LP_DESCS_END__, EL3_LP_DESCS_END);
#define EL3_LP_DESCS_COUNT ((EL3_LP_DESCS_END - EL3_LP_DESCS_START) \
/ sizeof(struct el3_lp_desc))
#endif /* EL3_SP_H */
@@ -0,0 +1,48 @@
/*
* Copyright (c) 2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef ERRATA_ABI_SVC_H
#define ERRATA_ABI_SVC_H
#include <lib/smccc.h>
#define ARM_EM_VERSION U(0x840000F0)
#define ARM_EM_FEATURES U(0x840000F1)
#define ARM_EM_CPU_ERRATUM_FEATURES U(0x840000F2)
/* EM version numbers */
#define EM_VERSION_MAJOR (0x1)
#define EM_VERSION_MINOR (0x0)
/* EM CPU_ERRATUM_FEATURES return codes */
#define EM_HIGHER_EL_MITIGATION (3)
#define EM_NOT_AFFECTED (2)
#define EM_AFFECTED (1)
#define EM_SUCCESS (0)
#define EM_NOT_SUPPORTED (-1)
#define EM_INVALID_PARAMETERS (-2)
#define EM_UNKNOWN_ERRATUM (-3)
#if ERRATA_ABI_SUPPORT
bool is_errata_fid(uint32_t smc_fid);
#else
static inline bool is_errata_fid(uint32_t smc_fid)
{
return false;
}
#endif /* ERRATA_ABI_SUPPORT */
uintptr_t errata_abi_smc_handler(
uint32_t smc_fid,
u_register_t x1,
u_register_t x2,
u_register_t x3,
u_register_t x4,
void *cookie,
void *handle,
u_register_t flags
);
#endif /* ERRATA_ABI_SVC_H */
@@ -0,0 +1,341 @@
/*
* Copyright (c) 2020-2022, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef FFA_SVC_H
#define FFA_SVC_H
#include <stdbool.h>
#include <lib/smccc.h>
#include <lib/utils_def.h>
#include <tools_share/uuid.h>
/* FFA error codes. */
#define FFA_ERROR_NOT_SUPPORTED -1
#define FFA_ERROR_INVALID_PARAMETER -2
#define FFA_ERROR_NO_MEMORY -3
#define FFA_ERROR_BUSY -4
#define FFA_ERROR_INTERRUPTED -5
#define FFA_ERROR_DENIED -6
#define FFA_ERROR_RETRY -7
/* The macros below are used to identify FFA calls from the SMC function ID */
#define FFA_FNUM_MIN_VALUE U(0x60)
#define FFA_FNUM_MAX_VALUE U(0x87)
#define is_ffa_fid(fid) __extension__ ({ \
__typeof__(fid) _fid = (fid); \
((GET_SMC_NUM(_fid) >= FFA_FNUM_MIN_VALUE) && \
(GET_SMC_NUM(_fid) <= FFA_FNUM_MAX_VALUE)); })
/* FFA_VERSION helpers */
#define FFA_VERSION_MAJOR U(1)
#define FFA_VERSION_MAJOR_SHIFT 16
#define FFA_VERSION_MAJOR_MASK U(0x7FFF)
#define FFA_VERSION_MINOR U(1)
#define FFA_VERSION_MINOR_SHIFT 0
#define FFA_VERSION_MINOR_MASK U(0xFFFF)
#define FFA_VERSION_BIT31_MASK U(0x1u << 31)
#define FFA_VERSION_MASK U(0xFFFFFFFF)
#define MAKE_FFA_VERSION(major, minor) \
((((major) & FFA_VERSION_MAJOR_MASK) << FFA_VERSION_MAJOR_SHIFT) | \
(((minor) & FFA_VERSION_MINOR_MASK) << FFA_VERSION_MINOR_SHIFT))
#define FFA_VERSION_COMPILED MAKE_FFA_VERSION(FFA_VERSION_MAJOR, \
FFA_VERSION_MINOR)
/* FFA_MSG_SEND helpers */
#define FFA_MSG_SEND_ATTRS_BLK_SHIFT U(0)
#define FFA_MSG_SEND_ATTRS_BLK_MASK U(0x1)
#define FFA_MSG_SEND_ATTRS_BLK U(0)
#define FFA_MSG_SEND_ATTRS_BLK_NOT U(1)
#define FFA_MSG_SEND_ATTRS(blk) \
(((blk) & FFA_MSG_SEND_ATTRS_BLK_MASK) \
<< FFA_MSG_SEND_ATTRS_BLK_SHIFT)
/* Defines for FF-A framework messages exchanged using direct messages. */
#define FFA_FWK_MSG_BIT BIT(31)
#define FFA_FWK_MSG_MASK 0xFF
#define FFA_FWK_MSG_PSCI U(0x0)
/* Defines for FF-A power management messages framework messages. */
#define FFA_PM_MSG_WB_REQ U(0x1) /* Warm boot request. */
#define FFA_PM_MSG_PM_RESP U(0x2) /* Response to PSCI or warmboot req. */
/* FF-A warm boot types. */
#define FFA_WB_TYPE_S2RAM 0x0
#define FFA_WB_TYPE_NOTS2RAM 0x1
/* Get FFA fastcall std FID from function number */
#define FFA_FID(smc_cc, func_num) \
((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT) | \
((smc_cc) << FUNCID_CC_SHIFT) | \
(OEN_STD_START << FUNCID_OEN_SHIFT) | \
((func_num) << FUNCID_NUM_SHIFT))
/* FFA function numbers */
#define FFA_FNUM_ERROR U(0x60)
#define FFA_FNUM_SUCCESS U(0x61)
#define FFA_FNUM_INTERRUPT U(0x62)
#define FFA_FNUM_VERSION U(0x63)
#define FFA_FNUM_FEATURES U(0x64)
#define FFA_FNUM_RX_RELEASE U(0x65)
#define FFA_FNUM_RXTX_MAP U(0x66)
#define FFA_FNUM_RXTX_UNMAP U(0x67)
#define FFA_FNUM_PARTITION_INFO_GET U(0x68)
#define FFA_FNUM_ID_GET U(0x69)
#define FFA_FNUM_MSG_POLL U(0x6A) /* Legacy FF-A v1.0 */
#define FFA_FNUM_MSG_WAIT U(0x6B)
#define FFA_FNUM_MSG_YIELD U(0x6C)
#define FFA_FNUM_MSG_RUN U(0x6D)
#define FFA_FNUM_MSG_SEND U(0x6E) /* Legacy FF-A v1.0 */
#define FFA_FNUM_MSG_SEND_DIRECT_REQ U(0x6F)
#define FFA_FNUM_MSG_SEND_DIRECT_RESP U(0x70)
#define FFA_FNUM_MEM_DONATE U(0x71)
#define FFA_FNUM_MEM_LEND U(0x72)
#define FFA_FNUM_MEM_SHARE U(0x73)
#define FFA_FNUM_MEM_RETRIEVE_REQ U(0x74)
#define FFA_FNUM_MEM_RETRIEVE_RESP U(0x75)
#define FFA_FNUM_MEM_RELINQUISH U(0x76)
#define FFA_FNUM_MEM_RECLAIM U(0x77)
#define FFA_FNUM_MEM_FRAG_RX U(0x7A)
#define FFA_FNUM_MEM_FRAG_TX U(0x7B)
#define FFA_FNUM_NORMAL_WORLD_RESUME U(0x7C)
/* FF-A v1.1 */
#define FFA_FNUM_NOTIFICATION_BITMAP_CREATE U(0x7D)
#define FFA_FNUM_NOTIFICATION_BITMAP_DESTROY U(0x7E)
#define FFA_FNUM_NOTIFICATION_BIND U(0x7F)
#define FFA_FNUM_NOTIFICATION_UNBIND U(0x80)
#define FFA_FNUM_NOTIFICATION_SET U(0x81)
#define FFA_FNUM_NOTIFICATION_GET U(0x82)
#define FFA_FNUM_NOTIFICATION_INFO_GET U(0x83)
#define FFA_FNUM_RX_ACQUIRE U(0x84)
#define FFA_FNUM_SPM_ID_GET U(0x85)
#define FFA_FNUM_MSG_SEND2 U(0x86)
#define FFA_FNUM_SECONDARY_EP_REGISTER U(0x87)
/* FFA SMC32 FIDs */
#define FFA_ERROR FFA_FID(SMC_32, FFA_FNUM_ERROR)
#define FFA_SUCCESS_SMC32 FFA_FID(SMC_32, FFA_FNUM_SUCCESS)
#define FFA_INTERRUPT FFA_FID(SMC_32, FFA_FNUM_INTERRUPT)
#define FFA_VERSION FFA_FID(SMC_32, FFA_FNUM_VERSION)
#define FFA_FEATURES FFA_FID(SMC_32, FFA_FNUM_FEATURES)
#define FFA_RX_RELEASE FFA_FID(SMC_32, FFA_FNUM_RX_RELEASE)
#define FFA_RX_ACQUIRE FFA_FID(SMC_32, FFA_FNUM_RX_ACQUIRE)
#define FFA_RXTX_MAP_SMC32 FFA_FID(SMC_32, FFA_FNUM_RXTX_MAP)
#define FFA_RXTX_UNMAP FFA_FID(SMC_32, FFA_FNUM_RXTX_UNMAP)
#define FFA_PARTITION_INFO_GET FFA_FID(SMC_32, FFA_FNUM_PARTITION_INFO_GET)
#define FFA_ID_GET FFA_FID(SMC_32, FFA_FNUM_ID_GET)
#define FFA_MSG_POLL FFA_FID(SMC_32, FFA_FNUM_MSG_POLL)
#define FFA_MSG_WAIT FFA_FID(SMC_32, FFA_FNUM_MSG_WAIT)
#define FFA_MSG_YIELD FFA_FID(SMC_32, FFA_FNUM_MSG_YIELD)
#define FFA_MSG_RUN FFA_FID(SMC_32, FFA_FNUM_MSG_RUN)
#define FFA_MSG_SEND FFA_FID(SMC_32, FFA_FNUM_MSG_SEND)
#define FFA_MSG_SEND2 FFA_FID(SMC_32, FFA_FNUM_MSG_SEND2)
#define FFA_MSG_SEND_DIRECT_REQ_SMC32 \
FFA_FID(SMC_32, FFA_FNUM_MSG_SEND_DIRECT_REQ)
#define FFA_MSG_SEND_DIRECT_RESP_SMC32 \
FFA_FID(SMC_32, FFA_FNUM_MSG_SEND_DIRECT_RESP)
#define FFA_MEM_DONATE_SMC32 FFA_FID(SMC_32, FFA_FNUM_MEM_DONATE)
#define FFA_MEM_LEND_SMC32 FFA_FID(SMC_32, FFA_FNUM_MEM_LEND)
#define FFA_MEM_SHARE_SMC32 FFA_FID(SMC_32, FFA_FNUM_MEM_SHARE)
#define FFA_MEM_RETRIEVE_REQ_SMC32 \
FFA_FID(SMC_32, FFA_FNUM_MEM_RETRIEVE_REQ)
#define FFA_MEM_RETRIEVE_RESP FFA_FID(SMC_32, FFA_FNUM_MEM_RETRIEVE_RESP)
#define FFA_MEM_RELINQUISH FFA_FID(SMC_32, FFA_FNUM_MEM_RELINQUISH)
#define FFA_MEM_RECLAIM FFA_FID(SMC_32, FFA_FNUM_MEM_RECLAIM)
#define FFA_NOTIFICATION_BITMAP_CREATE \
FFA_FID(SMC_32, FFA_FNUM_NOTIFICATION_BITMAP_CREATE)
#define FFA_NOTIFICATION_BITMAP_DESTROY \
FFA_FID(SMC_32, FFA_FNUM_NOTIFICATION_BITMAP_DESTROY)
#define FFA_NOTIFICATION_BIND FFA_FID(SMC_32, FFA_FNUM_NOTIFICATION_BIND)
#define FFA_NOTIFICATION_UNBIND FFA_FID(SMC_32, FFA_FNUM_NOTIFICATION_UNBIND)
#define FFA_NOTIFICATION_SET FFA_FID(SMC_32, FFA_FNUM_NOTIFICATION_SET)
#define FFA_NOTIFICATION_GET FFA_FID(SMC_32, FFA_FNUM_NOTIFICATION_GET)
#define FFA_NOTIFICATION_INFO_GET \
FFA_FID(SMC_32, FFA_FNUM_NOTIFICATION_INFO_GET)
#define FFA_MEM_FRAG_RX FFA_FID(SMC_32, FFA_FNUM_MEM_FRAG_RX)
#define FFA_MEM_FRAG_TX FFA_FID(SMC_32, FFA_FNUM_MEM_FRAG_TX)
#define FFA_SPM_ID_GET FFA_FID(SMC_32, FFA_FNUM_SPM_ID_GET)
#define FFA_NORMAL_WORLD_RESUME FFA_FID(SMC_32, FFA_FNUM_NORMAL_WORLD_RESUME)
/* FFA SMC64 FIDs */
#define FFA_ERROR_SMC64 FFA_FID(SMC_64, FFA_FNUM_ERROR)
#define FFA_SUCCESS_SMC64 FFA_FID(SMC_64, FFA_FNUM_SUCCESS)
#define FFA_RXTX_MAP_SMC64 FFA_FID(SMC_64, FFA_FNUM_RXTX_MAP)
#define FFA_MSG_SEND_DIRECT_REQ_SMC64 \
FFA_FID(SMC_64, FFA_FNUM_MSG_SEND_DIRECT_REQ)
#define FFA_MSG_SEND_DIRECT_RESP_SMC64 \
FFA_FID(SMC_64, FFA_FNUM_MSG_SEND_DIRECT_RESP)
#define FFA_MEM_DONATE_SMC64 FFA_FID(SMC_64, FFA_FNUM_MEM_DONATE)
#define FFA_MEM_LEND_SMC64 FFA_FID(SMC_64, FFA_FNUM_MEM_LEND)
#define FFA_MEM_SHARE_SMC64 FFA_FID(SMC_64, FFA_FNUM_MEM_SHARE)
#define FFA_MEM_RETRIEVE_REQ_SMC64 \
FFA_FID(SMC_64, FFA_FNUM_MEM_RETRIEVE_REQ)
#define FFA_SECONDARY_EP_REGISTER_SMC64 \
FFA_FID(SMC_64, FFA_FNUM_SECONDARY_EP_REGISTER)
#define FFA_NOTIFICATION_INFO_GET_SMC64 \
FFA_FID(SMC_64, FFA_FNUM_NOTIFICATION_INFO_GET)
/*
* FF-A partition properties values.
*/
#define FFA_PARTITION_DIRECT_REQ_RECV U(1 << 0)
#define FFA_PARTITION_DIRECT_REQ_SEND U(1 << 1)
#define FFA_PARTITION_INDIRECT_MSG U(1 << 2)
/*
* Reserve a special value for traffic targeted to the Hypervisor or SPM.
*/
#define FFA_TARGET_INFO_MBZ U(0x0)
/*
* Reserve a special value for MBZ parameters.
*/
#define FFA_PARAM_MBZ U(0x0)
/*
* Maximum FF-A endpoint id value
*/
#define FFA_ENDPOINT_ID_MAX U(1 << 16)
/*
* Reserve endpoint id for the SPMD.
*/
#define SPMD_DIRECT_MSG_ENDPOINT_ID U(FFA_ENDPOINT_ID_MAX - 1)
/* Mask and shift to check valid secure FF-A Endpoint ID. */
#define SPMC_SECURE_ID_MASK U(1)
#define SPMC_SECURE_ID_SHIFT U(15)
/*
* Partition Count Flag in FFA_PARTITION_INFO_GET.
*/
#define FFA_PARTITION_INFO_GET_COUNT_FLAG_MASK U(1 << 0)
/*
* Mask for source and destination endpoint id in
* a direct message request/response.
*/
#define FFA_DIRECT_MSG_ENDPOINT_ID_MASK U(0xffff)
/*
* Bit shift for destination endpoint id in a direct message request/response.
*/
#define FFA_DIRECT_MSG_DESTINATION_SHIFT U(0)
/*
* Bit shift for source endpoint id in a direct message request/response.
*/
#define FFA_DIRECT_MSG_SOURCE_SHIFT U(16)
/******************************************************************************
* ffa_endpoint_destination
*****************************************************************************/
static inline uint16_t ffa_endpoint_destination(unsigned int ep)
{
return (ep >> FFA_DIRECT_MSG_DESTINATION_SHIFT) &
FFA_DIRECT_MSG_ENDPOINT_ID_MASK;
}
/******************************************************************************
* ffa_endpoint_source
*****************************************************************************/
static inline uint16_t ffa_endpoint_source(unsigned int ep)
{
return (ep >> FFA_DIRECT_MSG_SOURCE_SHIFT) &
FFA_DIRECT_MSG_ENDPOINT_ID_MASK;
}
/******************************************************************************
* FF-A helper functions to determine partition ID world.
*****************************************************************************/
/*
* Determine if provided ID is in the secure world.
*/
static inline bool ffa_is_secure_world_id(uint16_t id)
{
return ((id >> SPMC_SECURE_ID_SHIFT) & SPMC_SECURE_ID_MASK) == 1;
}
/*
* Determine if provided ID is in the normal world.
*/
static inline bool ffa_is_normal_world_id(uint16_t id)
{
return !ffa_is_secure_world_id(id);
}
/******************************************************************************
* Boot information protocol as per the FF-A v1.1 spec.
*****************************************************************************/
#define FFA_INIT_DESC_SIGNATURE 0x00000FFA
/* Boot information type. */
#define FFA_BOOT_INFO_TYPE_STD U(0x0)
#define FFA_BOOT_INFO_TYPE_IMPL U(0x1)
#define FFA_BOOT_INFO_TYPE_MASK U(0x1)
#define FFA_BOOT_INFO_TYPE_SHIFT U(0x7)
#define FFA_BOOT_INFO_TYPE(type) \
(((type) & FFA_BOOT_INFO_TYPE_MASK) \
<< FFA_BOOT_INFO_TYPE_SHIFT)
/* Boot information identifier. */
#define FFA_BOOT_INFO_TYPE_ID_FDT U(0x0)
#define FFA_BOOT_INFO_TYPE_ID_HOB U(0x1)
#define FFA_BOOT_INFO_TYPE_ID_MASK U(0x3F)
#define FFA_BOOT_INFO_TYPE_ID_SHIFT U(0x0)
#define FFA_BOOT_INFO_TYPE_ID(type) \
(((type) & FFA_BOOT_INFO_TYPE_ID_MASK) \
<< FFA_BOOT_INFO_TYPE_ID_SHIFT)
/* Format of Flags Name field. */
#define FFA_BOOT_INFO_FLAG_NAME_STRING U(0x0)
#define FFA_BOOT_INFO_FLAG_NAME_UUID U(0x1)
#define FFA_BOOT_INFO_FLAG_NAME_MASK U(0x3)
#define FFA_BOOT_INFO_FLAG_NAME_SHIFT U(0x0)
#define FFA_BOOT_INFO_FLAG_NAME(type) \
(((type) & FFA_BOOT_INFO_FLAG_NAME_MASK)\
<< FFA_BOOT_INFO_FLAG_NAME_SHIFT)
/* Format of Flags Contents field. */
#define FFA_BOOT_INFO_FLAG_CONTENT_ADR U(0x0)
#define FFA_BOOT_INFO_FLAG_CONTENT_VAL U(0x1)
#define FFA_BOOT_INFO_FLAG_CONTENT_MASK U(0x1)
#define FFA_BOOT_INFO_FLAG_CONTENT_SHIFT U(0x2)
#define FFA_BOOT_INFO_FLAG_CONTENT(content) \
(((content) & FFA_BOOT_INFO_FLAG_CONTENT_MASK) \
<< FFA_BOOT_INFO_FLAG_CONTENT_SHIFT)
/* Boot information descriptor. */
struct ffa_boot_info_desc {
uint8_t name[16];
uint8_t type;
uint8_t reserved;
uint16_t flags;
uint32_t size_boot_info;
uint64_t content;
};
/* Boot information header. */
struct ffa_boot_info_header {
uint32_t signature; /* 0xFFA */
uint32_t version;
uint32_t size_boot_info_blob;
uint32_t size_boot_info_desc;
uint32_t count_boot_info_desc;
uint32_t offset_boot_info_desc;
uint64_t reserved;
};
#endif /* FFA_SVC_H */
@@ -0,0 +1,59 @@
/*
* Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef PCI_SVC_H
#define PCI_SVC_H
#include <lib/utils_def.h>
/* SMCCC PCI platform functions */
#define SMC_PCI_VERSION U(0x84000130)
#define SMC_PCI_FEATURES U(0x84000131)
#define SMC_PCI_READ U(0x84000132)
#define SMC_PCI_WRITE U(0x84000133)
#define SMC_PCI_SEG_INFO U(0x84000134)
#define is_pci_fid(_fid) (((_fid) >= SMC_PCI_VERSION) && \
((_fid) <= SMC_PCI_SEG_INFO))
uint64_t pci_smc_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2,
u_register_t x3, u_register_t x4, void *cookie,
void *handle, u_register_t flags);
#define PCI_ADDR_FUN(dev) ((dev) & U(0x7))
#define PCI_ADDR_DEV(dev) (((dev) >> U(3)) & U(0x001F))
#define PCI_ADDR_BUS(dev) (((dev) >> U(8)) & U(0x00FF))
#define PCI_ADDR_SEG(dev) (((dev) >> U(16)) & U(0xFFFF))
#define PCI_OFFSET_MASK U(0xFFF)
typedef union {
struct {
uint16_t minor;
uint16_t major;
} __packed;
uint32_t val;
} pcie_version;
/*
* platforms are responsible for providing implementations of these
* three functions in a manner which conforms to the Arm PCI Configuration
* Space Access Firmware Interface (DEN0115) and the PCIe specification's
* sections on PCI configuration access. See the rpi4_pci_svc.c example.
*/
uint32_t pci_read_config(uint32_t addr, uint32_t off, uint32_t sz, uint32_t *val);
uint32_t pci_write_config(uint32_t addr, uint32_t off, uint32_t sz, uint32_t val);
uint32_t pci_get_bus_for_seg(uint32_t seg, uint32_t *bus_range, uint32_t *nseg);
/* Return codes for Arm PCI Config Space Access Firmware SMC calls */
#define SMC_PCI_CALL_SUCCESS U(0)
#define SMC_PCI_CALL_NOT_SUPPORTED -1
#define SMC_PCI_CALL_INVAL_PARAM -2
#define SMC_PCI_CALL_NOT_IMPL -3
#define SMC_PCI_SZ_8BIT U(1)
#define SMC_PCI_SZ_16BIT U(2)
#define SMC_PCI_SZ_32BIT U(4)
#endif /* PCI_SVC_H */
@@ -0,0 +1,49 @@
/*
* Copyright (c) 2022, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef RMM_CORE_MANIFEST_H
#define RMM_CORE_MANIFEST_H
#include <assert.h>
#include <stddef.h>
#include <stdint.h>
#include <lib/cassert.h>
#define RMMD_MANIFEST_VERSION_MAJOR U(0)
#define RMMD_MANIFEST_VERSION_MINOR U(1)
/*
* Manifest version encoding:
* - Bit[31] RES0
* - Bits [30:16] Major version
* - Bits [15:0] Minor version
*/
#define _RMMD_MANIFEST_VERSION(_major, _minor) \
((((_major) & 0x7FFF) << 16) | ((_minor) & 0xFFFF))
#define RMMD_MANIFEST_VERSION _RMMD_MANIFEST_VERSION( \
RMMD_MANIFEST_VERSION_MAJOR, \
RMMD_MANIFEST_VERSION_MINOR)
#define RMMD_GET_MANIFEST_VERSION_MAJOR(_version) \
((_version >> 16) & 0x7FFF)
#define RMMD_GET_MANIFEST_VERSION_MINOR(_version) \
(_version & 0xFFFF)
/* Boot manifest core structure as per v0.1 */
typedef struct rmm_manifest {
uint32_t version; /* Manifest version */
uintptr_t plat_data; /* Manifest platform data */
} rmm_manifest_t;
CASSERT(offsetof(rmm_manifest_t, version) == 0,
rmm_manifest_t_version_unaligned);
CASSERT(offsetof(rmm_manifest_t, plat_data) == 8,
rmm_manifest_t_plat_data_unaligned);
#endif /* RMM_CORE_MANIFEST_H */
@@ -0,0 +1,188 @@
/*
* Copyright (c) 2021-2022, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef RMMD_SVC_H
#define RMMD_SVC_H
#include <lib/smccc.h>
#include <lib/utils_def.h>
/* STD calls FNUM Min/Max ranges */
#define RMI_FNUM_MIN_VALUE U(0x150)
#define RMI_FNUM_MAX_VALUE U(0x18F)
/* Construct RMI fastcall std FID from offset */
#define SMC64_RMI_FID(_offset) \
((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT) | \
(SMC_64 << FUNCID_CC_SHIFT) | \
(OEN_STD_START << FUNCID_OEN_SHIFT) | \
(((RMI_FNUM_MIN_VALUE + (_offset)) & FUNCID_NUM_MASK) \
<< FUNCID_NUM_SHIFT))
#define is_rmi_fid(fid) __extension__ ({ \
__typeof__(fid) _fid = (fid); \
((GET_SMC_NUM(_fid) >= RMI_FNUM_MIN_VALUE) && \
(GET_SMC_NUM(_fid) <= RMI_FNUM_MAX_VALUE) && \
(GET_SMC_TYPE(_fid) == SMC_TYPE_FAST) && \
(GET_SMC_CC(_fid) == SMC_64) && \
(GET_SMC_OEN(_fid) == OEN_STD_START) && \
((_fid & 0x00FE0000) == 0U)); })
/*
* RMI_FNUM_REQ_COMPLETE is the only function in the RMI range that originates
* from the Realm world and is handled by the RMMD. The RMI functions are
* always invoked by the Normal world, forwarded by RMMD and handled by the
* RMM.
*/
/* 0x18F */
#define RMM_RMI_REQ_COMPLETE SMC64_RMI_FID(U(0x3F))
/* RMM_BOOT_COMPLETE arg0 error codes */
#define E_RMM_BOOT_SUCCESS (0)
#define E_RMM_BOOT_UNKNOWN (-1)
#define E_RMM_BOOT_VERSION_MISMATCH (-2)
#define E_RMM_BOOT_CPUS_OUT_OF_RANGE (-3)
#define E_RMM_BOOT_CPU_ID_OUT_OF_RANGE (-4)
#define E_RMM_BOOT_INVALID_SHARED_BUFFER (-5)
#define E_RMM_BOOT_MANIFEST_VERSION_NOT_SUPPORTED (-6)
#define E_RMM_BOOT_MANIFEST_DATA_ERROR (-7)
/* The SMC in the range 0x8400 0191 - 0x8400 01AF are reserved for RSIs.*/
/*
* EL3 - RMM SMCs used for requesting RMMD services. These SMCs originate in Realm
* world and return to Realm world.
*
* These are allocated from 0x8400 01B0 - 0x8400 01CF in the RMM Service range.
*/
#define RMMD_EL3_FNUM_MIN_VALUE U(0x1B0)
#define RMMD_EL3_FNUM_MAX_VALUE U(0x1CF)
/* Construct RMM_EL3 fastcall std FID from offset */
#define SMC64_RMMD_EL3_FID(_offset) \
((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT) | \
(SMC_64 << FUNCID_CC_SHIFT) | \
(OEN_STD_START << FUNCID_OEN_SHIFT) | \
(((RMMD_EL3_FNUM_MIN_VALUE + (_offset)) & FUNCID_NUM_MASK) \
<< FUNCID_NUM_SHIFT))
/* The macros below are used to identify GTSI calls from the SMC function ID */
#define is_rmmd_el3_fid(fid) __extension__ ({ \
__typeof__(fid) _fid = (fid); \
((GET_SMC_NUM(_fid) >= RMMD_EL3_FNUM_MIN_VALUE) &&\
(GET_SMC_NUM(_fid) <= RMMD_EL3_FNUM_MAX_VALUE) &&\
(GET_SMC_TYPE(_fid) == SMC_TYPE_FAST) && \
(GET_SMC_CC(_fid) == SMC_64) && \
(GET_SMC_OEN(_fid) == OEN_STD_START) && \
((_fid & 0x00FE0000) == 0U)); })
/* 0x1B0 - 0x1B1 */
#define RMM_GTSI_DELEGATE SMC64_RMMD_EL3_FID(U(0))
#define RMM_GTSI_UNDELEGATE SMC64_RMMD_EL3_FID(U(1))
/* Return error codes from RMM-EL3 SMCs */
#define E_RMM_OK 0
#define E_RMM_UNK -1
#define E_RMM_BAD_ADDR -2
#define E_RMM_BAD_PAS -3
#define E_RMM_NOMEM -4
#define E_RMM_INVAL -5
/* Acceptable SHA sizes for Challenge object */
#define SHA256_DIGEST_SIZE 32U
#define SHA384_DIGEST_SIZE 48U
#define SHA512_DIGEST_SIZE 64U
/*
* Retrieve Realm attestation key from EL3. Only P-384 ECC curve key is
* supported. The arguments to this SMC are :
* arg0 - Function ID.
* arg1 - Realm attestation key buffer Physical address.
* arg2 - Realm attestation key buffer size (in bytes).
* arg3 - The type of the elliptic curve to which the requested
* attestation key belongs to. The value should be one of the
* defined curve types.
* The return arguments are :
* ret0 - Status / error.
* ret1 - Size of the realm attestation key if successful.
*/
/* 0x1B2 */
#define RMM_ATTEST_GET_REALM_KEY SMC64_RMMD_EL3_FID(U(2))
/*
* Retrieve Platform token from EL3.
* The arguments to this SMC are :
* arg0 - Function ID.
* arg1 - Platform attestation token buffer Physical address. (The challenge
* object is passed in this buffer.)
* arg2 - Platform attestation token buffer size (in bytes).
* arg3 - Challenge object size (in bytes). It has to be one of the defined
* SHA hash sizes.
* The return arguments are :
* ret0 - Status / error.
* ret1 - Size of the platform token if successful.
*/
/* 0x1B3 */
#define RMM_ATTEST_GET_PLAT_TOKEN SMC64_RMMD_EL3_FID(U(3))
/* ECC Curve types for attest key generation */
#define ATTEST_KEY_CURVE_ECC_SECP384R1 0
/*
* RMM_BOOT_COMPLETE originates on RMM when the boot finishes (either cold
* or warm boot). This is handled by the RMM-EL3 interface SMC handler.
*
* RMM_BOOT_COMPLETE FID is located at the end of the available range.
*/
/* 0x1CF */
#define RMM_BOOT_COMPLETE SMC64_RMMD_EL3_FID(U(0x1F))
/*
* The major version number of the RMM Boot Interface implementation.
* Increase this whenever the semantics of the boot arguments change making it
* backwards incompatible.
*/
#define RMM_EL3_IFC_VERSION_MAJOR (U(0))
/*
* The minor version number of the RMM Boot Interface implementation.
* Increase this when a bug is fixed, or a feature is added without
* breaking compatibility.
*/
#define RMM_EL3_IFC_VERSION_MINOR (U(1))
#define RMM_EL3_INTERFACE_VERSION \
(((RMM_EL3_IFC_VERSION_MAJOR << 16) & 0x7FFFF) | \
RMM_EL3_IFC_VERSION_MINOR)
#define RMM_EL3_IFC_VERSION_GET_MAJOR(_version) (((_version) >> 16) \
& 0x7FFF)
#define RMM_EL3_IFC_VERSION_GET_MAJOR_MINOR(_version) ((_version) & 0xFFFF)
#ifndef __ASSEMBLER__
#include <stdint.h>
int rmmd_setup(void);
uint64_t rmmd_rmi_handler(uint32_t smc_fid,
uint64_t x1,
uint64_t x2,
uint64_t x3,
uint64_t x4,
void *cookie,
void *handle,
uint64_t flags);
uint64_t rmmd_rmm_el3_handler(uint32_t smc_fid,
uint64_t x1,
uint64_t x2,
uint64_t x3,
uint64_t x4,
void *cookie,
void *handle,
uint64_t flags);
#endif /* __ASSEMBLER__ */
#endif /* RMMD_SVC_H */
@@ -0,0 +1,143 @@
/*
* Copyright (c) 2017-2022, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef SDEI_H
#define SDEI_H
#include <lib/spinlock.h>
#include <lib/utils_def.h>
#include <services/sdei_flags.h>
/* Range 0xC4000020 - 0xC400003F reserved for SDE 64bit smc calls */
#define SDEI_VERSION 0xC4000020U
#define SDEI_EVENT_REGISTER 0xC4000021U
#define SDEI_EVENT_ENABLE 0xC4000022U
#define SDEI_EVENT_DISABLE 0xC4000023U
#define SDEI_EVENT_CONTEXT 0xC4000024U
#define SDEI_EVENT_COMPLETE 0xC4000025U
#define SDEI_EVENT_COMPLETE_AND_RESUME 0xC4000026U
#define SDEI_EVENT_UNREGISTER 0xC4000027U
#define SDEI_EVENT_STATUS 0xC4000028U
#define SDEI_EVENT_GET_INFO 0xC4000029U
#define SDEI_EVENT_ROUTING_SET 0xC400002AU
#define SDEI_PE_MASK 0xC400002BU
#define SDEI_PE_UNMASK 0xC400002CU
#define SDEI_INTERRUPT_BIND 0xC400002DU
#define SDEI_INTERRUPT_RELEASE 0xC400002EU
#define SDEI_EVENT_SIGNAL 0xC400002FU
#define SDEI_FEATURES 0xC4000030U
#define SDEI_PRIVATE_RESET 0xC4000031U
#define SDEI_SHARED_RESET 0xC4000032U
/* SDEI_EVENT_REGISTER flags */
#define SDEI_REGF_RM_ANY 0ULL
#define SDEI_REGF_RM_PE 1ULL
/* SDEI_EVENT_COMPLETE status flags */
#define SDEI_EV_HANDLED 0U
#define SDEI_EV_FAILED 1U
/* Indices of private and shared mappings */
#define SDEI_MAP_IDX_PRIV_ 0U
#define SDEI_MAP_IDX_SHRD_ 1U
#define SDEI_MAP_IDX_MAX_ 2U
/* The macros below are used to identify SDEI calls from the SMC function ID */
#define SDEI_FID_MASK U(0xffe0)
#define SDEI_FID_VALUE U(0x20)
#define is_sdei_fid(_fid) \
((((_fid) & SDEI_FID_MASK) == SDEI_FID_VALUE) && \
(((_fid >> FUNCID_CC_SHIFT) & FUNCID_CC_MASK) == SMC_64))
#define SDEI_EVENT_MAP(_event, _intr, _flags) \
{ \
.ev_num = (_event), \
.intr = (_intr), \
.map_flags = (_flags) \
}
#define SDEI_SHARED_EVENT(_event, _intr, _flags) \
SDEI_EVENT_MAP(_event, _intr, _flags)
#define SDEI_PRIVATE_EVENT(_event, _intr, _flags) \
SDEI_EVENT_MAP(_event, _intr, (_flags) | SDEI_MAPF_PRIVATE)
#define SDEI_DEFINE_EVENT_0(_intr) \
SDEI_PRIVATE_EVENT(SDEI_EVENT_0, (_intr), SDEI_MAPF_SIGNALABLE)
#define SDEI_EXPLICIT_EVENT(_event, _pri) \
SDEI_EVENT_MAP((_event), 0, (_pri) | SDEI_MAPF_EXPLICIT | SDEI_MAPF_PRIVATE)
/*
* Declare shared and private entries for each core. Also declare a global
* structure containing private and share entries.
*
* This macro must be used in the same file as the platform SDEI mappings are
* declared. Only then would ARRAY_SIZE() yield a meaningful value.
*/
#define REGISTER_SDEI_MAP(_private, _shared) \
sdei_entry_t sdei_private_event_table \
[PLATFORM_CORE_COUNT * ARRAY_SIZE(_private)]; \
sdei_entry_t sdei_shared_event_table[ARRAY_SIZE(_shared)]; \
const sdei_mapping_t sdei_global_mappings[] = { \
[SDEI_MAP_IDX_PRIV_] = { \
.map = (_private), \
.num_maps = ARRAY_SIZE(_private) \
}, \
[SDEI_MAP_IDX_SHRD_] = { \
.map = (_shared), \
.num_maps = ARRAY_SIZE(_shared) \
}, \
}
typedef uint8_t sdei_state_t;
/* Runtime data of SDEI event */
typedef struct sdei_entry {
uint64_t ep; /* Entry point */
uint64_t arg; /* Entry point argument */
uint64_t affinity; /* Affinity of shared event */
unsigned int reg_flags; /* Registration flags */
/* Event handler states: registered, enabled, running */
sdei_state_t state;
} sdei_entry_t;
/* Mapping of SDEI events to interrupts, and associated data */
typedef struct sdei_ev_map {
int32_t ev_num; /* Event number */
unsigned int intr; /* Physical interrupt number for a bound map */
unsigned int map_flags; /* Mapping flags, see SDEI_MAPF_* */
int reg_count; /* Registration count */
spinlock_t lock; /* Per-event lock */
} sdei_ev_map_t;
typedef struct sdei_mapping {
sdei_ev_map_t *map;
size_t num_maps;
} sdei_mapping_t;
/* Handler to be called to handle SDEI smc calls */
uint64_t sdei_smc_handler(uint32_t smc_fid,
uint64_t x1,
uint64_t x2,
uint64_t x3,
uint64_t x4,
void *cookie,
void *handle,
uint64_t flags);
void sdei_init(void);
/* Public API to dispatch an event to Normal world */
int sdei_dispatch_event(int ev_num);
/* Public API to check how many SDEI events are registered. */
int sdei_get_registered_event_count(void);
#endif /* SDEI_H */
@@ -0,0 +1,56 @@
/*
* Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef SDEI_FLAGS_H
#define SDEI_FLAGS_H
#include <lib/utils_def.h>
/* Internal: SDEI flag bit positions */
#define SDEI_MAPF_DYNAMIC_SHIFT_ 1U
#define SDEI_MAPF_BOUND_SHIFT_ 2U
#define SDEI_MAPF_SIGNALABLE_SHIFT_ 3U
#define SDEI_MAPF_PRIVATE_SHIFT_ 4U
#define SDEI_MAPF_CRITICAL_SHIFT_ 5U
#define SDEI_MAPF_EXPLICIT_SHIFT_ 6U
/* SDEI event 0 */
#define SDEI_EVENT_0 0
/* Placeholder interrupt for dynamic mapping */
#define SDEI_DYN_IRQ 0U
/* SDEI flags */
/*
* These flags determine whether or not an event can be associated with an
* interrupt. Static events are permanently associated with an interrupt, and
* can't be changed at runtime. Association of dynamic events with interrupts
* can be changed at run time using the SDEI_INTERRUPT_BIND and
* SDEI_INTERRUPT_RELEASE calls.
*
* SDEI_MAPF_DYNAMIC only indicates run time configurability, where as
* SDEI_MAPF_BOUND indicates interrupt association. For example:
*
* - Calling SDEI_INTERRUPT_BIND on a dynamic event will have both
* SDEI_MAPF_DYNAMIC and SDEI_MAPF_BOUND set.
*
* - Statically-bound events will always have SDEI_MAPF_BOUND set, and neither
* SDEI_INTERRUPT_BIND nor SDEI_INTERRUPT_RELEASE can be called on them.
*
* See also the is_map_bound() macro.
*/
#define SDEI_MAPF_DYNAMIC BIT(SDEI_MAPF_DYNAMIC_SHIFT_)
#define SDEI_MAPF_BOUND BIT(SDEI_MAPF_BOUND_SHIFT_)
#define SDEI_MAPF_EXPLICIT BIT(SDEI_MAPF_EXPLICIT_SHIFT_)
#define SDEI_MAPF_SIGNALABLE BIT(SDEI_MAPF_SIGNALABLE_SHIFT_)
#define SDEI_MAPF_PRIVATE BIT(SDEI_MAPF_PRIVATE_SHIFT_)
#define SDEI_MAPF_NORMAL 0
#define SDEI_MAPF_CRITICAL BIT(SDEI_MAPF_CRITICAL_SHIFT_)
#endif /* SDEI_FLAGS_H */
@@ -0,0 +1,53 @@
/*
* Copyright (c) 2020, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef SPM_CORE_MANIFEST_H
#define SPM_CORE_MANIFEST_H
#include <stdint.h>
/*******************************************************************************
* Attribute Section
******************************************************************************/
typedef struct spm_core_manifest_sect_attribute {
/*
* FFA version (mandatory).
*/
uint32_t major_version;
uint32_t minor_version;
/*
* Run-Time Execution state (optional):
* - 0: AArch64 (default)
* - 1: AArch32
*/
uint32_t exec_state;
/*
* Address of binary image containing SPM Core (optional).
*/
uint64_t load_address;
/*
* Offset from the base of the partition's binary image to the entry
* point of the partition (optional).
*/
uint64_t entrypoint;
/*
* Size of binary image containing SPM Core in bytes (mandatory).
*/
uint32_t binary_size;
/*
* ID of the SPMC (mandatory)
*/
uint16_t spmc_id;
} spmc_manifest_attribute_t;
#endif /* SPM_CORE_MANIFEST_H */
@@ -0,0 +1,50 @@
/*
* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef SPM_MM_PARTITION_H
#define SPM_MM_PARTITION_H
#include <stdint.h>
#include <lib/utils_def.h>
/*
* Flags used by the spm_mm_mp_info structure to describe the
* characteristics of a cpu. Only a single flag is defined at the moment to
* indicate the primary cpu.
*/
#define MP_INFO_FLAG_PRIMARY_CPU U(0x00000001)
/*
* This structure is used to provide information required to initialise a S-EL0
* partition.
*/
typedef struct spm_mm_mp_info {
uint64_t mpidr;
uint32_t linear_id;
uint32_t flags;
} spm_mm_mp_info_t;
typedef struct spm_mm_boot_info {
param_header_t h;
uint64_t sp_mem_base;
uint64_t sp_mem_limit;
uint64_t sp_image_base;
uint64_t sp_stack_base;
uint64_t sp_heap_base;
uint64_t sp_ns_comm_buf_base;
uint64_t sp_shared_buf_base;
uint64_t sp_image_size;
uint64_t sp_pcpu_stack_size;
uint64_t sp_heap_size;
uint64_t sp_ns_comm_buf_size;
uint64_t sp_shared_buf_size;
uint32_t num_sp_mem_regions;
uint32_t num_cpus;
spm_mm_mp_info_t *mp_info;
} spm_mm_boot_info_t;
#endif /* SPM_MM_PARTITION_H */
@@ -0,0 +1,114 @@
/*
* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef SPM_MM_SVC_H
#define SPM_MM_SVC_H
#include <lib/utils_def.h>
/*
* The MM_VERSION_XXX definitions are used when responding to the
* MM_VERSION_AARCH32 service request. The version returned is different between
* this request and the SPM_MM_VERSION_AARCH32 request - both have been retained
* for compatibility.
*/
#define MM_VERSION_MAJOR U(1)
#define MM_VERSION_MAJOR_SHIFT 16
#define MM_VERSION_MAJOR_MASK U(0x7FFF)
#define MM_VERSION_MINOR U(0)
#define MM_VERSION_MINOR_SHIFT 0
#define MM_VERSION_MINOR_MASK U(0xFFFF)
#define MM_VERSION_FORM(major, minor) ((major << MM_VERSION_MAJOR_SHIFT) | \
(minor))
#define MM_VERSION_COMPILED MM_VERSION_FORM(MM_VERSION_MAJOR, \
MM_VERSION_MINOR)
#define SPM_MM_VERSION_MAJOR U(0)
#define SPM_MM_VERSION_MAJOR_SHIFT 16
#define SPM_MM_VERSION_MAJOR_MASK U(0x7FFF)
#define SPM_MM_VERSION_MINOR U(1)
#define SPM_MM_VERSION_MINOR_SHIFT 0
#define SPM_MM_VERSION_MINOR_MASK U(0xFFFF)
#define SPM_MM_VERSION_FORM(major, minor) ((major << \
SPM_MM_VERSION_MAJOR_SHIFT) | \
(minor))
#define SPM_MM_VERSION_COMPILED SPM_MM_VERSION_FORM(SPM_MM_VERSION_MAJOR, \
SPM_MM_VERSION_MINOR)
/* These macros are used to identify SPM-MM calls using the SMC function ID */
#define SPM_MM_FID_MASK U(0xffff)
#define SPM_MM_FID_MIN_VALUE U(0x40)
#define SPM_MM_FID_MAX_VALUE U(0x7f)
#define is_spm_mm_fid(_fid) \
((((_fid) & SPM_MM_FID_MASK) >= SPM_MM_FID_MIN_VALUE) && \
(((_fid) & SPM_MM_FID_MASK) <= SPM_MM_FID_MAX_VALUE))
/*
* SMC IDs defined in [1] for accessing MM services from the Non-secure world.
* These FIDs occupy the range 0x40 - 0x5f.
* [1] DEN0060A_ARM_MM_Interface_Specification.pdf
*/
#define MM_VERSION_AARCH32 U(0x84000040)
#define MM_COMMUNICATE_AARCH64 U(0xC4000041)
#define MM_COMMUNICATE_AARCH32 U(0x84000041)
/*
* SMC IDs defined for accessing services implemented by the Secure Partition
* Manager from the Secure Partition(s). These services enable a partition to
* handle delegated events and request privileged operations from the manager.
* They occupy the range 0x60-0x7f.
*/
#define SPM_MM_VERSION_AARCH32 U(0x84000060)
#define MM_SP_EVENT_COMPLETE_AARCH64 U(0xC4000061)
#define MM_SP_MEMORY_ATTRIBUTES_GET_AARCH64 U(0xC4000064)
#define MM_SP_MEMORY_ATTRIBUTES_SET_AARCH64 U(0xC4000065)
/*
* Macros used by MM_SP_MEMORY_ATTRIBUTES_SET_AARCH64.
*/
#define MM_SP_MEMORY_ATTRIBUTES_ACCESS_NOACCESS U(0)
#define MM_SP_MEMORY_ATTRIBUTES_ACCESS_RW U(1)
/* Value U(2) is reserved. */
#define MM_SP_MEMORY_ATTRIBUTES_ACCESS_RO U(3)
#define MM_SP_MEMORY_ATTRIBUTES_ACCESS_MASK U(3)
#define MM_SP_MEMORY_ATTRIBUTES_ACCESS_SHIFT 0
#define MM_SP_MEMORY_ATTRIBUTES_EXEC (U(0) << 2)
#define MM_SP_MEMORY_ATTRIBUTES_NON_EXEC (U(1) << 2)
/* SPM error codes. */
#define SPM_MM_SUCCESS 0
#define SPM_MM_NOT_SUPPORTED -1
#define SPM_MM_INVALID_PARAMETER -2
#define SPM_MM_DENIED -3
#define SPM_MM_NO_MEMORY -5
#ifndef __ASSEMBLER__
#include <stdint.h>
int32_t spm_mm_setup(void);
uint64_t spm_mm_smc_handler(uint32_t smc_fid,
uint64_t x1,
uint64_t x2,
uint64_t x3,
uint64_t x4,
void *cookie,
void *handle,
uint64_t flags);
/* Helper to enter a secure partition */
uint64_t spm_mm_sp_call(uint32_t smc_fid,
uint64_t x1,
uint64_t x2,
uint64_t x3);
#endif /* __ASSEMBLER__ */
#endif /* SPM_MM_SVC_H */
@@ -0,0 +1,40 @@
/*
* Copyright (c) 2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef SPMC_SVC_H
#define SPMC_SVC_H
#ifndef __ASSEMBLER__
#include <stdint.h>
#include <lib/utils_def.h>
#include <services/ffa_svc.h>
#include <services/spm_core_manifest.h>
int spmc_setup(void);
void spmc_populate_attrs(spmc_manifest_attribute_t *spmc_attrs);
void *spmc_get_config_addr(void);
void spmc_set_config_addr(uintptr_t soc_fw_config);
uint64_t spmc_smc_handler(uint32_t smc_fid,
bool secure_origin,
uint64_t x1,
uint64_t x2,
uint64_t x3,
uint64_t x4,
void *cookie,
void *handle,
uint64_t flags);
static inline bool is_spmc_at_el3(void)
{
return SPMC_AT_EL3 == 1;
}
#endif /* __ASSEMBLER__ */
#endif /* SPMC_SVC_H */
@@ -0,0 +1,40 @@
/*
* Copyright (c) 2020-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef SPMD_SVC_H
#define SPMD_SVC_H
#ifndef __ASSEMBLER__
#include <services/ffa_svc.h>
#include <stdint.h>
int spmd_setup(void);
uint64_t spmd_ffa_smc_handler(uint32_t smc_fid,
uint64_t x1,
uint64_t x2,
uint64_t x3,
uint64_t x4,
void *cookie,
void *handle,
uint64_t flags);
uint64_t spmd_smc_handler(uint32_t smc_fid,
uint64_t x1,
uint64_t x2,
uint64_t x3,
uint64_t x4,
void *cookie,
void *handle,
uint64_t flags);
uint64_t spmd_smc_switch_state(uint32_t smc_fid,
bool secure_origin,
uint64_t x1,
uint64_t x2,
uint64_t x3,
uint64_t x4,
void *handle);
#endif /* __ASSEMBLER__ */
#endif /* SPMD_SVC_H */
@@ -0,0 +1,30 @@
/*
* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef STD_SVC_H
#define STD_SVC_H
/* SMC function IDs for Standard Service queries */
#define ARM_STD_SVC_CALL_COUNT 0x8400ff00
#define ARM_STD_SVC_UID 0x8400ff01
/* 0x8400ff02 is reserved */
#define ARM_STD_SVC_VERSION 0x8400ff03
/* ARM Standard Service Calls version numbers */
#define STD_SVC_VERSION_MAJOR 0x0
#define STD_SVC_VERSION_MINOR 0x1
/*
* Get the ARM Standard Service argument from EL3 Runtime.
* This function must be implemented by EL3 Runtime and the
* `svc_mask` identifies the service. `svc_mask` is a bit
* mask identifying the range of SMC function IDs available
* to the service.
*/
uintptr_t get_arm_std_svc_args(unsigned int svc_mask);
#endif /* STD_SVC_H */
@@ -0,0 +1,55 @@
/*
* Copyright (c) 2021-2022, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef TRNG_SVC_H
#define TRNG_SVC_H
#include <stdbool.h>
#include <stdint.h>
#include <lib/smccc.h>
/* SMC function IDs for TRNG queries */
#define ARM_TRNG_VERSION U(0x84000050)
#define ARM_TRNG_FEATURES U(0x84000051)
#define ARM_TRNG_GET_UUID U(0x84000052)
#define ARM_TRNG_RND32 U(0x84000053)
#define ARM_TRNG_RND64 U(0xC4000053)
/* TRNG version numbers */
#define TRNG_VERSION_MAJOR (0x1)
#define TRNG_VERSION_MINOR (0x0)
/* TRNG Error Numbers */
#define TRNG_E_SUCCESS (0)
#define TRNG_E_NOT_SUPPORTED (-1)
#define TRNG_E_INVALID_PARAMS (-2)
#define TRNG_E_NO_ENTROPY (-3)
#define TRNG_E_NOT_IMPLEMENTED (-4)
/* TRNG Entropy Bit Numbers */
#define TRNG_RND32_ENTROPY_MAXBITS (96U)
#define TRNG_RND64_ENTROPY_MAXBITS (192U)
/* Public API to perform the initial TRNG entropy setup */
void trng_setup(void);
/* Public API to verify function id is part of TRNG */
bool is_trng_fid(uint32_t smc_fid);
/* Handler to be called to handle TRNG smc calls */
uintptr_t trng_smc_handler(
uint32_t smc_fid,
u_register_t x1,
u_register_t x2,
u_register_t x3,
u_register_t x4,
void *cookie,
void *handle,
u_register_t flags
);
#endif /* TRNG_SVC_H */
@@ -0,0 +1,17 @@
/*
* Copyright (c) 2021-2022, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef PLATFORM_TRP_H
#define PLATFORM_TRP_H
#include <services/rmm_core_manifest.h>
/*******************************************************************************
* Mandatory TRP functions (only if platform contains a TRP)
******************************************************************************/
void trp_early_platform_setup(rmm_manifest_t *manifest);
#endif /* PLATFORM_TRP_H */
@@ -0,0 +1,43 @@
/*
* Copyright (c) 2022, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef TRP_HELPERS_H
#define TRP_HELPERS_H
/* Definitions to help the assembler access the SMC/ERET args structure */
#define TRP_ARGS_SIZE TRP_ARGS_END
#define TRP_ARG0 0x0
#define TRP_ARG1 0x8
#define TRP_ARG2 0x10
#define TRP_ARG3 0x18
#define TRP_ARG4 0x20
#define TRP_ARG5 0x28
#define TRP_ARG6 0x30
#define TRP_ARG7 0x38
#define TRP_ARGS_END 0x40
#ifndef __ASSEMBLER__
#include <platform_def.h>
/* Data structure to hold SMC arguments */
typedef struct trp_args {
uint64_t regs[TRP_ARGS_END >> 3];
} __aligned(CACHE_WRITEBACK_GRANULE) trp_args_t;
trp_args_t *set_smc_args(uint64_t arg0,
uint64_t arg1,
uint64_t arg2,
uint64_t arg3,
uint64_t arg4,
uint64_t arg5,
uint64_t arg6,
uint64_t arg7);
__dead2 void trp_boot_abort(uint64_t err);
#endif /* __ASSEMBLER __ */
#endif /* TRP_HELPERS_H */