GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)
This commit is contained in:
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/*
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* Copyright (c) 2020, ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/* TPM Event Log Config */
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event_log: tpm_event_log {
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compatible = "arm,tpm_event_log";
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tpm_event_log_addr = <0x0 0x0>;
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tpm_event_log_size = <0x0>;
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};
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+55
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/*
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* Copyright (c) 2019-2022, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/tbbr/tbbr_img_def.h>
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/dts-v1/;
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/ {
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dtb-registry {
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compatible = "fconf,dyn_cfg-dtb_registry";
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tb_fw-config {
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load-address = <0x0 0x4001300>;
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max-size = <0x1800>;
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id = <TB_FW_CONFIG_ID>;
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};
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hw-config {
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load-address = <0x0 0x07f00000>;
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max-size = <0x00100000>;
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id = <HW_CONFIG_ID>;
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ns-load-address = <0x0 0x82000000>;
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};
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/*
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* Load SoC and TOS firmware configs at the base of
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* non shared SRAM. The runtime checks ensure we don't
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* overlap BL2, BL31 or BL32. The NT firmware config
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* is loaded at base of DRAM.
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*/
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soc_fw-config {
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load-address = <0x0 0x04001300>;
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max-size = <0x200>;
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id = <SOC_FW_CONFIG_ID>;
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};
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/* If required, SPD should enable loading of trusted OS fw config */
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#if defined(SPD_tspd) || defined(SPD_spmd)
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tos_fw-config {
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load-address = <0x0 0x04001500>;
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max-size = <0xB00>;
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id = <TOS_FW_CONFIG_ID>;
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};
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#endif
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nt_fw-config {
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load-address = <0x0 0x80000000>;
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max-size = <0x200>;
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id = <NT_FW_CONFIG_ID>;
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};
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};
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};
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+19
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/*
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* Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/dts-v1/;
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/ {
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#if MEASURED_BOOT
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#include "event_log.dtsi"
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#endif
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};
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#if MEASURED_BOOT && defined(SPD_opteed)
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&event_log {
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tpm_event_log_sm_addr = <0x0 0x0>;
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};
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#endif
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+11
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/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/dts-v1/;
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/ {
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};
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+89
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/*
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* Copyright (c) 2020-2022, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/dts-v1/;
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#define AFF 00
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#include "fvp-defs.dtsi"
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#undef POST
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#define POST \
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};
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/ {
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compatible = "arm,ffa-core-manifest-1.0";
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#address-cells = <2>;
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#size-cells = <1>;
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attribute {
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spmc_id = <0x8000>;
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maj_ver = <0x1>;
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min_ver = <0x1>;
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exec_state = <0x0>;
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load_address = <0x0 0x6000000>;
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entrypoint = <0x0 0x6000000>;
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binary_size = <0x80000>;
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};
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hypervisor {
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compatible = "hafnium,hafnium";
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vm1 {
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is_ffa_partition;
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debug_name = "cactus-primary";
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load_address = <0x7000000>;
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vcpu_count = <8>;
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mem_size = <1048576>;
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};
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vm2 {
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is_ffa_partition;
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debug_name = "cactus-secondary";
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load_address = <0x7100000>;
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vcpu_count = <8>;
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mem_size = <1048576>;
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};
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vm3 {
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is_ffa_partition;
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debug_name = "cactus-tertiary";
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load_address = <0x7200000>;
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vcpu_count = <1>;
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mem_size = <1048576>;
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};
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vm4 {
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is_ffa_partition;
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debug_name = "ivy";
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load_address = <0x7600000>;
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vcpu_count = <1>;
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mem_size = <1048576>;
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};
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};
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cpus {
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#address-cells = <0x2>;
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#size-cells = <0x0>;
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CPU_0
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/*
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* SPMC (Hafnium) requires secondary core nodes are declared
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* in descending order.
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*/
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CPU_7
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CPU_6
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CPU_5
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CPU_4
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CPU_3
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CPU_2
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CPU_1
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};
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memory@6000000 {
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device_type = "memory";
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reg = <0x0 0x6000000 0x2000000>; /* Trusted DRAM */
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};
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#if MEASURED_BOOT
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#include "event_log.dtsi"
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#endif
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};
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+64
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/*
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* Copyright (c) 2020-2021, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/dts-v1/;
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#define AFF 00
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#include "fvp-defs.dtsi"
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#undef POST
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#define POST \
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};
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/ {
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compatible = "arm,ffa-core-manifest-1.0";
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#address-cells = <2>;
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#size-cells = <1>;
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attribute {
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spmc_id = <0x8000>;
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maj_ver = <0x1>;
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min_ver = <0x1>;
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exec_state = <0x0>;
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load_address = <0x0 0x6000000>;
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entrypoint = <0x0 0x6000000>;
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binary_size = <0x80000>;
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};
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hypervisor {
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compatible = "hafnium,hafnium";
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vm1 {
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is_ffa_partition;
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debug_name = "op-tee";
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load_address = <0x6280000>;
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vcpu_count = <8>;
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mem_size = <1048576>;
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};
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};
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cpus {
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#address-cells = <0x2>;
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#size-cells = <0x0>;
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CPU_0
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/*
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* SPMC (Hafnium) requires secondary core nodes are declared
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* in descending order.
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*/
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CPU_7
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CPU_6
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CPU_5
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CPU_4
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CPU_3
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CPU_2
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CPU_1
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};
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memory@6000000 {
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device_type = "memory";
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reg = <0x0 0x6000000 0x2000000>; /* Trusted DRAM */
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};
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};
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+127
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/*
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* Copyright (c) 2020-2022, ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <lib/libc/cdefs.h>
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/dts-v1/;
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/ {
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tb_fw-config {
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compatible = "arm,tb_fw";
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/* Disable authentication for development */
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disable_auth = <0x0>;
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/*
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* The following two entries are placeholders for Mbed TLS
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* heap information. The default values don't matter since
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* they will be overwritten by BL1.
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* In case of having shared Mbed TLS heap between BL1 and BL2,
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* BL1 will populate these two properties with the respective
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* info about the shared heap. This info will be available for
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* BL2 in order to locate and re-use the heap.
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*/
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mbedtls_heap_addr = <0x0 0x0>;
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mbedtls_heap_size = <0x0>;
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};
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/*
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* UUID's here are UUID RFC 4122 compliant meaning fieds are stored in
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* network order (big endian)
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*/
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#if ARM_IO_IN_DTB
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arm-io_policies {
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fip-handles {
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compatible = "arm,io-fip-handle";
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scp_bl2_uuid = "9766fd3d-89be-e849-ae5d-78a140608213";
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bl31_uuid = "47d4086d-4cfe-9846-9b95-2950cbbd5a00";
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bl32_uuid = "05d0e189-53dc-1347-8d2b-500a4b7a3e38";
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bl32_extra1_uuid = "0b70c29b-2a5a-7840-9f65-0a5682738288";
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bl32_extra2_uuid = "8ea87bb1-cfa2-3f4d-85fd-e7bba50220d9";
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bl33_uuid = "d6d0eea7-fcea-d54b-9782-9934f234b6e4";
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hw_cfg_uuid = "08b8f1d9-c9cf-9349-a962-6fbc6b7265cc";
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soc_fw_cfg_uuid = "9979814b-0376-fb46-8c8e-8d267f7859e0";
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tos_fw_cfg_uuid = "26257c1a-dbc6-7f47-8d96-c4c4b0248021";
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nt_fw_cfg_uuid = "28da9815-93e8-7e44-ac66-1aaf801550f9";
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cca_cert_uuid = "36d83d85-761d-4daf-96f1-cd99d6569b00";
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core_swd_cert_uuid = "52222d31-820f-494d-8bbc-ea6825d3c35a";
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plat_cert_uuid = "d43cd902-5b9f-412e-8ac6-92b6d18be60d";
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t_key_cert_uuid = "827ee890-f860-e411-a1b4-777a21b4f94c";
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scp_fw_key_uuid = "024221a1-f860-e411-8d9b-f33c0e15a014";
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soc_fw_key_uuid = "8ab8becc-f960-e411-9ad0-eb4822d8dcf8";
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tos_fw_key_cert_uuid = "9477d603-fb60-e411-85dd-b7105b8cee04";
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nt_fw_key_cert_uuid = "8ad5832a-fb60-e411-8aaf-df30bbc49859";
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scp_fw_content_cert_uuid = "44be6f04-5e63-e411-b28b-73d8eaae9656";
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soc_fw_content_cert_uuid = "e2b20c20-5e63-e411-9ce8-abccf92bb666";
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tos_fw_content_cert_uuid = "a49f4411-5e63-e411-8728-3f05722af33d";
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nt_fw_content_cert_uuid = "8ec4c1f3-5d63-e411-a7a9-87ee40b23fa7";
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sp_content_cert_uuid = "776dfd44-8697-4c3b-91eb-c13e025a2a6f";
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};
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};
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#endif /* ARM_IO_IN_DTB */
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secure-partitions {
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compatible = "arm,sp";
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#ifdef ARM_BL2_SP_LIST_DTS
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#include __XSTRING(ARM_BL2_SP_LIST_DTS)
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#else
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#ifdef OPTEE_SP_FW_CONFIG
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op-tee {
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uuid = "486178e0-e7f8-11e3-bc5e-0002a5d5c51b";
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load-address = <0x6280000>;
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};
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#else
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cactus-primary {
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uuid = "b4b5671e-4a90-4fe1-b81f-fb13dae1dacb";
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load-address = <0x7000000>;
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owner = "SiP";
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};
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cactus-secondary {
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uuid = "d1582309-f023-47b9-827c-4464f5578fc8";
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load-address = <0x7100000>;
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owner = "Plat";
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};
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cactus-tertiary {
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uuid = "79b55c73-1d8c-44b9-8593-61e1770ad8d2";
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load-address = <0x7200000>;
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owner = "Plat";
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};
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ivy {
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uuid = "eaba83d8-baaf-4eaf-8144-f7fdcbe544a7";
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load-address = <0x7600000>;
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owner = "Plat";
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};
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#endif
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#endif /* ARM_BL2_SP_LIST_DTS */
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};
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#if COT_DESC_IN_DTB
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#include "cot_descriptors.dtsi"
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#endif
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#if MEASURED_BOOT
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#include "event_log.dtsi"
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#endif
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};
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#if COT_DESC_IN_DTB
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#include "../fvp_def.h"
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&trusted_nv_counter {
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reg = <TFW_NVCTR_BASE>;
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};
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&non_trusted_nv_counter {
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reg = <NTFW_CTR_BASE>;
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};
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#endif
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+13
@@ -0,0 +1,13 @@
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/*
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* Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/dts-v1/;
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/ {
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#if MEASURED_BOOT
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#include "event_log.dtsi"
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#endif
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};
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+34
@@ -0,0 +1,34 @@
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/*
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* Copyright (c) 2022, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/dts-v1/;
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#define AFF 00
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#include "fvp-defs.dtsi"
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#undef POST
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#define POST \
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};
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#define S_EL0 (0x1)
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#define S_EL1 (0x2)
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/* For consumption by EL3 SPMC. */
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/ {
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compatible = "arm,ffa-manifest-1.0";
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#address-cells = <2>;
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#size-cells = <1>;
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ffa-version = <0x00010001>; /* 31:16 - Major, 15:0 - Minor */
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id = <0x8001>;
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uuid = <0x6b43b460 0x74a24b78 0xade24502 0x40682886>;
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messaging-method = <0x3>; /* Direct Messaging Only */
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exception-level = <S_EL1>;
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execution-state = <0>;
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execution-ctx-count = <8>;
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gp-register-num = <0>;
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/* Subscribe to CPU_OFF, CPU_SUSPEND and CPU_SUSPEND_RESUME PM Msgs */
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power-management-messages = <0x7>;
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};
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+44
@@ -0,0 +1,44 @@
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/*
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* Copyright (c) 2020-2022, Arm Limited. All rights reserved.
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||||
*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* This file is a Partition Manifest (PM) for a minimal Secure Partition (SP)
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* that has additional optional properties defined.
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*
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*/
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/dts-v1/;
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/ {
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compatible = "arm,ffa-manifest-1.0";
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/* Properties */
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description = "op-tee";
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ffa-version = <0x00010000>; /* 31:16 - Major, 15:0 - Minor */
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uuid = <0xe0786148 0xe311f8e7 0x02005ebc 0x1bc5d5a5>;
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id = <1>;
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execution-ctx-count = <8>;
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exception-level = <2>; /* S-EL1 */
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execution-state = <0>; /* AARCH64 */
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load-address = <0x6280000>;
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entrypoint-offset = <0x4000>;
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xlat-granule = <0>; /* 4KiB */
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boot-order = <0>;
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messaging-method = <0x3>; /* Direct request/response supported. */
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managed-exit;
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run-time-model = <1>; /* SP pre-emptible. */
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/* Boot protocol */
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gp-register-num = <0x0>;
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device-regions {
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compatible = "arm,ffa-manifest-device-regions";
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uart1 {
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base-address = <0x00000000 0x1c0a0000>;
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pages-count = <1>;
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attributes = <0x3>; /* read-write */
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||||
};
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||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user