GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)
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/*
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* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <platform_def.h>
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#include <arch_helpers.h>
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#include <lib/psci/psci.h>
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#include <plat/arm/common/plat_arm.h>
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#include <plat/common/platform.h>
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/* Allow ARM Standard platforms to override these functions */
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#pragma weak plat_arm_program_trusted_mailbox
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#if !ARM_RECOM_STATE_ID_ENC
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/*******************************************************************************
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* ARM standard platform handler called to check the validity of the power state
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* parameter.
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******************************************************************************/
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int arm_validate_power_state(unsigned int power_state,
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psci_power_state_t *req_state)
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{
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unsigned int pstate = psci_get_pstate_type(power_state);
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unsigned int pwr_lvl = psci_get_pstate_pwrlvl(power_state);
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unsigned int i;
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assert(req_state != NULL);
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if (pwr_lvl > PLAT_MAX_PWR_LVL)
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return PSCI_E_INVALID_PARAMS;
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/* Sanity check the requested state */
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if (pstate == PSTATE_TYPE_STANDBY) {
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/*
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* It's possible to enter standby only on power level 0
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* Ignore any other power level.
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*/
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if (pwr_lvl != ARM_PWR_LVL0)
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return PSCI_E_INVALID_PARAMS;
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req_state->pwr_domain_state[ARM_PWR_LVL0] =
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ARM_LOCAL_STATE_RET;
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} else {
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for (i = ARM_PWR_LVL0; i <= pwr_lvl; i++)
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req_state->pwr_domain_state[i] =
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ARM_LOCAL_STATE_OFF;
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}
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/*
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* We expect the 'state id' to be zero.
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*/
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if (psci_get_pstate_id(power_state) != 0U)
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return PSCI_E_INVALID_PARAMS;
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return PSCI_E_SUCCESS;
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}
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#else
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/*******************************************************************************
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* ARM standard platform handler called to check the validity of the power
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* state parameter. The power state parameter has to be a composite power
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* state.
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******************************************************************************/
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int arm_validate_power_state(unsigned int power_state,
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psci_power_state_t *req_state)
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{
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unsigned int state_id;
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int i;
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assert(req_state != NULL);
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/*
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* Currently we are using a linear search for finding the matching
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* entry in the idle power state array. This can be made a binary
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* search if the number of entries justify the additional complexity.
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*/
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for (i = 0; !!arm_pm_idle_states[i]; i++) {
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if (power_state == arm_pm_idle_states[i])
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break;
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}
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/* Return error if entry not found in the idle state array */
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if (!arm_pm_idle_states[i])
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return PSCI_E_INVALID_PARAMS;
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i = 0;
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state_id = psci_get_pstate_id(power_state);
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/* Parse the State ID and populate the state info parameter */
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while (state_id) {
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req_state->pwr_domain_state[i++] = state_id &
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ARM_LOCAL_PSTATE_MASK;
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state_id >>= ARM_LOCAL_PSTATE_WIDTH;
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}
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return PSCI_E_SUCCESS;
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}
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#endif /* __ARM_RECOM_STATE_ID_ENC__ */
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/*******************************************************************************
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* ARM standard platform handler called to check the validity of the non secure
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* entrypoint. Returns 0 if the entrypoint is valid, or -1 otherwise.
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******************************************************************************/
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int arm_validate_ns_entrypoint(uintptr_t entrypoint)
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{
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/*
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* Check if the non secure entrypoint lies within the non
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* secure DRAM.
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*/
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if ((entrypoint >= ARM_NS_DRAM1_BASE) && (entrypoint <
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(ARM_NS_DRAM1_BASE + ARM_NS_DRAM1_SIZE))) {
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return 0;
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}
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#ifdef __aarch64__
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if ((entrypoint >= ARM_DRAM2_BASE) && (entrypoint <
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(ARM_DRAM2_BASE + ARM_DRAM2_SIZE))) {
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return 0;
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}
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#endif
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return -1;
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}
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int arm_validate_psci_entrypoint(uintptr_t entrypoint)
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{
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return (arm_validate_ns_entrypoint(entrypoint) == 0) ? PSCI_E_SUCCESS :
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PSCI_E_INVALID_ADDRESS;
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}
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/******************************************************************************
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* Helper function to save the platform state before a system suspend. Save the
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* state of the system components which are not in the Always ON power domain.
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*****************************************************************************/
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void arm_system_pwr_domain_save(void)
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{
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/* Assert system power domain is available on the platform */
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assert(PLAT_MAX_PWR_LVL >= ARM_PWR_LVL2);
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plat_arm_gic_save();
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/*
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* Unregister console now so that it is not registered for a second
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* time during resume.
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*/
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arm_console_runtime_end();
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/*
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* All the other peripheral which are configured by ARM TF are
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* re-initialized on resume from system suspend. Hence we
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* don't save their state here.
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*/
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}
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/******************************************************************************
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* Helper function to resume the platform from system suspend. Reinitialize
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* the system components which are not in the Always ON power domain.
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* TODO: Unify the platform setup when waking up from cold boot and system
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* resume in arm_bl31_platform_setup().
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*****************************************************************************/
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void arm_system_pwr_domain_resume(void)
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{
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/* Initialize the console */
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arm_console_runtime_init();
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/* Assert system power domain is available on the platform */
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assert(PLAT_MAX_PWR_LVL >= ARM_PWR_LVL2);
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plat_arm_gic_resume();
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plat_arm_security_setup();
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arm_configure_sys_timer();
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}
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/*******************************************************************************
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* ARM platform function to program the mailbox for a cpu before it is released
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* from reset. This function assumes that the Trusted mail box base is within
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* the ARM_SHARED_RAM region
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******************************************************************************/
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void plat_arm_program_trusted_mailbox(uintptr_t address)
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{
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uintptr_t *mailbox = (void *) PLAT_ARM_TRUSTED_MAILBOX_BASE;
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*mailbox = address;
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/*
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* Ensure that the PLAT_ARM_TRUSTED_MAILBOX_BASE is within
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* ARM_SHARED_RAM region.
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*/
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assert((PLAT_ARM_TRUSTED_MAILBOX_BASE >= ARM_SHARED_RAM_BASE) &&
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((PLAT_ARM_TRUSTED_MAILBOX_BASE + sizeof(*mailbox)) <= \
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(ARM_SHARED_RAM_BASE + ARM_SHARED_RAM_SIZE)));
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}
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/*******************************************************************************
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* The ARM Standard platform definition of platform porting API
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* `plat_setup_psci_ops`.
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******************************************************************************/
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int __init plat_setup_psci_ops(uintptr_t sec_entrypoint,
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const plat_psci_ops_t **psci_ops)
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{
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*psci_ops = plat_arm_psci_override_pm_ops(&plat_arm_psci_pm_ops);
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/* Setup mailbox with entry point. */
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plat_arm_program_trusted_mailbox(sec_entrypoint);
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return 0;
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}
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