GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)
This commit is contained in:
+29
@@ -0,0 +1,29 @@
|
||||
/*
|
||||
* Copyright (c) 2021, STMicroelectronics - All Rights Reserved
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef STM32CUBEPROGRAMMER_H
|
||||
#define STM32CUBEPROGRAMMER_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include <usb_dfu.h>
|
||||
|
||||
/* Phase definition */
|
||||
#define PHASE_FLASHLAYOUT 0U
|
||||
#define PHASE_SSBL 3U
|
||||
#define PHASE_CMD 0xF1U
|
||||
#define PHASE_RESET 0xFFU
|
||||
|
||||
/* Functions provided by plat */
|
||||
uint8_t usb_dfu_get_phase(uint8_t alt);
|
||||
|
||||
int stm32cubeprog_usb_load(struct usb_handle *usb_core_handle,
|
||||
uintptr_t ssbl_base,
|
||||
size_t ssbl_len);
|
||||
|
||||
int stm32cubeprog_uart_load(uintptr_t instance, uintptr_t base, size_t len);
|
||||
|
||||
#endif /* STM32CUBEPROGRAMMER_H */
|
||||
+129
@@ -0,0 +1,129 @@
|
||||
/*
|
||||
* Copyright (C) 2018-2022, STMicroelectronics - All Rights Reserved
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef STM32MP_COMMON_H
|
||||
#define STM32MP_COMMON_H
|
||||
|
||||
#include <stdbool.h>
|
||||
|
||||
#include <platform_def.h>
|
||||
|
||||
#define JEDEC_ST_BKID U(0x0)
|
||||
#define JEDEC_ST_MFID U(0x20)
|
||||
|
||||
/* Functions to save and get boot context address given by ROM code */
|
||||
void stm32mp_save_boot_ctx_address(uintptr_t address);
|
||||
uintptr_t stm32mp_get_boot_ctx_address(void);
|
||||
uint16_t stm32mp_get_boot_itf_selected(void);
|
||||
|
||||
bool stm32mp_is_single_core(void);
|
||||
bool stm32mp_is_closed_device(void);
|
||||
bool stm32mp_is_auth_supported(void);
|
||||
|
||||
/* Return the base address of the DDR controller */
|
||||
uintptr_t stm32mp_ddrctrl_base(void);
|
||||
|
||||
/* Return the base address of the DDR PHY */
|
||||
uintptr_t stm32mp_ddrphyc_base(void);
|
||||
|
||||
/* Return the base address of the PWR peripheral */
|
||||
uintptr_t stm32mp_pwr_base(void);
|
||||
|
||||
/* Return the base address of the RCC peripheral */
|
||||
uintptr_t stm32mp_rcc_base(void);
|
||||
|
||||
/* Check MMU status to allow spinlock use */
|
||||
bool stm32mp_lock_available(void);
|
||||
|
||||
int stm32_get_otp_index(const char *otp_name, uint32_t *otp_idx,
|
||||
uint32_t *otp_len);
|
||||
int stm32_get_otp_value(const char *otp_name, uint32_t *otp_val);
|
||||
int stm32_get_otp_value_from_idx(const uint32_t otp_idx, uint32_t *otp_val);
|
||||
|
||||
/* Get IWDG platform instance ID from peripheral IO memory base address */
|
||||
uint32_t stm32_iwdg_get_instance(uintptr_t base);
|
||||
|
||||
/* Return bitflag mask for expected IWDG configuration from OTP content */
|
||||
uint32_t stm32_iwdg_get_otp_config(uint32_t iwdg_inst);
|
||||
|
||||
#if defined(IMAGE_BL2)
|
||||
/* Update OTP shadow registers with IWDG configuration from device tree */
|
||||
uint32_t stm32_iwdg_shadow_update(uint32_t iwdg_inst, uint32_t flags);
|
||||
#endif
|
||||
|
||||
#if STM32MP_UART_PROGRAMMER || !defined(IMAGE_BL2)
|
||||
/* Get the UART address from its instance number */
|
||||
uintptr_t get_uart_address(uint32_t instance_nb);
|
||||
#endif
|
||||
|
||||
/* Setup the UART console */
|
||||
int stm32mp_uart_console_setup(void);
|
||||
|
||||
#if STM32MP_EARLY_CONSOLE
|
||||
void stm32mp_setup_early_console(void);
|
||||
#else
|
||||
static inline void stm32mp_setup_early_console(void)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Platform util functions for the GPIO driver
|
||||
* @bank: Target GPIO bank ID as per DT bindings
|
||||
*
|
||||
* Platform shall implement these functions to provide to stm32_gpio
|
||||
* driver the resource reference for a target GPIO bank. That are
|
||||
* memory mapped interface base address, interface offset (see below)
|
||||
* and clock identifier.
|
||||
*
|
||||
* stm32_get_gpio_bank_offset() returns a bank offset that is used to
|
||||
* check DT configuration matches platform implementation of the banks
|
||||
* description.
|
||||
*/
|
||||
uintptr_t stm32_get_gpio_bank_base(unsigned int bank);
|
||||
unsigned long stm32_get_gpio_bank_clock(unsigned int bank);
|
||||
uint32_t stm32_get_gpio_bank_offset(unsigned int bank);
|
||||
bool stm32_gpio_is_secure_at_reset(unsigned int bank);
|
||||
|
||||
/* Return node offset for target GPIO bank ID @bank or a FDT error code */
|
||||
int stm32_get_gpio_bank_pinctrl_node(void *fdt, unsigned int bank);
|
||||
|
||||
/* Get the chip revision */
|
||||
uint32_t stm32mp_get_chip_version(void);
|
||||
/* Get the chip device ID */
|
||||
uint32_t stm32mp_get_chip_dev_id(void);
|
||||
|
||||
/* Get SOC name */
|
||||
#define STM32_SOC_NAME_SIZE 20
|
||||
void stm32mp_get_soc_name(char name[STM32_SOC_NAME_SIZE]);
|
||||
|
||||
/* Print CPU information */
|
||||
void stm32mp_print_cpuinfo(void);
|
||||
|
||||
/* Print board information */
|
||||
void stm32mp_print_boardinfo(void);
|
||||
|
||||
/* Initialise the IO layer and register platform IO devices */
|
||||
void stm32mp_io_setup(void);
|
||||
|
||||
/* Functions to map DDR in MMU with non-cacheable attribute, and unmap it */
|
||||
int stm32mp_map_ddr_non_cacheable(void);
|
||||
int stm32mp_unmap_ddr(void);
|
||||
|
||||
/* Functions to save and get boot peripheral info */
|
||||
void stm32_save_boot_interface(uint32_t interface, uint32_t instance);
|
||||
void stm32_get_boot_interface(uint32_t *interface, uint32_t *instance);
|
||||
|
||||
/* Functions to save and get boot authentication status and partition used */
|
||||
void stm32_save_boot_auth(uint32_t auth_status, uint32_t boot_partition);
|
||||
|
||||
#if PSA_FWU_SUPPORT
|
||||
void stm32mp1_fwu_set_boot_idx(void);
|
||||
uint32_t stm32_get_and_dec_fwu_trial_boot_cnt(void);
|
||||
void stm32_set_max_fwu_trial_boot_cnt(void);
|
||||
#endif /* PSA_FWU_SUPPORT */
|
||||
|
||||
#endif /* STM32MP_COMMON_H */
|
||||
@@ -0,0 +1,46 @@
|
||||
/*
|
||||
* Copyright (c) 2020-2022, STMicroelectronics - All Rights Reserved
|
||||
* Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef STM32MP_DT_H
|
||||
#define STM32MP_DT_H
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#define DT_DISABLED U(0)
|
||||
#define DT_NON_SECURE U(1)
|
||||
#define DT_SECURE U(2)
|
||||
#define DT_SHARED (DT_NON_SECURE | DT_SECURE)
|
||||
|
||||
struct dt_node_info {
|
||||
uint32_t base;
|
||||
int32_t clock;
|
||||
int32_t reset;
|
||||
uint32_t status;
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
* Function and variable prototypes
|
||||
******************************************************************************/
|
||||
int dt_open_and_check(uintptr_t dt_addr);
|
||||
int fdt_get_address(void **fdt_addr);
|
||||
bool fdt_check_node(int node);
|
||||
uint8_t fdt_get_status(int node);
|
||||
int dt_set_stdout_pinctrl(void);
|
||||
void dt_fill_device_info(struct dt_node_info *info, int node);
|
||||
int dt_get_node(struct dt_node_info *info, int offset, const char *compat);
|
||||
int dt_get_stdout_uart_info(struct dt_node_info *info);
|
||||
int dt_match_instance_by_compatible(const char *compatible, uintptr_t address);
|
||||
uint32_t dt_get_ddr_size(void);
|
||||
uint32_t dt_get_pwr_vdd_voltage(void);
|
||||
struct rdev *dt_get_vdd_regulator(void);
|
||||
struct rdev *dt_get_cpu_regulator(void);
|
||||
const char *dt_get_board_model(void);
|
||||
int dt_find_otp_name(const char *name, uint32_t *otp, uint32_t *otp_len);
|
||||
int fdt_get_gpio_bank_pin_count(unsigned int bank);
|
||||
|
||||
#endif /* STM32MP_DT_H */
|
||||
@@ -0,0 +1,15 @@
|
||||
/* SPDX-License-Identifier: BSD-3-Clause */
|
||||
/*
|
||||
* Copyright (c) 2021, Linaro Limited
|
||||
*/
|
||||
|
||||
#ifndef STM32MP_EFI_H
|
||||
#define STM32MP_EFI_H
|
||||
|
||||
#include <drivers/partition/efi.h>
|
||||
|
||||
#define STM32MP_FIP_GUID \
|
||||
EFI_GUID(0x19d5df83, 0x11b0, 0x457b, \
|
||||
0xbe, 0x2c, 0x75, 0x59, 0xc1, 0x31, 0x42, 0xa5)
|
||||
|
||||
#endif /* STM32MP_EFI_H */
|
||||
+31
@@ -0,0 +1,31 @@
|
||||
/*
|
||||
* Copyright (c) 2021, STMicroelectronics - All Rights Reserved
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef STM32MP_FCONF_GETTER
|
||||
#define STM32MP_FCONF_GETTER
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
#include <lib/fconf/fconf.h>
|
||||
#include <tools_share/uuid.h>
|
||||
|
||||
/* IO policies */
|
||||
#define stm32mp__io_policies_getter(id) __extension__ ({ \
|
||||
assert((id) < MAX_NUMBER_IDS); \
|
||||
&policies[id]; \
|
||||
})
|
||||
|
||||
struct plat_io_policy {
|
||||
uintptr_t *dev_handle;
|
||||
uintptr_t image_spec;
|
||||
struct efi_guid img_type_guid;
|
||||
int (*check)(const uintptr_t spec);
|
||||
};
|
||||
|
||||
extern struct plat_io_policy policies[];
|
||||
int fconf_populate_stm32mp_io_policies(uintptr_t config);
|
||||
|
||||
#endif /* STM32MP_FCONF_GETTER */
|
||||
+27
@@ -0,0 +1,27 @@
|
||||
/*
|
||||
* Copyright (c) 2021-2022, STMicroelectronics - All Rights Reserved
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#ifndef STM32MP_IO_STORAGE_H
|
||||
#define STM32MP_IO_STORAGE_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include <drivers/io/io_storage.h>
|
||||
|
||||
/* IO devices handle */
|
||||
extern uintptr_t storage_dev_handle;
|
||||
extern uintptr_t fip_dev_handle;
|
||||
extern uintptr_t enc_dev_handle;
|
||||
|
||||
extern io_block_spec_t image_block_spec;
|
||||
|
||||
/* Function declarations */
|
||||
int open_fip(const uintptr_t spec);
|
||||
#ifndef DECRYPTION_SUPPORT_none
|
||||
int open_enc_fip(const uintptr_t spec);
|
||||
#endif
|
||||
int open_storage(const uintptr_t spec);
|
||||
|
||||
#endif /* STM32MP_IO_STORAGE_H */
|
||||
+58
@@ -0,0 +1,58 @@
|
||||
/*
|
||||
* Copyright (c) 2017-2020, STMicroelectronics - All Rights Reserved
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef STM32MP_SHARED_RESOURCES_H
|
||||
#define STM32MP_SHARED_RESOURCES_H
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef STM32MP_SHARED_RESOURCES
|
||||
enum stm32mp_shres;
|
||||
|
||||
/* Return true if @clock_id is shared by secure and non-secure worlds */
|
||||
bool stm32mp_nsec_can_access_clock(unsigned long clock_id);
|
||||
|
||||
/* Return true if and only if @reset_id relates to a non-secure peripheral */
|
||||
bool stm32mp_nsec_can_access_reset(unsigned int reset_id);
|
||||
|
||||
/* Register a shared resource assigned to the secure world */
|
||||
void stm32mp_register_secure_periph(enum stm32mp_shres id);
|
||||
|
||||
/* Register a shared resource assigned to the non-secure world */
|
||||
void stm32mp_register_non_secure_periph(enum stm32mp_shres id);
|
||||
|
||||
/* Register a peripheral as secure or non-secure based on IO base address */
|
||||
void stm32mp_register_secure_periph_iomem(uintptr_t base);
|
||||
void stm32mp_register_non_secure_periph_iomem(uintptr_t base);
|
||||
|
||||
/* Register a GPIO as secure or non-secure based on its bank and pin numbers */
|
||||
void stm32mp_register_secure_gpio(unsigned int bank, unsigned int pin);
|
||||
void stm32mp_register_non_secure_gpio(unsigned int bank, unsigned int pin);
|
||||
|
||||
/* Consolidate peripheral states and lock against new peripheral registering */
|
||||
void stm32mp_lock_periph_registering(void);
|
||||
#else
|
||||
static inline void stm32mp_register_secure_periph_iomem(uintptr_t base __unused)
|
||||
{
|
||||
}
|
||||
|
||||
static inline
|
||||
void stm32mp_register_non_secure_periph_iomem(uintptr_t base __unused)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void stm32mp_register_secure_gpio(unsigned int bank __unused,
|
||||
unsigned int pin __unused)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void stm32mp_register_non_secure_gpio(unsigned int bank __unused,
|
||||
unsigned int pin __unused)
|
||||
{
|
||||
}
|
||||
#endif /* STM32MP_SHARED_RESOURCES */
|
||||
#endif /* STM32MP_SHARED_RESOURCES_H */
|
||||
@@ -0,0 +1,80 @@
|
||||
/*
|
||||
* Copyright (c) 2021, STMicroelectronics - All Rights Reserved
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef USB_DFU_H
|
||||
#define USB_DFU_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include <drivers/usb_device.h>
|
||||
|
||||
#define DFU_DESCRIPTOR_TYPE 0x21U
|
||||
|
||||
/* Max DFU Packet Size = 1024 bytes */
|
||||
#define USBD_DFU_XFER_SIZE 1024U
|
||||
|
||||
#define TRANSFER_SIZE_BYTES(size) \
|
||||
((uint8_t)((size) & 0xFF)), /* XFERSIZEB0 */\
|
||||
((uint8_t)((size) >> 8)) /* XFERSIZEB1 */
|
||||
|
||||
/*
|
||||
* helper for descriptor of DFU interface 0 Alternate setting n
|
||||
* with iInterface = index of string descriptor, assumed Nth user string
|
||||
*/
|
||||
#define USBD_DFU_IF_DESC(n) 0x09U, /* Interface Descriptor size */\
|
||||
USB_DESC_TYPE_INTERFACE, /* descriptor type */\
|
||||
0x00U, /* Number of Interface */\
|
||||
(n), /* Alternate setting */\
|
||||
0x00U, /* bNumEndpoints*/\
|
||||
0xFEU, /* Application Specific Class Code */\
|
||||
0x01U, /* Device Firmware Upgrade Code */\
|
||||
0x02U, /* DFU mode protocol */ \
|
||||
USBD_IDX_USER0_STR + (n) /* iInterface */
|
||||
|
||||
/* DFU1.1 Standard */
|
||||
#define USB_DFU_VERSION 0x0110U
|
||||
#define USB_DFU_ITF_SIZ 9U
|
||||
#define USB_DFU_DESC_SIZ(itf) (USB_DFU_ITF_SIZ * ((itf) + 2U))
|
||||
|
||||
/*
|
||||
* bmAttribute value for DFU:
|
||||
* bitCanDnload = 1(bit 0)
|
||||
* bitCanUpload = 1(bit 1)
|
||||
* bitManifestationTolerant = 1 (bit 2)
|
||||
* bitWillDetach = 1(bit 3)
|
||||
* Reserved (bit4-6)
|
||||
* bitAcceleratedST = 0(bit 7)
|
||||
*/
|
||||
#define DFU_BM_ATTRIBUTE 0x0FU
|
||||
|
||||
#define DFU_STATUS_SIZE 6U
|
||||
|
||||
/* Callback for media access */
|
||||
struct usb_dfu_media {
|
||||
int (*upload)(uint8_t alt, uintptr_t *buffer, uint32_t *len,
|
||||
void *user_data);
|
||||
int (*download)(uint8_t alt, uintptr_t *buffer, uint32_t *len,
|
||||
void *user_data);
|
||||
int (*manifestation)(uint8_t alt, void *user_data);
|
||||
};
|
||||
|
||||
/* Internal DFU handle */
|
||||
struct usb_dfu_handle {
|
||||
uint8_t status[DFU_STATUS_SIZE];
|
||||
uint8_t dev_state;
|
||||
uint8_t dev_status;
|
||||
uint8_t alt_setting;
|
||||
const struct usb_dfu_media *callback;
|
||||
};
|
||||
|
||||
void usb_dfu_register(struct usb_handle *pdev, struct usb_dfu_handle *phandle);
|
||||
|
||||
int usb_dfu_loop(struct usb_handle *pdev, const struct usb_dfu_media *pmedia);
|
||||
|
||||
/* Function provided by plat */
|
||||
struct usb_handle *usb_dfu_plat_init(void);
|
||||
|
||||
#endif /* USB_DFU_H */
|
||||
Reference in New Issue
Block a user