GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)
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/*
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* Copyright (c) 2018, Xilinx, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/* Xilinx IPI management configuration data and macros */
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#ifndef IPI_H
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#define IPI_H
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#include <stdint.h>
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/*********************************************************************
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* IPI mailbox status macros
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********************************************************************/
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#define IPI_MB_STATUS_IDLE (0U)
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#define IPI_MB_STATUS_SEND_PENDING (1U)
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#define IPI_MB_STATUS_RECV_PENDING (2U)
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/*********************************************************************
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* IPI mailbox call is secure or not macros
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********************************************************************/
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#define IPI_MB_CALL_NOTSECURE (0U)
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#define IPI_MB_CALL_SECURE (1U)
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/*********************************************************************
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* IPI secure check
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********************************************************************/
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#define IPI_SECURE_MASK (0x1U)
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#define IPI_IS_SECURE(I) ((ipi_table[(I)].secure_only & \
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IPI_SECURE_MASK) ? 1 : 0)
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/*********************************************************************
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* Struct definitions
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********************************************************************/
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/* structure to maintain IPI configuration information */
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struct ipi_config {
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unsigned int ipi_bit_mask;
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unsigned int ipi_reg_base;
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unsigned char secure_only;
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};
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/*********************************************************************
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* IPI APIs declarations
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********************************************************************/
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/* Initialize IPI configuration table */
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void ipi_config_table_init(const struct ipi_config *ipi_config_table,
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uint32_t total_ipi);
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/* Validate IPI mailbox access */
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int ipi_mb_validate(uint32_t local, uint32_t remote, unsigned int is_secure);
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/* Open the IPI mailbox */
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void ipi_mb_open(uint32_t local, uint32_t remote);
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/* Release the IPI mailbox */
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void ipi_mb_release(uint32_t local, uint32_t remote);
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/* Enquire IPI mailbox status */
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int ipi_mb_enquire_status(uint32_t local, uint32_t remote);
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/* Trigger notification on the IPI mailbox */
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void ipi_mb_notify(uint32_t local, uint32_t remote, uint32_t is_blocking);
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/* Ack IPI mailbox notification */
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void ipi_mb_ack(uint32_t local, uint32_t remote);
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/* Disable IPI mailbox notification interrupt */
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void ipi_mb_disable_irq(uint32_t local, uint32_t remote);
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/* Enable IPI mailbox notification interrupt */
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void ipi_mb_enable_irq(uint32_t local, uint32_t remote);
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#endif /* IPI_H */
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+41
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/*
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* Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PLAT_STARTUP_H
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#define PLAT_STARTUP_H
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#include <common/bl_common.h>
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/* For FSBL handover */
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enum fsbl_handoff {
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FSBL_HANDOFF_SUCCESS = 0,
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FSBL_HANDOFF_NO_STRUCT,
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FSBL_HANDOFF_INVAL_STRUCT,
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FSBL_HANDOFF_TOO_MANY_PARTS
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};
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#define FSBL_MAX_PARTITIONS 8U
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/* Structure corresponding to each partition entry */
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struct xfsbl_partition {
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uint64_t entry_point;
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uint64_t flags;
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};
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/* Structure for handoff parameters to ARM Trusted Firmware (ATF) */
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struct xfsbl_atf_handoff_params {
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uint8_t magic[4];
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uint32_t num_entries;
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struct xfsbl_partition partition[FSBL_MAX_PARTITIONS];
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};
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#define ATF_HANDOFF_PARAMS_MAX_SIZE sizeof(struct xfsbl_atf_handoff_params)
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enum fsbl_handoff fsbl_atf_handover(entry_point_info_t *bl32,
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entry_point_info_t *bl33,
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uint64_t atf_handoff_addr);
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#endif /* PLAT_STARTUP_H */
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/*
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* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2020-2022, Xilinx, Inc. All rights reserved.
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* Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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* Contains APU specific macros and macros to be defined depending on
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* the execution environment.
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*/
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#ifndef PM_CLIENT_H
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#define PM_CLIENT_H
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#include "pm_common.h"
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#include "pm_defs.h"
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/* Functions to be implemented by each PU */
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void pm_client_suspend(const struct pm_proc *proc, uint32_t state);
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void pm_client_abort_suspend(void);
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void pm_client_wakeup(const struct pm_proc *proc);
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/* Global variables to be set in pm_client.c */
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extern const struct pm_proc *primary_proc;
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#if defined(PLAT_zynqmp)
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enum pm_ret_status pm_set_suspend_mode(uint32_t mode);
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const struct pm_proc *pm_get_proc_by_node(enum pm_node_id nid);
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#endif /* PLAT_zynqmp */
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#endif /* PM_CLIENT_H */
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/*
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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* Contains definitions of commonly used macros and data types needed
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* for PU Power Management. This file should be common for all PU's.
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*/
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#ifndef PM_COMMON_H
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#define PM_COMMON_H
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#include <stdint.h>
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#include <plat_pm_common.h>
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#if IPI_CRC_CHECK
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#define PAYLOAD_ARG_CNT 8U
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#define IPI_W0_TO_W6_SIZE 28U
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#define PAYLOAD_CRC_POS 7U
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#define CRC_INIT_VALUE 0x4F4EU
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#define CRC_ORDER 16U
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#define CRC_POLYNOM 0x8005U
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#else
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#define PAYLOAD_ARG_CNT 6U
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#endif
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#define PAYLOAD_ARG_SIZE 4U /* size in bytes */
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#define TZ_VERSION_MAJOR 1
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#define TZ_VERSION_MINOR 0
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#define TZ_VERSION ((TZ_VERSION_MAJOR << 16) | \
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TZ_VERSION_MINOR)
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/**
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* pm_ipi - struct for capturing IPI-channel specific info
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* @local_ipi_id Local IPI agent ID
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* @remote_ipi_id Remote IPI Agent ID
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* @buffer_base base address for payload buffer
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*/
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struct pm_ipi {
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const uint32_t local_ipi_id;
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const uint32_t remote_ipi_id;
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const uintptr_t buffer_base;
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};
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/**
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* pm_proc - struct for capturing processor related info
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* @node_id node-ID of the processor
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* @pwrdn_mask cpu-specific mask to be used for power control register
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* @ipi pointer to IPI channel structure
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* (in APU all processors share one IPI channel)
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*/
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struct pm_proc {
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const uint32_t node_id;
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const uint32_t pwrdn_mask;
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const struct pm_ipi *ipi;
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};
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const struct pm_proc *pm_get_proc(uint32_t cpuid);
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#endif /* PM_COMMON_H */
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/*
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* Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2020-2022, Xilinx, Inc. All rights reserved.
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* Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PM_IPI_H
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#define PM_IPI_H
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#include <plat_ipi.h>
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#include <stddef.h>
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#include "pm_common.h"
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#define IPI_BLOCKING 1
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#define IPI_NON_BLOCKING 0
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void pm_ipi_init(const struct pm_proc *proc);
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enum pm_ret_status pm_ipi_send(const struct pm_proc *proc,
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uint32_t payload[PAYLOAD_ARG_CNT]);
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enum pm_ret_status pm_ipi_send_non_blocking(const struct pm_proc *proc,
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uint32_t payload[PAYLOAD_ARG_CNT]);
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enum pm_ret_status pm_ipi_send_sync(const struct pm_proc *proc,
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uint32_t payload[PAYLOAD_ARG_CNT],
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uint32_t *value, size_t count);
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void pm_ipi_buff_read_callb(uint32_t *value, size_t count);
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void pm_ipi_irq_enable(const struct pm_proc *proc);
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void pm_ipi_irq_clear(const struct pm_proc *proc);
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uint32_t pm_ipi_irq_status(const struct pm_proc *proc);
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#if IPI_CRC_CHECK
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uint32_t calculate_crc(uint32_t payload[PAYLOAD_ARG_CNT], uint32_t buffersize);
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#endif
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#endif /* PM_IPI_H */
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