#ifndef __SC8238_H__ #define __SC8238_H__ #include "sns_comm.h" #ifdef __cplusplus extern "C" { #endif #ifdef FPGA #define SC8238_VMAX_8M_LINEAR 0x8CA #define SC8238_VMAX_4M_LINEAR 0x8CA #define SC8238_VMAX_1M_LINEAR 0x2EE #define SC8238_VMAX_5M_1728P_LINEAR 0x0 // not supprot #define SC8238_VMAX_5M_LINEAR SC8238_VMAX_8M_LINEAR // crop from 8M #define SC8238_VMAX_3M_LINEAR SC8238_VMAX_8M_LINEAR #define SC8238_VMAX_2M_LINEAR SC8238_VMAX_8M_LINEAR #define SC8238_VMAX_8M_WDR 0x1194 #define SC8238_VMAX_1M_WDR 0x5DC #define SC8238_VMAX_5M_WDR SC8238_VMAX_8M_WDR // crop from 8M #define SC8238_VMAX_4M_WDR SC8238_VMAX_8M_WDR #define SC8238_VMAX_3M_WDR SC8238_VMAX_8M_WDR #define SC8238_VMAX_2M_WDR SC8238_VMAX_8M_WDR #define SC8238_S_EXP_MAX_DEFAULT_2160P 0x005E #define SC8238_S_EXP_MAX_DEFAULT_720P 0x0388 #else #define SC8238_VMAX_8M_LINEAR 0x8CA #define SC8238_VMAX_5M_1728P_LINEAR 0x7D0 #define SC8238_VMAX_5M_LINEAR SC8238_VMAX_8M_LINEAR // crop from 8M #define SC8238_VMAX_4M_LINEAR SC8238_VMAX_8M_LINEAR #define SC8238_VMAX_3M_LINEAR SC8238_VMAX_8M_LINEAR #define SC8238_VMAX_2M_LINEAR SC8238_VMAX_8M_LINEAR #define SC8238_VMAX_1M_LINEAR SC8238_VMAX_8M_LINEAR #define SC8238_VMAX_8M_WDR 0x1194 #define SC8238_VMAX_5M_WDR SC8238_VMAX_8M_WDR // crop from 8M #define SC8238_VMAX_4M_WDR SC8238_VMAX_8M_WDR #define SC8238_VMAX_3M_WDR SC8238_VMAX_8M_WDR #define SC8238_VMAX_2M_WDR SC8238_VMAX_8M_WDR #define SC8238_VMAX_1M_WDR SC8238_VMAX_8M_WDR #define SC8238_S_EXP_MAX_DEFAULT_2160P 0x010E #define SC8238_S_EXP_MAX_DEFAULT_720P SC8238_S_EXP_MAX_DEFAULT_2160P // crop from 8M #endif // the value of the sc8238 exposure register is in half line units, (<< 1) for AE calculation, (>> 1) for EXP reg #define SC8238_EXP_SHIFT 1 #define SC8238_EXP_OFFSET_LINEAR 10 #define SC8238_EXP_OFFSET_WDR 18 #define SC8238_REG_ADDR_EXP_H 0x3e00 #define SC8238_REG_ADDR_EXP_M 0x3e01 #define SC8238_REG_ADDR_EXP_L 0x3e02 #define SC8238_REG_ADDR_S_EXP_H 0x3e04 #define SC8238_REG_ADDR_S_EXP_L 0x3e05 #define SC8238_REG_ADDR_S_EXP_MAX_H 0x3e23 #define SC8238_REG_ADDR_S_EXP_MAX_L 0x3e24 #define SC8238_REG_ADDR_AGAIN_H 0x3e08 #define SC8238_REG_ADDR_AGAIN_L 0x3e09 #define SC8238_REG_ADDR_S_AGAIN_H 0x3e12 #define SC8238_REG_ADDR_S_AGAIN_L 0x3e13 #define SC8238_REG_ADDR_DGAIN_H 0x3e06 #define SC8238_REG_ADDR_DGAIN_L 0x3e07 #define SC8238_REG_ADDR_S_DGAIN_H 0x3e10 #define SC8238_REG_ADDR_S_DGAIN_L 0x3e11 #define SC8238_REG_ADDR_VMAX_H 0x320e #define SC8238_REG_ADDR_VMAX_L 0x320f typedef enum { SC8238_REG_EXP_H = 0, SC8238_REG_EXP_M, SC8238_REG_EXP_L, SC8238_REG_DGC_H, SC8238_REG_DGC_L, SC8238_REG_AGC_H, SC8238_REG_AGC_L, SC8238_REG_VMAX_H, SC8238_REG_VMAX_L, SC8238_REG_L_MAX_NUM, // short frame reg info from here SC8238_REG_S_EXP_H = SC8238_REG_L_MAX_NUM, SC8238_REG_S_EXP_L, SC8238_REG_S_DGAIN_H, SC8238_REG_S_DGAIN_L, SC8238_REG_S_AGAIN_H, SC8238_REG_S_AGAIN_L, SC8238_REG_S_EXP_MAX_H, SC8238_REG_S_EXP_MAX_L, SC8238_REG_MAX_NUM } sc8238_reg_info; #define SC8238_FULL_LINES_MAX 0xFFFF #ifdef __cplusplus } #endif #endif // __SC8238_H__