68 lines
1.7 KiB
C
Executable File
68 lines
1.7 KiB
C
Executable File
#ifndef __OS05A10_H__
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#define __OS05A10_H__
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#include "sns_comm.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef FPGA
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#define OS05A10_VMAX_5M_LINEAR 0x9c0
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#define OS05A10_VMAX_4M_LINEAR 0x9c0
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#define OS05A10_VMAX_5M_WDR 0x0 // not spupport
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#define OS05A10_VMAX_4M_WDR 0x0 // not spupport
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#else
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#define OS05A10_VMAX_5M_LINEAR 0x921
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#define OS05A10_VMAX_4M_LINEAR 0x921
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#define OS05A10_VMAX_5M_WDR 0x836
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#define OS05A10_VMAX_4M_WDR 0x836
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#endif
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#define OS05A10_REG_ADDR_EXP_H 0x3501
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#define OS05A10_REG_ADDR_EXP_L 0x3502
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#define OS05A10_REG_ADDR_AGC_H 0x3508 // Bit[5:0]
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#define OS05A10_REG_ADDR_AGC_L 0x3509 // Bit[7:0]
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#define OS05A10_REG_ADDR_DGC_H 0x350A // Bit[5:0]
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#define OS05A10_REG_ADDR_DGC_L 0x350B // Bit[7:0]
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#define OS05A10_REG_ADDR_VMAX_H 0X380E
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#define OS05A10_REG_ADDR_VMAX_L 0X380F
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#define OS05A10_REG_ADDR_S_EXP_H 0X3511
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#define OS05A10_REG_ADDR_S_EXP_L 0X3512
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#define OS05A10_REG_ADDR_S_AGC_H 0X350C // Bit[5:0]
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#define OS05A10_REG_ADDR_S_AGC_L 0X350D // Bit[7:0]
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#define OS05A10_REG_ADDR_S_DGC_H 0X350E // Bit[5:0]
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#define OS05A10_REG_ADDR_S_DGC_L 0X350F // Bit[7:0]
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#define OS05A10_EXP_OFFSET 8
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typedef enum {
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OS05A10_REG_EXP_H = 0,
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OS05A10_REG_EXP_L,
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OS05A10_REG_AGC_H,
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OS05A10_REG_AGC_L,
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OS05A10_REG_DGC_H,
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OS05A10_REG_DGC_L,
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OS05A10_REG_VMAX_H,
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OS05A10_REG_VMAX_L,
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OS05A10_REG_L_MAX_NUM,
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// short frame reg info from here
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OS05A10_REG_S_EXP_H = OS05A10_REG_L_MAX_NUM,
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OS05A10_REG_S_EXP_L,
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OS05A10_REG_S_DGC_H,
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OS05A10_REG_S_DGC_L,
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OS05A10_REG_S_AGC_H,
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OS05A10_REG_S_AGC_L,
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OS05A10_REG_MAX_NUM
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} os05a10_reg_info;
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#define OS05A10_FULL_LINES_MAX 0x9240
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#ifdef __cplusplus
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}
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#endif
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#endif //__OS05A10_H__
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