564 lines
20 KiB
C
Executable File
564 lines
20 KiB
C
Executable File
#include <stdio.h>
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#include "sample_comm_tp.h"
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#include "sample_comm.h"
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xmedia_s32 sample_comm_tp9963_decoder_init(tp9963_chn ch, tp9963_fmt fmt, tp9963_std std)
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{
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xmedia_u32 tmp;
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const xmedia_uchar reg42_43[] = { 0x01, 0x02, 0x00, 0x00, 0x03 };
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const xmedia_uchar mask42_43[] = { 0xfe, 0xfd, 0xff, 0xff, 0xfc };
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sample_comm_tp_i2c_write(0x40, ch);
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sample_comm_tp_i2c_write(0x06, 0x12); // default value
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sample_comm_tp_i2c_write(0x50, 0x00); // VIN1/3
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sample_comm_tp_i2c_write(0x51, 0x00); //
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sample_comm_tp_i2c_write(0x54, 0x03);
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if (fmt == TP_FMT_HD25) {
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sample_comm_tp_i2c_read(0x42, &tmp);
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tmp |= reg42_43[ch];
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sample_comm_tp_i2c_write(0x42, tmp);
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sample_comm_tp_i2c_read(0x43, &tmp);
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tmp &= mask42_43[ch];
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sample_comm_tp_i2c_write(0x43, tmp);
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sample_comm_tp_i2c_write(0x02, 0x42);
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sample_comm_tp_i2c_write(0x07, 0xc0);
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sample_comm_tp_i2c_write(0x0b, 0xc0);
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sample_comm_tp_i2c_write(0x0c, 0x13);
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sample_comm_tp_i2c_write(0x0d, 0x50);
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sample_comm_tp_i2c_write(0x15, 0x13);
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sample_comm_tp_i2c_write(0x16, 0x15);
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sample_comm_tp_i2c_write(0x17, 0x00);
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sample_comm_tp_i2c_write(0x18, 0x19);
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sample_comm_tp_i2c_write(0x19, 0xd0);
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sample_comm_tp_i2c_write(0x1a, 0x25);
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sample_comm_tp_i2c_write(0x1c, 0x07); // 1280*720, 25fps
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sample_comm_tp_i2c_write(0x1d, 0xbc); // 1280*720, 25fps
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sample_comm_tp_i2c_write(0x20, 0x30);
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sample_comm_tp_i2c_write(0x21, 0x84);
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sample_comm_tp_i2c_write(0x22, 0x36);
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sample_comm_tp_i2c_write(0x23, 0x3c);
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sample_comm_tp_i2c_write(0x2b, 0x60);
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sample_comm_tp_i2c_write(0x2c, 0x2a);
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sample_comm_tp_i2c_write(0x2d, 0x30);
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sample_comm_tp_i2c_write(0x2e, 0x70);
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sample_comm_tp_i2c_write(0x30, 0x48);
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sample_comm_tp_i2c_write(0x31, 0xbb);
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sample_comm_tp_i2c_write(0x32, 0x2e);
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sample_comm_tp_i2c_write(0x33, 0x90);
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sample_comm_tp_i2c_write(0x35, 0x25);
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sample_comm_tp_i2c_write(0x39, 0x08);
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if (std == TP_STD_HDA) {
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sample_comm_tp_i2c_write(0x02, 0x46);
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sample_comm_tp_i2c_write(0x0d, 0x71);
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sample_comm_tp_i2c_write(0x18, 0x1b);
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sample_comm_tp_i2c_write(0x20, 0x40);
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sample_comm_tp_i2c_write(0x21, 0x46);
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sample_comm_tp_i2c_write(0x25, 0xfe);
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sample_comm_tp_i2c_write(0x26, 0x01);
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sample_comm_tp_i2c_write(0x2c, 0x3a);
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sample_comm_tp_i2c_write(0x2d, 0x5a);
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sample_comm_tp_i2c_write(0x2e, 0x40);
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sample_comm_tp_i2c_write(0x30, 0x9e);
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sample_comm_tp_i2c_write(0x31, 0x20);
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sample_comm_tp_i2c_write(0x32, 0x10);
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sample_comm_tp_i2c_write(0x33, 0x90);
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}
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} else if (fmt == TP_FMT_HD30) {
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sample_comm_tp_i2c_read(0x42, &tmp);
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tmp |= reg42_43[ch];
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sample_comm_tp_i2c_write(0x42, tmp);
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sample_comm_tp_i2c_read(0x43, &tmp);
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tmp &= mask42_43[ch];
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sample_comm_tp_i2c_write(0x43, tmp);
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sample_comm_tp_i2c_write(0x02, 0x42);
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sample_comm_tp_i2c_write(0x07, 0xc0);
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sample_comm_tp_i2c_write(0x0b, 0xc0);
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sample_comm_tp_i2c_write(0x0c, 0x13);
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sample_comm_tp_i2c_write(0x0d, 0x50);
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sample_comm_tp_i2c_write(0x15, 0x13);
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sample_comm_tp_i2c_write(0x16, 0x15);
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sample_comm_tp_i2c_write(0x17, 0x00);
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sample_comm_tp_i2c_write(0x18, 0x19);
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sample_comm_tp_i2c_write(0x19, 0xd0);
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sample_comm_tp_i2c_write(0x1a, 0x25);
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sample_comm_tp_i2c_write(0x1c, 0x06); // 1280*720, 30fps
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sample_comm_tp_i2c_write(0x1d, 0x72); // 1280*720, 30fps
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sample_comm_tp_i2c_write(0x20, 0x30);
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sample_comm_tp_i2c_write(0x21, 0x84);
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sample_comm_tp_i2c_write(0x22, 0x36);
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sample_comm_tp_i2c_write(0x23, 0x3c);
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sample_comm_tp_i2c_write(0x2b, 0x60);
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sample_comm_tp_i2c_write(0x2c, 0x2a);
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sample_comm_tp_i2c_write(0x2d, 0x30);
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sample_comm_tp_i2c_write(0x2e, 0x70);
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sample_comm_tp_i2c_write(0x30, 0x48);
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sample_comm_tp_i2c_write(0x31, 0xbb);
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sample_comm_tp_i2c_write(0x32, 0x2e);
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sample_comm_tp_i2c_write(0x33, 0x90);
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sample_comm_tp_i2c_write(0x35, 0x25);
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sample_comm_tp_i2c_write(0x39, 0x08);
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if (std == TP_STD_HDA) {
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sample_comm_tp_i2c_write(0x02, 0x46);
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sample_comm_tp_i2c_write(0x0d, 0x70);
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sample_comm_tp_i2c_write(0x18, 0x1b);
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sample_comm_tp_i2c_write(0x20, 0x40);
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sample_comm_tp_i2c_write(0x21, 0x46);
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sample_comm_tp_i2c_write(0x25, 0xfe);
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sample_comm_tp_i2c_write(0x26, 0x01);
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sample_comm_tp_i2c_write(0x2c, 0x3a);
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sample_comm_tp_i2c_write(0x2d, 0x5a);
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sample_comm_tp_i2c_write(0x2e, 0x40);
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sample_comm_tp_i2c_write(0x30, 0x9d);
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sample_comm_tp_i2c_write(0x31, 0xca);
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sample_comm_tp_i2c_write(0x32, 0x01);
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sample_comm_tp_i2c_write(0x33, 0xd0);
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}
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} else if (fmt == TP_FMT_FHD25) {
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sample_comm_tp_i2c_read(0x42, &tmp);
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tmp &= mask42_43[ch];
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sample_comm_tp_i2c_write(0x42, tmp);
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sample_comm_tp_i2c_read(0x43, &tmp);
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tmp &= mask42_43[ch];
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sample_comm_tp_i2c_write(0x43, tmp);
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sample_comm_tp_i2c_write(0x02, 0x40);
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sample_comm_tp_i2c_write(0x07, 0xc0);
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sample_comm_tp_i2c_write(0x0b, 0xc0);
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sample_comm_tp_i2c_write(0x0c, 0x03);
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sample_comm_tp_i2c_write(0x0d, 0x50);
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sample_comm_tp_i2c_write(0x15, 0x03);
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sample_comm_tp_i2c_write(0x16, 0xd2);
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sample_comm_tp_i2c_write(0x17, 0x80);
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sample_comm_tp_i2c_write(0x18, 0x29);
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sample_comm_tp_i2c_write(0x19, 0x38);
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sample_comm_tp_i2c_write(0x1a, 0x47);
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sample_comm_tp_i2c_write(0x1c, 0x0a); // 1920*1080, 25fps
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sample_comm_tp_i2c_write(0x1d, 0x50); //
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sample_comm_tp_i2c_write(0x20, 0x30);
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sample_comm_tp_i2c_write(0x21, 0x84);
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sample_comm_tp_i2c_write(0x22, 0x36);
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sample_comm_tp_i2c_write(0x23, 0x3c);
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sample_comm_tp_i2c_write(0x2b, 0x60);
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sample_comm_tp_i2c_write(0x2c, 0x2a);
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sample_comm_tp_i2c_write(0x2d, 0x30);
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sample_comm_tp_i2c_write(0x2e, 0x70);
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sample_comm_tp_i2c_write(0x30, 0x48);
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sample_comm_tp_i2c_write(0x31, 0xbb);
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sample_comm_tp_i2c_write(0x32, 0x2e);
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sample_comm_tp_i2c_write(0x33, 0x90);
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sample_comm_tp_i2c_write(0x35, 0x05);
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sample_comm_tp_i2c_write(0x39, 0x0C);
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if (std == TP_STD_HDA) {
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sample_comm_tp_i2c_write(0x02, 0x44);
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sample_comm_tp_i2c_write(0x0d, 0x73);
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sample_comm_tp_i2c_write(0x15, 0x01);
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sample_comm_tp_i2c_write(0x16, 0xf0);
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sample_comm_tp_i2c_write(0x18, 0x2a);
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sample_comm_tp_i2c_write(0x20, 0x3c);
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sample_comm_tp_i2c_write(0x21, 0x46);
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sample_comm_tp_i2c_write(0x25, 0xfe);
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sample_comm_tp_i2c_write(0x26, 0x0d);
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sample_comm_tp_i2c_write(0x2c, 0x3a);
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sample_comm_tp_i2c_write(0x2d, 0x54);
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sample_comm_tp_i2c_write(0x2e, 0x40);
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sample_comm_tp_i2c_write(0x30, 0xa5);
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sample_comm_tp_i2c_write(0x31, 0x86);
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sample_comm_tp_i2c_write(0x32, 0xfb);
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sample_comm_tp_i2c_write(0x33, 0x60);
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}
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} else if (fmt == TP_FMT_FHD30) {
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sample_comm_tp_i2c_read(0x42, &tmp);
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tmp &= mask42_43[ch];
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sample_comm_tp_i2c_write(0x42, tmp);
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sample_comm_tp_i2c_read(0x43, &tmp);
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tmp &= mask42_43[ch];
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sample_comm_tp_i2c_write(0x43, tmp);
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sample_comm_tp_i2c_write(0x02, 0x40);
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sample_comm_tp_i2c_write(0x07, 0xc0);
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sample_comm_tp_i2c_write(0x0b, 0xc0);
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sample_comm_tp_i2c_write(0x0c, 0x03);
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sample_comm_tp_i2c_write(0x0d, 0x50);
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sample_comm_tp_i2c_write(0x15, 0x03);
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sample_comm_tp_i2c_write(0x16, 0xd2);
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sample_comm_tp_i2c_write(0x17, 0x80);
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sample_comm_tp_i2c_write(0x18, 0x29);
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sample_comm_tp_i2c_write(0x19, 0x38);
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sample_comm_tp_i2c_write(0x1a, 0x47);
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sample_comm_tp_i2c_write(0x1c, 0x08); // 1920*1080, 30fps
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sample_comm_tp_i2c_write(0x1d, 0x98); //
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sample_comm_tp_i2c_write(0x20, 0x30);
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sample_comm_tp_i2c_write(0x21, 0x84);
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sample_comm_tp_i2c_write(0x22, 0x36);
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sample_comm_tp_i2c_write(0x23, 0x3c);
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sample_comm_tp_i2c_write(0x2b, 0x60);
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sample_comm_tp_i2c_write(0x2c, 0x2a);
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sample_comm_tp_i2c_write(0x2d, 0x30);
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sample_comm_tp_i2c_write(0x2e, 0x70);
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sample_comm_tp_i2c_write(0x30, 0x48);
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sample_comm_tp_i2c_write(0x31, 0xbb);
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sample_comm_tp_i2c_write(0x32, 0x2e);
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sample_comm_tp_i2c_write(0x33, 0x90);
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sample_comm_tp_i2c_write(0x35, 0x05);
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sample_comm_tp_i2c_write(0x39, 0x0C);
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if (std == TP_STD_HDA) {
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sample_comm_tp_i2c_write(0x02, 0x44);
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sample_comm_tp_i2c_write(0x0d, 0x72);
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sample_comm_tp_i2c_write(0x15, 0x01);
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sample_comm_tp_i2c_write(0x16, 0xf0);
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sample_comm_tp_i2c_write(0x18, 0x2a);
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sample_comm_tp_i2c_write(0x20, 0x38);
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sample_comm_tp_i2c_write(0x21, 0x46);
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sample_comm_tp_i2c_write(0x25, 0xfe);
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sample_comm_tp_i2c_write(0x26, 0x0d);
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sample_comm_tp_i2c_write(0x2c, 0x3a);
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sample_comm_tp_i2c_write(0x2d, 0x54);
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sample_comm_tp_i2c_write(0x2e, 0x40);
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sample_comm_tp_i2c_write(0x30, 0xa5);
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sample_comm_tp_i2c_write(0x31, 0x95);
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sample_comm_tp_i2c_write(0x32, 0xe0);
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sample_comm_tp_i2c_write(0x33, 0x60);
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}
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} else if (fmt == TP_FMT_QHD25) {
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sample_comm_tp_i2c_read(0x42, &tmp);
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tmp &= mask42_43[ch];
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sample_comm_tp_i2c_write(0x42, tmp);
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sample_comm_tp_i2c_read(0x43, &tmp);
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tmp &= mask42_43[ch];
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sample_comm_tp_i2c_write(0x43, tmp);
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sample_comm_tp_i2c_write(0x02, 0x50);
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sample_comm_tp_i2c_write(0x07, 0xc0);
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sample_comm_tp_i2c_write(0x0b, 0xc0);
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sample_comm_tp_i2c_write(0x0c, 0x03);
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sample_comm_tp_i2c_write(0x0d, 0x50);
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sample_comm_tp_i2c_write(0x15, 0x23);
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sample_comm_tp_i2c_write(0x16, 0x1b);
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sample_comm_tp_i2c_write(0x17, 0x00);
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sample_comm_tp_i2c_write(0x18, 0x38);
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sample_comm_tp_i2c_write(0x19, 0xa0);
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sample_comm_tp_i2c_write(0x1a, 0x5a);
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sample_comm_tp_i2c_write(0x1c, 0x0f); //2560*1440, 25fps
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sample_comm_tp_i2c_write(0x1d, 0x76); //
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sample_comm_tp_i2c_write(0x20, 0x50);
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sample_comm_tp_i2c_write(0x21, 0x84);
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sample_comm_tp_i2c_write(0x22, 0x36);
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sample_comm_tp_i2c_write(0x23, 0x3c);
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sample_comm_tp_i2c_write(0x27, 0xad);
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sample_comm_tp_i2c_write(0x2b, 0x60);
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sample_comm_tp_i2c_write(0x2c, 0x2a);
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sample_comm_tp_i2c_write(0x2d, 0x58);
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sample_comm_tp_i2c_write(0x2e, 0x70);
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sample_comm_tp_i2c_write(0x30, 0x74);
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sample_comm_tp_i2c_write(0x31, 0x58);
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sample_comm_tp_i2c_write(0x32, 0x9f);
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sample_comm_tp_i2c_write(0x33, 0x60);
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sample_comm_tp_i2c_write(0x35, 0x15);
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sample_comm_tp_i2c_write(0x36, 0xdc);
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sample_comm_tp_i2c_write(0x38, 0x40);
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sample_comm_tp_i2c_write(0x39, 0x48);
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if (std == TP_STD_HDA) {
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sample_comm_tp_i2c_read(0x14, &tmp);
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tmp &= 0x9f;
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sample_comm_tp_i2c_write(0x14, tmp);
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sample_comm_tp_i2c_write(0x13, 0x00);
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sample_comm_tp_i2c_write(0x15, 0x23);
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sample_comm_tp_i2c_write(0x16, 0x16);
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sample_comm_tp_i2c_write(0x18, 0x32);
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sample_comm_tp_i2c_write(0x1c, 0x8f);
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sample_comm_tp_i2c_write(0x1d, 0x76);
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sample_comm_tp_i2c_write(0x0d, 0x70);
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sample_comm_tp_i2c_write(0x20, 0x80);
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sample_comm_tp_i2c_write(0x21, 0x86);
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sample_comm_tp_i2c_write(0x22, 0x36);
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sample_comm_tp_i2c_write(0x2b, 0x60);
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sample_comm_tp_i2c_write(0x2d, 0xa0);
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sample_comm_tp_i2c_write(0x2e, 0x40);
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sample_comm_tp_i2c_write(0x30, 0x48);
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sample_comm_tp_i2c_write(0x31, 0x6f);
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sample_comm_tp_i2c_write(0x32, 0xb5);
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sample_comm_tp_i2c_write(0x33, 0x80);
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sample_comm_tp_i2c_write(0x39, 0x40);
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}
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} else {
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SAMPLE_PRT("Unsupported fmt %d\n", fmt);
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return XMEDIA_FAILURE;
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}
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sample_comm_tp_i2c_read(0x06, &tmp);
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tmp |= 0x80;
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sample_comm_tp_i2c_write(0x06, tmp);
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return XMEDIA_SUCCESS;
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}
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xmedia_s32 sample_comm_tp9963_set_mipi_mode(tp9963_mipi_mode mode)
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{
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// mipi setting
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sample_comm_tp_i2c_write(0x40, TP_CH_MIPI_PAGE); // MIPI page
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sample_comm_tp_i2c_write(0x02, 0x78);
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sample_comm_tp_i2c_write(0x03, 0x70);
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sample_comm_tp_i2c_write(0x04, 0x70);
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sample_comm_tp_i2c_write(0x05, 0x70);
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sample_comm_tp_i2c_write(0x06, 0x70);
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sample_comm_tp_i2c_write(0x13, 0xef);
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sample_comm_tp_i2c_write(0x20, 0x00);
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sample_comm_tp_i2c_write(0x21, 0x22);
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sample_comm_tp_i2c_write(0x22, 0x30);
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sample_comm_tp_i2c_write(0x23, 0x9e);
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// colorbar
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// sample_comm_tp_i2c_write(0x20, 0x80); // TP_ENA, Test function to enable BT.1120 test pattern output to mipi module
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if (mode == TP_MIPI_MODE_2CH2LANE_594M) {
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sample_comm_tp_i2c_write(0x21, 0x22);
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sample_comm_tp_i2c_write(0x14, 0x00);
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sample_comm_tp_i2c_write(0x15, 0x01);
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sample_comm_tp_i2c_write(0x2a, 0x08);
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sample_comm_tp_i2c_write(0x2b, 0x08);
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sample_comm_tp_i2c_write(0x2c, 0x10);
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sample_comm_tp_i2c_write(0x2e, 0x0a);
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sample_comm_tp_i2c_write(0x10, 0xa0);
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sample_comm_tp_i2c_write(0x10, 0x20);
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} else if (mode == TP_MIPI_MODE_1CH2LANE_594M) {
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sample_comm_tp_i2c_write(0x21, 0x12);
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sample_comm_tp_i2c_write(0x14, 0x00);
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sample_comm_tp_i2c_write(0x15, 0x01);
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sample_comm_tp_i2c_write(0x2a, 0x08);
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sample_comm_tp_i2c_write(0x2b, 0x08);
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sample_comm_tp_i2c_write(0x2c, 0x10);
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sample_comm_tp_i2c_write(0x2e, 0x0a);
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sample_comm_tp_i2c_write(0x10, 0xa0);
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sample_comm_tp_i2c_write(0x10, 0x20);
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} else if (mode == TP_MIPI_MODE_2CH2LANE_297M) {
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sample_comm_tp_i2c_write(0x21, 0x22);
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sample_comm_tp_i2c_write(0x14, 0x41);
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sample_comm_tp_i2c_write(0x15, 0x02);
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sample_comm_tp_i2c_write(0x2a, 0x04);
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sample_comm_tp_i2c_write(0x2b, 0x03);
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sample_comm_tp_i2c_write(0x2c, 0x09);
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sample_comm_tp_i2c_write(0x2e, 0x02);
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sample_comm_tp_i2c_write(0x10, 0xa0);
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sample_comm_tp_i2c_write(0x10, 0x20);
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} else if (mode == TP_MIPI_MODE_1CH2LANE_297M) {
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sample_comm_tp_i2c_write(0x21, 0x12);
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sample_comm_tp_i2c_write(0x14, 0x41);
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sample_comm_tp_i2c_write(0x15, 0x02);
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sample_comm_tp_i2c_write(0x2a, 0x04);
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sample_comm_tp_i2c_write(0x2b, 0x03);
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sample_comm_tp_i2c_write(0x2c, 0x09);
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sample_comm_tp_i2c_write(0x2e, 0x02);
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sample_comm_tp_i2c_write(0x10, 0xa0);
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sample_comm_tp_i2c_write(0x10, 0x20);
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} else if (mode == TP_MIPI_MODE_2CH4LANE_594M) {
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sample_comm_tp_i2c_write(0x21, 0x24);
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sample_comm_tp_i2c_write(0x14, 0x00);
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sample_comm_tp_i2c_write(0x15, 0x00);
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sample_comm_tp_i2c_write(0x2a, 0x08);
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sample_comm_tp_i2c_write(0x2b, 0x08);
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sample_comm_tp_i2c_write(0x2c, 0x10);
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sample_comm_tp_i2c_write(0x2e, 0x0a);
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sample_comm_tp_i2c_write(0x10, 0xa0);
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sample_comm_tp_i2c_write(0x10, 0x20);
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} else if (mode == TP_MIPI_MODE_2CH4LANE_297M) {
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sample_comm_tp_i2c_write(0x21, 0x24);
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sample_comm_tp_i2c_write(0x14, 0x41);
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sample_comm_tp_i2c_write(0x15, 0x01);
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sample_comm_tp_i2c_write(0x2a, 0x04);
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sample_comm_tp_i2c_write(0x2b, 0x03);
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sample_comm_tp_i2c_write(0x2c, 0x09);
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sample_comm_tp_i2c_write(0x2e, 0x02);
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sample_comm_tp_i2c_write(0x10, 0xa0);
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sample_comm_tp_i2c_write(0x10, 0x20);
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} else if (mode == TP_MIPI_MODE_1CH4LANE_297M) {
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sample_comm_tp_i2c_write(0x21, 0x14);
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sample_comm_tp_i2c_write(0x14, 0x41);
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sample_comm_tp_i2c_write(0x15, 0x01);
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sample_comm_tp_i2c_write(0x2a, 0x04);
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sample_comm_tp_i2c_write(0x2b, 0x03);
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sample_comm_tp_i2c_write(0x2c, 0x09);
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sample_comm_tp_i2c_write(0x2e, 0x02);
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sample_comm_tp_i2c_write(0x10, 0xa0);
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sample_comm_tp_i2c_write(0x10, 0x20);
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} else if (mode == TP_MIPI_MODE_2CH2LANE_432M) {
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sample_comm_tp_i2c_write(0x21, 0x22);
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sample_comm_tp_i2c_write(0x13, 0x0f);
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sample_comm_tp_i2c_write(0x12, 0x5e);
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sample_comm_tp_i2c_write(0x14, 0x00);
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sample_comm_tp_i2c_write(0x15, 0x01);
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sample_comm_tp_i2c_write(0x2a, 0x06);
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sample_comm_tp_i2c_write(0x2b, 0x05);
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sample_comm_tp_i2c_write(0x2c, 0x0d);
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sample_comm_tp_i2c_write(0x2e, 0x0a);
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sample_comm_tp_i2c_write(0x10, 0xa0);
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sample_comm_tp_i2c_write(0x10, 0x20);
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} else if (mode == TP_MIPI_MODE_2CH4LANE_216M) {
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sample_comm_tp_i2c_write(0x21, 0x24);
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sample_comm_tp_i2c_write(0x13, 0x0f);
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sample_comm_tp_i2c_write(0x12, 0x5e);
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sample_comm_tp_i2c_write(0x14, 0x41);
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sample_comm_tp_i2c_write(0x15, 0x01);
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sample_comm_tp_i2c_write(0x2a, 0x06);
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sample_comm_tp_i2c_write(0x2b, 0x05);
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sample_comm_tp_i2c_write(0x2c, 0x0d);
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sample_comm_tp_i2c_write(0x2e, 0x0a);
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sample_comm_tp_i2c_write(0x10, 0xa0);
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sample_comm_tp_i2c_write(0x10, 0x20);
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} else if (mode == TP_MIPI_MODE_2CH2LANE_445M) {
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sample_comm_tp_i2c_write(0x21, 0x22);
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sample_comm_tp_i2c_write(0x13, 0x07);
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sample_comm_tp_i2c_write(0x12, 0x5f);
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sample_comm_tp_i2c_write(0x14, 0x00);
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sample_comm_tp_i2c_write(0x15, 0x01);
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sample_comm_tp_i2c_write(0x2a, 0x06);
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sample_comm_tp_i2c_write(0x2b, 0x05);
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sample_comm_tp_i2c_write(0x2c, 0x0d);
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sample_comm_tp_i2c_write(0x2e, 0x0a);
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sample_comm_tp_i2c_write(0x10, 0xa0);
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sample_comm_tp_i2c_write(0x10, 0x20);
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} else {
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SAMPLE_PRT("Unsupported mipi mode %d\n", mode);
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return XMEDIA_FAILURE;
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}
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/* Enable MIPI CSI2 output */
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sample_comm_tp_i2c_write(0x28, 0x02);
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sample_comm_tp_i2c_write(0x28, 0x00);
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return XMEDIA_SUCCESS;
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}
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xmedia_s32 sample_comm_tp9963_init(sample_comm_tp9963_cfg *cfg)
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{
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xmedia_s32 i;
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xmedia_s32 ret;
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ret = sample_comm_tp_i2c_init(cfg->i2c_dev);
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if (ret != XMEDIA_SUCCESS) {
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return ret;
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}
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for (i = 0; i < TP_MAX_CHN; i++) {
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if (cfg->chn[i] != TP_CH_1 && cfg->chn[i] != TP_CH_2 && cfg->chn[i] != TP_CH_ALL) {
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continue;
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}
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ret = sample_comm_tp9963_decoder_init(cfg->chn[i], cfg->fmt[i], cfg->std[i]);
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if (ret != XMEDIA_SUCCESS) {
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return ret;
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}
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}
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ret = sample_comm_tp9963_set_mipi_mode(cfg->mipi_mode);
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if (ret != XMEDIA_SUCCESS) {
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return ret;
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}
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return XMEDIA_SUCCESS;
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}
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xmedia_s32 sample_comm_tp9963_deinit(xmedia_void)
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{
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/* Disable MIPI CSI2 output */
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sample_comm_tp_i2c_write(0x40, TP_CH_MIPI_PAGE);
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sample_comm_tp_i2c_write(0x28, 0x00);
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sample_comm_tp_i2c_write(0x28, 0x02);
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sample_comm_tp_i2c_exit();
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return XMEDIA_SUCCESS;
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}
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