160 lines
5.2 KiB
C
160 lines
5.2 KiB
C
/*
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Copyright (c), 2001-2022, Shenshu Tech. Co., Ltd.
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*/
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#ifndef __MIPI_RX_HAL_H__
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#define __MIPI_RX_HAL_H__
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#include "type.h"
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#include "ot_mipi_rx.h"
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#include "mipi_rx_reg.h"
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#define MIPI_RX_LANE_NUM 4
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#define MIPI_RX_MAX_PHY_NUM 4
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#define MIPI_RX_PHY_ID_0 0
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#define MIPI_RX_PHY_ID_1 1
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#define MIPI_RX_PHY_ID_2 2
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#define MIPI_RX_PHY_ID_3 3
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#define MIPI_RX_LANE_ID_INVALID (-1)
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#define MIPI_RX_LANE_ID_0 0
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#define MIPI_RX_LANE_ID_1 1
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#define MIPI_RX_LANE_ID_2 2
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#define MIPI_RX_LANE_ID_3 3
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#define MIPI_RX_VC_0 0
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#define MIPI_RX_VC_1 1
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#define MIPI_RX_VC_2 2
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#define MIPI_RX_VC_3 3
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#define MIPI_CIL_INT_MASK 0x00003f3f
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#define MIPI_CTRL_INT_MASK 0x00030003
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#define MIPI_CSI_INT_MASK 0x000001ff
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#define ALIGN0_INT_MASK 0x0000001f
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#define MIPI_CHN_INT_MASK 0x0000000a
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typedef struct {
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unsigned int clk1_fsm_timeout_err_cnt;
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unsigned int clk0_fsm_timeout_err_cnt;
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unsigned int d0_fsm_timeout_err_cnt;
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unsigned int d1_fsm_timeout_err_cnt;
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unsigned int d2_fsm_timeout_err_cnt;
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unsigned int d3_fsm_timeout_err_cnt;
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unsigned int clk1_fsm_escape_err_cnt;
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unsigned int clk0_fsm_escape_err_cnt;
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unsigned int d0_fsm_escape_err_cnt;
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unsigned int d1_fsm_escape_err_cnt;
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unsigned int d2_fsm_escape_err_cnt;
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unsigned int d3_fsm_escape_err_cnt;
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} phy_err_int_cnt_t;
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typedef struct {
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/* Packet err */
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unsigned int err_ecc_double_cnt;
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unsigned int vc3_err_crc_cnt;
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unsigned int vc2_err_crc_cnt;
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unsigned int vc1_err_crc_cnt;
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unsigned int vc0_err_crc_cnt;
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unsigned int vc3_err_ecc_corrected_cnt;
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unsigned int vc2_err_ecc_corrected_cnt;
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unsigned int vc1_err_ecc_corrected_cnt;
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unsigned int vc0_err_ecc_corrected_cnt;
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/* Frame err */
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unsigned int err_f_seq_vc3_cnt;
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unsigned int err_f_seq_vc2_cnt;
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unsigned int err_f_seq_vc1_cnt;
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unsigned int err_f_seq_vc0_cnt;
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unsigned int err_f_bndry_match_vc3_cnt;
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unsigned int err_f_bndry_match_vc2_cnt;
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unsigned int err_f_bndry_match_vc1_cnt;
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unsigned int err_f_bndry_match_vc0_cnt;
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/* Ctrl err */
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unsigned int data_fifo_rderr_cnt;
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unsigned int cmd_fifo_rderr_cnt;
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unsigned int data_fifo_wrerr_cnt;
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unsigned int cmd_fifo_wrerr_cnt;
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} mipi_err_int_cnt_t;
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typedef struct {
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unsigned int cmd_rd_err_cnt;
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unsigned int cmd_wr_err_cnt;
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unsigned int pop_err_cnt;
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unsigned int lvds_state_err_cnt;
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unsigned int link0_rd_err_cnt;
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unsigned int link0_wr_err_cnt;
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} lvds_err_int_cnt_t;
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typedef struct {
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unsigned int lane3_align_err_cnt;
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unsigned int lane2_align_err_cnt;
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unsigned int lane1_align_err_cnt;
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unsigned int lane0_align_err_cnt;
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unsigned int fifo_full_err_cnt;
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} align_err_int_cnt_t;
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typedef enum {
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WORK_4LANE_MODE = 0x00,
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WORK_2LANE_MODE,
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WORK_0LANE_MODE,
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WORK_LANE_MODE_BUTT
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} mipi_lane_mode_t;
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/* mipi_rx function */
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unsigned int mipi_rx_get_chip_id(void);
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phy_err_int_cnt_t *mipi_hal_get_phy_err_int(int phy_id);
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mipi_err_int_cnt_t *mipi_hal_get_mipi_err_int(int phy_id);
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align_err_int_cnt_t *mipi_hal_get_align_err_int(int phy_id);
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void mipi_rx_set_regs(mipi_rx_regs_type_t *regs);
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void mipi_rx_set_irq(unsigned int mipi_rx_irq);
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void mipi_rx_drv_set_work_mode(combo_dev_t devno, input_mode_t input_mode);
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void mipi_rx_drv_set_mipi_crop_en(combo_dev_t devno, bool enable);
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void mipi_rx_drv_set_mipi_yuv_dt(combo_dev_t devno, data_type_t input_data_type);
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unsigned int mipi_rx_drv_get_phy_data(int phy_id, short lane_id);
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unsigned int mipi_rx_drv_get_phy_mipi_link_data(int phy_id, short lane_id);
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void mipi_rx_drv_set_clear_en(combo_dev_t devno);
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void mipi_rx_drv_set_scan_mode(combo_dev_t devno, mipi_scan_mode_t scan_mode);
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void mipi_rx_drv_set_link_lane_id(combo_dev_t devno, input_mode_t input_mode, const short *p_lane_id);
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void mipi_rx_drv_set_pn_swap(combo_dev_t devno, const unsigned char *pn_reverse);
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void mipi_rx_drv_set_mem_cken(combo_dev_t devno, bool enable);
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void mipi_rx_drv_set_phy_config(combo_dev_t devno, input_mode_t input_mode, unsigned int lane_bitmap);
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void mipi_rx_drv_set_phy_cmvmode(input_mode_t input_mode, phy_cmv_mode_t cmv_mode, unsigned int lane_bitmap);
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void mipi_rx_unlock_config(void);
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int mipi_rx_drv_is_lane_valid(combo_dev_t devno, short lane_id, lane_divide_mode_t mode);
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void mipi_rx_drv_set_hs_mode(lane_divide_mode_t lane_divide_mode);
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int check_lane_can_used(combo_dev_t devno, const short lane_id[], int lane_num);
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int mipi_check_lane_mode(combo_dev_t devno, const short lane_id[], int lane_num);
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void mipi_init_lane_mode(void);
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void mipi_rx_drv_get_mipi_imgsize_statis(combo_dev_t devno, short vc, img_size_t *p_size);
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void mipi_rx_drv_enable_clock(combo_dev_t combo_dev);
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void mipi_rx_drv_disable_clock(combo_dev_t combo_dev);
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void mipi_rx_drv_core_reset(combo_dev_t combo_dev);
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void mipi_rx_drv_core_unreset(combo_dev_t combo_dev);
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int mipi_rx_drv_init(void);
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void mipi_rx_drv_exit(void);
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void mipi_rx_drv_set_chn_int_mask(combo_dev_t devno);
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void mipi_rx_drv_set_mipi_ctrl_int_mask(combo_dev_t devno, unsigned int mask);
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void mipi_rx_drv_set_mipi_csi_int_mask(combo_dev_t devno, unsigned int mask);
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void mipi_rx_drv_set_align_int_mask(combo_dev_t devno, unsigned int mask);
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void mipi_rx_drv_set_chn_int_category_mask(combo_dev_t devno, unsigned int mask);
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#endif
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