GK SDK 源码库: XMIPCLinuxV100R005C00SPC030 (kernel/tools/open_source excluded)
This commit is contained in:
Executable
+8
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ifneq ($(MCU), )
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include Makefile.riscv
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else
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include Makefile.linux
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endif
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Executable
+79
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ISP_DIR := $(shell cd .. && /bin/pwd)
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SDK_DIR ?= $(shell cd $(ISP_DIR)/../../../.. && /bin/pwd)
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include $(SDK_DIR)/build/base.mk
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OBJ :=
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OBJ += omnivision_os02k10
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OBJ += omnivision_ox03f10
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OBJ += omnivision_os04a10
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OBJ += omnivision_os04c10
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OBJ += omnivision_os04d10
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OBJ += omnivision_os04j10
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OBJ += omnivision_os05a10
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OBJ += omnivision_ox05b1s
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OBJ += omnivision_os08a20
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OBJ += omnivision_os08b10
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OBJ += omnivision_ov4689
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OBJ += smartsens_sc200ai
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OBJ += smartsens_sc450ai
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OBJ += smartsens_sc500ai
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OBJ += smartsens_sc530ai
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OBJ += smartsens_sc485sl
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OBJ += smartsens_sc850sl
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OBJ += smartsens_sc3338
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OBJ += smartsens_sc4336
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OBJ += smartsens_sc4336p
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OBJ += smartsens_sc5336
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OBJ += smartsens_sc8238
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OBJ += smartsens_sc235hai
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OBJ += smartsens_sc835hai
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OBJ += smartsens_sc231hai
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OBJ += smartsens_sc431hai
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OBJ += smartsens_sc435hai
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OBJ += smartsens_sc465sl
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OBJ += smartsens_sc2337p
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OBJ += smartsens_sc533hai
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OBJ += smartsens_sc285sl
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OBJ += imagedesign_mis40h1
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OBJ += imagedesign_mis20s1
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OBJ += galaxycore_gc2053
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OBJ += galaxycore_gc20c3
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OBJ += galaxycore_gc20b3
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OBJ += galaxycore_gc2083
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OBJ += galaxycore_gc4663
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OBJ += galaxycore_gc8613
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OBJ += galaxycore_gc5603
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OBJ += galaxycore_gc4653
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OBJ += galaxycore_gc4683
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OBJ += galaxycore_gc6603
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OBJ += byd_bf3a03
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OBJ += silicon_jxf37p
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OBJ += sony_imx307
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OBJ += sony_imx415
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OBJ += sony_imx678
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OBJ += sony_imx179
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OBJ += cvsens_cv8001
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OBJ += cvsens_cv4003
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OBJ += cvsens_cv2005
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OBJ_CLEAN := $(addsuffix _clean, $(OBJ))
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.PHONY: all clean $(OBJ) $(OBJ_CLEAN)
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all: $(OBJ)
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clean: $(OBJ_CLEAN)
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$(OBJ):
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$(AT)$(MAKE) -C $@
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$(OBJ_CLEAN):
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$(AT)$(MAKE) -C $(patsubst %_clean, %, $@) clean
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Executable
+3
@@ -0,0 +1,3 @@
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SRCS-y += smartsens_sc485sl/
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#SRCS-y += smartsens_sc235hai/
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+5
@@ -0,0 +1,5 @@
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ifneq ($(MCU), )
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include Makefile.riscv
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else
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include Makefile.linux
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endif
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+20
@@ -0,0 +1,20 @@
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ISP_DIR := $(shell cd ../.. && /bin/pwd)
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SDK_DIR ?= $(shell cd $(ISP_DIR)/../../../.. && /bin/pwd)
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include $(SDK_DIR)/build/base.mk
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include $(ISP_DIR)/sensor/plat.mk
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LIB_NAME := libsns_bf3a03
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SRCS := $(wildcard *.c)
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SDK_USR_CFLAGS += -I$(GMP_DIR)/include
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SDK_USR_CFLAGS += -I$(GMP_DIR)/usr/include
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SDK_USR_CFLAGS += -I$(ISP_DIR)/include
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SDK_USR_CFLAGS += -I$(ISP_DIR)/../include
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SDK_USR_CFLAGS += -I.
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AT := @
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$(info SRCS=$(SRCS))
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include $(SDK_DIR)/build/sdk_lib_rules.mk
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+4
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SRCS-y += bf3a03.c
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SRCS-y += bf3a03_ctrl.c
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+951
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#include <stdlib.h>
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#include <string.h>
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#include "bf3a03.h"
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#include "bf3a03_ctrl.h"
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#include "bf3a03_ex.h"
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#include "xmedia_isp.h"
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#define BF3A03_NAME "BF3A03"
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#define BF3A03_SPECS_MAX_NUM 1
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#ifdef __linux__
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#define BF3A03_ISP_DEFAULT_SUPPORT
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#endif
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#define BF3A03_HMAX_640X480_LINEAR 0x500 // 未找到vmax对应的寄存器
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#define BF3A03_640X480_BIT_RATE_LINEAR 432
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#define BF3A03_REG_ADDR_STANDBY 0x09
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#define BF3A03_RES_IS_640X480(w, h) ((w) == 640 && (h) == 480)
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#define BF3A03_ERR_MODE_PRINT(sns_attr) \
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do { \
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SENSOR_TRACE(MODULE_DBG_ERR, "Not support! Width:%d, Height:%d, WDRMode:%d\n", sns_attr->width, \
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sns_attr->height, sns_attr->wdr_mode); \
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} while (0)
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sensor_context *g_bf3a03_ctx[XMEDIA_SENSOR_DEV_MAX_NUM] = { XMEDIA_NULL };
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#define BF3A03_SET_CTX(dev, sns_ctx) g_bf3a03_ctx[dev] = sns_ctx
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#define BF3A03_GET_CTX(dev, sns_ctx) sns_ctx = g_bf3a03_ctx[dev]
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static xmedia_u32 g_bf3a03_exposure[XMEDIA_SENSOR_DEV_MAX_NUM] = { 0 };
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static xmedia_u16 g_bf3a03_sample_r_gain[XMEDIA_SENSOR_DEV_MAX_NUM] = { 0 };
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static xmedia_u16 g_bf3a03_sample_b_gain[XMEDIA_SENSOR_DEV_MAX_NUM] = { 0 };
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static xmedia_u16 g_bf3a03_wb_gain[XMEDIA_SENSOR_DEV_MAX_NUM][SENSOR_AWB_CHN_GIAN_MAX_NUM] = { { 0 } };
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static xmedia_s32 g_bf3a03_dev_map[XMEDIA_SENSOR_DEV_MAX_NUM] =
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{ [0 ... XMEDIA_SENSOR_DEV_MAX_NUM - 1] = SENSOR_DEV_INVALID };
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static const xmedia_sensor_property g_bf3a03_property[BF3A03_SPECS_MAX_NUM] = {
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{
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// width, height, wdr_mode
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640, 480, XMEDIA_VIDEO_WDR_MODE_NONE,
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// wdr_format, max_fps, input_clock
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XMEDIA_VIDEO_WDR_FMT_NONE, 30, XMEDIA_SENSOR_CLOCK_FREQ_24MHZ,
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// output_intf, pixel_format, bit_width
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XMEDIA_INTF_TYPE_DC, XMEDIA_VIDEO_PIXEL_FMT_YUYV_PACKAGE_422, XMEDIA_VIDEO_DATA_WIDTH_8,
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// bayer_format - mirror&flip /mirror /flip /normal
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{ XMEDIA_VIDEO_BAYER_FMT_BGGR, XMEDIA_VIDEO_BAYER_FMT_BGGR,
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XMEDIA_VIDEO_BAYER_FMT_BGGR, XMEDIA_VIDEO_BAYER_FMT_BGGR },
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// vcid, bit_rate
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{ 0 }, BF3A03_640X480_BIT_RATE_LINEAR,
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},
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};
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static const xmedia_sensor_capability g_bf3a03_capability = {
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.max_width = 640,
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.max_height = 480,
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.max_fps = 30,
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.output_intf = XMEDIA_INTF_TYPE_DC,
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.init_mclk = XMEDIA_SENSOR_CLOCK_FREQ_24MHZ,
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.wdr_mode = XMEDIA_VIDEO_WDR_MODE_NONE,
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.wdr_format = XMEDIA_VIDEO_WDR_FMT_NONE,
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.bit_width = XMEDIA_VIDEO_DATA_WIDTH_8,
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.reset_time = 200, // TODO: 待后续确认复位所需时间
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.slave_mode_supported = XMEDIA_FALSE,
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.mipi_lanes_supported = XMEDIA_FALSE,
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.standby_info = {
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.standby_supported = XMEDIA_FALSE,
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.addr_byte_num = BF3A03_ADDR_BYTE,
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.data_byte_num = BF3A03_DATA_BYTE,
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.standby_reg_num = 1,
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.standby_reg_addr = { BF3A03_REG_ADDR_STANDBY },
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.standby_reg_data = { 0xD5 },
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.resume_reg_num = 1,
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.resume_reg_addr = { BF3A03_REG_ADDR_STANDBY },
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.resume_reg_data = { 0x55 },
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},
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};
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static xmedia_s32 bf3a03_ctx_init(xmedia_u32 dev)
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{
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sensor_context *bf3a03_ctx = XMEDIA_NULL;
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BF3A03_GET_CTX(dev, bf3a03_ctx);
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if (bf3a03_ctx != XMEDIA_NULL) {
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SENSOR_TRACE(MODULE_DBG_ERR, " sensor-[%d] ctx already malloc!\n", dev);
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return XMEDIA_ERRCODE_EXIST;
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}
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bf3a03_ctx = (sensor_context *)malloc(sizeof(sensor_context));
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if (bf3a03_ctx == XMEDIA_NULL) {
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SENSOR_TRACE(MODULE_DBG_ERR, " sensor-[%d] ctx malloc memory failed!\n", dev);
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return XMEDIA_ERRCODE_NOT_ENOUGH_MEMORY;
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}
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memset(bf3a03_ctx, 0, sizeof(sensor_context));
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bf3a03_ctx->i2c_addr = BF3A03_I2C_ADDR;
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bf3a03_ctx->lanes = XMEDIA_SENSOR_MIPI_LANES_2L;
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bf3a03_ctx->work_mode = XMEDIA_SENSOR_WORK_MODE_NORMAL;
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bf3a03_ctx->bus_info.i2c_dev = SENSOR_I2C_INVALID;
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bf3a03_ctx->size.width = 640;
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bf3a03_ctx->size.height = 480;
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bf3a03_ctx->fps = g_bf3a03_property[0].max_fps;
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bf3a03_ctx->wdr_mode = XMEDIA_VIDEO_WDR_MODE_NONE;
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bf3a03_ctx->img_mode = BF3A03_DVP_640X480_LINEAR_MODE;
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bf3a03_ctx->fl_std = BF3A03_VMAX_640X480_LINEAR << BF3A03_EXP_SHIFT;
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bf3a03_ctx->fl[SENSOR_CUR_FRAME] = BF3A03_VMAX_640X480_LINEAR << BF3A03_EXP_SHIFT;
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bf3a03_ctx->fl[SENSOR_PRE_FRAME] = BF3A03_VMAX_640X480_LINEAR << BF3A03_EXP_SHIFT;
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BF3A03_SET_CTX(dev, bf3a03_ctx);
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return XMEDIA_SUCCESS;
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}
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static xmedia_void bf3a03_ctx_exit(xmedia_u32 dev)
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{
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sensor_context *bf3a03_ctx = XMEDIA_NULL;
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BF3A03_GET_CTX(dev, bf3a03_ctx);
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SENSOR_FREE(bf3a03_ctx);
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BF3A03_SET_CTX(dev, XMEDIA_NULL);
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}
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static xmedia_s32 bf3a03_get_property(xmedia_u32 dev, xmedia_sensor_property *property)
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{
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xmedia_u8 i;
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sensor_context *bf3a03_ctx = XMEDIA_NULL;
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SENSOR_CHECK_DEV_RETURN(dev);
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SENSOR_CHECK_PTR_RETURN(property);
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BF3A03_GET_CTX(dev, bf3a03_ctx);
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SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
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for (i = 0; i < BF3A03_SPECS_MAX_NUM; i++) {
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if (g_bf3a03_property[i].width == bf3a03_ctx->size.width &&
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g_bf3a03_property[i].height == bf3a03_ctx->size.height &&
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g_bf3a03_property[i].wdr_mode == bf3a03_ctx->wdr_mode) {
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memcpy(property, &g_bf3a03_property[i], sizeof(xmedia_sensor_property));
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return XMEDIA_SUCCESS;
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}
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}
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SENSOR_TRACE(MODULE_DBG_ERR, "Not support! Width: %d, Height: %d, Wdr_mode: %d !\n", bf3a03_ctx->size.width,
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bf3a03_ctx->size.height, bf3a03_ctx->wdr_mode);
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return XMEDIA_ERRCODE_NOT_SUPPORT;
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}
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static xmedia_s32 bf3a03_set_work_mode(xmedia_u32 dev, xmedia_sensor_work_mode work_mode)
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{
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sensor_context *bf3a03_ctx = XMEDIA_NULL;
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SENSOR_CHECK_DEV_RETURN(dev);
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BF3A03_GET_CTX(dev, bf3a03_ctx);
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SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
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if (work_mode != XMEDIA_SENSOR_WORK_MODE_NORMAL) {
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SENSOR_TRACE(MODULE_DBG_ERR, "Sensor work mode param invalid!\n");
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return XMEDIA_ERRCODE_NOT_SUPPORT;
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}
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bf3a03_ctx->work_mode = work_mode;
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return XMEDIA_SUCCESS;
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}
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static xmedia_s32 bf3a03_set_mipi_lanes(xmedia_u32 dev, xmedia_sensor_mipi_lanes mipi_lanes)
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{
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return XMEDIA_ERRCODE_NOT_SUPPORT;
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}
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static xmedia_s32 bf3a03_set_bus_info(xmedia_u32 dev, const xmedia_sensor_commbus *sns_bus_info)
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{
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sensor_context *bf3a03_ctx = XMEDIA_NULL;
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SENSOR_CHECK_DEV_RETURN(dev);
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SENSOR_CHECK_PTR_RETURN(sns_bus_info);
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BF3A03_GET_CTX(dev, bf3a03_ctx);
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SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
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if (sns_bus_info->type == XMEDIA_SENSOR_BUS_TYPE_I2C) {
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bf3a03_ctx->bus_info.i2c_dev = sns_bus_info->i2c_dev;
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} else if (sns_bus_info->type == XMEDIA_SENSOR_BUS_TYPE_SPI) {
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bf3a03_ctx->bus_info.spi_info.spi_dev = sns_bus_info->spi_info.spi_dev;
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bf3a03_ctx->bus_info.spi_info.spi_cs = sns_bus_info->spi_info.spi_cs;
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} else {
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SENSOR_TRACE(MODULE_DBG_ERR,
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"Not support [%d], the value of bus type is {%d-i2c, %d-spi}, please check input type!\n",
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sns_bus_info->type, XMEDIA_SENSOR_BUS_TYPE_I2C, XMEDIA_SENSOR_BUS_TYPE_SPI);
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return XMEDIA_ERRCODE_NOT_SUPPORT;
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}
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return XMEDIA_SUCCESS;
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}
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// one i2c dev shared by multiple sensors
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static xmedia_s32 bf3a03_set_dev_addr(xmedia_u32 dev, xmedia_u32 slave_addr)
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{
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xmedia_s32 ret;
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sensor_context *bf3a03_ctx = XMEDIA_NULL;
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SENSOR_CHECK_DEV_RETURN(dev);
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BF3A03_GET_CTX(dev, bf3a03_ctx);
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SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
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bf3a03_ctx->i2c_addr = slave_addr;
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ret = bf3a03_set_slave_addr(dev, slave_addr);
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SENSOR_CHECK_RET_RETURN(ret);
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return XMEDIA_SUCCESS;
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}
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static xmedia_s32 bf3a03_get_dev_addr(xmedia_u32 dev, xmedia_u32 *slave_addr)
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{
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sensor_context *bf3a03_ctx = XMEDIA_NULL;
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SENSOR_CHECK_DEV_RETURN(dev);
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SENSOR_CHECK_PTR_RETURN(slave_addr);
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BF3A03_GET_CTX(dev, bf3a03_ctx);
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SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
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*slave_addr = bf3a03_ctx->i2c_addr;
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return XMEDIA_SUCCESS;
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}
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static xmedia_s32 bf3a03_init(xmedia_u32 dev, xmedia_sensor_init_mode init_mode)
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{
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xmedia_s32 ret;
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sensor_context *bf3a03_ctx = XMEDIA_NULL;
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SENSOR_CHECK_DEV_RETURN(dev);
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BF3A03_GET_CTX(dev, bf3a03_ctx);
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SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
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bf3a03_ctx->init_mode = init_mode;
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ret = bf3a03_i2c_init(dev, bf3a03_ctx->bus_info.i2c_dev, bf3a03_ctx->i2c_addr);
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SENSOR_CHECK_RET_RETURN(ret);
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bf3a03_ctx->init = XMEDIA_TRUE;
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return XMEDIA_SUCCESS;
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}
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static xmedia_s32 bf3a03_exit(xmedia_u32 dev)
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{
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xmedia_s32 ret;
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sensor_context *bf3a03_ctx = XMEDIA_NULL;
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SENSOR_CHECK_DEV_RETURN(dev);
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BF3A03_GET_CTX(dev, bf3a03_ctx);
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SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
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ret = bf3a03_i2c_exit(dev);
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SENSOR_CHECK_RET_RETURN(ret);
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bf3a03_ctx->init = XMEDIA_FALSE;
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return XMEDIA_SUCCESS;
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}
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static xmedia_s32 bf3a03_mirror(xmedia_u32 dev, xmedia_bool mirror_en)
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{
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xmedia_s32 ret;
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sensor_context *bf3a03_ctx = XMEDIA_NULL;
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SENSOR_CHECK_DEV_RETURN(dev);
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BF3A03_GET_CTX(dev, bf3a03_ctx);
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SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
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bf3a03_ctx->mirror_en = mirror_en;
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ret = bf3a03_set_mirror_flip(dev, mirror_en, bf3a03_ctx->flip_en);
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SENSOR_CHECK_RET_RETURN(ret);
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return XMEDIA_SUCCESS;
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}
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|
||||
static xmedia_s32 bf3a03_flip(xmedia_u32 dev, xmedia_bool flip_en)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
sensor_context *bf3a03_ctx = XMEDIA_NULL;
|
||||
|
||||
SENSOR_CHECK_DEV_RETURN(dev);
|
||||
BF3A03_GET_CTX(dev, bf3a03_ctx);
|
||||
SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
|
||||
|
||||
bf3a03_ctx->flip_en = flip_en;
|
||||
ret = bf3a03_set_mirror_flip(dev, bf3a03_ctx->mirror_en, flip_en);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_set_image_mode(sensor_context *bf3a03_ctx, xmedia_u8 *image_mode,
|
||||
const xmedia_sensor_attr *sns_attr)
|
||||
{
|
||||
SENSOR_CHECK_PTR_RETURN(image_mode);
|
||||
|
||||
if (bf3a03_ctx->wdr_mode == XMEDIA_VIDEO_WDR_MODE_NONE) {
|
||||
if (BF3A03_RES_IS_640X480(sns_attr->width, sns_attr->height)) {
|
||||
*image_mode = BF3A03_DVP_640X480_LINEAR_MODE;
|
||||
if (bf3a03_ctx->work_mode == XMEDIA_SENSOR_WORK_MODE_NORMAL) {
|
||||
bf3a03_ctx->fl_std = BF3A03_VMAX_640X480_LINEAR << BF3A03_EXP_SHIFT;
|
||||
} else {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support work mode: %d\n", bf3a03_ctx->work_mode);
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
} else {
|
||||
BF3A03_ERR_MODE_PRINT(sns_attr);
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
} else {
|
||||
BF3A03_ERR_MODE_PRINT(sns_attr);
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
bf3a03_ctx->size.width = sns_attr->width;
|
||||
bf3a03_ctx->size.height = sns_attr->height;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_set_wdr_mode(xmedia_u32 dev, xmedia_u8 wdr_mode)
|
||||
{
|
||||
sensor_context *bf3a03_ctx = XMEDIA_NULL;
|
||||
|
||||
BF3A03_GET_CTX(dev, bf3a03_ctx);
|
||||
SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
|
||||
|
||||
switch (wdr_mode) {
|
||||
case XMEDIA_VIDEO_WDR_MODE_NONE:
|
||||
bf3a03_ctx->wdr_mode = XMEDIA_VIDEO_WDR_MODE_NONE;
|
||||
SENSOR_PRINT("linear mode\n");
|
||||
break;
|
||||
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "NOT support this mode!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
memset(bf3a03_ctx->wdr_int_time, 0, sizeof(bf3a03_ctx->wdr_int_time));
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_void bf3a03_init_common_reg_info(sensor_context *bf3a03_ctx)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_init_reg_info(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_u32 i;
|
||||
sensor_context *bf3a03_ctx = XMEDIA_NULL;
|
||||
|
||||
BF3A03_GET_CTX(dev, bf3a03_ctx);
|
||||
SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
|
||||
|
||||
bf3a03_ctx->regs_info[SENSOR_CUR_FRAME].com_bus.i2c_dev = bf3a03_ctx->bus_info.i2c_dev;
|
||||
bf3a03_ctx->regs_info[SENSOR_CUR_FRAME].cfg_to_valid_delay_max = 2; // maximum delay valid frames
|
||||
bf3a03_ctx->regs_info[SENSOR_CUR_FRAME].reg_num = BF3A03_REG_MAX_NUM;
|
||||
|
||||
for (i = 0; i < bf3a03_ctx->regs_info[SENSOR_CUR_FRAME].reg_num; i++) {
|
||||
bf3a03_ctx->regs_info[SENSOR_CUR_FRAME].i2c_data[i].update = XMEDIA_TRUE;
|
||||
bf3a03_ctx->regs_info[SENSOR_CUR_FRAME].i2c_data[i].dev_addr = bf3a03_ctx->i2c_addr;
|
||||
bf3a03_ctx->regs_info[SENSOR_CUR_FRAME].i2c_data[i].addr_byte_num = BF3A03_ADDR_BYTE;
|
||||
bf3a03_ctx->regs_info[SENSOR_CUR_FRAME].i2c_data[i].data_byte_num = BF3A03_DATA_BYTE;
|
||||
}
|
||||
|
||||
// init general register - The registers should init both in linear
|
||||
bf3a03_init_common_reg_info(bf3a03_ctx);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_set_attr(xmedia_u32 dev, const xmedia_sensor_attr *sns_attr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
sensor_context *bf3a03_ctx = XMEDIA_NULL;
|
||||
|
||||
SENSOR_CHECK_DEV_RETURN(dev);
|
||||
SENSOR_CHECK_PTR_RETURN(sns_attr);
|
||||
BF3A03_GET_CTX(dev, bf3a03_ctx);
|
||||
SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
|
||||
|
||||
// Set wdr mode
|
||||
ret = bf3a03_set_wdr_mode(dev, sns_attr->wdr_mode);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
|
||||
// Set image mode
|
||||
ret = bf3a03_set_image_mode(bf3a03_ctx, &bf3a03_ctx->img_mode, sns_attr);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
|
||||
bf3a03_ctx->fl[SENSOR_CUR_FRAME] = bf3a03_ctx->fl_std;
|
||||
bf3a03_ctx->fl[SENSOR_PRE_FRAME] = bf3a03_ctx->fl[SENSOR_CUR_FRAME];
|
||||
|
||||
ret = bf3a03_init_reg_info(dev);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_get_isp_default(xmedia_u32 dev, xmedia_sensor_isp_default *isp_default)
|
||||
{
|
||||
SENSOR_CHECK_DEV_RETURN(dev);
|
||||
SENSOR_CHECK_PTR_RETURN(isp_default);
|
||||
|
||||
memset(isp_default, 0, sizeof(xmedia_sensor_isp_default));
|
||||
#ifdef BF3A03_ISP_DEFAULT_SUPPORT
|
||||
// TO-DO: alg add param
|
||||
isp_default->ainr = XMEDIA_NULL;
|
||||
isp_default->anti_false_color = XMEDIA_NULL;
|
||||
isp_default->blc = XMEDIA_NULL;
|
||||
isp_default->bnr = XMEDIA_NULL;
|
||||
isp_default->ca = XMEDIA_NULL;
|
||||
isp_default->clut_attr = XMEDIA_NULL;
|
||||
isp_default->crosstalk = XMEDIA_NULL;
|
||||
isp_default->csc = XMEDIA_NULL;
|
||||
isp_default->dehaze = XMEDIA_NULL;
|
||||
isp_default->demosaic = XMEDIA_NULL;
|
||||
isp_default->dpc_dynamic = XMEDIA_NULL;
|
||||
isp_default->dpc_static = XMEDIA_NULL;
|
||||
isp_default->drc = XMEDIA_NULL;
|
||||
isp_default->expander = XMEDIA_NULL;
|
||||
isp_default->fpn = XMEDIA_NULL;
|
||||
isp_default->gamma = XMEDIA_NULL;
|
||||
isp_default->gcac = XMEDIA_NULL;
|
||||
isp_default->hlc = XMEDIA_NULL;
|
||||
isp_default->lcac = XMEDIA_NULL;
|
||||
isp_default->lce = XMEDIA_NULL;
|
||||
isp_default->mlsc_attr = XMEDIA_NULL;
|
||||
isp_default->mlsc_lut = XMEDIA_NULL;
|
||||
isp_default->radial_crop = XMEDIA_NULL;
|
||||
isp_default->rgbir = XMEDIA_NULL;
|
||||
isp_default->rlsc_attr = XMEDIA_NULL;
|
||||
isp_default->rlsc_lut = XMEDIA_NULL;
|
||||
isp_default->sharpen = XMEDIA_NULL;
|
||||
isp_default->stnr = XMEDIA_NULL;
|
||||
isp_default->wdr = XMEDIA_NULL;
|
||||
return XMEDIA_SUCCESS;
|
||||
#else
|
||||
SENSOR_TRACE(MODULE_DBG_WARN, "Not support isp getting default param from bf3a03!\n ");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
#endif
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_get_isp_black_level(xmedia_u32 dev, xmedia_sensor_black_level *black_level)
|
||||
{
|
||||
sensor_context *bf3a03_ctx = XMEDIA_NULL;
|
||||
|
||||
SENSOR_CHECK_DEV_RETURN(dev);
|
||||
SENSOR_CHECK_PTR_RETURN(black_level);
|
||||
BF3A03_GET_CTX(dev, bf3a03_ctx);
|
||||
SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
|
||||
|
||||
// Don't need to update black level when iso change
|
||||
black_level->update = XMEDIA_FALSE;
|
||||
|
||||
if (bf3a03_ctx->wdr_mode == XMEDIA_VIDEO_WDR_MODE_NONE) {
|
||||
black_level->black_level[XMEDIA_SENSOR_BAYER_CHN_R] = 64;
|
||||
black_level->black_level[XMEDIA_SENSOR_BAYER_CHN_GR] = 64;
|
||||
black_level->black_level[XMEDIA_SENSOR_BAYER_CHN_GB] = 64;
|
||||
black_level->black_level[XMEDIA_SENSOR_BAYER_CHN_B] = 64;
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_get_bayer_pattern(xmedia_u32 dev, xmedia_video_bayer_format *bayer_pattern)
|
||||
{
|
||||
xmedia_u8 i;
|
||||
xmedia_sensor_mirror_flip_type type;
|
||||
sensor_context *bf3a03_ctx = XMEDIA_NULL;
|
||||
|
||||
SENSOR_CHECK_DEV_RETURN(dev);
|
||||
SENSOR_CHECK_PTR_RETURN(bayer_pattern);
|
||||
BF3A03_GET_CTX(dev, bf3a03_ctx);
|
||||
SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
|
||||
|
||||
if (bf3a03_ctx->mirror_en && bf3a03_ctx->flip_en) {
|
||||
type = XMEDIA_SENSOR_MIRROR_FLIP_TYPE_MIRROR_FLIP;
|
||||
} else if (bf3a03_ctx->mirror_en && (!bf3a03_ctx->flip_en)) {
|
||||
type = XMEDIA_SENSOR_MIRROR_FLIP_TYPE_MIRROR;
|
||||
} else if ((!bf3a03_ctx->mirror_en) && bf3a03_ctx->flip_en) {
|
||||
type = XMEDIA_SENSOR_MIRROR_FLIP_TYPE_FLIP;
|
||||
} else {
|
||||
type = XMEDIA_SENSOR_MIRROR_FLIP_TYPE_NORMAL;
|
||||
}
|
||||
|
||||
for (i = 0; i < BF3A03_SPECS_MAX_NUM; i++) {
|
||||
if (g_bf3a03_property[i].width == bf3a03_ctx->size.width &&
|
||||
g_bf3a03_property[i].height == bf3a03_ctx->size.height &&
|
||||
g_bf3a03_property[i].wdr_mode == bf3a03_ctx->wdr_mode) {
|
||||
*bayer_pattern = g_bf3a03_property[i].bayer_format[type];
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (i >= BF3A03_SPECS_MAX_NUM) {
|
||||
*bayer_pattern = XMEDIA_VIDEO_BAYER_MAX;
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "ERR! Get bayer pattern failed!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_get_capability(xmedia_sensor_capability *capability)
|
||||
{
|
||||
SENSOR_CHECK_PTR_RETURN(capability);
|
||||
|
||||
memcpy(capability, &g_bf3a03_capability, sizeof(xmedia_sensor_capability));
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_get_trig_attr(xmedia_sensor_trig_attr *trig_attr)
|
||||
{
|
||||
SENSOR_CHECK_PTR_RETURN(trig_attr);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_set_ae_wdr_attr(xmedia_u32 dev, xmedia_isp_ae_wdr_mode ae_wdr_mode)
|
||||
{
|
||||
sensor_context *bf3a03_ctx = XMEDIA_NULL;
|
||||
|
||||
SENSOR_CHECK_DEV_RETURN(dev);
|
||||
BF3A03_GET_CTX(dev, bf3a03_ctx);
|
||||
SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
|
||||
|
||||
if (ae_wdr_mode >= XMEDIA_ISP_AE_WDR_MODE_MAX) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not supported AE wdr mode!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
bf3a03_ctx->ae_wdr_mode = ae_wdr_mode;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
// 用户期望第一帧生效的参数，且AE/AWB头几帧计算的基础
|
||||
static xmedia_s32 bf3a03_set_init_param(xmedia_u32 dev, const xmedia_sensor_init_param *init_param)
|
||||
{
|
||||
SENSOR_CHECK_DEV_RETURN(dev);
|
||||
SENSOR_CHECK_PTR_RETURN(init_param);
|
||||
|
||||
g_bf3a03_exposure[dev] = init_param->exposure;
|
||||
g_bf3a03_sample_r_gain[dev] = init_param->sample_rgain;
|
||||
g_bf3a03_sample_b_gain[dev] = init_param->sample_bgain;
|
||||
|
||||
g_bf3a03_wb_gain[dev][SENSOR_AWB_CHN_GIAN_R] = init_param->wb_rgain;
|
||||
g_bf3a03_wb_gain[dev][SENSOR_AWB_CHN_GIAN_G] = init_param->wb_ggain;
|
||||
g_bf3a03_wb_gain[dev][SENSOR_AWB_CHN_GIAN_B] = init_param->wb_bgain;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_get_ae_default(xmedia_u32 dev, xmedia_isp_ae_sensor_default *ae_sns_dft)
|
||||
{
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_update_inttime(xmedia_u32 dev, xmedia_u32 int_time)
|
||||
{
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_calc_again(xmedia_u32 dev, xmedia_u32 *again_lin, xmedia_u32 *again_db)
|
||||
{
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_calc_dgain(xmedia_u32 dev, xmedia_u32 *dgain_lin, xmedia_u32 *dgain_db)
|
||||
{
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_update_gains(xmedia_u32 dev, xmedia_u32 again, xmedia_u32 dgain)
|
||||
{
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
// AWB
|
||||
static xmedia_s32 bf3a03_get_awb_default(xmedia_u32 dev, xmedia_isp_awb_sensor_default *awb_sns_dft)
|
||||
{
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_get_max_fps(xmedia_u8 img_mode, xmedia_float *max_fps)
|
||||
{
|
||||
switch (img_mode) {
|
||||
case BF3A03_DVP_640X480_LINEAR_MODE:
|
||||
*max_fps = 30.0;
|
||||
break;
|
||||
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support img mode: %d\n", img_mode);
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_standby(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
SENSOR_CHECK_DEV_RETURN(dev);
|
||||
ret = bf3a03_write_reg(dev, BF3A03_REG_ADDR_STANDBY, 0xD5);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_resume(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
SENSOR_CHECK_DEV_RETURN(dev);
|
||||
ret = bf3a03_write_reg(dev, BF3A03_REG_ADDR_STANDBY, 0x55);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_config_init_param(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_u32 i;
|
||||
sensor_context *bf3a03_ctx = XMEDIA_NULL;
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
xmedia_u32 reg_data_sum = 0;
|
||||
|
||||
BF3A03_GET_CTX(dev, bf3a03_ctx);
|
||||
SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
|
||||
|
||||
// exceptional process for AE unregister
|
||||
for (i = 0; i < bf3a03_ctx->regs_info[SENSOR_CUR_FRAME].reg_num; i++) {
|
||||
reg_data_sum += bf3a03_ctx->regs_info[SENSOR_CUR_FRAME].i2c_data[i].data;
|
||||
}
|
||||
|
||||
if (reg_data_sum == 0) {
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
for (i = 0; i < bf3a03_ctx->regs_info[SENSOR_CUR_FRAME].reg_num; i++) {
|
||||
ret |= bf3a03_write_reg(dev, bf3a03_ctx->regs_info[SENSOR_CUR_FRAME].i2c_data[i].reg_addr,
|
||||
bf3a03_ctx->regs_info[SENSOR_CUR_FRAME].i2c_data[i].data);
|
||||
}
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] config init param failed!\n", dev);
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_start(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
sensor_context *bf3a03_ctx = XMEDIA_NULL;
|
||||
|
||||
SENSOR_CHECK_DEV_RETURN(dev);
|
||||
BF3A03_GET_CTX(dev, bf3a03_ctx);
|
||||
SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
|
||||
|
||||
if (bf3a03_ctx->init_mode == XMEDIA_SENSOR_INIT_MODE_NORMAL) {
|
||||
ret = bf3a03_init_image(dev, bf3a03_ctx->img_mode, bf3a03_ctx->work_mode);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
}
|
||||
|
||||
ret = bf3a03_config_init_param(dev);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
|
||||
ret = bf3a03_set_mirror_flip(dev, bf3a03_ctx->mirror_en, bf3a03_ctx->flip_en);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_stop(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
SENSOR_CHECK_DEV_RETURN(dev);
|
||||
ret = bf3a03_standby(dev);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_search_dev(xmedia_u32 pipe, xmedia_u32 *dev)
|
||||
{
|
||||
xmedia_u32 index;
|
||||
|
||||
SENSOR_CHECK_PTR_RETURN(dev);
|
||||
|
||||
for (index = 0; index < XMEDIA_SENSOR_DEV_MAX_NUM; index++) {
|
||||
if (g_bf3a03_dev_map[index] == SENSOR_DEV_INVALID) {
|
||||
g_bf3a03_dev_map[index] = pipe;
|
||||
*dev = index;
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "all sensor dev are registered!\n");
|
||||
return XMEDIA_ERRCODE_BINDED;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_match_dev(xmedia_u32 pipe, xmedia_u32 *dev)
|
||||
{
|
||||
xmedia_u32 index;
|
||||
|
||||
SENSOR_CHECK_PTR_RETURN(dev);
|
||||
|
||||
for (index = 0; index < XMEDIA_SENSOR_DEV_MAX_NUM; index++) {
|
||||
if (g_bf3a03_dev_map[index] == pipe) {
|
||||
*dev = index;
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "There is no sensor dev to match pipe[%d]!\n", pipe);
|
||||
return XMEDIA_ERRCODE_NOT_BIND;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_get_min_fps(xmedia_u8 img_mode, xmedia_float *min_fps)
|
||||
{
|
||||
switch (img_mode) {
|
||||
case BF3A03_DVP_640X480_LINEAR_MODE:
|
||||
*min_fps = 1.5;
|
||||
break;
|
||||
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support img mode: %d\n", img_mode);
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_get_reg_info(xmedia_u32 dev, xmedia_sensor_regs_info *sns_regs_info)
|
||||
{
|
||||
xmedia_s32 i;
|
||||
sensor_context *bf3a03_ctx = XMEDIA_NULL;
|
||||
|
||||
SENSOR_CHECK_DEV_RETURN(dev);
|
||||
SENSOR_CHECK_PTR_RETURN(sns_regs_info);
|
||||
BF3A03_GET_CTX(dev, bf3a03_ctx);
|
||||
SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
|
||||
|
||||
for (i = 0; i < bf3a03_ctx->regs_info[SENSOR_CUR_FRAME].reg_num; i++) {
|
||||
if (bf3a03_ctx->regs_info[SENSOR_CUR_FRAME].i2c_data[i].data ==
|
||||
bf3a03_ctx->regs_info[SENSOR_PRE_FRAME].i2c_data[i].data) {
|
||||
bf3a03_ctx->regs_info[SENSOR_CUR_FRAME].i2c_data[i].update = XMEDIA_FALSE;
|
||||
} else {
|
||||
bf3a03_ctx->regs_info[SENSOR_CUR_FRAME].i2c_data[i].update = XMEDIA_TRUE;
|
||||
}
|
||||
}
|
||||
|
||||
memcpy(sns_regs_info, &bf3a03_ctx->regs_info[SENSOR_CUR_FRAME], sizeof(xmedia_sensor_regs_info));
|
||||
memcpy(&bf3a03_ctx->regs_info[SENSOR_PRE_FRAME], &bf3a03_ctx->regs_info[SENSOR_CUR_FRAME],
|
||||
sizeof(xmedia_sensor_regs_info));
|
||||
|
||||
bf3a03_ctx->fl[SENSOR_PRE_FRAME] = bf3a03_ctx->fl[SENSOR_CUR_FRAME];
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_set_fps(xmedia_u32 dev, xmedia_float fps, xmedia_isp_ae_sensor_default *ae_sns_dft)
|
||||
{
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
// line wdr模式下，根据AE期望曝光比，返回不同模式下长短帧的最大/最小曝光时间
|
||||
static xmedia_s32 bf3a03_get_max_inttime(xmedia_u32 dev, xmedia_sensor_ae_inttime_attr *inttime_attr)
|
||||
{
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
* 线性：full_lines, AE期望的曝光时间, VMAX = full_lines + EXP_OFFSET_LINEAR
|
||||
* 2TO1 WDR: full_lines, AE期望的长帧+短帧的曝光时间, VMAX = full_lines + EXP_OFFSET_WDR
|
||||
* 注意：2to1 wdr模式下，曝光比和ae wdr mode 由AE传入，调用本接口前，AE需先调用bf3a03_get_wdr_max_inttime
|
||||
*/
|
||||
static xmedia_s32 bf3a03_set_slow_framerate(xmedia_u32 dev, xmedia_u32 full_lines,
|
||||
xmedia_isp_ae_sensor_default *ae_sns_dft)
|
||||
{
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_get_hmax_vmax(xmedia_u32 dev, xmedia_u32 *hmax, xmedia_u32 *vmax)
|
||||
{
|
||||
sensor_context *bf3a03_ctx = XMEDIA_NULL;
|
||||
|
||||
SENSOR_CHECK_DEV_RETURN(dev);
|
||||
SENSOR_CHECK_PTR_RETURN(hmax);
|
||||
SENSOR_CHECK_PTR_RETURN(vmax);
|
||||
|
||||
BF3A03_GET_CTX(dev, bf3a03_ctx);
|
||||
SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
|
||||
|
||||
*vmax = bf3a03_ctx->fl[SENSOR_CUR_FRAME] >> BF3A03_EXP_SHIFT;
|
||||
|
||||
switch (bf3a03_ctx->img_mode) {
|
||||
case BF3A03_DVP_640X480_LINEAR_MODE:
|
||||
if (bf3a03_ctx->work_mode == XMEDIA_SENSOR_WORK_MODE_NORMAL) {
|
||||
*hmax = BF3A03_HMAX_640X480_LINEAR; // TODO: 待确认寄存器值是否就是真正的hmax
|
||||
} else {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support work mode: %d\n", bf3a03_ctx->work_mode);
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support, please check image param!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_get_fps(xmedia_u32 dev, xmedia_float *fps, xmedia_float *min_fps, xmedia_float *max_fps)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
sensor_context *bf3a03_ctx = XMEDIA_NULL;
|
||||
|
||||
SENSOR_CHECK_DEV_RETURN(dev);
|
||||
SENSOR_CHECK_PTR_RETURN(fps);
|
||||
SENSOR_CHECK_PTR_RETURN(min_fps);
|
||||
SENSOR_CHECK_PTR_RETURN(max_fps);
|
||||
BF3A03_GET_CTX(dev, bf3a03_ctx);
|
||||
SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
|
||||
|
||||
ret = bf3a03_get_min_fps(bf3a03_ctx->img_mode, min_fps);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
ret = bf3a03_get_max_fps(bf3a03_ctx->img_mode, max_fps);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
*fps = bf3a03_ctx->fps;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_init_register_func(xmedia_sensor_register_info *info)
|
||||
{
|
||||
SENSOR_CHECK_PTR_RETURN(info);
|
||||
memcpy(info->sensor_name, BF3A03_NAME, sizeof(BF3A03_NAME));
|
||||
|
||||
// Called by user
|
||||
info->isp_func.pfn_sensor_get_property = bf3a03_get_property;
|
||||
info->isp_func.pfn_sensor_set_work_mode = bf3a03_set_work_mode;
|
||||
info->isp_func.pfn_sensor_set_mipi_lanes = bf3a03_set_mipi_lanes;
|
||||
info->isp_func.pfn_sensor_mirror = bf3a03_mirror;
|
||||
info->isp_func.pfn_sensor_flip = bf3a03_flip;
|
||||
info->isp_func.pfn_sensor_set_bus_info = bf3a03_set_bus_info;
|
||||
info->isp_func.pfn_sensor_set_dev_addr = bf3a03_set_dev_addr;
|
||||
info->isp_func.pfn_sensor_set_init_param = bf3a03_set_init_param;
|
||||
info->isp_func.pfn_sensor_start = bf3a03_start;
|
||||
info->isp_func.pfn_sensor_stop = bf3a03_stop;
|
||||
info->isp_func.pfn_sensor_standby = bf3a03_standby;
|
||||
info->isp_func.pfn_sensor_resume = bf3a03_resume;
|
||||
info->isp_func.pfn_sensor_write_reg = bf3a03_write_reg;
|
||||
info->isp_func.pfn_sensor_read_reg = bf3a03_read_reg;
|
||||
info->isp_func.pfn_sensor_init = bf3a03_init;
|
||||
info->isp_func.pfn_sensor_exit = bf3a03_exit;
|
||||
info->isp_func.pfn_sensor_set_attr = bf3a03_set_attr;
|
||||
|
||||
// called by ISP
|
||||
info->isp_func.pfn_sensor_get_isp_default = bf3a03_get_isp_default;
|
||||
info->isp_func.pfn_sensor_get_isp_black_level = bf3a03_get_isp_black_level;
|
||||
info->isp_func.pfn_sensor_get_reg_info = bf3a03_get_reg_info;
|
||||
info->isp_func.pfn_sensor_get_bayer_pattern = bf3a03_get_bayer_pattern;
|
||||
info->isp_func.pfn_sensor_get_capability = bf3a03_get_capability;
|
||||
info->isp_func.pfn_sensor_get_dev_addr = bf3a03_get_dev_addr;
|
||||
info->isp_func.pfn_sensor_get_trig_attr = bf3a03_get_trig_attr;
|
||||
info->isp_func.pfn_sensor_get_hmax_vmax = bf3a03_get_hmax_vmax;
|
||||
info->isp_func.pfn_sensor_get_fps = bf3a03_get_fps;
|
||||
|
||||
// AE
|
||||
info->ae_func.pfn_sensor_get_ae_default = bf3a03_get_ae_default;
|
||||
info->ae_func.pfn_sensor_set_fps = bf3a03_set_fps;
|
||||
info->ae_func.pfn_sensor_set_slow_framerate = bf3a03_set_slow_framerate;
|
||||
info->ae_func.pfn_sensor_get_max_inttime = bf3a03_get_max_inttime;
|
||||
info->ae_func.pfn_sensor_update_inttime = bf3a03_update_inttime;
|
||||
info->ae_func.pfn_sensor_calc_again = bf3a03_calc_again;
|
||||
info->ae_func.pfn_sensor_calc_dgain = bf3a03_calc_dgain;
|
||||
info->ae_func.pfn_sensor_update_gains = bf3a03_update_gains;
|
||||
info->ae_func.pfn_sensor_set_ae_wdr_attr = bf3a03_set_ae_wdr_attr;
|
||||
|
||||
// AWB
|
||||
info->awb_func.pfn_sensor_get_awb_default = bf3a03_get_awb_default;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
xmedia_s32 bf3a03_register(xmedia_u32 pipe)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u32 dev;
|
||||
xmedia_sensor_register_info info;
|
||||
|
||||
SENSOR_CHECK_PIPE_RETURN(pipe);
|
||||
|
||||
ret = bf3a03_search_dev(pipe, &dev);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
|
||||
ret = bf3a03_ctx_init(dev);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
|
||||
memset(&info, 0, sizeof(xmedia_sensor_register_info));
|
||||
info.dev_id = dev;
|
||||
ret = bf3a03_init_register_func(&info);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
|
||||
ret = xmedia_isp_register_sensor(pipe, &info);
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "BF3A03 register failed! error code = %d.\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
xmedia_s32 bf3a03_unregister(xmedia_u32 pipe)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u32 dev;
|
||||
sensor_context *bf3a03_ctx = XMEDIA_NULL;
|
||||
|
||||
SENSOR_CHECK_PIPE_RETURN(pipe);
|
||||
ret = bf3a03_match_dev(pipe, &dev);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
|
||||
BF3A03_GET_CTX(dev, bf3a03_ctx);
|
||||
SENSOR_CHECK_PTR_RETURN(bf3a03_ctx);
|
||||
|
||||
if (bf3a03_ctx->init == XMEDIA_TRUE) {
|
||||
SENSOR_PRINT("Operation not allowed, please EXIT at first!\n");
|
||||
return XMEDIA_ERRCODE_NOT_PERMITTED;
|
||||
}
|
||||
|
||||
ret = xmedia_isp_unregister_sensor(pipe, dev);
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "BF3A03 unregister function failed!\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
bf3a03_ctx_exit(dev);
|
||||
g_bf3a03_dev_map[dev] = SENSOR_DEV_INVALID;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
+25
@@ -0,0 +1,25 @@
|
||||
#ifndef __BF3A03_H__
|
||||
#define __BF3A03_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define BF3A03_FULL_LINES_MAX 0xFFFF // 未找到vmax对应的寄存器
|
||||
#define BF3A03_VMAX_640X480_LINEAR 0x465 // 未找到vmax对应的寄存器
|
||||
|
||||
#define BF3A03_EXP_OFFSET_LINEAR 0 // TODO: 待确认
|
||||
|
||||
#define BF3A03_EXP_SHIFT 0
|
||||
|
||||
typedef enum {
|
||||
BF3A03_REG_MAX_NUM
|
||||
} bf3a03_reg_info;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __BF3A03_H__
|
||||
+317
@@ -0,0 +1,317 @@
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "i2c_dev.h"
|
||||
#include "bf3a03.h"
|
||||
#include "bf3a03_ctrl.h"
|
||||
|
||||
static xmedia_s32 g_bf3a03_i2c_addr[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
|
||||
static xmedia_s32 g_bf3a03_i2c_fd[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
|
||||
#define BF3A03_REG_ADDR_MIRROR_FLIP 0x12
|
||||
|
||||
xmedia_void bf3a03_delay_ms(xmedia_s32 ms)
|
||||
{
|
||||
sleep_us(ms * 1000);
|
||||
}
|
||||
|
||||
static xmedia_s32 bf3a03_dvp_linear_640x480_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
bf3a03_write_reg(dev, 0x12, 0x80);
|
||||
ret |= bf3a03_write_reg(dev, 0x09, 0x55);
|
||||
ret |= bf3a03_write_reg(dev, 0x15, 0x02);
|
||||
ret |= bf3a03_write_reg(dev, 0x1e, 0x40);
|
||||
ret |= bf3a03_write_reg(dev, 0x06, 0x78);
|
||||
ret |= bf3a03_write_reg(dev, 0x21, 0x00);
|
||||
ret |= bf3a03_write_reg(dev, 0x3e, 0x37);
|
||||
ret |= bf3a03_write_reg(dev, 0x29, 0x2b);
|
||||
ret |= bf3a03_write_reg(dev, 0x27, 0x98);
|
||||
ret |= bf3a03_write_reg(dev, 0x16, 0x25);
|
||||
ret |= bf3a03_write_reg(dev, 0x20, 0x00);
|
||||
ret |= bf3a03_write_reg(dev, 0xd2, 0x18);
|
||||
ret |= bf3a03_write_reg(dev, 0x11, 0x10);
|
||||
ret |= bf3a03_write_reg(dev, 0x2f, 0x4e);
|
||||
ret |= bf3a03_write_reg(dev, 0x1b, 0x09);
|
||||
ret |= bf3a03_write_reg(dev, 0x3a, 0x00);
|
||||
ret |= bf3a03_write_reg(dev, 0x4a, 0x98);
|
||||
ret |= bf3a03_write_reg(dev, 0x12, 0x00);
|
||||
ret |= bf3a03_write_reg(dev, 0x13, 0x08);
|
||||
ret |= bf3a03_write_reg(dev, 0x01, 0x14);
|
||||
ret |= bf3a03_write_reg(dev, 0x02, 0x20);
|
||||
ret |= bf3a03_write_reg(dev, 0x8c, 0x02);
|
||||
ret |= bf3a03_write_reg(dev, 0x8d, 0x4c);
|
||||
ret |= bf3a03_write_reg(dev, 0x87, 0x16);
|
||||
ret |= bf3a03_write_reg(dev, 0x13, 0x07);
|
||||
ret |= bf3a03_write_reg(dev, 0x70, 0x0f);
|
||||
ret |= bf3a03_write_reg(dev, 0x3b, 0x00);
|
||||
ret |= bf3a03_write_reg(dev, 0x71, 0x0c);
|
||||
ret |= bf3a03_write_reg(dev, 0x73, 0x27);
|
||||
ret |= bf3a03_write_reg(dev, 0x75, 0x88);
|
||||
ret |= bf3a03_write_reg(dev, 0x76, 0xd8);
|
||||
ret |= bf3a03_write_reg(dev, 0x77, 0x0a);
|
||||
ret |= bf3a03_write_reg(dev, 0x78, 0xff);
|
||||
ret |= bf3a03_write_reg(dev, 0x79, 0x14);
|
||||
ret |= bf3a03_write_reg(dev, 0x7a, 0x23);
|
||||
ret |= bf3a03_write_reg(dev, 0x9e, 0x04);
|
||||
ret |= bf3a03_write_reg(dev, 0x7d, 0x2a);
|
||||
ret |= bf3a03_write_reg(dev, 0x39, 0xa0);
|
||||
ret |= bf3a03_write_reg(dev, 0x3f, 0xa0);
|
||||
ret |= bf3a03_write_reg(dev, 0x40, 0x19);
|
||||
ret |= bf3a03_write_reg(dev, 0x41, 0x1e);
|
||||
ret |= bf3a03_write_reg(dev, 0x42, 0x1f);
|
||||
ret |= bf3a03_write_reg(dev, 0x43, 0x20);
|
||||
ret |= bf3a03_write_reg(dev, 0x44, 0x1d);
|
||||
ret |= bf3a03_write_reg(dev, 0x45, 0x19);
|
||||
ret |= bf3a03_write_reg(dev, 0x46, 0x17);
|
||||
ret |= bf3a03_write_reg(dev, 0x47, 0x17);
|
||||
ret |= bf3a03_write_reg(dev, 0x48, 0x14);
|
||||
ret |= bf3a03_write_reg(dev, 0x49, 0x12);
|
||||
ret |= bf3a03_write_reg(dev, 0x4b, 0x0f);
|
||||
ret |= bf3a03_write_reg(dev, 0x4c, 0x0c);
|
||||
ret |= bf3a03_write_reg(dev, 0x4e, 0x08);
|
||||
ret |= bf3a03_write_reg(dev, 0x4f, 0x06);
|
||||
ret |= bf3a03_write_reg(dev, 0x50, 0x03);
|
||||
ret |= bf3a03_write_reg(dev, 0x24, 0x50);
|
||||
ret |= bf3a03_write_reg(dev, 0x97, 0x40);
|
||||
ret |= bf3a03_write_reg(dev, 0x25, 0x88);
|
||||
ret |= bf3a03_write_reg(dev, 0x81, 0x00);
|
||||
ret |= bf3a03_write_reg(dev, 0x82, 0x18);
|
||||
ret |= bf3a03_write_reg(dev, 0x83, 0x30);
|
||||
ret |= bf3a03_write_reg(dev, 0x84, 0x20);
|
||||
ret |= bf3a03_write_reg(dev, 0x85, 0x38);
|
||||
ret |= bf3a03_write_reg(dev, 0x86, 0xa0);
|
||||
ret |= bf3a03_write_reg(dev, 0x94, 0x82);
|
||||
ret |= bf3a03_write_reg(dev, 0x80, 0x92);
|
||||
ret |= bf3a03_write_reg(dev, 0x98, 0x8a);
|
||||
ret |= bf3a03_write_reg(dev, 0x89, 0x7d);
|
||||
ret |= bf3a03_write_reg(dev, 0x8e, 0x2c);
|
||||
ret |= bf3a03_write_reg(dev, 0x8f, 0x82);
|
||||
ret |= bf3a03_write_reg(dev, 0x2b, 0x20);
|
||||
ret |= bf3a03_write_reg(dev, 0x8a, 0x49);
|
||||
ret |= bf3a03_write_reg(dev, 0x8b, 0x3d);
|
||||
ret |= bf3a03_write_reg(dev, 0x92, 0x6D);
|
||||
ret |= bf3a03_write_reg(dev, 0x5a, 0xec);
|
||||
ret |= bf3a03_write_reg(dev, 0x51, 0x90);
|
||||
ret |= bf3a03_write_reg(dev, 0x52, 0x10);
|
||||
ret |= bf3a03_write_reg(dev, 0x53, 0x8d);
|
||||
ret |= bf3a03_write_reg(dev, 0x54, 0x88);
|
||||
ret |= bf3a03_write_reg(dev, 0x57, 0x82);
|
||||
ret |= bf3a03_write_reg(dev, 0x58, 0x8d);
|
||||
ret |= bf3a03_write_reg(dev, 0x5a, 0x7c);
|
||||
ret |= bf3a03_write_reg(dev, 0x51, 0x80);
|
||||
ret |= bf3a03_write_reg(dev, 0x52, 0x04);
|
||||
ret |= bf3a03_write_reg(dev, 0x53, 0x8d);
|
||||
ret |= bf3a03_write_reg(dev, 0x54, 0x88);
|
||||
ret |= bf3a03_write_reg(dev, 0x57, 0x82);
|
||||
ret |= bf3a03_write_reg(dev, 0x58, 0x8d);
|
||||
ret |= bf3a03_write_reg(dev, 0x5a, 0x6c);
|
||||
ret |= bf3a03_write_reg(dev, 0x51, 0x8a);
|
||||
ret |= bf3a03_write_reg(dev, 0x52, 0x04);
|
||||
ret |= bf3a03_write_reg(dev, 0x53, 0x8a);
|
||||
ret |= bf3a03_write_reg(dev, 0x54, 0x85);
|
||||
ret |= bf3a03_write_reg(dev, 0x57, 0x04);
|
||||
ret |= bf3a03_write_reg(dev, 0x58, 0x8a);
|
||||
ret |= bf3a03_write_reg(dev, 0xb0, 0xa0);
|
||||
ret |= bf3a03_write_reg(dev, 0xb1, 0x26);
|
||||
ret |= bf3a03_write_reg(dev, 0xb2, 0x1c);
|
||||
ret |= bf3a03_write_reg(dev, 0xb4, 0xfd);
|
||||
ret |= bf3a03_write_reg(dev, 0xb0, 0x30);
|
||||
ret |= bf3a03_write_reg(dev, 0xb1, 0xd8);
|
||||
ret |= bf3a03_write_reg(dev, 0xb2, 0xb0);
|
||||
ret |= bf3a03_write_reg(dev, 0xb4, 0xf1);
|
||||
ret |= bf3a03_write_reg(dev, 0x3c, 0x40);
|
||||
ret |= bf3a03_write_reg(dev, 0x56, 0x48);
|
||||
ret |= bf3a03_write_reg(dev, 0x4d, 0x40);
|
||||
ret |= bf3a03_write_reg(dev, 0x59, 0x40);
|
||||
ret |= bf3a03_write_reg(dev, 0x35, 0x46);
|
||||
ret |= bf3a03_write_reg(dev, 0x65, 0x38);
|
||||
ret |= bf3a03_write_reg(dev, 0x66, 0x42);
|
||||
ret |= bf3a03_write_reg(dev, 0x6a, 0xd1);
|
||||
ret |= bf3a03_write_reg(dev, 0x23, 0x11);
|
||||
ret |= bf3a03_write_reg(dev, 0xa2, 0x0b);
|
||||
ret |= bf3a03_write_reg(dev, 0xa3, 0x26);
|
||||
ret |= bf3a03_write_reg(dev, 0xa4, 0x04);
|
||||
ret |= bf3a03_write_reg(dev, 0xa5, 0x26);
|
||||
ret |= bf3a03_write_reg(dev, 0xa7, 0x15);
|
||||
ret |= bf3a03_write_reg(dev, 0xa8, 0x0e);
|
||||
ret |= bf3a03_write_reg(dev, 0xa9, 0x20);
|
||||
ret |= bf3a03_write_reg(dev, 0xaa, 0x20);
|
||||
ret |= bf3a03_write_reg(dev, 0xab, 0x16);
|
||||
ret |= bf3a03_write_reg(dev, 0xac, 0x30);
|
||||
ret |= bf3a03_write_reg(dev, 0xad, 0xf0);
|
||||
ret |= bf3a03_write_reg(dev, 0xae, 0x57);
|
||||
ret |= bf3a03_write_reg(dev, 0xc5, 0x66);
|
||||
ret |= bf3a03_write_reg(dev, 0xc7, 0x38);
|
||||
ret |= bf3a03_write_reg(dev, 0xc8, 0x0d);
|
||||
ret |= bf3a03_write_reg(dev, 0xc9, 0x16);
|
||||
ret |= bf3a03_write_reg(dev, 0xd3, 0x09);
|
||||
ret |= bf3a03_write_reg(dev, 0xd4, 0x15);
|
||||
ret |= bf3a03_write_reg(dev, 0xd0, 0x00);
|
||||
ret |= bf3a03_write_reg(dev, 0xd1, 0x00);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "bf3a03_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
} else {
|
||||
SENSOR_PRINT("=============================================================================================\n");
|
||||
SENSOR_PRINT("============ bf3a03_normal_dvp_24Minput_yuv422_linear_640x480_30fps init success! ===========\n");
|
||||
SENSOR_PRINT("=============================================================================================\n");
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
xmedia_s32 bf3a03_init_image(xmedia_u32 dev, xmedia_u8 image_mode, xmedia_sensor_work_mode work_mode)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
switch (image_mode) {
|
||||
case BF3A03_DVP_640X480_LINEAR_MODE:
|
||||
ret = bf3a03_dvp_linear_640x480_init(dev);
|
||||
break;
|
||||
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support, please check image param!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 bf3a03_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_bf3a03_i2c_fd[dev] < 0) {
|
||||
SENSOR_PRINT("Sensor dev [%d], i2c not open. please init i2c at first.\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_set_slave_addr(g_bf3a03_i2c_fd[dev], slave_addr);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
|
||||
i2c_close(g_bf3a03_i2c_fd[dev]);
|
||||
g_bf3a03_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
g_bf3a03_i2c_addr[dev] = slave_addr;
|
||||
SENSOR_PRINT("Sensor dev [%d] set slave addr 0x%x success.\n", dev, slave_addr);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 bf3a03_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_bf3a03_i2c_fd[dev] >= 0) {
|
||||
SENSOR_PRINT("====== Sensor dev [%d], i2c already init !=======\n", dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
if (i2c_dev == SENSOR_I2C_INVALID) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Sensor i2c dev invalid! Please set i2c dev at first!\n");
|
||||
return XMEDIA_ERRCODE_NOT_CONFIG;
|
||||
}
|
||||
|
||||
g_bf3a03_i2c_fd[dev] = i2c_open(i2c_dev);
|
||||
if (g_bf3a03_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Open /dev/i2c_drv-%u error!\n", i2c_dev);
|
||||
return XMEDIA_ERRCODE_OPEN_FAILED;
|
||||
}
|
||||
|
||||
ret = bf3a03_set_slave_addr(dev, i2c_addr);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
SENSOR_PRINT("====== i2c[%d] init success!=======\n", i2c_dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 bf3a03_i2c_exit(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
ret = i2c_close(g_bf3a03_i2c_fd[dev]);
|
||||
if(ret < 0 ) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] close i2c failed!\n", dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
g_bf3a03_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 bf3a03_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[BF3A03_DATA_BYTE];
|
||||
|
||||
if (g_bf3a03_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_read(g_bf3a03_i2c_fd[dev], g_bf3a03_i2c_addr[dev], addr, BF3A03_ADDR_BYTE, buf, BF3A03_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] read i2c addr [0x%X] failed!\n", dev, addr);
|
||||
return ret;
|
||||
}
|
||||
|
||||
*data = buf[0]; //BF3A03_DATA_BYTE == 1
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 bf3a03_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data)
|
||||
{
|
||||
xmedia_u32 idx = 0;
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[8];
|
||||
|
||||
if (g_bf3a03_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
buf[idx] = addr & 0xff;
|
||||
idx++;
|
||||
buf[idx] = data & 0xff;
|
||||
|
||||
ret = i2c_write(g_bf3a03_i2c_fd[dev], g_bf3a03_i2c_addr[dev], buf, BF3A03_ADDR_BYTE + BF3A03_DATA_BYTE);
|
||||
if (ret != (BF3A03_ADDR_BYTE + BF3A03_DATA_BYTE)) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_WRITE error!ret=%d.\n", ret);
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
xmedia_s32 bf3a03_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u32 mirror_flip_type;
|
||||
|
||||
bf3a03_read_reg(dev, BF3A03_REG_ADDR_MIRROR_FLIP, &mirror_flip_type);
|
||||
|
||||
if (mirror_en) {
|
||||
mirror_flip_type |= 0x20;
|
||||
} else {
|
||||
mirror_flip_type &= 0xdf;
|
||||
}
|
||||
|
||||
if (flip_en) {
|
||||
mirror_flip_type |= 0x10;
|
||||
} else {
|
||||
mirror_flip_type &= 0xef;
|
||||
}
|
||||
|
||||
ret = bf3a03_write_reg(dev, BF3A03_REG_ADDR_MIRROR_FLIP, mirror_flip_type);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "bf3a03_write_reg failed\n");
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
+29
@@ -0,0 +1,29 @@
|
||||
#ifndef __BF3A03_CTRL_H__
|
||||
#define __BF3A03_CTRL_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define BF3A03_I2C_ADDR 0xDC
|
||||
#define BF3A03_ADDR_BYTE 1
|
||||
#define BF3A03_DATA_BYTE 1
|
||||
|
||||
// bf3a03 specs list
|
||||
#define BF3A03_DVP_640X480_LINEAR_MODE 1
|
||||
|
||||
xmedia_s32 bf3a03_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr);
|
||||
xmedia_s32 bf3a03_i2c_exit(xmedia_u32 dev);
|
||||
xmedia_s32 bf3a03_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data);
|
||||
xmedia_s32 bf3a03_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data);
|
||||
xmedia_s32 bf3a03_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en);
|
||||
xmedia_s32 bf3a03_init_image(xmedia_u32 dev, xmedia_u8 img_mode, xmedia_sensor_work_mode work_mode);
|
||||
xmedia_s32 bf3a03_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //__BF3A03_CTRL_H__
|
||||
+53
@@ -0,0 +1,53 @@
|
||||
#ifndef __BF3A03_EX_H__
|
||||
#define __BF3A03_EX_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// Piris attr
|
||||
static const xmedia_isp_piris_attr g_bf3a03_piris_attr = {
|
||||
0,
|
||||
1,
|
||||
94,
|
||||
62,
|
||||
// Step-F number mapping table. Must be from small to large. F1.0 is 1024 and F32.0 is 1
|
||||
{30, 35, 40, 45, 50, 56, 61, 67, 73, 79, 85, 92, 98, 105, 112, 120, 127, 135, 143, 150, 158,
|
||||
166, 174, 183, 191, 200, 208, 217, 225, 234, 243, 252, 261, 270, 279, 289, 298, 307, 316, 325, 335, 344,
|
||||
353, 362, 372, 381, 390, 399, 408, 417, 426, 435, 444, 453, 462, 470, 478, 486, 493, 500, 506, 512},
|
||||
XMEDIA_ISP_IRIS_F_NO_1_4,
|
||||
XMEDIA_ISP_IRIS_F_NO_5_6
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_ccm g_bf3a03_awb_ccm = {
|
||||
3,
|
||||
{
|
||||
{
|
||||
6300,
|
||||
{699,33237,26,32804,344,32820,32792,33114,626},
|
||||
},
|
||||
{
|
||||
3850,
|
||||
{622,33009,32893,32805,442,32917,32787,33015,522},
|
||||
},
|
||||
{
|
||||
2750,
|
||||
{556,32913,32923,32888,554,32946,32770,33052,542},
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_bf3a03_awb_agc_table = {
|
||||
// bvalid
|
||||
1,
|
||||
|
||||
// 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768
|
||||
// saturation
|
||||
{ 125, 120, 115, 115, 115, 115, 115, 105, 96, 86, 86, 76, 56, 56, 56, 56}
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
+5
@@ -0,0 +1,5 @@
|
||||
ifneq ($(MCU), )
|
||||
include Makefile.riscv
|
||||
else
|
||||
include Makefile.linux
|
||||
endif
|
||||
+20
@@ -0,0 +1,20 @@
|
||||
ISP_DIR := $(shell cd ../.. && /bin/pwd)
|
||||
SDK_DIR ?= $(shell cd $(ISP_DIR)/../../../.. && /bin/pwd)
|
||||
|
||||
include $(SDK_DIR)/build/base.mk
|
||||
include $(ISP_DIR)/sensor/plat.mk
|
||||
|
||||
LIB_NAME := libsns_cv2005
|
||||
|
||||
SRCS := $(wildcard *.c)
|
||||
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/usr/include
|
||||
SDK_USR_CFLAGS += -I$(ISP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I$(ISP_DIR)/../include
|
||||
SDK_USR_CFLAGS += -I.
|
||||
AT := @
|
||||
|
||||
$(info SRCS=$(SRCS))
|
||||
|
||||
include $(SDK_DIR)/build/sdk_lib_rules.mk
|
||||
@@ -0,0 +1,6 @@
|
||||
|
||||
SRCS-y += cv2005.c
|
||||
SRCS-y += cv2005_ctrl.c
|
||||
SRCS-y += cv2005_master.c
|
||||
SRCS-y += cv2005_slave.c
|
||||
|
||||
+1309
File diff suppressed because it is too large
Load Diff
+42
@@ -0,0 +1,42 @@
|
||||
#ifndef __CV2005_H__
|
||||
#define __CV2005_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// sensor fps mode
|
||||
#define CV2005_FULL_LINES_MAX 0xFFFFF
|
||||
#define CV2005_VMAX_1920X1080_LINEAR 0x49C
|
||||
#define CV2005_EXP_OFFSET_LINEAR 6
|
||||
|
||||
#define CV2005_REG_ADDR_EXP_H 0x304A
|
||||
#define CV2005_REG_ADDR_EXP_M 0x3049
|
||||
#define CV2005_REG_ADDR_EXP_L 0x3048
|
||||
#define CV2005_REG_ADDR_AGAIN 0x3118
|
||||
#define CV2005_REG_ADDR_DGAIN_H 0x311D
|
||||
#define CV2005_REG_ADDR_DGAIN_L 0x311C
|
||||
#define CV2005_REG_ADDR_VMAX_H 0x301E
|
||||
#define CV2005_REG_ADDR_VMAX_M 0x301D
|
||||
#define CV2005_REG_ADDR_VMAX_L 0x301C
|
||||
|
||||
typedef enum {
|
||||
CV2005_REG_EXP_H = 0,
|
||||
CV2005_REG_EXP_M,
|
||||
CV2005_REG_EXP_L,
|
||||
CV2005_REG_AGAIN,
|
||||
CV2005_REG_DGAIN_H,
|
||||
CV2005_REG_DGAIN_L,
|
||||
CV2005_REG_VMAX_H,
|
||||
CV2005_REG_VMAX_M,
|
||||
CV2005_REG_VMAX_L,
|
||||
CV2005_REG_MAX_NUM
|
||||
} cv2005_reg_info;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __CV2005_H__
|
||||
+216
@@ -0,0 +1,216 @@
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "i2c_dev.h"
|
||||
#include "cv2005.h"
|
||||
#include "cv2005_ctrl.h"
|
||||
|
||||
static xmedia_s32 g_cv2005_i2c_addr[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
|
||||
static xmedia_s32 g_cv2005_i2c_fd[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
|
||||
#define CV2005_REG_ADDR_MIRROR_FLIP 0x3028
|
||||
#define CV2005_REG_ADDR_X_START 0x3038
|
||||
#define CV2005_REG_ADDR_Y_START 0x3034
|
||||
#define CV2005_REG_VALUE_X_START 4
|
||||
#define CV2005_REG_VALUE_Y_START 4
|
||||
|
||||
static xmedia_s32 cv2005_2lane_linear_1920x1080_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
ret |= cv2005_write_reg(dev, 0x301C, 0x9C);
|
||||
ret |= cv2005_write_reg(dev, 0x301D, 0x04);
|
||||
ret |= cv2005_write_reg(dev, 0x301E, 0x00);
|
||||
ret |= cv2005_write_reg(dev, 0x3020, 0x4E);
|
||||
ret |= cv2005_write_reg(dev, 0x3021, 0x04);
|
||||
ret |= cv2005_write_reg(dev, 0x3808, 0x41);
|
||||
ret |= cv2005_write_reg(dev, 0x3031, 0x00);
|
||||
ret |= cv2005_write_reg(dev, 0x3204, 0x40);
|
||||
ret |= cv2005_write_reg(dev, 0x359d, 0x00);
|
||||
ret |= cv2005_write_reg(dev, 0x389D, 0x0A);
|
||||
ret |= cv2005_write_reg(dev, 0x389C, 0x6A);
|
||||
ret |= cv2005_write_reg(dev, 0x38A0, 0x2B);
|
||||
ret |= cv2005_write_reg(dev, 0x3878, 0x01);
|
||||
ret |= cv2005_write_reg(dev, 0x3879, 0x15);
|
||||
ret |= cv2005_write_reg(dev, 0x356F, 0x0f);
|
||||
ret |= cv2005_write_reg(dev, 0x3109, 0x01);
|
||||
ret |= cv2005_write_reg(dev, 0x3420, 0x2f);
|
||||
ret |= cv2005_write_reg(dev, 0x3422, 0x87);
|
||||
ret |= cv2005_write_reg(dev, 0x3424, 0x3f);
|
||||
ret |= cv2005_write_reg(dev, 0x3426, 0x57);
|
||||
ret |= cv2005_write_reg(dev, 0x3428, 0x2f);
|
||||
ret |= cv2005_write_reg(dev, 0x3000, 0x00); // Streaming
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "cv2005_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
} else {
|
||||
SENSOR_PRINT("=============================================================================================\n");
|
||||
SENSOR_PRINT("======== cv2005_normal_mipi_24Minput_2lane_10bit_linear_1920x1080_30fps init success ========\n");
|
||||
SENSOR_PRINT("=============================================================================================\n");
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
xmedia_s32 cv2005_init_image(xmedia_u32 dev, xmedia_u8 image_mode, xmedia_sensor_work_mode work_mode)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
switch (image_mode) {
|
||||
case CV2005_2LANE_1920X1080_LINEAR_MODE:
|
||||
ret = cv2005_2lane_linear_1920x1080_init(dev);
|
||||
break;
|
||||
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support, please check image param!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv2005_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_cv2005_i2c_fd[dev] < 0) {
|
||||
SENSOR_PRINT("Sensor dev [%d], i2c not open. please init i2c at first.\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_set_slave_addr(g_cv2005_i2c_fd[dev], slave_addr);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
|
||||
i2c_close(g_cv2005_i2c_fd[dev]);
|
||||
g_cv2005_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
g_cv2005_i2c_addr[dev] = slave_addr;
|
||||
SENSOR_PRINT("Sensor dev [%d] set slave addr 0x%x success.\n", dev, slave_addr);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv2005_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_cv2005_i2c_fd[dev] >= 0) {
|
||||
SENSOR_PRINT("====== Sensor dev [%d], i2c already init !=======\n", dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
if (i2c_dev == SENSOR_I2C_INVALID) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Sensor i2c dev invalid! Please set i2c dev at first!\n");
|
||||
return XMEDIA_ERRCODE_NOT_CONFIG;
|
||||
}
|
||||
|
||||
g_cv2005_i2c_fd[dev] = i2c_open(i2c_dev);
|
||||
if (g_cv2005_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Open /dev/i2c_drv-%u error!\n", i2c_dev);
|
||||
return XMEDIA_ERRCODE_OPEN_FAILED;
|
||||
}
|
||||
|
||||
ret = cv2005_set_slave_addr(dev, i2c_addr);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
SENSOR_PRINT("====== i2c[%d] init success!=======\n", i2c_dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv2005_i2c_exit(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
ret = i2c_close(g_cv2005_i2c_fd[dev]);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] close i2c failed!\n", dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
g_cv2005_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv2005_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[CV2005_DATA_BYTE];
|
||||
|
||||
if (g_cv2005_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_read(g_cv2005_i2c_fd[dev], g_cv2005_i2c_addr[dev], addr, CV2005_ADDR_BYTE, buf, CV2005_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] read i2c addr [0x%X] failed!\n", dev, addr);
|
||||
return ret;
|
||||
}
|
||||
|
||||
*data = buf[0]; // CV2005_DATA_BYTE == 1
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv2005_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data)
|
||||
{
|
||||
xmedia_u32 idx = 0;
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[8];
|
||||
|
||||
if (g_cv2005_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
buf[idx] = (addr >> 8) & 0xff;
|
||||
idx++;
|
||||
buf[idx] = addr & 0xff;
|
||||
idx++;
|
||||
buf[idx] = data & 0xff;
|
||||
|
||||
ret = i2c_write(g_cv2005_i2c_fd[dev], g_cv2005_i2c_addr[dev], buf, CV2005_ADDR_BYTE + CV2005_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_WRITE error!\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
xmedia_s32 cv2005_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u32 mirror_flip_type;
|
||||
xmedia_u32 x, y;
|
||||
|
||||
cv2005_read_reg(dev, CV2005_REG_ADDR_MIRROR_FLIP, &mirror_flip_type);
|
||||
|
||||
if (mirror_en) {
|
||||
mirror_flip_type |= 0x01;
|
||||
x = CV2005_REG_VALUE_X_START + 1;
|
||||
} else {
|
||||
mirror_flip_type &= 0xfe;
|
||||
x = CV2005_REG_VALUE_X_START;
|
||||
}
|
||||
|
||||
if (flip_en) {
|
||||
mirror_flip_type |= 0x02;
|
||||
y = CV2005_REG_VALUE_Y_START + 1;
|
||||
} else {
|
||||
mirror_flip_type &= 0xfd;
|
||||
y = CV2005_REG_VALUE_Y_START;
|
||||
}
|
||||
|
||||
cv2005_write_reg(dev, CV2005_REG_ADDR_X_START, x);
|
||||
cv2005_write_reg(dev, CV2005_REG_ADDR_Y_START, y);
|
||||
ret = cv2005_write_reg(dev, CV2005_REG_ADDR_MIRROR_FLIP, mirror_flip_type);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "cv2005_write_reg failed\n");
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
+29
@@ -0,0 +1,29 @@
|
||||
#ifndef __CV2005_CTRL_H__
|
||||
#define __CV2005_CTRL_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define CV2005_I2C_ADDR 0x6a
|
||||
#define CV2005_ADDR_BYTE 2
|
||||
#define CV2005_DATA_BYTE 1
|
||||
|
||||
// cv2005 specs list
|
||||
#define CV2005_2LANE_1920X1080_LINEAR_MODE 1
|
||||
|
||||
xmedia_s32 cv2005_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr);
|
||||
xmedia_s32 cv2005_i2c_exit(xmedia_u32 dev);
|
||||
xmedia_s32 cv2005_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data);
|
||||
xmedia_s32 cv2005_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data);
|
||||
xmedia_s32 cv2005_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en);
|
||||
xmedia_s32 cv2005_init_image(xmedia_u32 dev, xmedia_u8 img_mode, xmedia_sensor_work_mode work_mode);
|
||||
xmedia_s32 cv2005_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //__CV2005_CTRL_H__
|
||||
+102
@@ -0,0 +1,102 @@
|
||||
#ifndef __CV2005_EX_H__
|
||||
#define __CV2005_EX_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// Piris attr
|
||||
static const xmedia_isp_piris_attr g_cv2005_piris_attr = {
|
||||
0,
|
||||
1,
|
||||
94,
|
||||
62,
|
||||
// Step-F number mapping table. Must be from small to large. F1.0 is 1024 and F32.0 is 1
|
||||
{30, 35, 40, 45, 50, 56, 61, 67, 73, 79, 85, 92, 98, 105, 112, 120, 127, 135, 143, 150, 158,
|
||||
166, 174, 183, 191, 200, 208, 217, 225, 234, 243, 252, 261, 270, 279, 289, 298, 307, 316, 325, 335, 344,
|
||||
353, 362, 372, 381, 390, 399, 408, 417, 426, 435, 444, 453, 462, 470, 478, 486, 493, 500, 506, 512},
|
||||
XMEDIA_ISP_IRIS_F_NO_1_4,
|
||||
XMEDIA_ISP_IRIS_F_NO_5_6
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_ccm g_cv2005_awb_ccm = {
|
||||
4,
|
||||
{
|
||||
{
|
||||
6150,
|
||||
{
|
||||
|
||||
0x018C, 0x805D, 0x802F,
|
||||
0x803E, 0x0184, 0x8046,
|
||||
0x8001, 0x80C5, 0x01C6
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
4850,
|
||||
{
|
||||
|
||||
0x01FA, 0x80E0, 0x801A,
|
||||
0x8063, 0x0177, 0x8014,
|
||||
0x8013, 0x811F, 0x0232
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
3650,
|
||||
{
|
||||
|
||||
0x01CB, 0x8030, 0x809B,
|
||||
0x806B, 0x01BD, 0x8052,
|
||||
0x800C, 0x80ED, 0x01F9
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
2650,
|
||||
{
|
||||
0x01B9, 0x80A5, 0x8014,
|
||||
0x8090, 0x01A7, 0x8017,
|
||||
0x801D, 0x8159, 0x0276
|
||||
},
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_cv2005_awb_agc_table = {
|
||||
/* bvalid */
|
||||
1,
|
||||
|
||||
/* saturation */
|
||||
/* 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768 */
|
||||
{0x80, 0x78, 0x73, 0x6E, 0x69, 0x5F, 0x58, 0x50, 0x48, 0x40, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38}
|
||||
};
|
||||
|
||||
static const xmedia_isp_blc_attr g_cv2005_blc_attr = {
|
||||
.op_type = 0,
|
||||
.manual_attr = {
|
||||
.black_level = {512,512,512,512},
|
||||
},
|
||||
.auto_attr = {
|
||||
.iso_num = 10,
|
||||
.iso_level = {100, 200, 400, 800, 1600, 3200, 6400, 12800, 25600, 51200, 102400, 204800, 409600, 819200, 1638400, 3276800},
|
||||
.black_level = {
|
||||
{ 256,256,256,256, },//0
|
||||
{ 256,256,256,256, },//1
|
||||
{ 256,256,256,256, },//2
|
||||
{ 256,256,256,256, },//3
|
||||
{ 256,256,256,256, },//4
|
||||
{ 256,256,256,256, },//5
|
||||
{ 256,256,256,256, },//6
|
||||
{ 256,256,256,256, },//7
|
||||
{ 256,256,256,256, },//8
|
||||
{ 256,256,256,256, },//9
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __CV2005_EX_H__
|
||||
+7
@@ -0,0 +1,7 @@
|
||||
|
||||
ifneq ($(MCU), )
|
||||
include Makefile.riscv
|
||||
else
|
||||
include Makefile.linux
|
||||
endif
|
||||
|
||||
+20
@@ -0,0 +1,20 @@
|
||||
ISP_DIR := $(shell cd ../.. && /bin/pwd)
|
||||
SDK_DIR ?= $(shell cd $(ISP_DIR)/../../../.. && /bin/pwd)
|
||||
|
||||
include $(SDK_DIR)/build/base.mk
|
||||
include $(ISP_DIR)/sensor/plat.mk
|
||||
|
||||
LIB_NAME := libsns_cv4003
|
||||
|
||||
SRCS := $(wildcard *.c)
|
||||
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/usr/include
|
||||
SDK_USR_CFLAGS += -I$(ISP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I$(ISP_DIR)/../include
|
||||
SDK_USR_CFLAGS += -I.
|
||||
AT := @
|
||||
|
||||
$(info SRCS=$(SRCS))
|
||||
|
||||
include $(SDK_DIR)/build/sdk_lib_rules.mk
|
||||
@@ -0,0 +1,4 @@
|
||||
|
||||
SRCS-y += cv4003.c
|
||||
SRCS-y += cv4003_ctrl.c
|
||||
|
||||
+1351
File diff suppressed because it is too large
Load Diff
+43
@@ -0,0 +1,43 @@
|
||||
#ifndef __CV4003_H__
|
||||
#define __CV4003_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define CV4003_VMAX_4M_LINEAR 0x15e0 // 10bit
|
||||
#define CV4003_VMAX_1M_LINEAR 0x708 // 10bit
|
||||
|
||||
#define CV4003_EXP_OFFSET_LINEAR 8
|
||||
|
||||
// CV4003 Register Address
|
||||
#define CV4003_REG_ADDR_EXP_H 0x304a
|
||||
#define CV4003_REG_ADDR_EXP_M 0x3049
|
||||
#define CV4003_REG_ADDR_EXP_L 0x3048
|
||||
#define CV4003_REG_ADDR_AGAIN 0x3118
|
||||
#define CV4003_REG_ADDR_DGAIN_H 0x311D
|
||||
#define CV4003_REG_ADDR_DGAIN_L 0x311C
|
||||
#define CV4003_REG_ADDR_VMAX_H 0x301E
|
||||
#define CV4003_REG_ADDR_VMAX_M 0x301D
|
||||
#define CV4003_REG_ADDR_VMAX_L 0x301C
|
||||
|
||||
typedef enum {
|
||||
CV4003_REG_EXP_L = 0,
|
||||
CV4003_REG_EXP_M,
|
||||
CV4003_REG_EXP_H,
|
||||
CV4003_REG_AGAIN,
|
||||
CV4003_REG_DGAIN_L,
|
||||
CV4003_REG_DGAIN_H,
|
||||
CV4003_REG_VMAX_L,
|
||||
CV4003_REG_VMAX_M,
|
||||
CV4003_REG_VMAX_H,
|
||||
CV4003_REG_MAX_NUM,
|
||||
} cv4003_reg_index;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __CV4003_H__
|
||||
+729
@@ -0,0 +1,729 @@
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "i2c_dev.h"
|
||||
#include "cv4003.h"
|
||||
#include "cv4003_ctrl.h"
|
||||
|
||||
#define CV4003_REG_ADDR_MIRROR_FLIP 0x3028
|
||||
|
||||
SENSOR_PRIORITY_DATA static xmedia_s32 g_cv4003_i2c_fd[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
SENSOR_PRIORITY_DATA static xmedia_s32 g_cv4003_i2c_addr[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
|
||||
#ifdef USE_PREROLL_INFO
|
||||
static xmedia_u32 g_sns_info_expo; //exposure time, unit : ns
|
||||
static xmedia_u32 g_sns_info_gain; //real_gain * 1024
|
||||
static xmedia_u32 g_sns_info_luma;
|
||||
// static unsigned int sns_info_ev; //gain * expo_line.
|
||||
|
||||
xmedia_u32 exp_time_clac(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_u32 exp_time = 0x08;
|
||||
// ns 转化成以行为单位的曝光时间 5292ns:一行的曝光时间; 5592:vmax
|
||||
if (g_sns_info_expo > 5292) {
|
||||
g_sns_info_expo = g_sns_info_expo / 5292;
|
||||
exp_time = (g_sns_info_expo > 5592) ? 0 : (5592 - g_sns_info_expo);
|
||||
exp_time = (exp_time > (5592 - 2)) ? (5592 - 2) : exp_time;
|
||||
exp_time = exp_time / 2 * 2;
|
||||
exp_time = (exp_time < 8)? 8: exp_time;
|
||||
}
|
||||
return exp_time;
|
||||
}
|
||||
|
||||
xmedia_void gain_clac(xmedia_u32 dev, xmedia_s32 *again, xmedia_s32 *dgain)
|
||||
{
|
||||
xmedia_s32 again_reg, again_real, dgain_want, dgain_reg;
|
||||
|
||||
if (g_sns_info_gain <= 32768) { // 32 * 1024
|
||||
again_reg = (262144 - 268435456 / g_sns_info_gain) / 1024; // 等价于除以1024
|
||||
again_real = 262144 / (256 - again_reg);
|
||||
dgain_want = g_sns_info_gain * 1024 / again_real;
|
||||
dgain_reg = dgain_want * 64 / 1024;
|
||||
} else {
|
||||
again_reg = 0xf8;
|
||||
again_real = 32768;
|
||||
dgain_want = g_sns_info_gain * 1024 / again_real;
|
||||
dgain_reg = dgain_want / 16;
|
||||
}
|
||||
|
||||
if (dgain_reg < 64) {
|
||||
dgain_reg = 64;
|
||||
}
|
||||
|
||||
*again = again_reg;
|
||||
*dgain = dgain_reg;
|
||||
SENSOR_PRINT("again %x, dgain %x \n", *again, *dgain);
|
||||
return;
|
||||
}
|
||||
|
||||
//name :cv4003_get_internal_ae_info
|
||||
//desc: get exposure time & Gain infomation of final frame.
|
||||
// 在预录即将结束之前，获取到最后一张图的曝光时间和增益信息.
|
||||
//timing: 1. 在预录即将结束前调用.
|
||||
static xmedia_s32 cv4003_get_internal_ae_info(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = 0;
|
||||
xmedia_uchar mode = 0;
|
||||
xmedia_s32 intl_expo = 0;
|
||||
xmedia_s32 intl_dgain = 0;
|
||||
xmedia_s32 intl_again = 0;
|
||||
xmedia_s32 dgain_reg = 0;
|
||||
xmedia_s32 again_reg = 0;
|
||||
xmedia_s32 intl_luma = 0;
|
||||
xmedia_s64 gain_tmp = 0;
|
||||
xmedia_u32 tmp[3];
|
||||
|
||||
xmedia_s32 one_line_ns_fullmode = 5952; //ns. //10**9/1.0/30/0x15e0
|
||||
xmedia_s32 one_line_ns_preroll_720P = 6360; //ns. //10**9/1.0/5/0x2bc0
|
||||
xmedia_s32 fullmode_max_exposure_lines = 0x15e0; //lines.
|
||||
|
||||
// 获取模式值
|
||||
// mode = cv4003_read_reg(dev, 0x347B);
|
||||
|
||||
// 获取曝光值
|
||||
ret |= cv4003_read_reg(dev, 0x3040, &tmp[0]);
|
||||
ret |= cv4003_read_reg(dev, 0x3041, &tmp[1]);
|
||||
ret |= cv4003_read_reg(dev, 0x3042, &tmp[2]);
|
||||
intl_expo = (tmp[2] << 16) | (tmp[1] << 8) | tmp[0];
|
||||
|
||||
// 检查读取过程中是否有错误发生
|
||||
// if (mode == -1 || tmp[0] == -1 || tmp[1] == -1 || tmp[2] == -1)
|
||||
// goto error;
|
||||
// 获取增益值
|
||||
ret |= cv4003_read_reg(dev, 0x3340, &tmp[0]); // DGain_L
|
||||
ret |= cv4003_read_reg(dev, 0x3341, &tmp[1]); // DGain_H
|
||||
ret |= cv4003_read_reg(dev, 0x3342, &tmp[2]); // AGain
|
||||
|
||||
dgain_reg = (tmp[1] << 8) | tmp[0];
|
||||
again_reg = tmp[2];
|
||||
|
||||
// 检查读取过程中是否有错误发生
|
||||
if (tmp[0] == -1 || tmp[1] == -1 || tmp[2] == -1)
|
||||
goto error;
|
||||
|
||||
// Get luma value
|
||||
ret |= cv4003_read_reg(dev, 0x32C2, &tmp[0]);
|
||||
intl_luma = tmp[0];
|
||||
|
||||
if(ret) {
|
||||
goto error;
|
||||
}
|
||||
|
||||
SENSOR_PRINT("###AE-INFO##[Get]##> expo:0x%x, gain(a,d):0x%x,0x%x luma:0x%x ,mode:0x%x. \n",
|
||||
intl_expo, intl_again, intl_dgain, intl_luma, mode);
|
||||
SENSOR_PRINT("again_reg:0x%x. dgain_reg:0x%x.intl_luma:0x%x.\n", again_reg, dgain_reg, intl_luma);
|
||||
|
||||
g_sns_info_expo = 0;
|
||||
g_sns_info_gain = 0;
|
||||
g_sns_info_luma = 0;
|
||||
|
||||
if (again_reg == 0x00) {
|
||||
if( intl_expo * one_line_ns_preroll_720P >
|
||||
fullmode_max_exposure_lines*one_line_ns_fullmode - one_line_ns_fullmode * 10)
|
||||
{
|
||||
g_sns_info_expo = fullmode_max_exposure_lines * one_line_ns_fullmode - one_line_ns_fullmode * 10 ;
|
||||
g_sns_info_gain = intl_expo * one_line_ns_preroll_720P * 16 /
|
||||
fullmode_max_exposure_lines * 1024 / one_line_ns_fullmode / 16; // 16 & /16 is for prection
|
||||
SENSOR_PRINT("###shaokc0..720P.g_sns_info_gain = %d\n", g_sns_info_gain);
|
||||
} else {
|
||||
g_sns_info_expo = intl_expo * one_line_ns_preroll_720P;
|
||||
g_sns_info_gain = 1024;
|
||||
}
|
||||
} else {
|
||||
g_sns_info_expo = fullmode_max_exposure_lines * one_line_ns_fullmode - one_line_ns_fullmode * 10;
|
||||
intl_again = 256 * 1024 / (256 - again_reg);
|
||||
intl_dgain = dgain_reg * 1024 / 0x40;
|
||||
gain_tmp = intl_again * intl_dgain;
|
||||
//gain_tmp = gain_tmp * intl_expo * one_line_ns_preroll_720P
|
||||
// / fullmode_max_exposure_lines / one_line_ns_fullmode; //shaokc. may has risk. pay attention!!!!
|
||||
gain_tmp = gain_tmp / fullmode_max_exposure_lines * one_line_ns_preroll_720P
|
||||
/ one_line_ns_fullmode * intl_expo ; //shaokc. may has risk. pay attention!!!!
|
||||
gain_tmp /= 1024;
|
||||
|
||||
//g_sns_info_gain = (int64_t)gain_tmp; //---------------------暂时不强制转化
|
||||
g_sns_info_gain = gain_tmp;
|
||||
SENSOR_PRINT("###shaokc2...720P g_sns_info_gain = %d\n", g_sns_info_gain);
|
||||
}
|
||||
|
||||
if (g_sns_info_gain > 256 * 1024) {
|
||||
g_sns_info_gain = 256 * 1024;
|
||||
}
|
||||
|
||||
SENSOR_PRINT("###AE-INFO##[PPP]##> g_sns_info_expo:%d, gain:%d,a:%d,d:%d,tmp:%lld\n",
|
||||
g_sns_info_expo, g_sns_info_gain,intl_again,intl_dgain,gain_tmp);
|
||||
|
||||
return ret;
|
||||
|
||||
error:
|
||||
g_sns_info_expo = -1;
|
||||
g_sns_info_gain = -1;
|
||||
g_sns_info_luma = -1;
|
||||
|
||||
return ret;
|
||||
|
||||
}
|
||||
|
||||
static xmedia_s32 g_psram_final_addr = 0;
|
||||
|
||||
//name :cv4003_get_preroll_psram_final_addr
|
||||
//desc : read psram final address.
|
||||
// 在预录即将结束之前，获取到最后一张raw图对应的PSRAM地址指针(g_psram_final_addr)
|
||||
//timing: 1. call cv4003_get_internal_ae_info 获取到最新的AE信息，
|
||||
// 这个信息可以供后续主控做fastAE使用，或者直接出大图的时候使用.
|
||||
// 2. call stream off.(0x3000,0x01). 确保当前数据被完整写入.
|
||||
// （如果遇到数据正在写入中，则一直查询状态寄存器，确保数据被写入.）
|
||||
// 3. 读取相关寄存器,换算 g_psram_final_addr
|
||||
xmedia_s32 cv4003_get_preroll_psram_final_addr(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = 0;
|
||||
xmedia_u8 psram_final_addr_okflag = 0;
|
||||
xmedia_u32 val_sensor_sys_standby = 0;
|
||||
xmedia_u32 val_dc;
|
||||
xmedia_u32 val_dd;
|
||||
xmedia_u32 val_de;
|
||||
xmedia_u32 val_df;
|
||||
xmedia_u32 wait_ms;
|
||||
|
||||
//要停流之前，先读取曝光信息.
|
||||
// Full Mode Get AE info
|
||||
ret = cv4003_get_internal_ae_info(dev);
|
||||
SENSOR_PRINT("sizes[1]===> cv4003 Full Mode Get Internal AE Info(%d)\n", ret);
|
||||
if(ret < XMEDIA_SUCCESS) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
//如果遇到正在写入，等待20ms可以确保数据被写完整到PSRAM当中.
|
||||
ret |= cv4003_write_reg(dev, 0x3000, 0x01);
|
||||
//usleep(20000);
|
||||
cv4003_read_reg(dev, 0x30D8, &val_sensor_sys_standby);
|
||||
|
||||
//查询当前是否处于预录正在写入中，如果正在写入，等待写入完成.最大等待30ms,查询不到也退出逻辑，避免异常卡死.
|
||||
wait_ms = 0;
|
||||
while(val_sensor_sys_standby == 0x02 && wait_ms <= 30) //1是standby，0是非standby
|
||||
{
|
||||
usleep(1*1000);
|
||||
ret |= cv4003_read_reg(dev, 0x30D8, &val_sensor_sys_standby);
|
||||
SENSOR_PRINT(" wait sensor sys standby...\n");
|
||||
wait_ms++;
|
||||
}
|
||||
|
||||
if (wait_ms > 30) {
|
||||
SENSOR_PRINT(" wait sensor sys standby timeout!\n");
|
||||
}
|
||||
|
||||
//获取到PSRAM的final address. 这个是预录的最后一帧的最后一个byte的地址.
|
||||
ret |= cv4003_read_reg(dev, 0x32dc, &val_dc);
|
||||
ret |= cv4003_read_reg(dev, 0x32dd, &val_dd);
|
||||
ret |= cv4003_read_reg(dev, 0x32de, &val_de);
|
||||
ret |= cv4003_read_reg(dev, 0x32df, &val_df);
|
||||
|
||||
SENSOR_PRINT("psram final addr: 0x%02X%02X%02X%02X\n", val_df, val_de, val_dd,val_dc);
|
||||
|
||||
wait_ms = 0;
|
||||
g_psram_final_addr = (val_df << 24) | (val_de << 16) | (val_dd << 8) | val_dc;
|
||||
|
||||
while (wait_ms <= 15)
|
||||
{
|
||||
if((g_psram_final_addr + 1) % (1280 * 720) == 0)
|
||||
{
|
||||
psram_final_addr_okflag = 1;
|
||||
break;
|
||||
} else {
|
||||
psram_final_addr_okflag = 0;
|
||||
usleep(1*1000);
|
||||
|
||||
//获取到PSRAM的final address. 这个是预录的最后一帧的最后一个byte的地址.
|
||||
ret |= cv4003_read_reg(dev, 0x32dc, &val_dc);
|
||||
ret |= cv4003_read_reg(dev, 0x32dd, &val_dd);
|
||||
ret |= cv4003_read_reg(dev, 0x32de, &val_de);
|
||||
ret |= cv4003_read_reg(dev, 0x32df, &val_df);
|
||||
|
||||
SENSOR_PRINT("psram final addr: 0x%02X%02X%02X%02X\n", val_df, val_de, val_dd, val_dc);
|
||||
g_psram_final_addr = (val_df << 24) | (val_de << 16) | (val_dd << 8) | val_dc;
|
||||
wait_ms++;
|
||||
}
|
||||
}
|
||||
|
||||
if(ret < XMEDIA_SUCCESS) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (psram_final_addr_okflag == 0) {
|
||||
SENSOR_PRINT("shaokc Warning!!!!!! psram final addr is not ok, g_psram_final_addr: 0x%08x\n", g_psram_final_addr);
|
||||
}
|
||||
return XMEDIA_SUCCESS;
|
||||
|
||||
}
|
||||
|
||||
//name :cv4003_set_psram_read_region
|
||||
//desc: set psram read region.
|
||||
// 设置回读的起始和结束地址.确保出图顺序是对的（
|
||||
//从最久远的一张开始回读，一直到最新的一张，出完之后，就sensor 自动停止出流.）
|
||||
//timing: 1. set psram readback seq (cv4003_preroll_720p_readback_psram2cis2mipi_init);
|
||||
// 2. call cv4003_set_psram_read_region
|
||||
// 3. stream on.
|
||||
SENSOR_PRIORITY_FUNC static xmedia_s32 cv4003_set_psram_read_region(xmedia_u32 dev, xmedia_u32 final_addr)
|
||||
{
|
||||
//final_addr OPI mode address is 4 byte.
|
||||
|
||||
xmedia_s32 ret = 0;
|
||||
xmedia_u32 sta = final_addr + 1;
|
||||
xmedia_u32 end = final_addr;
|
||||
|
||||
if (final_addr == 0x3F47fff) { //when final addr is full.(eg: 1280*720*72fps @8bit )
|
||||
sta = 0x0;
|
||||
end = 0x3F47fff;
|
||||
}
|
||||
|
||||
// Set Read Region Start
|
||||
ret |= cv4003_write_reg(dev, 0x32E8, (xmedia_u8)(sta));
|
||||
ret |= cv4003_write_reg(dev, 0x32E9, (xmedia_u8)(sta >> 8));
|
||||
ret |= cv4003_write_reg(dev, 0x32EA, (xmedia_u8)(sta >> 16));
|
||||
ret |= cv4003_write_reg(dev, 0x32EB, (xmedia_u8)(sta >> 24));
|
||||
|
||||
// Set Read Region End
|
||||
ret |= cv4003_write_reg(dev, 0x32EC, (xmedia_u8)(end));
|
||||
ret |= cv4003_write_reg(dev, 0x32ED, (xmedia_u8)(end >> 8));
|
||||
ret |= cv4003_write_reg(dev, 0x32EE, (xmedia_u8)(end >> 16));
|
||||
ret |= cv4003_write_reg(dev, 0x32EF, (xmedia_u8)(end >> 24));
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
xmedia_s32 cv4003_preroll_720p_write_cis2psram_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_u32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
ret |= cv4003_write_reg(dev, 0x3010, 0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x3011, 0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x3017, 0x32);
|
||||
ret |= cv4003_write_reg(dev, 0x301C, 0x2A); // [19:0] FRAME_LENGTH //3fps
|
||||
ret |= cv4003_write_reg(dev, 0x301D, 0xE5);
|
||||
ret |= cv4003_write_reg(dev, 0x301E, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3020, 0x2C); // [15:0] LINE_LENGTH = 012C(dec:300)
|
||||
ret |= cv4003_write_reg(dev, 0x3021, 0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x3068, 0x61);
|
||||
ret |= cv4003_write_reg(dev, 0x302C, 0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x30D0, 0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x30D1, 0x6E);
|
||||
ret |= cv4003_write_reg(dev, 0x30D2, 0x6E);
|
||||
ret |= cv4003_write_reg(dev, 0x30D3, 0x50);
|
||||
ret |= cv4003_write_reg(dev, 0x30D4, 0x02);
|
||||
ret |= cv4003_write_reg(dev, 0x30D5, 0x08);
|
||||
ret |= cv4003_write_reg(dev, 0x3139, 0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x3151, 0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x3206, 0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x3218, 0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x32D2, 0x04); // [10:0] PS_WR_ADDR_OFST = 004(dec:4)
|
||||
ret |= cv4003_write_reg(dev, 0x32D3, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x330C, 0x90);
|
||||
ret |= cv4003_write_reg(dev, 0x330D, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x330E, 0x80);
|
||||
ret |= cv4003_write_reg(dev, 0x330F, 0x04);
|
||||
ret |= cv4003_write_reg(dev, 0x3310, 0x49);
|
||||
ret |= cv4003_write_reg(dev, 0x3311, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3312, 0x46);
|
||||
ret |= cv4003_write_reg(dev, 0x3313, 0x02);
|
||||
ret |= cv4003_write_reg(dev, 0x335C, 0x03);
|
||||
ret |= cv4003_write_reg(dev, 0x335D, 0x03);
|
||||
ret |= cv4003_write_reg(dev, 0x337C, 0x08); // [10:0] BLK_STAX = 008(dec:08)
|
||||
ret |= cv4003_write_reg(dev, 0x337D, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x337E, 0x16); // [5:0] UNIT_SIZEX = 16(dec:22)
|
||||
ret |= cv4003_write_reg(dev, 0x3380, 0x08); // [11:0] BLK_STAY = 008(dec:8)
|
||||
ret |= cv4003_write_reg(dev, 0x3381, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3382, 0x58); // [7:0] UNIT_SIZEY = 58(dec:88)
|
||||
ret |= cv4003_write_reg(dev, 0x3524, 0x05);
|
||||
ret |= cv4003_write_reg(dev, 0x351F, 0x19);
|
||||
ret |= cv4003_write_reg(dev, 0x3527, 0x05);
|
||||
ret |= cv4003_write_reg(dev, 0x3522, 0x08);
|
||||
ret |= cv4003_write_reg(dev, 0x3523, 0x08);
|
||||
ret |= cv4003_write_reg(dev, 0x3525, 0x10);
|
||||
ret |= cv4003_write_reg(dev, 0x3526, 0x1B);
|
||||
ret |= cv4003_write_reg(dev, 0x350D, 0x7F);
|
||||
ret |= cv4003_write_reg(dev, 0x362E, 0xAA);
|
||||
ret |= cv4003_write_reg(dev, 0x36B6, 0xAA);
|
||||
ret |= cv4003_write_reg(dev, 0x366E, 0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x3703, 0x03);
|
||||
ret |= cv4003_write_reg(dev, 0x3808, 0xB0); // [7:0] PLL_MUL_NUM_POST = 8C(dec:140)
|
||||
ret |= cv4003_write_reg(dev, 0x380A, 0x01); // [3:0] PLL_DIV_NUM_POST = 1(dec:1)
|
||||
ret |= cv4003_write_reg(dev, 0x3814, 0x02);
|
||||
ret |= cv4003_write_reg(dev, 0x3815, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3827, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x394A, 0x06);
|
||||
ret |= cv4003_write_reg(dev, 0x394B, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3953, 0x10);
|
||||
ret |= cv4003_write_reg(dev, 0x3953, 0x30);
|
||||
ret |= cv4003_write_reg(dev, 0x32D8, 0x0B); // [27:0] PS_WR_ADDR_MAX 128Mbit容量最多存放Raw10数据14帧
|
||||
ret |= cv4003_write_reg(dev, 0x32D9, 0x0F);
|
||||
ret |= cv4003_write_reg(dev, 0x32DA, 0xF7);
|
||||
ret |= cv4003_write_reg(dev, 0x32DB, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3034, 0x04);
|
||||
ret |= cv4003_write_reg(dev, 0x3035, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3036, 0xD0);
|
||||
ret |= cv4003_write_reg(dev, 0x3037, 0x02);
|
||||
ret |= cv4003_write_reg(dev, 0x3038, 0x50);
|
||||
ret |= cv4003_write_reg(dev, 0x3039, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x303A, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x303B, 0x05);
|
||||
ret |= cv4003_write_reg(dev, 0x3308, 0xB0);//AE_TARGET
|
||||
ret |= cv4003_write_reg(dev, 0x3309, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3204, 0x40);
|
||||
ret |= cv4003_write_reg(dev, 0x3673, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x385A, 0x03);
|
||||
ret |= cv4003_write_reg(dev, 0x38AD, 0x11);
|
||||
ret |= cv4003_write_reg(dev, 0x3638, 0x02);
|
||||
ret |= cv4003_write_reg(dev, 0x3639, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3628, 0x64);
|
||||
ret |= cv4003_write_reg(dev, 0x3629, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x369C, 0x64);
|
||||
ret |= cv4003_write_reg(dev, 0x369D, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x360C, 0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x360E, 0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x3000, 0x00);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "cv4003_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
} else {
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
SENSOR_PRINT("=============PREROLL CVSENS CV4003_720P_3FPS_10BIT_LINEAR_Init_OK! ==============\n");
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
SENSOR_PRIORITY_FUNC static xmedia_s32 cv4003_2lane_linear_2560x1440_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
//reset
|
||||
ret |= cv4003_write_reg(dev, 0x3004,0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x3004,0x00);
|
||||
// ret |= cv4003_write_reg(dev, 0x3012,0xF0);
|
||||
ret |= cv4003_write_reg(dev, 0x300D,0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x300E,0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3204,0x40);
|
||||
ret |= cv4003_write_reg(dev, 0x3478,0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x385A,0x03);
|
||||
ret |= cv4003_write_reg(dev, 0x310C,0x64);
|
||||
ret |= cv4003_write_reg(dev, 0x3048,0x08);
|
||||
ret |= cv4003_write_reg(dev, 0x3134,0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x326c,0xdc);
|
||||
ret |= cv4003_write_reg(dev, 0x326e,0x24);
|
||||
ret |= cv4003_write_reg(dev, 0x3154,0x11);
|
||||
ret |= cv4003_write_reg(dev, 0x31BC,0x40);
|
||||
ret |= cv4003_write_reg(dev, 0x31D5,0x03);
|
||||
ret |= cv4003_write_reg(dev, 0x31D6,0x04);
|
||||
ret |= cv4003_write_reg(dev, 0x3164,0x09);
|
||||
ret |= cv4003_write_reg(dev, 0x351F,0x32);
|
||||
ret |= cv4003_write_reg(dev, 0x3527,0x05);
|
||||
ret |= cv4003_write_reg(dev, 0x38AD,0x10);
|
||||
ret |= cv4003_write_reg(dev, 0x3638,0x02);
|
||||
ret |= cv4003_write_reg(dev, 0x3639,0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x301c,0xe0);
|
||||
ret |= cv4003_write_reg(dev, 0x301d,0x15);
|
||||
ret |= cv4003_write_reg(dev, 0x3020,0x89);
|
||||
ret |= cv4003_write_reg(dev, 0x3021,0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x3048,0x0A);
|
||||
|
||||
////CVSENS Sensor Window setting.
|
||||
//full_width = 2888
|
||||
//full_height = 1628
|
||||
//active_width = 2560
|
||||
//active_height = 1440
|
||||
|
||||
#ifdef USE_PREROLL_INFO
|
||||
xmedia_u32 exp_time = 0x08;
|
||||
xmedia_s32 again = 0x00;
|
||||
xmedia_s32 dgain = 0x40;
|
||||
|
||||
exp_time = exp_time_clac(dev);
|
||||
gain_clac(dev, &again, &dgain);
|
||||
// 配置根据小图换成出大图的曝光时间 again dgain
|
||||
ret |= cv4003_write_reg(dev, 0x3048, exp_time & 0xFF);
|
||||
ret |= cv4003_write_reg(dev, 0x3049, (exp_time & 0x00FF00) >> 8);
|
||||
|
||||
ret |= cv4003_write_reg(dev, 0x3118, again & 0xff); //Again
|
||||
ret |= cv4003_write_reg(dev, 0x311c, dgain & 0xff); //Dgain Low
|
||||
ret |= cv4003_write_reg(dev, 0x311d, (dgain & 0xff00) >> 8); //Dgain High
|
||||
#endif
|
||||
|
||||
ret |= cv4003_write_reg(dev, 0x3014,0x04); //WCROP_MODE
|
||||
ret |= cv4003_write_reg(dev, 0x303C,0x56); //Y_WCROP_STA_L
|
||||
ret |= cv4003_write_reg(dev, 0x303D,0x00); //Y_WCROP_STA_H
|
||||
ret |= cv4003_write_reg(dev, 0x303E,0xb0); //Y_WCROP_HEIGHT_L
|
||||
ret |= cv4003_write_reg(dev, 0x303F,0x05); //Y_WCROP_HEIGHT_H
|
||||
ret |= cv4003_write_reg(dev, 0x3030,0x01); //DCROP_MODE
|
||||
ret |= cv4003_write_reg(dev, 0x3038,0xa4); //X_CROP_STA_L
|
||||
ret |= cv4003_write_reg(dev, 0x3039,0x00); //X_CROP_STA_H
|
||||
ret |= cv4003_write_reg(dev, 0x303A,0x00); //X_CROP_WIDTH_L
|
||||
ret |= cv4003_write_reg(dev, 0x303B,0x0a); //X_CROP_WIDTH_H
|
||||
ret |= cv4003_write_reg(dev, 0x3034,0x08); //Y_DCROP_STA_L
|
||||
ret |= cv4003_write_reg(dev, 0x3035,0x00); //Y_DCROP_STA_H
|
||||
ret |= cv4003_write_reg(dev, 0x3036,0xa0); //Y_DCROP_HEIGHT_L
|
||||
ret |= cv4003_write_reg(dev, 0x3037,0x05); //Y_DCROP_HEIGHT_H
|
||||
|
||||
//split gain Enable.
|
||||
ret |= cv4003_write_reg(dev, 0x3109,0x01); //Use Again * Dgain.
|
||||
ret |= cv4003_write_reg(dev, 0x3000,0x00); //Streaming
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "cv4003_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
} else {
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
SENSOR_PRINT("=== CV4003_24MInput_MIPI_2lane_10bit_2560x1440_30fps init success!===============\n");
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC static xmedia_s32 cv4003_preroll_720p_readback_psram2cis2mipi_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
ret |= cv4003_write_reg(dev, 0x3010, 0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x3011, 0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x3017, 0x32);
|
||||
ret |= cv4003_write_reg(dev, 0x301C, 0x08); // [19:0] FRAME_LENGTH = 00708(dec:1800)
|
||||
ret |= cv4003_write_reg(dev, 0x301D, 0x07);
|
||||
ret |= cv4003_write_reg(dev, 0x301E, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3020, 0xF3); // [15:0] LINE_LENGTH = 00F3(dec:243)
|
||||
ret |= cv4003_write_reg(dev, 0x3021, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x302C, 0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x3034, 0x04);
|
||||
ret |= cv4003_write_reg(dev, 0x3035, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3036, 0xD0);
|
||||
ret |= cv4003_write_reg(dev, 0x3037, 0x02);
|
||||
ret |= cv4003_write_reg(dev, 0x3038, 0x50);
|
||||
ret |= cv4003_write_reg(dev, 0x3039, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x303A, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x303B, 0x05);
|
||||
ret |= cv4003_write_reg(dev, 0x305C, 0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x3218, 0x01);
|
||||
ret |= cv4003_write_reg(dev, 0x32D2, 0x04); // [10:0] PS_WR_ADDR_OFST = 004(dec:4)
|
||||
ret |= cv4003_write_reg(dev, 0x32D3, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x32E5, 0x03);
|
||||
ret |= cv4003_write_reg(dev, 0x32F0, 0xD0);
|
||||
ret |= cv4003_write_reg(dev, 0x32F1, 0x02);
|
||||
ret |= cv4003_write_reg(dev, 0x32F2, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x32F3, 0x05);
|
||||
ret |= cv4003_write_reg(dev, 0x3418, 0x77);
|
||||
ret |= cv4003_write_reg(dev, 0x3419, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x341A, 0x37);
|
||||
ret |= cv4003_write_reg(dev, 0x341B, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x341C, 0x37);
|
||||
ret |= cv4003_write_reg(dev, 0x341D, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x341E, 0xE7);
|
||||
ret |= cv4003_write_reg(dev, 0x341F, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3420, 0x37);
|
||||
ret |= cv4003_write_reg(dev, 0x3421, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3422, 0x9F);
|
||||
ret |= cv4003_write_reg(dev, 0x3423, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3424, 0x37);
|
||||
ret |= cv4003_write_reg(dev, 0x3425, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3426, 0x57);
|
||||
ret |= cv4003_write_reg(dev, 0x3427, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3428, 0x2F);
|
||||
ret |= cv4003_write_reg(dev, 0x3429, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3808, 0x8c); // [7:0] PLL_MUL_NUM_POST = 8C(dec:140)
|
||||
ret |= cv4003_write_reg(dev, 0x380A, 0x01); // [3:0] PLL_DIV_NUM_POST = 1(dec:1)
|
||||
ret |= cv4003_write_reg(dev, 0x3814, 0x02);
|
||||
ret |= cv4003_write_reg(dev, 0x3815, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3827, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3829, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x394A, 0x06);
|
||||
ret |= cv4003_write_reg(dev, 0x394B, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3953, 0x10);
|
||||
ret |= cv4003_write_reg(dev, 0x3953, 0x30);
|
||||
ret |= cv4003_write_reg(dev, 0x32D8, 0x0B); // [27:0] PS_WR_ADDR_MAX //128Mbit容量，Max存14frame
|
||||
ret |= cv4003_write_reg(dev, 0x32D9, 0x0F);
|
||||
ret |= cv4003_write_reg(dev, 0x32DA, 0xF7);
|
||||
ret |= cv4003_write_reg(dev, 0x32DB, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x32E8, 0x00); // [27:0] PS_RD_ADDR_STA
|
||||
ret |= cv4003_write_reg(dev, 0x32E9, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x32EA, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x32EB, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x32EC, 0x0B); // [27:0] PS_RD_ADDR_END
|
||||
ret |= cv4003_write_reg(dev, 0x32ED, 0x0F);
|
||||
ret |= cv4003_write_reg(dev, 0x32EE, 0xF8);
|
||||
ret |= cv4003_write_reg(dev, 0x32EF, 0x00);
|
||||
ret |= cv4003_write_reg(dev, 0x3204, 0x40);
|
||||
#ifdef USE_PREROLL_INFO
|
||||
ret |= cv4003_set_psram_read_region(dev, g_psram_final_addr);
|
||||
#endif
|
||||
ret |= cv4003_write_reg(dev, 0x3000,0x00); //Streaming
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "cv4003_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
} else {
|
||||
SENSOR_PRINT("==============================================================\n");
|
||||
SENSOR_PRINT("===READ BACK CVSENS CV4003_720P_120FPS_10BIT_LINEAR_Init_OK!==\n");
|
||||
SENSOR_PRINT("==============================================================\n");
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv4003_init_image(xmedia_u32 dev, xmedia_u8 image_mode)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
switch(image_mode) {
|
||||
case CV4003_4M_LINEAR_MODE:
|
||||
#ifdef USE_PREROLL_INFO
|
||||
ret = cv4003_get_preroll_psram_final_addr(dev);
|
||||
#endif
|
||||
ret = cv4003_2lane_linear_2560x1440_init(dev);
|
||||
break;
|
||||
case CV4003_1M_LINEAR_MODE:
|
||||
ret = cv4003_preroll_720p_readback_psram2cis2mipi_init(dev);
|
||||
break;
|
||||
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support, please check image param!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv4003_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_cv4003_i2c_fd[dev] < 0) {
|
||||
SENSOR_PRINT("Sensor dev [%d], i2c not open. please init i2c at first.\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_set_slave_addr(g_cv4003_i2c_fd[dev], slave_addr);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
|
||||
i2c_close(g_cv4003_i2c_fd[dev]);
|
||||
g_cv4003_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
g_cv4003_i2c_addr[dev] = slave_addr;
|
||||
SENSOR_PRINT("Sensor dev [%d] set slave addr 0x%x success.\n", dev, slave_addr);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv4003_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_cv4003_i2c_fd[dev] >= 0) {
|
||||
SENSOR_PRINT("====== Sensor dev [%d], i2c already init !=======\n", dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
if (i2c_dev == SENSOR_I2C_INVALID) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Sensor i2c dev invalid! Please set i2c dev at first!\n");
|
||||
return XMEDIA_ERRCODE_NOT_CONFIG;
|
||||
}
|
||||
|
||||
g_cv4003_i2c_fd[dev] = i2c_open(i2c_dev);
|
||||
if (g_cv4003_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Open /dev/i2c_drv-%u error!\n", i2c_dev);
|
||||
return XMEDIA_ERRCODE_OPEN_FAILED;
|
||||
}
|
||||
|
||||
ret = cv4003_set_slave_addr(dev, i2c_addr);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
SENSOR_PRINT("====== i2c[%d] init success!=======\n", i2c_dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv4003_i2c_exit(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
ret = i2c_close(g_cv4003_i2c_fd[dev]);
|
||||
if(ret < 0 ) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] close i2c failed!\n", dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
g_cv4003_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv4003_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[CV4003_DATA_BYTE];
|
||||
|
||||
if (g_cv4003_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_read(g_cv4003_i2c_fd[dev], g_cv4003_i2c_addr[dev], addr, CV4003_ADDR_BYTE, buf, CV4003_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] read i2c addr [0x%X] failed!\n", dev, addr);
|
||||
return ret;
|
||||
}
|
||||
|
||||
*data = buf[0]; //CV4003_DATA_BYTE == 1
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv4003_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data)
|
||||
{
|
||||
xmedia_u32 idx = 0;
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[8];
|
||||
|
||||
if (g_cv4003_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
buf[idx] = (addr >> 8) & 0xff;
|
||||
idx++;
|
||||
buf[idx] = addr & 0xff;
|
||||
idx++;
|
||||
buf[idx] = data & 0xff;
|
||||
|
||||
ret = i2c_write(g_cv4003_i2c_fd[dev], g_cv4003_i2c_addr[dev], buf, CV4003_ADDR_BYTE + CV4003_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_WRITE error!\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv4003_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
xmedia_u32 mirror_flip_type;
|
||||
|
||||
cv4003_read_reg(dev, CV4003_REG_ADDR_MIRROR_FLIP, &mirror_flip_type);
|
||||
|
||||
if (mirror_en){
|
||||
mirror_flip_type |= 0x01;
|
||||
} else {
|
||||
mirror_flip_type &= 0xFE;
|
||||
}
|
||||
|
||||
if (flip_en){
|
||||
mirror_flip_type |= 0x02;
|
||||
} else {
|
||||
mirror_flip_type &= 0xFD;
|
||||
}
|
||||
|
||||
ret = cv4003_write_reg(dev, CV4003_REG_ADDR_MIRROR_FLIP, mirror_flip_type);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "cv4003_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
+39
@@ -0,0 +1,39 @@
|
||||
#ifndef __CV4003_CTRL_H__
|
||||
#define __CV4003_CTRL_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define CV4003_I2C_ADDR 0x6a
|
||||
#define CV4003_ADDR_BYTE 2
|
||||
#define CV4003_DATA_BYTE 1
|
||||
|
||||
// cv4003 specs list
|
||||
typedef enum {
|
||||
CV4003_4M_LINEAR_MODE = 1, // 2560x1440
|
||||
CV4003_1M_LINEAR_MODE = 2, // 1280x720
|
||||
} cv4003_specs;
|
||||
|
||||
//#define USE_PREROLL_INFO
|
||||
|
||||
xmedia_s32 cv4003_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr);
|
||||
xmedia_s32 cv4003_i2c_exit(xmedia_u32 dev);
|
||||
xmedia_s32 cv4003_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data);
|
||||
xmedia_s32 cv4003_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data);
|
||||
xmedia_s32 cv4003_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en);
|
||||
xmedia_s32 cv4003_init_image(xmedia_u32 dev, xmedia_u8 img_mode);
|
||||
xmedia_s32 cv4003_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr);
|
||||
|
||||
#ifdef USE_PREROLL_INFO
|
||||
xmedia_s32 cv4003_preroll_720p_write_cis2psram_init(xmedia_u32 dev);
|
||||
xmedia_s32 cv4003_get_preroll_psram_final_addr(xmedia_u32 dev);
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //__CV4003_CTRL_H__
|
||||
+301
@@ -0,0 +1,301 @@
|
||||
#ifndef __CV4003_EX_H__
|
||||
#define __CV4003_EX_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// Piris attr
|
||||
static const xmedia_isp_piris_attr g_cv4003_piris_attr = {
|
||||
0,
|
||||
1,
|
||||
94,
|
||||
62,
|
||||
// Step-F number mapping table. Must be from small to large. F1.0 is 1024 and F32.0 is 1
|
||||
{ 30, 35, 40, 45, 50, 56, 61, 67, 73, 79, 85, 92, 98, 105, 112, 120, 127, 135, 143, 150, 158,
|
||||
166, 174, 183, 191, 200, 208, 217, 225, 234, 243, 252, 261, 270, 279, 289, 298, 307, 316, 325, 335, 344,
|
||||
353, 362, 372, 381, 390, 399, 408, 417, 426, 435, 444, 453, 462, 470, 478, 486, 493, 500, 506, 512 },
|
||||
XMEDIA_ISP_IRIS_F_NO_1_4,
|
||||
XMEDIA_ISP_IRIS_F_NO_5_6
|
||||
};
|
||||
|
||||
static const xmedia_isp_bnr_attr g_cv4003_bnr = {
|
||||
1, //enable
|
||||
2, //ainr_pos_switch
|
||||
1, //coring_pos_switch
|
||||
0, //noise_reserve_enable
|
||||
{102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,103,104,105,106,107,108,108,108,108,108,108,108,108,108,108,108,115,115,115,115,123,123,123,123,131,131,131,131,138,138,138,138,146,146,146,146,154,154,154,154,161,161}, //noise_reserve_lut
|
||||
3200, //noise_profile_thd
|
||||
{0.0006806309000,-0.0030143851000,0.0000002512000,0.0000299657000,0.0069275983000}, //noise_profile_coef0
|
||||
{0.0006806309000,-0.0030143851000,0.0000002512000,0.0000299657000,0.0069275983000}, //noise_profile_coef1
|
||||
0, //snr_wdr_comp_en
|
||||
1, //tnr_enable
|
||||
1, //tnr_luma_comp_enable
|
||||
0, //tnr_wdr_comp_enable
|
||||
0, //op_type
|
||||
{
|
||||
16, //iso_num
|
||||
{100,200,400,800,1600,3200,6400,12800,25600,51200,102400,204800,409600,819200,1638400,3276800}, //iso_level
|
||||
{
|
||||
{256,256,256,256}, //snr_coarse_str[0]
|
||||
{256,256,256,256}, //snr_coarse_str[1]
|
||||
{256,256,256,256}, //snr_coarse_str[2]
|
||||
{256,256,256,256}, //snr_coarse_str[3]
|
||||
{256,256,256,256}, //snr_coarse_str[4]
|
||||
{286,286,286,286}, //snr_coarse_str[5]
|
||||
{320,320,320,320}, //snr_coarse_str[6]
|
||||
{256,256,256,256}, //snr_coarse_str[7]
|
||||
{256,256,256,256}, //snr_coarse_str[8]
|
||||
{256,256,256,256}, //snr_coarse_str[9]
|
||||
{256,256,256,256}, //snr_coarse_str[10]
|
||||
{256,256,256,256}, //snr_coarse_str[11]
|
||||
{256,256,256,256}, //snr_coarse_str[12]
|
||||
{256,256,256,256}, //snr_coarse_str[13]
|
||||
{256,256,256,256}, //snr_coarse_str[14]
|
||||
{256,256,256,256}, //snr_coarse_str[15]
|
||||
}, //snr_coarse_str
|
||||
{128,128,64,32,30,40,60,64,32,32,32,32,32,32,32,32}, //snr_coring_wgt
|
||||
{
|
||||
{256,256,216,216,164,164,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //snr_luma_nr_str[0]
|
||||
{256,256,216,216,164,164,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //snr_luma_nr_str[1]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //snr_luma_nr_str[2]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //snr_luma_nr_str[3]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //snr_luma_nr_str[4]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //snr_luma_nr_str[5]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //snr_luma_nr_str[6]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //snr_luma_nr_str[7]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //snr_luma_nr_str[8]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //snr_luma_nr_str[9]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //snr_luma_nr_str[10]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //snr_luma_nr_str[11]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //snr_luma_nr_str[12]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //snr_luma_nr_str[13]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //snr_luma_nr_str[14]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //snr_luma_nr_str[15]
|
||||
}, //snr_luma_nr_str
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, //snr_center_luma_mode
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, //snr_center_tnr_luma_mode
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, //snr_wdr_comp_scl
|
||||
{256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256}, //tnr_noise_min
|
||||
{128,128,100,100,86,86,86,86,168,238,256,256,64,64,64,64}, //tnr_bayer_str
|
||||
{32,32,32,32,32,32,32,48,60,64,64,64,64,32,32,32}, //tnr_md_thd_low
|
||||
{64,64,64,64,64,64,64,138,158,164,164,164,164,64,64,64}, //tnr_md_thd_high
|
||||
{512,512,512,512,512,512,512,512,512,512,512,512,512,512,512,512}, //tnr_wgt_min
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, //tnr_min_ratio
|
||||
{16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16}, //tnr_mot_bld_thd_low
|
||||
{32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32}, //tnr_mot_bld_thd_high
|
||||
{16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16}, //tnr_edge_md_thd_low
|
||||
{32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32}, //tnr_edge_md_thd_high
|
||||
{256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256}, //tnr_flat_md_scl
|
||||
{256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256}, //tnr_edge_md_scl
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, //tnr_md_mode
|
||||
{1017,1017,1017,1017,1017,1017,1017,1017,1017,1017,1017,1017,1017,1017,1017,1017}, //tnr_luma_md_thd_low
|
||||
{2033,2033,2033,2033,2033,2033,2033,2033,2033,2033,2033,2033,2033,2033,2033,2033}, //tnr_luma_md_thd_high
|
||||
{256,256,256,256,256,180,128,256,256,256,256,256,256,256,256,256}, //tnr_dark_md_scl
|
||||
{256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256}, //tnr_bright_md_scl
|
||||
{
|
||||
{144,144,144}, //tnr_mot_scl[0]
|
||||
{144,144,144}, //tnr_mot_scl[1]
|
||||
{144,144,144}, //tnr_mot_scl[2]
|
||||
{144,144,144}, //tnr_mot_scl[3]
|
||||
{144,144,144}, //tnr_mot_scl[4]
|
||||
{144,144,144}, //tnr_mot_scl[5]
|
||||
{144,144,144}, //tnr_mot_scl[6]
|
||||
{144,144,144}, //tnr_mot_scl[7]
|
||||
{144,144,144}, //tnr_mot_scl[8]
|
||||
{144,144,144}, //tnr_mot_scl[9]
|
||||
{144,144,144}, //tnr_mot_scl[10]
|
||||
{144,144,144}, //tnr_mot_scl[11]
|
||||
{144,144,144}, //tnr_mot_scl[12]
|
||||
{144,144,144}, //tnr_mot_scl[13]
|
||||
{144,144,144}, //tnr_mot_scl[14]
|
||||
{144,144,144}, //tnr_mot_scl[15]
|
||||
}, //tnr_mot_scl
|
||||
{31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31}, //tnr_var_scl
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, //tnr_mot_noise_luma_thd_low
|
||||
{256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256}, //tnr_mot_noise_luma_thd_high
|
||||
{256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256}, //tnr_mot_noise_dark_scl
|
||||
{256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256}, //tnr_mot_noise_bright_scl
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_mot_dpc_str
|
||||
{
|
||||
{360,512,1280,1536}, //tnr_mot_convg_thd[0]
|
||||
{360,512,1280,1536}, //tnr_mot_convg_thd[1]
|
||||
{360,512,1280,1536}, //tnr_mot_convg_thd[2]
|
||||
{360,512,1280,1536}, //tnr_mot_convg_thd[3]
|
||||
{360,512,1280,1536}, //tnr_mot_convg_thd[4]
|
||||
{360,512,1280,1536}, //tnr_mot_convg_thd[5]
|
||||
{360,512,1280,1536}, //tnr_mot_convg_thd[6]
|
||||
{360,512,1280,1536}, //tnr_mot_convg_thd[7]
|
||||
{360,512,1280,1536}, //tnr_mot_convg_thd[8]
|
||||
{360,512,1280,1536}, //tnr_mot_convg_thd[9]
|
||||
{360,512,1280,1536}, //tnr_mot_convg_thd[10]
|
||||
{360,512,1280,1536}, //tnr_mot_convg_thd[11]
|
||||
{360,512,1280,1536}, //tnr_mot_convg_thd[12]
|
||||
{360,512,1280,1536}, //tnr_mot_convg_thd[13]
|
||||
{360,512,1280,1536}, //tnr_mot_convg_thd[14]
|
||||
{360,512,1280,1536}, //tnr_mot_convg_thd[15]
|
||||
}, //tnr_mot_convg_thd
|
||||
{256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256}, //tnr_mot_noise_scl
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, //tnr_mot_noise_scl_high
|
||||
{1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}, //tnr_dpc_en
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, //tnr_dp_mode
|
||||
{384,384,384,384,384,384,384,384,384,384,384,384,384,384,384,384}, //tnr_dp_thd_rb
|
||||
{384,384,384,384,384,384,384,384,384,384,384,384,384,384,384,384}, //tnr_dp_thd_g
|
||||
{512,512,512,512,512,512,512,512,512,512,512,512,512,512,512,512}, //tnr_dp_luma_thd_low
|
||||
{768,768,768,768,768,768,768,768,768,768,768,768,768,768,768,768}, //tnr_dp_luma_thd_high
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_dp_thd_low_dark_scl
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_dp_thd_high_dark_scl
|
||||
{
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_luma_ratio[0]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_luma_ratio[1]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_luma_ratio[2]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_luma_ratio[3]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_luma_ratio[4]
|
||||
{48,48,48,64,64,64,100,100,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_luma_ratio[5]
|
||||
{32,32,32,64,64,64,100,100,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_luma_ratio[6]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_luma_ratio[7]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_luma_ratio[8]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_luma_ratio[9]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_luma_ratio[10]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_luma_ratio[11]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_luma_ratio[12]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_luma_ratio[13]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_luma_ratio[14]
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_luma_ratio[15]
|
||||
}, //tnr_luma_ratio
|
||||
{512,512,512,512,512,512,512,512,512,512,512,512,512,512,512,512}, //tnr_wdr_comp_scl
|
||||
}, //auto_attr
|
||||
{
|
||||
{256,256,256,256}, //snr_coarse_str
|
||||
0, //snr_coring_wgt
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //snr_luma_nr_str
|
||||
0, //snr_center_luma_mode
|
||||
0, //snr_center_tnr_luma_mode
|
||||
0, //snr_wdr_comp_scl
|
||||
256, //tnr_noise_min
|
||||
512, //tnr_bayer_str
|
||||
32, //tnr_md_thd_low
|
||||
64, //tnr_md_thd_high
|
||||
512, //tnr_wgt_min
|
||||
256, //tnr_min_ratio
|
||||
16, //tnr_mot_bld_thd_low
|
||||
32, //tnr_mot_bld_thd_high
|
||||
16, //tnr_edge_md_thd_low
|
||||
32, //tnr_edge_md_thd_high
|
||||
256, //tnr_flat_md_scl
|
||||
256, //tnr_edge_md_scl
|
||||
0, //tnr_md_mode
|
||||
256, //tnr_luma_md_thd_low
|
||||
512, //tnr_luma_md_thd_high
|
||||
256, //tnr_dark_md_scl
|
||||
256, //tnr_bright_md_scl
|
||||
{144,144,144}, //tnr_mot_scl
|
||||
32, //tnr_var_scl
|
||||
128, //tnr_mot_noise_luma_thd_low
|
||||
256, //tnr_mot_noise_luma_thd_high
|
||||
256, //tnr_mot_noise_dark_scl
|
||||
256, //tnr_mot_noise_bright_scl
|
||||
64, //tnr_mot_dpc_str
|
||||
{360,512,1280,1536}, //tnr_mot_convg_thd
|
||||
256, //tnr_mot_noise_scl
|
||||
0, //tnr_mot_noise_scl_high
|
||||
1, //tnr_dpc_en
|
||||
0, //tnr_dp_mode
|
||||
384, //tnr_dp_thd_rb
|
||||
384, //tnr_dp_thd_g
|
||||
128, //tnr_dp_luma_thd_low
|
||||
256, //tnr_dp_luma_thd_high
|
||||
256, //tnr_dp_thd_low_dark_scl
|
||||
256, //tnr_dp_thd_high_dark_scl
|
||||
{128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128}, //tnr_luma_ratio
|
||||
0, //tnr_wdr_comp_scl
|
||||
}, //manual_attr
|
||||
{
|
||||
{64,64}, //wdr_frame_str
|
||||
}, //wdr
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_ccm g_cv4003_awb_ccm = {
|
||||
4,
|
||||
{
|
||||
{
|
||||
6200,
|
||||
{
|
||||
475, 33060, 73,
|
||||
32856, 470, 32894,
|
||||
32798, 32887, 405
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
5300,
|
||||
{
|
||||
436, 33027, 79,
|
||||
32858, 353, 32775,
|
||||
23, 33097, 562
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
4200,
|
||||
{
|
||||
483, 33001, 6,
|
||||
32844, 448, 32884,
|
||||
10, 32907, 385
|
||||
},
|
||||
},
|
||||
{
|
||||
2500,
|
||||
{
|
||||
481, 33048, 55,
|
||||
32911, 435, 32804,
|
||||
16, 33108, 580
|
||||
},
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_ccm g_cv4003_awb_wdr_ccm = {
|
||||
4,
|
||||
{
|
||||
{
|
||||
6175,
|
||||
{ 440, 32967, 15, 32852, 424, 32852, 11, 33014, 491 },
|
||||
},
|
||||
{
|
||||
4990,
|
||||
{ 443, 32969, 14, 32860, 423, 32843, 13, 33044, 519 },
|
||||
},
|
||||
{
|
||||
3865,
|
||||
{ 450, 32973, 11, 32857, 407, 32830, 18, 33031, 501 },
|
||||
},
|
||||
{
|
||||
2450,
|
||||
{ 458, 32977, 7, 32853, 389, 32816, 24, 33018, 482 },
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_cv4003_awb_agc_table = {
|
||||
// bvalid
|
||||
1,
|
||||
|
||||
// 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768
|
||||
/* saturation */
|
||||
/* 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768 */
|
||||
{128,128,128,128,115,115,115,115,105,105,105,96,86,86,86,86}
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_cv4003_awb_wdr_agc_table = {
|
||||
// bvalid
|
||||
1,
|
||||
// saturation
|
||||
{100,100,100,100,90,80,70,60,55,55,50,50,50,50,45,40}
|
||||
};
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
+7
@@ -0,0 +1,7 @@
|
||||
|
||||
ifneq ($(MCU), )
|
||||
include Makefile.riscv
|
||||
else
|
||||
include Makefile.linux
|
||||
endif
|
||||
|
||||
+20
@@ -0,0 +1,20 @@
|
||||
ISP_DIR := $(shell cd ../.. && /bin/pwd)
|
||||
SDK_DIR ?= $(shell cd $(ISP_DIR)/../../../.. && /bin/pwd)
|
||||
|
||||
include $(SDK_DIR)/build/base.mk
|
||||
include $(ISP_DIR)/sensor/plat.mk
|
||||
|
||||
LIB_NAME := libsns_cv8001
|
||||
|
||||
SRCS := $(wildcard *.c)
|
||||
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/usr/include
|
||||
SDK_USR_CFLAGS += -I$(ISP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I$(ISP_DIR)/../include
|
||||
SDK_USR_CFLAGS += -I.
|
||||
AT := @
|
||||
|
||||
$(info SRCS=$(SRCS))
|
||||
|
||||
include $(SDK_DIR)/build/sdk_lib_rules.mk
|
||||
@@ -0,0 +1,4 @@
|
||||
|
||||
SRCS-y += cv8001.c
|
||||
SRCS-y += cv8001_ctrl.c
|
||||
|
||||
+1323
File diff suppressed because it is too large
Load Diff
+43
@@ -0,0 +1,43 @@
|
||||
#ifndef __CV8001_H__
|
||||
#define __CV8001_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define CV8001_VMAX_8M_LINEAR 4380 // 10bit
|
||||
|
||||
#define CV8001_EXP_OFFSET_LINEAR 4
|
||||
|
||||
// CV8001 Register Address
|
||||
#define CV8001_REG_ADDR_EXP_H 0x3060
|
||||
#define CV8001_REG_ADDR_EXP_M 0x3061
|
||||
#define CV8001_REG_ADDR_EXP_L 0x3062
|
||||
#define CV8001_REG_ADDR_GAIN_1 0x3164
|
||||
#define CV8001_REG_ADDR_VMAX_H 0x3028
|
||||
#define CV8001_REG_ADDR_VMAX_M 0x3029
|
||||
#define CV8001_REG_ADDR_VMAX_L 0x302a
|
||||
|
||||
typedef enum {
|
||||
CV8001_REG_EXP_H_IDX = 0,
|
||||
CV8001_REG_EXP_M_IDX,
|
||||
CV8001_REG_EXP_L_IDX,
|
||||
CV8001_REG_AGAIN_1_IDX,
|
||||
CV8001_REG_VMAX_H_IDX,
|
||||
CV8001_REG_VMAX_M_IDX,
|
||||
CV8001_REG_VMAX_L_IDX,
|
||||
CV8001_REG_MAX_NUM,
|
||||
} cv8001_reg_index;
|
||||
|
||||
extern sensor_context *g_cv8001_ctx[XMEDIA_SENSOR_DEV_MAX_NUM];
|
||||
#define CV8001_GET_CONTEXT(dev, sns_ctx) sns_ctx = g_cv8001_ctx[dev]
|
||||
|
||||
xmedia_s32 cv8001_get_max_fps(xmedia_u8 img_mode, xmedia_float *max_fps);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __CV8001_H__
|
||||
+262
@@ -0,0 +1,262 @@
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "i2c_dev.h"
|
||||
#include "cv8001.h"
|
||||
#include "cv8001_ctrl.h"
|
||||
|
||||
#define CV8001_REG_ADDR_MIRROR_FLIP 0x3034
|
||||
|
||||
SENSOR_PRIORITY_DATA static xmedia_s32 g_cv8001_i2c_fd[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
SENSOR_PRIORITY_DATA static xmedia_s32 g_cv8001_i2c_addr[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
|
||||
SENSOR_PRIORITY_FUNC static void cv8001_delay_ms(int ms)
|
||||
{
|
||||
sleep_us(ms * 1000);
|
||||
}
|
||||
|
||||
//目前序列实际帧率只有20
|
||||
SENSOR_PRIORITY_FUNC static xmedia_s32 cv8001_2lane_linear_3840x2160_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
ret |= cv8001_write_reg(dev, 0x3401, 0x01);
|
||||
ret |= cv8001_write_reg(dev, 0x3915, 0x00);
|
||||
ret |= cv8001_write_reg(dev, 0x3220, 0x08);
|
||||
ret |= cv8001_write_reg(dev, 0x3185, 0x03);
|
||||
ret |= cv8001_write_reg(dev, 0x318A, 0x03);
|
||||
// W4K
|
||||
ret |= cv8001_write_reg(dev, 0x3020, 0x04);
|
||||
ret |= cv8001_write_reg(dev, 0x3040, 0x01);
|
||||
// H
|
||||
ret |= cv8001_write_reg(dev, 0x3048, 0x08);
|
||||
ret |= cv8001_write_reg(dev, 0x3049, 0x00);
|
||||
ret |= cv8001_write_reg(dev, 0x304A, 0x00);
|
||||
ret |= cv8001_write_reg(dev, 0x304B, 0x0F);
|
||||
// V
|
||||
ret |= cv8001_write_reg(dev, 0x3044, 0x04);
|
||||
ret |= cv8001_write_reg(dev, 0x3045, 0x00);
|
||||
ret |= cv8001_write_reg(dev, 0x3046, 0x70);
|
||||
ret |= cv8001_write_reg(dev, 0x3047, 0x08);
|
||||
//adjust1
|
||||
ret |= cv8001_write_reg(dev, 0x3041, 0x00);
|
||||
|
||||
ret |= cv8001_write_reg(dev, 0x3b68, 0x00);
|
||||
ret |= cv8001_write_reg(dev, 0x3b69, 0x00);
|
||||
ret |= cv8001_write_reg(dev, 0x3b6a, 0xff);
|
||||
ret |= cv8001_write_reg(dev, 0x3b6b, 0x01);
|
||||
//adjust2
|
||||
ret |= cv8001_write_reg(dev, 0x387D, 0x3F);
|
||||
ret |= cv8001_write_reg(dev, 0x397a, 0x08);
|
||||
ret |= cv8001_write_reg(dev, 0x3804, 0x14);
|
||||
ret |= cv8001_write_reg(dev, 0x3587, 0x2a);
|
||||
ret |= cv8001_write_reg(dev, 0x3348, 0x00);
|
||||
ret |= cv8001_write_reg(dev, 0x31AC, 0xC8);
|
||||
ret |= cv8001_write_reg(dev, 0x35EC, 0x08);
|
||||
ret |= cv8001_write_reg(dev, 0x3220, 0x08);
|
||||
|
||||
ret |= cv8001_write_reg(dev, 0x3b75, 0x00);
|
||||
ret |= cv8001_write_reg(dev, 0x3b5E, 0x01);
|
||||
ret |= cv8001_write_reg(dev, 0x3a10, 0x0A);
|
||||
ret |= cv8001_write_reg(dev, 0x3a11, 0x0A);
|
||||
//adjust
|
||||
ret |= cv8001_write_reg(dev, 0x3a92, 0x56);
|
||||
ret |= cv8001_write_reg(dev, 0x3914, 0x2E);
|
||||
ret |= cv8001_write_reg(dev, 0x3908, 0x4A);
|
||||
ret |= cv8001_write_reg(dev, 0x302C, 0x3B);
|
||||
ret |= cv8001_write_reg(dev, 0x302D, 0x01);
|
||||
ret |= cv8001_write_reg(dev, 0x316C, 0x02);
|
||||
ret |= cv8001_write_reg(dev, 0x3686, 0x03);
|
||||
ret |= cv8001_write_reg(dev, 0x36b8, 0x00);
|
||||
ret |= cv8001_write_reg(dev, 0x36b6, 0x00);
|
||||
//adjust3
|
||||
ret |= cv8001_write_reg(dev, 0x36C0, 0x00);
|
||||
ret |= cv8001_write_reg(dev, 0x36C5, 0x02);
|
||||
//adjust4
|
||||
ret |= cv8001_write_reg(dev, 0x36B6, 0x02);
|
||||
ret |= cv8001_write_reg(dev, 0x35DF, 0x00);
|
||||
ret |= cv8001_write_reg(dev, 0x35C4, 0x09);
|
||||
ret |= cv8001_write_reg(dev, 0x3685, 0x01);
|
||||
//adjust5
|
||||
ret |= cv8001_write_reg(dev, 0x3A86, 0x01);
|
||||
ret |= cv8001_write_reg(dev, 0x3A88, 0x07);
|
||||
ret |= cv8001_write_reg(dev, 0x3A8C, 0x3C);
|
||||
ret |= cv8001_write_reg(dev, 0x3B19, 0x0A);
|
||||
ret |= cv8001_write_reg(dev, 0x3B1C, 0x2B);
|
||||
ret |= cv8001_write_reg(dev, 0x3518, 0x6A);
|
||||
ret |= cv8001_write_reg(dev, 0x3519, 0x00);
|
||||
ret |= cv8001_write_reg(dev, 0x351A, 0x08);
|
||||
|
||||
ret |= cv8001_write_reg(dev, 0x3852, 0x00);
|
||||
ret |= cv8001_write_reg(dev, 0x36AA, 0x00);
|
||||
ret |= cv8001_write_reg(dev, 0x3000, 0x00);
|
||||
|
||||
cv8001_delay_ms(5); // delay 5 ms
|
||||
ret |= cv8001_write_reg(dev, 0x0100, 0x01);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "cv8001_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
} else {
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
SENSOR_PRINT("=== CV8001_24MInput_MIPI_2lane_10bit_3840x2160_30fps init success!==============\n");
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv8001_init_image(xmedia_u32 dev, xmedia_u8 image_mode)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
switch(image_mode) {
|
||||
case CV8001_8M_LINEAR_MODE:
|
||||
ret = cv8001_2lane_linear_3840x2160_init(dev);
|
||||
break;
|
||||
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support, please check image param!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv8001_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_cv8001_i2c_fd[dev] < 0) {
|
||||
SENSOR_PRINT("Sensor dev [%d], i2c not open. please init i2c at first.\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_set_slave_addr(g_cv8001_i2c_fd[dev], slave_addr);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
|
||||
i2c_close(g_cv8001_i2c_fd[dev]);
|
||||
g_cv8001_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
g_cv8001_i2c_addr[dev] = slave_addr;
|
||||
SENSOR_PRINT("Sensor dev [%d] set slave addr 0x%x success.\n", dev, slave_addr);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv8001_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_cv8001_i2c_fd[dev] >= 0) {
|
||||
SENSOR_PRINT("====== Sensor dev [%d], i2c already init !=======\n", dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
if (i2c_dev == SENSOR_I2C_INVALID) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Sensor i2c dev invalid! Please set i2c dev at first!\n");
|
||||
return XMEDIA_ERRCODE_NOT_CONFIG;
|
||||
}
|
||||
|
||||
g_cv8001_i2c_fd[dev] = i2c_open(i2c_dev);
|
||||
if (g_cv8001_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Open /dev/i2c_drv-%u error!\n", i2c_dev);
|
||||
return XMEDIA_ERRCODE_OPEN_FAILED;
|
||||
}
|
||||
|
||||
ret = cv8001_set_slave_addr(dev, i2c_addr);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
SENSOR_PRINT("====== i2c[%d] init success!=======\n", i2c_dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv8001_i2c_exit(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
ret = i2c_close(g_cv8001_i2c_fd[dev]);
|
||||
if(ret < 0 ) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] close i2c failed!\n", dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
g_cv8001_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv8001_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[CV8001_DATA_BYTE];
|
||||
|
||||
if (g_cv8001_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_read(g_cv8001_i2c_fd[dev], g_cv8001_i2c_addr[dev], addr, CV8001_ADDR_BYTE, buf, CV8001_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] read i2c addr [0x%X] failed!\n", dev, addr);
|
||||
return ret;
|
||||
}
|
||||
|
||||
*data = buf[0]; //CV8001_DATA_BYTE == 1
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv8001_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data)
|
||||
{
|
||||
xmedia_u32 idx = 0;
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[8];
|
||||
|
||||
if (g_cv8001_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
buf[idx] = (addr >> 8) & 0xff;
|
||||
idx++;
|
||||
buf[idx] = addr & 0xff;
|
||||
idx++;
|
||||
buf[idx] = data & 0xff;
|
||||
|
||||
ret = i2c_write(g_cv8001_i2c_fd[dev], g_cv8001_i2c_addr[dev], buf, CV8001_ADDR_BYTE + CV8001_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_WRITE error!\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 cv8001_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
xmedia_u32 mirror_flip_type;
|
||||
|
||||
cv8001_read_reg(dev, CV8001_REG_ADDR_MIRROR_FLIP, &mirror_flip_type);
|
||||
|
||||
if (mirror_en){
|
||||
mirror_flip_type |= 0x01;
|
||||
} else {
|
||||
mirror_flip_type &= 0xFE;
|
||||
}
|
||||
|
||||
if (flip_en){
|
||||
mirror_flip_type |= 0x02;
|
||||
} else {
|
||||
mirror_flip_type &= 0xFD;
|
||||
}
|
||||
|
||||
ret = cv8001_write_reg(dev, CV8001_REG_ADDR_MIRROR_FLIP, mirror_flip_type);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "cv8001_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
+31
@@ -0,0 +1,31 @@
|
||||
#ifndef __CV8001_CTRL_H__
|
||||
#define __CV8001_CTRL_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define CV8001_I2C_ADDR 0x6a
|
||||
#define CV8001_ADDR_BYTE 2
|
||||
#define CV8001_DATA_BYTE 1
|
||||
|
||||
// cv8001 specs list
|
||||
typedef enum {
|
||||
CV8001_8M_LINEAR_MODE = 1, // 3840x2160
|
||||
} cv8001_specs;
|
||||
|
||||
xmedia_s32 cv8001_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr);
|
||||
xmedia_s32 cv8001_i2c_exit(xmedia_u32 dev);
|
||||
xmedia_s32 cv8001_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data);
|
||||
xmedia_s32 cv8001_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data);
|
||||
xmedia_s32 cv8001_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en);
|
||||
xmedia_s32 cv8001_init_image(xmedia_u32 dev, xmedia_u8 img_mode);
|
||||
xmedia_s32 cv8001_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //__CV8001_CTRL_H__
|
||||
+90
@@ -0,0 +1,90 @@
|
||||
#ifndef __CV8001_EX_H__
|
||||
#define __CV8001_EX_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// Piris attr
|
||||
static const xmedia_isp_piris_attr g_cv8001_piris_attr = {
|
||||
0,
|
||||
1,
|
||||
94,
|
||||
62,
|
||||
// Step-F number mapping table. Must be from small to large. F1.0 is 1024 and F32.0 is 1
|
||||
{ 30, 35, 40, 45, 50, 56, 61, 67, 73, 79, 85, 92, 98, 105, 112, 120, 127, 135, 143, 150, 158,
|
||||
166, 174, 183, 191, 200, 208, 217, 225, 234, 243, 252, 261, 270, 279, 289, 298, 307, 316, 325, 335, 344,
|
||||
353, 362, 372, 381, 390, 399, 408, 417, 426, 435, 444, 453, 462, 470, 478, 486, 493, 500, 506, 512 },
|
||||
XMEDIA_ISP_IRIS_F_NO_1_4,
|
||||
XMEDIA_ISP_IRIS_F_NO_5_6
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_ccm g_cv8001_awb_ccm = {
|
||||
5,
|
||||
{
|
||||
{
|
||||
7504,
|
||||
{ 428,32914,32794,32853,482,32909,10,32963,441},
|
||||
},
|
||||
{
|
||||
6536,
|
||||
{ 435,32918,32797,32853,479,32906,13,32975,450},
|
||||
},
|
||||
{
|
||||
5074,
|
||||
{ 433,32896,32817,32864,483,32899,15,33003,476},
|
||||
},
|
||||
{
|
||||
4065,
|
||||
{ 463,32932,32811,32864,467,32883,25,33063,526 },
|
||||
},
|
||||
{
|
||||
2811,
|
||||
{ 480,32898,32862,32880,482,32882,30,33204,662},
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_ccm g_cv8001_awb_wdr_ccm = {
|
||||
4,
|
||||
{
|
||||
{
|
||||
6175,
|
||||
{ 440, 32967, 15, 32852, 424, 32852, 11, 33014, 491 },
|
||||
},
|
||||
{
|
||||
4990,
|
||||
{ 443, 32969, 14, 32860, 423, 32843, 13, 33044, 519 },
|
||||
},
|
||||
{
|
||||
3865,
|
||||
{ 450, 32973, 11, 32857, 407, 32830, 18, 33031, 501 },
|
||||
},
|
||||
{
|
||||
2450,
|
||||
{ 458, 32977, 7, 32853, 389, 32816, 24, 33018, 482 },
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_cv8001_awb_agc_table = {
|
||||
// bvalid
|
||||
1,
|
||||
|
||||
// 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768
|
||||
// saturation
|
||||
{128,128,128,128,128,128,128,128,128,110,110,100,100,100,100,100}, //sat
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_cv8001_awb_wdr_agc_table = {
|
||||
// bvalid
|
||||
1,
|
||||
// saturation
|
||||
{100,100,100,100,90,80,70,60,55,55,50,50,50,50,45,40}
|
||||
};
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,7 @@
|
||||
|
||||
ifneq ($(MCU), )
|
||||
include Makefile.riscv
|
||||
else
|
||||
include Makefile.linux
|
||||
endif
|
||||
|
||||
@@ -0,0 +1,18 @@
|
||||
ISP_DIR := $(shell cd ../.. && /bin/pwd)
|
||||
SDK_DIR ?= $(shell cd $(ISP_DIR)/../../../.. && /bin/pwd)
|
||||
|
||||
include $(SDK_DIR)/build/base.mk
|
||||
include $(ISP_DIR)/sensor/plat.mk
|
||||
|
||||
LIB_NAME := libsns_gc2053
|
||||
|
||||
SRCS := $(wildcard *.c)
|
||||
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/usr/include
|
||||
SDK_USR_CFLAGS += -I$(ISP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I.
|
||||
|
||||
$(info SRCS=$(SRCS))
|
||||
|
||||
include $(SDK_DIR)/build/sdk_lib_rules.mk
|
||||
@@ -0,0 +1,4 @@
|
||||
|
||||
SRCS-y += gc2053.c
|
||||
SRCS-y += gc2053_ctrl.c
|
||||
|
||||
+1452
File diff suppressed because it is too large
Load Diff
+57
@@ -0,0 +1,57 @@
|
||||
#ifndef __GC2053_H__
|
||||
#define __GC2053_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define GC2053_RES_IS_1080P(w, h) ((w) == 1920 && (h) == 1080)
|
||||
|
||||
/*****SC2235 Register Address*****/
|
||||
#define GC2053_REG_EXP_ADDR_L 0x04 // Shutter-time[7:0]
|
||||
#define GC2053_REG_EXP_ADDR_H 0x03 // Shutter-time[13:8]
|
||||
#define GC2053_REG_AGAIN_ADDR_L 0xb3 // Analog-gain[7:0]
|
||||
#define GC2053_REG_AGAIN_ADDR_H 0xb4 // Analog-gain[9:8]
|
||||
#define GC2053_REG_DGAIN_ADDR_L 0xb9 // digital-gain[5:0]
|
||||
#define GC2053_REG_DGAIN_ADDR_H 0xb8 // digital-gain[11:6]
|
||||
#define GC2053_REG_AUTO_PREGAIN_ADDR_L 0xb2 // auto-pregain-gain[5:0]
|
||||
#define GC2053_REG_AUTO_PREGAIN_ADDR_H 0xb1 // auto-pregain-gain[9:6]
|
||||
#define GC2053_REG_STATUS_ADDR 0x90 // slow shutter via framerate or exptime
|
||||
#define GC2053_REG_VMAX_ADDR_L 0x42 // Vmax[7:0]
|
||||
#define GC2053_REG_VMAX_ADDR_H 0x41 // Vmax[13:8]
|
||||
#define GC2053_REG_PRBS_MODE_ADDR 0x38
|
||||
#define GC2053_REG_OPTICAL_BLACK_ADDR 0x7c
|
||||
|
||||
#define GC2053_VMAX_1080P30_LINEAR 0x465
|
||||
|
||||
typedef enum{
|
||||
GC2053_REG_EXP_L = 0,
|
||||
GC2053_REG_EXP_H,
|
||||
GC2053_REG_AGC_L,
|
||||
GC2053_REG_AGC_H,
|
||||
GC2053_REG_DGC_L,
|
||||
GC2053_REG_DGC_H,
|
||||
GC2053_REG_PREGAIN_L,
|
||||
GC2053_REG_PREGAIN_H,
|
||||
GC2053_REG_STATUS,
|
||||
GC2053_REG_VMAX_H, // 必须得先配置 vmax 高位寄存器，然后再配置低位寄存器
|
||||
GC2053_REG_VMAX_L,
|
||||
GC2053_REG_L_MAX_NUM,
|
||||
|
||||
//short frame reg info from here
|
||||
GC2053_S_REG_EXP_L = GC2053_REG_L_MAX_NUM,
|
||||
GC2053_S_REG_EXP_H,
|
||||
GC2053_REG_PRBS_MODE,
|
||||
GC2053_REG_OPTICAL_BLACK,
|
||||
GC2053_REG_MAX_NUM
|
||||
}gc2053_reg_info;
|
||||
|
||||
#define GC2053_FULL_LINES_MAX 0x3FFF
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //__GC2053_H__
|
||||
+892
@@ -0,0 +1,892 @@
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "i2c_dev.h"
|
||||
#include "gc2053.h"
|
||||
#include "gc2053_ctrl.h"
|
||||
|
||||
#define GC2053_REG_ADDR_MIRROR_FLIP 0x0017
|
||||
|
||||
SENSOR_PRIORITY_DATA static xmedia_s32 g_gc2053_i2c_fd[XMEDIA_SENSOR_DEV_MAX_NUM] = { [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] =
|
||||
SENSOR_I2C_INVALID };
|
||||
SENSOR_PRIORITY_DATA static xmedia_s32 g_gc2053_i2c_addr[XMEDIA_SENSOR_DEV_MAX_NUM] = { [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] =
|
||||
SENSOR_I2C_INVALID };
|
||||
|
||||
#ifdef FPGA
|
||||
#ifdef GC2053_DVP
|
||||
static xmedia_s32 gc2053_dvp_linear_1920X1080_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x80);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x80);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x80);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0xf2 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0xf3 ,0x0f);
|
||||
ret |= gc2053_write_reg(dev,0xf4 ,0x36);
|
||||
ret |= gc2053_write_reg(dev,0xf5 ,0xc0);
|
||||
ret |= gc2053_write_reg(dev,0xf6 ,0x44);
|
||||
ret |= gc2053_write_reg(dev,0xf7 ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0xf8 ,0x2c);
|
||||
ret |= gc2053_write_reg(dev,0xf9 ,0x42);
|
||||
ret |= gc2053_write_reg(dev,0xfc ,0x8e);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x87 ,0x18);
|
||||
ret |= gc2053_write_reg(dev,0xee ,0x30);
|
||||
ret |= gc2053_write_reg(dev,0xd0 ,0xb7);
|
||||
ret |= gc2053_write_reg(dev,0x03 ,0x04);
|
||||
ret |= gc2053_write_reg(dev,0x04 ,0x60);
|
||||
ret |= gc2053_write_reg(dev,0x05 ,0x05); //line length
|
||||
ret |= gc2053_write_reg(dev,0x06 ,0x28);
|
||||
ret |= gc2053_write_reg(dev,0x07 ,0x00);//VBlank
|
||||
ret |= gc2053_write_reg(dev,0x08 ,0x11);
|
||||
ret |= gc2053_write_reg(dev,0x09 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x0a ,0x02);
|
||||
ret |= gc2053_write_reg(dev,0x0b ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x0c ,0x02);
|
||||
ret |= gc2053_write_reg(dev,0x0d ,0x04);//valid line time
|
||||
ret |= gc2053_write_reg(dev,0x0e ,0x40);
|
||||
ret |= gc2053_write_reg(dev,0x12 ,0xe2);
|
||||
ret |= gc2053_write_reg(dev,0x13 ,0x16);
|
||||
ret |= gc2053_write_reg(dev,0x19 ,0x0a);
|
||||
ret |= gc2053_write_reg(dev,0x21 ,0x1c);
|
||||
ret |= gc2053_write_reg(dev,0x28 ,0x0a);
|
||||
ret |= gc2053_write_reg(dev,0x29 ,0x24);
|
||||
ret |= gc2053_write_reg(dev,0x2b ,0x04);
|
||||
ret |= gc2053_write_reg(dev,0x32 ,0xf8);
|
||||
ret |= gc2053_write_reg(dev,0x37 ,0x03);
|
||||
ret |= gc2053_write_reg(dev,0x39 ,0x15);
|
||||
ret |= gc2053_write_reg(dev,0x43 ,0x07);
|
||||
ret |= gc2053_write_reg(dev,0x44 ,0x40);
|
||||
ret |= gc2053_write_reg(dev,0x46 ,0x0b);
|
||||
ret |= gc2053_write_reg(dev,0x4b ,0x20);
|
||||
ret |= gc2053_write_reg(dev,0x4e ,0x08);
|
||||
ret |= gc2053_write_reg(dev,0x55 ,0x20);
|
||||
ret |= gc2053_write_reg(dev,0x66 ,0x05);
|
||||
ret |= gc2053_write_reg(dev,0x67 ,0x05);
|
||||
ret |= gc2053_write_reg(dev,0x77 ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0x78 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x7c ,0x93);
|
||||
ret |= gc2053_write_reg(dev,0x8c ,0x12);
|
||||
ret |= gc2053_write_reg(dev,0x8d ,0x92);
|
||||
ret |= gc2053_write_reg(dev,0x90 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x41 ,0x04);//Frame length c35
|
||||
ret |= gc2053_write_reg(dev,0x42 ,0x65);
|
||||
ret |= gc2053_write_reg(dev,0x9d ,0x10);
|
||||
ret |= gc2053_write_reg(dev,0xce ,0x7c);
|
||||
ret |= gc2053_write_reg(dev,0xd2 ,0x41);
|
||||
ret |= gc2053_write_reg(dev,0xd3 ,0xdc);
|
||||
ret |= gc2053_write_reg(dev,0xe6 ,0x50);
|
||||
ret |= gc2053_write_reg(dev,0xb6 ,0xc0);
|
||||
ret |= gc2053_write_reg(dev,0xb0 ,0x70);
|
||||
ret |= gc2053_write_reg(dev,0xb1 ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0xb2 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0xb3 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0xb4 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0xb8 ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0xb9 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x26 ,0x30);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0x40 ,0x23);
|
||||
ret |= gc2053_write_reg(dev,0x55 ,0x07);
|
||||
ret |= gc2053_write_reg(dev,0x60 ,0x40);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x04);
|
||||
ret |= gc2053_write_reg(dev,0x14 ,0x78);
|
||||
ret |= gc2053_write_reg(dev,0x15 ,0x78);
|
||||
ret |= gc2053_write_reg(dev,0x16 ,0x78);
|
||||
ret |= gc2053_write_reg(dev,0x17 ,0x78);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0x92 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x94 ,0x03);
|
||||
ret |= gc2053_write_reg(dev,0x95 ,0x04);//out_window
|
||||
ret |= gc2053_write_reg(dev,0x96 ,0x38);
|
||||
ret |= gc2053_write_reg(dev,0x97 ,0x07);
|
||||
ret |= gc2053_write_reg(dev,0x98 ,0x80);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0x01 ,0x05);
|
||||
ret |= gc2053_write_reg(dev,0x02 ,0x89);
|
||||
ret |= gc2053_write_reg(dev,0x04 ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0x07 ,0xa6);
|
||||
ret |= gc2053_write_reg(dev,0x08 ,0xa9);
|
||||
ret |= gc2053_write_reg(dev,0x09 ,0xa8);
|
||||
ret |= gc2053_write_reg(dev,0x0a ,0xa7);
|
||||
ret |= gc2053_write_reg(dev,0x0b ,0xff);
|
||||
ret |= gc2053_write_reg(dev,0x0c ,0xff);
|
||||
ret |= gc2053_write_reg(dev,0x0f ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x50 ,0x1c);
|
||||
ret |= gc2053_write_reg(dev,0x89 ,0x03);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x04);
|
||||
ret |= gc2053_write_reg(dev,0x28 ,0x86);
|
||||
ret |= gc2053_write_reg(dev,0x29 ,0x86);
|
||||
ret |= gc2053_write_reg(dev,0x2a ,0x86);
|
||||
ret |= gc2053_write_reg(dev,0x2b ,0x68);
|
||||
ret |= gc2053_write_reg(dev,0x2c ,0x68);
|
||||
ret |= gc2053_write_reg(dev,0x2d ,0x68);
|
||||
ret |= gc2053_write_reg(dev,0x2e ,0x68);
|
||||
ret |= gc2053_write_reg(dev,0x2f ,0x68);
|
||||
ret |= gc2053_write_reg(dev,0x30 ,0x4f);
|
||||
ret |= gc2053_write_reg(dev,0x31 ,0x68);
|
||||
ret |= gc2053_write_reg(dev,0x32 ,0x67);
|
||||
ret |= gc2053_write_reg(dev,0x33 ,0x66);
|
||||
ret |= gc2053_write_reg(dev,0x34 ,0x66);
|
||||
ret |= gc2053_write_reg(dev,0x35 ,0x66);
|
||||
ret |= gc2053_write_reg(dev,0x36 ,0x66);
|
||||
ret |= gc2053_write_reg(dev,0x37 ,0x66);
|
||||
ret |= gc2053_write_reg(dev,0x38 ,0x62);
|
||||
ret |= gc2053_write_reg(dev,0x39 ,0x62);
|
||||
ret |= gc2053_write_reg(dev,0x3a ,0x62);
|
||||
ret |= gc2053_write_reg(dev,0x3b ,0x62);
|
||||
ret |= gc2053_write_reg(dev,0x3c ,0x62);
|
||||
ret |= gc2053_write_reg(dev,0x3d ,0x62);
|
||||
ret |= gc2053_write_reg(dev,0x3e ,0x62);
|
||||
ret |= gc2053_write_reg(dev,0x3f ,0x62);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0x9a ,0x06);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x7b ,0x2a);
|
||||
ret |= gc2053_write_reg(dev,0x23 ,0x2d);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x03);
|
||||
ret |= gc2053_write_reg(dev,0x01 ,0x20);
|
||||
ret |= gc2053_write_reg(dev,0x02 ,0x56);
|
||||
ret |= gc2053_write_reg(dev,0x03 ,0xb2);
|
||||
ret |= gc2053_write_reg(dev,0x12 ,0x80);
|
||||
ret |= gc2053_write_reg(dev,0x13 ,0x07);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x3e ,0x40);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc2053_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
|
||||
}
|
||||
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
SENSOR_PRINT("==========Galaxycore GC2053_1080P_6.6FPS_10BIT_LINEAR_Init_OK!!!!================\n");
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
#else
|
||||
static xmedia_s32 gc2053_2lane_linear_1920x1080_init(xmedia_u32 dev)
|
||||
{
|
||||
SENSOR_PRINT("========================================================================================\n");
|
||||
SENSOR_PRINT("==================================== GC2053 LINEAR NOT SUPPORT! ========================\n");
|
||||
SENSOR_PRINT("========================================================================================\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
#endif
|
||||
|
||||
#else
|
||||
#ifdef GC2053_DVP
|
||||
static xmedia_s32 gc2053_dvp_linear_1920X1080_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x80);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x80);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x80);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0xf2 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0xf3 ,0x0f);
|
||||
ret |= gc2053_write_reg(dev,0xf4 ,0x36);
|
||||
ret |= gc2053_write_reg(dev,0xf5 ,0xc0);
|
||||
ret |= gc2053_write_reg(dev,0xf6 ,0x44);
|
||||
ret |= gc2053_write_reg(dev,0xf7 ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0xf8 ,0x2c);
|
||||
ret |= gc2053_write_reg(dev,0xf9 ,0x42);
|
||||
ret |= gc2053_write_reg(dev,0xfc ,0x8e);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x87 ,0x18);
|
||||
ret |= gc2053_write_reg(dev,0xee ,0x30);
|
||||
ret |= gc2053_write_reg(dev,0xd0 ,0xb7);
|
||||
ret |= gc2053_write_reg(dev,0x03 ,0x04);
|
||||
ret |= gc2053_write_reg(dev,0x04 ,0x60);
|
||||
ret |= gc2053_write_reg(dev,0x05 ,0x05); //line length
|
||||
ret |= gc2053_write_reg(dev,0x06 ,0x28);
|
||||
ret |= gc2053_write_reg(dev,0x07 ,0x00);//VBlank
|
||||
ret |= gc2053_write_reg(dev,0x08 ,0x11);
|
||||
ret |= gc2053_write_reg(dev,0x09 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x0a ,0x02);
|
||||
ret |= gc2053_write_reg(dev,0x0b ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x0c ,0x02);
|
||||
ret |= gc2053_write_reg(dev,0x0d ,0x04);//valid line time
|
||||
ret |= gc2053_write_reg(dev,0x0e ,0x40);
|
||||
ret |= gc2053_write_reg(dev,0x12 ,0xe2);
|
||||
ret |= gc2053_write_reg(dev,0x13 ,0x16);
|
||||
ret |= gc2053_write_reg(dev,0x19 ,0x0a);
|
||||
ret |= gc2053_write_reg(dev,0x21 ,0x1c);
|
||||
ret |= gc2053_write_reg(dev,0x28 ,0x0a);
|
||||
ret |= gc2053_write_reg(dev,0x29 ,0x24);
|
||||
ret |= gc2053_write_reg(dev,0x2b ,0x04);
|
||||
ret |= gc2053_write_reg(dev,0x32 ,0xf8);
|
||||
ret |= gc2053_write_reg(dev,0x37 ,0x03);
|
||||
ret |= gc2053_write_reg(dev,0x39 ,0x15);
|
||||
ret |= gc2053_write_reg(dev,0x43 ,0x07);
|
||||
ret |= gc2053_write_reg(dev,0x44 ,0x40);
|
||||
ret |= gc2053_write_reg(dev,0x46 ,0x0b);
|
||||
ret |= gc2053_write_reg(dev,0x4b ,0x20);
|
||||
ret |= gc2053_write_reg(dev,0x4e ,0x08);
|
||||
ret |= gc2053_write_reg(dev,0x55 ,0x20);
|
||||
ret |= gc2053_write_reg(dev,0x66 ,0x05);
|
||||
ret |= gc2053_write_reg(dev,0x67 ,0x05);
|
||||
ret |= gc2053_write_reg(dev,0x77 ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0x78 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x7c ,0x93);
|
||||
ret |= gc2053_write_reg(dev,0x8c ,0x12);
|
||||
ret |= gc2053_write_reg(dev,0x8d ,0x92);
|
||||
ret |= gc2053_write_reg(dev,0x90 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x41 ,0x04);
|
||||
ret |= gc2053_write_reg(dev,0x42 ,0x65);
|
||||
ret |= gc2053_write_reg(dev,0x9d ,0x10);
|
||||
ret |= gc2053_write_reg(dev,0xce ,0x7c);
|
||||
ret |= gc2053_write_reg(dev,0xd2 ,0x41);
|
||||
ret |= gc2053_write_reg(dev,0xd3 ,0xdc);
|
||||
ret |= gc2053_write_reg(dev,0xe6 ,0x50);
|
||||
ret |= gc2053_write_reg(dev,0xb6 ,0xc0);
|
||||
ret |= gc2053_write_reg(dev,0xb0 ,0x70);
|
||||
ret |= gc2053_write_reg(dev,0xb1 ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0xb2 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0xb3 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0xb4 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0xb8 ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0xb9 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x26 ,0x30);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0x40 ,0x23);
|
||||
ret |= gc2053_write_reg(dev,0x55 ,0x07);
|
||||
ret |= gc2053_write_reg(dev,0x60 ,0x40);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x04);
|
||||
ret |= gc2053_write_reg(dev,0x14 ,0x78);
|
||||
ret |= gc2053_write_reg(dev,0x15 ,0x78);
|
||||
ret |= gc2053_write_reg(dev,0x16 ,0x78);
|
||||
ret |= gc2053_write_reg(dev,0x17 ,0x78);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0x92 ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x94 ,0x03);
|
||||
ret |= gc2053_write_reg(dev,0x95 ,0x04);//out_window
|
||||
ret |= gc2053_write_reg(dev,0x96 ,0x38);
|
||||
ret |= gc2053_write_reg(dev,0x97 ,0x07);
|
||||
ret |= gc2053_write_reg(dev,0x98 ,0x80);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0x01 ,0x05);
|
||||
ret |= gc2053_write_reg(dev,0x02 ,0x89);
|
||||
ret |= gc2053_write_reg(dev,0x04 ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0x07 ,0xa6);
|
||||
ret |= gc2053_write_reg(dev,0x08 ,0xa9);
|
||||
ret |= gc2053_write_reg(dev,0x09 ,0xa8);
|
||||
ret |= gc2053_write_reg(dev,0x0a ,0xa7);
|
||||
ret |= gc2053_write_reg(dev,0x0b ,0xff);
|
||||
ret |= gc2053_write_reg(dev,0x0c ,0xff);
|
||||
ret |= gc2053_write_reg(dev,0x0f ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x50 ,0x1c);
|
||||
ret |= gc2053_write_reg(dev,0x89 ,0x03);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x04);
|
||||
ret |= gc2053_write_reg(dev,0x28 ,0x86);
|
||||
ret |= gc2053_write_reg(dev,0x29 ,0x86);
|
||||
ret |= gc2053_write_reg(dev,0x2a ,0x86);
|
||||
ret |= gc2053_write_reg(dev,0x2b ,0x68);
|
||||
ret |= gc2053_write_reg(dev,0x2c ,0x68);
|
||||
ret |= gc2053_write_reg(dev,0x2d ,0x68);
|
||||
ret |= gc2053_write_reg(dev,0x2e ,0x68);
|
||||
ret |= gc2053_write_reg(dev,0x2f ,0x68);
|
||||
ret |= gc2053_write_reg(dev,0x30 ,0x4f);
|
||||
ret |= gc2053_write_reg(dev,0x31 ,0x68);
|
||||
ret |= gc2053_write_reg(dev,0x32 ,0x67);
|
||||
ret |= gc2053_write_reg(dev,0x33 ,0x66);
|
||||
ret |= gc2053_write_reg(dev,0x34 ,0x66);
|
||||
ret |= gc2053_write_reg(dev,0x35 ,0x66);
|
||||
ret |= gc2053_write_reg(dev,0x36 ,0x66);
|
||||
ret |= gc2053_write_reg(dev,0x37 ,0x66);
|
||||
ret |= gc2053_write_reg(dev,0x38 ,0x62);
|
||||
ret |= gc2053_write_reg(dev,0x39 ,0x62);
|
||||
ret |= gc2053_write_reg(dev,0x3a ,0x62);
|
||||
ret |= gc2053_write_reg(dev,0x3b ,0x62);
|
||||
ret |= gc2053_write_reg(dev,0x3c ,0x62);
|
||||
ret |= gc2053_write_reg(dev,0x3d ,0x62);
|
||||
ret |= gc2053_write_reg(dev,0x3e ,0x62);
|
||||
ret |= gc2053_write_reg(dev,0x3f ,0x62);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x01);
|
||||
ret |= gc2053_write_reg(dev,0x9a ,0x06);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x7b ,0x2a);
|
||||
ret |= gc2053_write_reg(dev,0x23 ,0x2d);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x03);
|
||||
ret |= gc2053_write_reg(dev,0x01 ,0x20);
|
||||
ret |= gc2053_write_reg(dev,0x02 ,0x56);
|
||||
ret |= gc2053_write_reg(dev,0x03 ,0xb2);
|
||||
ret |= gc2053_write_reg(dev,0x12 ,0x80);
|
||||
ret |= gc2053_write_reg(dev,0x13 ,0x07);
|
||||
ret |= gc2053_write_reg(dev,0xfe ,0x00);
|
||||
ret |= gc2053_write_reg(dev,0x3e ,0x40);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc2053_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
SENSOR_PRINT("==========Galaxycore GC2053_1080P_25FPS_12BIT_LINEAR_Init_OK!!!!=================\n");
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
#else
|
||||
SENSOR_PRIORITY_FUNC static xmedia_s32 gc2053_2lane_linear_1920x1080_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x80);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x80);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x80);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0xf2, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0xf3, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0xf4, 0x36);
|
||||
ret |= gc2053_write_reg(dev, 0xf5, 0xc0);
|
||||
ret |= gc2053_write_reg(dev, 0xf6, 0x84);
|
||||
ret |= gc2053_write_reg(dev, 0xf7, 0x11);
|
||||
ret |= gc2053_write_reg(dev, 0xf8, 0x3e);
|
||||
ret |= gc2053_write_reg(dev, 0xf9, 0x82);
|
||||
ret |= gc2053_write_reg(dev, 0xfc, 0x8e);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x87, 0x18);
|
||||
ret |= gc2053_write_reg(dev, 0xee, 0x30);
|
||||
ret |= gc2053_write_reg(dev, 0xd0, 0xb7);
|
||||
ret |= gc2053_write_reg(dev, 0x03, 0x04);
|
||||
ret |= gc2053_write_reg(dev, 0x04, 0x60);
|
||||
ret |= gc2053_write_reg(dev, 0x05, 0x04);
|
||||
ret |= gc2053_write_reg(dev, 0x06, 0x4c);
|
||||
ret |= gc2053_write_reg(dev, 0x07, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x08, 0x11);
|
||||
ret |= gc2053_write_reg(dev, 0x09, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x0a, 0x02);
|
||||
ret |= gc2053_write_reg(dev, 0x0b, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x0c, 0x02);
|
||||
ret |= gc2053_write_reg(dev, 0x0d, 0x04);
|
||||
ret |= gc2053_write_reg(dev, 0x0e, 0x40);
|
||||
ret |= gc2053_write_reg(dev, 0x12, 0xe2);
|
||||
ret |= gc2053_write_reg(dev, 0x13, 0x16);
|
||||
ret |= gc2053_write_reg(dev, 0x19, 0x0a);
|
||||
ret |= gc2053_write_reg(dev, 0x21, 0x1c);
|
||||
ret |= gc2053_write_reg(dev, 0x28, 0x0a);
|
||||
ret |= gc2053_write_reg(dev, 0x29, 0x24);
|
||||
ret |= gc2053_write_reg(dev, 0x2b, 0x04);
|
||||
ret |= gc2053_write_reg(dev, 0x32, 0xf8);
|
||||
ret |= gc2053_write_reg(dev, 0x37, 0x03);
|
||||
ret |= gc2053_write_reg(dev, 0x39, 0x15);
|
||||
ret |= gc2053_write_reg(dev, 0x43, 0x07);
|
||||
ret |= gc2053_write_reg(dev, 0x44, 0x40);
|
||||
ret |= gc2053_write_reg(dev, 0x46, 0x0b);
|
||||
ret |= gc2053_write_reg(dev, 0x4b, 0x20);
|
||||
ret |= gc2053_write_reg(dev, 0x4e, 0x08);
|
||||
ret |= gc2053_write_reg(dev, 0x55, 0x20);
|
||||
ret |= gc2053_write_reg(dev, 0x66, 0x05);
|
||||
ret |= gc2053_write_reg(dev, 0x67, 0x05);
|
||||
ret |= gc2053_write_reg(dev, 0x77, 0x01);
|
||||
ret |= gc2053_write_reg(dev, 0x78, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x7c, 0x93);
|
||||
ret |= gc2053_write_reg(dev, 0x8c, 0x12);
|
||||
ret |= gc2053_write_reg(dev, 0x8d, 0x92);
|
||||
ret |= gc2053_write_reg(dev, 0x90, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x41, 0x04);
|
||||
ret |= gc2053_write_reg(dev, 0x42, 0x65);
|
||||
ret |= gc2053_write_reg(dev, 0x9d, 0x10);
|
||||
ret |= gc2053_write_reg(dev, 0xce, 0x7c);
|
||||
ret |= gc2053_write_reg(dev, 0xd2, 0x41);
|
||||
ret |= gc2053_write_reg(dev, 0xd3, 0xdc);
|
||||
ret |= gc2053_write_reg(dev, 0xe6, 0x50);
|
||||
ret |= gc2053_write_reg(dev, 0xb6, 0xc0);
|
||||
ret |= gc2053_write_reg(dev, 0xb0, 0x70);
|
||||
ret |= gc2053_write_reg(dev, 0xb1, 0x01);
|
||||
ret |= gc2053_write_reg(dev, 0xb2, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0xb3, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0xb4, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0xb8, 0x01);
|
||||
ret |= gc2053_write_reg(dev, 0xb9, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x26, 0x30);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x01);
|
||||
ret |= gc2053_write_reg(dev, 0x40, 0x23);
|
||||
ret |= gc2053_write_reg(dev, 0x55, 0x07);
|
||||
ret |= gc2053_write_reg(dev, 0x60, 0x40);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x04);
|
||||
ret |= gc2053_write_reg(dev, 0x14, 0x78);
|
||||
ret |= gc2053_write_reg(dev, 0x15, 0x78);
|
||||
ret |= gc2053_write_reg(dev, 0x16, 0x78);
|
||||
ret |= gc2053_write_reg(dev, 0x17, 0x78);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x01);
|
||||
ret |= gc2053_write_reg(dev, 0x92, 0x01);
|
||||
ret |= gc2053_write_reg(dev, 0x94, 0x04);
|
||||
ret |= gc2053_write_reg(dev, 0x95, 0x04);
|
||||
ret |= gc2053_write_reg(dev, 0x96, 0x38);
|
||||
ret |= gc2053_write_reg(dev, 0x97, 0x07);
|
||||
ret |= gc2053_write_reg(dev, 0x98, 0x80);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x01);
|
||||
ret |= gc2053_write_reg(dev, 0x83, 0x01);
|
||||
ret |= gc2053_write_reg(dev, 0x87, 0x50);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x01);
|
||||
ret |= gc2053_write_reg(dev, 0x01, 0x05);
|
||||
ret |= gc2053_write_reg(dev, 0x02, 0x89);
|
||||
ret |= gc2053_write_reg(dev, 0x04, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x07, 0xa6);
|
||||
ret |= gc2053_write_reg(dev, 0x08, 0xa9);
|
||||
ret |= gc2053_write_reg(dev, 0x09, 0xa8);
|
||||
ret |= gc2053_write_reg(dev, 0x0a, 0xa7);
|
||||
ret |= gc2053_write_reg(dev, 0x0b, 0xff);
|
||||
ret |= gc2053_write_reg(dev, 0x0c, 0xff);
|
||||
ret |= gc2053_write_reg(dev, 0x0f, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x50, 0x1c);
|
||||
ret |= gc2053_write_reg(dev, 0x89, 0x03);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x04);
|
||||
ret |= gc2053_write_reg(dev, 0x28, 0x86);
|
||||
ret |= gc2053_write_reg(dev, 0x29, 0x86);
|
||||
ret |= gc2053_write_reg(dev, 0x2a, 0x86);
|
||||
ret |= gc2053_write_reg(dev, 0x2b, 0x68);
|
||||
ret |= gc2053_write_reg(dev, 0x2c, 0x68);
|
||||
ret |= gc2053_write_reg(dev, 0x2d, 0x68);
|
||||
ret |= gc2053_write_reg(dev, 0x2e, 0x68);
|
||||
ret |= gc2053_write_reg(dev, 0x2f, 0x68);
|
||||
ret |= gc2053_write_reg(dev, 0x30, 0x4f);
|
||||
ret |= gc2053_write_reg(dev, 0x31, 0x68);
|
||||
ret |= gc2053_write_reg(dev, 0x32, 0x67);
|
||||
ret |= gc2053_write_reg(dev, 0x33, 0x66);
|
||||
ret |= gc2053_write_reg(dev, 0x34, 0x66);
|
||||
ret |= gc2053_write_reg(dev, 0x35, 0x66);
|
||||
ret |= gc2053_write_reg(dev, 0x36, 0x66);
|
||||
ret |= gc2053_write_reg(dev, 0x37, 0x66);
|
||||
ret |= gc2053_write_reg(dev, 0x38, 0x62);
|
||||
ret |= gc2053_write_reg(dev, 0x39, 0x62);
|
||||
ret |= gc2053_write_reg(dev, 0x3a, 0x62);
|
||||
ret |= gc2053_write_reg(dev, 0x3b, 0x62);
|
||||
ret |= gc2053_write_reg(dev, 0x3c, 0x62);
|
||||
ret |= gc2053_write_reg(dev, 0x3d, 0x62);
|
||||
ret |= gc2053_write_reg(dev, 0x3e, 0x62);
|
||||
ret |= gc2053_write_reg(dev, 0x3f, 0x62);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x01);
|
||||
ret |= gc2053_write_reg(dev, 0x9a, 0x06);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x7b, 0x2a);
|
||||
ret |= gc2053_write_reg(dev, 0x23, 0x2d);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x03);
|
||||
ret |= gc2053_write_reg(dev, 0x01, 0x27);
|
||||
ret |= gc2053_write_reg(dev, 0x02, 0x56);
|
||||
ret |= gc2053_write_reg(dev, 0x03, 0x8e);
|
||||
ret |= gc2053_write_reg(dev, 0x12, 0x80);
|
||||
ret |= gc2053_write_reg(dev, 0x13, 0x07);
|
||||
ret |= gc2053_write_reg(dev, 0x15, 0x10);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x3e, 0x91);
|
||||
|
||||
/* 76上可运行的版本，72上不能正常出图
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x80);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x80);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0xf2, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0xf3, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0xf4, 0x36);
|
||||
ret |= gc2053_write_reg(dev, 0xf5, 0xc0);
|
||||
ret |= gc2053_write_reg(dev, 0xf6, 0x44);
|
||||
ret |= gc2053_write_reg(dev, 0xf7, 0x01);
|
||||
ret |= gc2053_write_reg(dev, 0xf8, 0x2c);
|
||||
ret |= gc2053_write_reg(dev, 0xf9, 0x42);
|
||||
ret |= gc2053_write_reg(dev, 0xfc, 0x8e);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x87, 0x18);
|
||||
ret |= gc2053_write_reg(dev, 0xee, 0x30);
|
||||
ret |= gc2053_write_reg(dev, 0xd0, 0xb7);
|
||||
ret |= gc2053_write_reg(dev, 0x03, 0x04);
|
||||
ret |= gc2053_write_reg(dev, 0x04, 0x60);
|
||||
ret |= gc2053_write_reg(dev, 0x05, 0x04);//line length
|
||||
ret |= gc2053_write_reg(dev, 0x06, 0x4c);
|
||||
ret |= gc2053_write_reg(dev, 0x07, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x08, 0x11);
|
||||
ret |= gc2053_write_reg(dev, 0x0a, 0x02);
|
||||
ret |= gc2053_write_reg(dev, 0x0c, 0x02);
|
||||
ret |= gc2053_write_reg(dev, 0x0d, 0x04);//win_height
|
||||
ret |= gc2053_write_reg(dev, 0x0e, 0x40);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x01);
|
||||
ret |= gc2053_write_reg(dev, 0x83, 0x01);
|
||||
ret |= gc2053_write_reg(dev, 0x87, 0x51);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x03);
|
||||
ret |= gc2053_write_reg(dev, 0x01, 0x27);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x3e, 0x91);
|
||||
ret |= gc2053_write_reg(dev, 0x12, 0xe2);
|
||||
ret |= gc2053_write_reg(dev, 0x13, 0x16);
|
||||
ret |= gc2053_write_reg(dev, 0x19, 0x0a);
|
||||
ret |= gc2053_write_reg(dev, 0x28, 0x0a);
|
||||
ret |= gc2053_write_reg(dev, 0x2b, 0x04);
|
||||
ret |= gc2053_write_reg(dev, 0x37, 0x03);
|
||||
ret |= gc2053_write_reg(dev, 0x43, 0x07);
|
||||
ret |= gc2053_write_reg(dev, 0x44, 0x40);
|
||||
ret |= gc2053_write_reg(dev, 0x46, 0x0b);
|
||||
ret |= gc2053_write_reg(dev, 0x4b, 0x20);
|
||||
ret |= gc2053_write_reg(dev, 0x4e, 0x08);
|
||||
ret |= gc2053_write_reg(dev, 0x55, 0x20);
|
||||
ret |= gc2053_write_reg(dev, 0x77, 0x01);
|
||||
ret |= gc2053_write_reg(dev, 0x78, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x7c, 0x93);
|
||||
ret |= gc2053_write_reg(dev, 0x8d, 0x92);
|
||||
ret |= gc2053_write_reg(dev, 0x90, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x41, 0x04);
|
||||
ret |= gc2053_write_reg(dev, 0x42, 0x65);
|
||||
ret |= gc2053_write_reg(dev, 0xce, 0x7c);
|
||||
ret |= gc2053_write_reg(dev, 0xd2, 0x41);
|
||||
ret |= gc2053_write_reg(dev, 0xd3, 0xdc);
|
||||
ret |= gc2053_write_reg(dev, 0xe6, 0x50);
|
||||
ret |= gc2053_write_reg(dev, 0xb6, 0xc0);
|
||||
ret |= gc2053_write_reg(dev, 0xb0, 0x70);
|
||||
ret |= gc2053_write_reg(dev, 0x26, 0x30);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x01);
|
||||
ret |= gc2053_write_reg(dev, 0x55, 0x07);
|
||||
//dither
|
||||
ret |= gc2053_write_reg(dev, 0x58, 0x00); //default 0x80
|
||||
ret |= gc2053_write_reg(dev, 0x04, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x94, 0x03);
|
||||
ret |= gc2053_write_reg(dev, 0x97, 0x07); //out_x_size
|
||||
ret |= gc2053_write_reg(dev, 0x98, 0x80);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x04);
|
||||
ret |= gc2053_write_reg(dev, 0x14, 0x78);
|
||||
ret |= gc2053_write_reg(dev, 0x15, 0x78);
|
||||
ret |= gc2053_write_reg(dev, 0x16, 0x78);
|
||||
ret |= gc2053_write_reg(dev, 0x17, 0x78);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x01);
|
||||
ret |= gc2053_write_reg(dev, 0x9a, 0x06);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x00);
|
||||
ret |= gc2053_write_reg(dev, 0x7b, 0x2a);
|
||||
ret |= gc2053_write_reg(dev, 0x23, 0x2d);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x03);
|
||||
ret |= gc2053_write_reg(dev, 0x02, 0x56);
|
||||
ret |= gc2053_write_reg(dev, 0x03, 0xb6);
|
||||
ret |= gc2053_write_reg(dev, 0x12, 0x80);
|
||||
ret |= gc2053_write_reg(dev, 0x13, 0x07);
|
||||
ret |= gc2053_write_reg(dev, 0x15, 0x12);
|
||||
ret |= gc2053_write_reg(dev, 0xfe, 0x00);
|
||||
*/
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc2053_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
SENSOR_PRINT("==========Galaxycore GC2053_1080P_30FPS_10BIT_LINEAR_Init_OK!====================\n");
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
#if 0
|
||||
static xmedia_s32 gc2053_2lane_wdr_1920x1080_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
ret |= gc2053_write_reg(dev,0xfe, 0x80);
|
||||
ret |= gc2053_write_reg(dev,0xfe, 0x80);
|
||||
ret |= gc2053_write_reg(dev,0xfe, 0x80);
|
||||
ret |= gc2053_write_reg(dev,0xfe, 0x00);
|
||||
ret |= gc2053_write_reg(dev,0xf2, 0x00);
|
||||
ret |= gc2053_write_reg(dev,0xf3, 0x00);
|
||||
ret |= gc2053_write_reg(dev,0xf4, 0x36);
|
||||
ret |= gc2053_write_reg(dev,0xf5, 0xc0);
|
||||
ret |= gc2053_write_reg(dev,0xf6, 0x44);
|
||||
ret |= gc2053_write_reg(dev,0xf7, 0x01);
|
||||
ret |= gc2053_write_reg(dev,0xf8, 0x2c);
|
||||
ret |= gc2053_write_reg(dev,0xf9, 0x42);
|
||||
ret |= gc2053_write_reg(dev,0xfc, 0x8e);
|
||||
ret |= gc2053_write_reg(dev,0xfe, 0x00);
|
||||
ret |= gc2053_write_reg(dev,0x87, 0x18);
|
||||
ret |= gc2053_write_reg(dev,0xee, 0x30);
|
||||
ret |= gc2053_write_reg(dev,0xd0, 0xb7);
|
||||
ret |= gc2053_write_reg(dev,0x03, 0x04);
|
||||
ret |= gc2053_write_reg(dev,0x04, 0x60);
|
||||
ret |= gc2053_write_reg(dev,0x05, 0x04);
|
||||
ret |= gc2053_write_reg(dev,0x06, 0x4c);
|
||||
ret |= gc2053_write_reg(dev,0x07, 0x00);
|
||||
ret |= gc2053_write_reg(dev,0x08, 0x11);
|
||||
ret |= gc2053_write_reg(dev,0x0a, 0x02);
|
||||
ret |= gc2053_write_reg(dev,0x0c, 0x02);
|
||||
|
||||
ret |= gc2053_write_reg(dev,0x0d, 0x04);//win_height
|
||||
ret |= gc2053_write_reg(dev,0x0e, 0x40);
|
||||
ret |= gc2053_write_reg(dev,0x12, 0xe2);
|
||||
ret |= gc2053_write_reg(dev,0x13, 0x16);
|
||||
ret |= gc2053_write_reg(dev,0x19, 0x0a);
|
||||
ret |= gc2053_write_reg(dev,0x28, 0x0a);
|
||||
ret |= gc2053_write_reg(dev,0x2b, 0x04);
|
||||
ret |= gc2053_write_reg(dev,0x37, 0x03);
|
||||
ret |= gc2053_write_reg(dev,0x43, 0x07);
|
||||
ret |= gc2053_write_reg(dev,0x44, 0x40);
|
||||
ret |= gc2053_write_reg(dev,0x46, 0x0b);
|
||||
ret |= gc2053_write_reg(dev,0x4b, 0x20);
|
||||
ret |= gc2053_write_reg(dev,0x4e, 0x08);
|
||||
ret |= gc2053_write_reg(dev,0x55, 0x20);
|
||||
ret |= gc2053_write_reg(dev,0x77, 0x01);
|
||||
ret |= gc2053_write_reg(dev,0x78, 0x00);
|
||||
ret |= gc2053_write_reg(dev,0x7c, 0x93);
|
||||
ret |= gc2053_write_reg(dev,0x8d, 0x92);
|
||||
ret |= gc2053_write_reg(dev,0x90, 0x00);
|
||||
|
||||
ret |= gc2053_write_reg(dev,0x41, 0x04);//VTS
|
||||
ret |= gc2053_write_reg(dev,0x42, 0x65);
|
||||
ret |= gc2053_write_reg(dev,0xce, 0x7c);
|
||||
ret |= gc2053_write_reg(dev,0xd2, 0x41);
|
||||
ret |= gc2053_write_reg(dev,0xd3, 0xdc);
|
||||
ret |= gc2053_write_reg(dev,0xe6, 0x38);
|
||||
ret |= gc2053_write_reg(dev,0xb6, 0xc0);
|
||||
ret |= gc2053_write_reg(dev,0xb0, 0x70);
|
||||
ret |= gc2053_write_reg(dev,0x26, 0x20);
|
||||
ret |= gc2053_write_reg(dev,0xfe, 0x04);
|
||||
ret |= gc2053_write_reg(dev,0xe0, 0x18);
|
||||
ret |= gc2053_write_reg(dev,0xfe, 0x01);
|
||||
ret |= gc2053_write_reg(dev,0x55, 0x07);
|
||||
ret |= gc2053_write_reg(dev,0x58, 0x00);
|
||||
ret |= gc2053_write_reg(dev,0xfe, 0x04);
|
||||
ret |= gc2053_write_reg(dev,0x14, 0x78);
|
||||
ret |= gc2053_write_reg(dev,0x15, 0x78);
|
||||
ret |= gc2053_write_reg(dev,0x16, 0x78);
|
||||
ret |= gc2053_write_reg(dev,0x17, 0x78);
|
||||
ret |= gc2053_write_reg(dev,0xfe, 0x01);
|
||||
ret |= gc2053_write_reg(dev,0x04, 0x00);
|
||||
ret |= gc2053_write_reg(dev,0x94, 0x03);
|
||||
ret |= gc2053_write_reg(dev,0x97, 0x07);
|
||||
ret |= gc2053_write_reg(dev,0x98, 0x80);
|
||||
ret |= gc2053_write_reg(dev,0x9a, 0x06);
|
||||
ret |= gc2053_write_reg(dev,0x40, 0x03);
|
||||
ret |= gc2053_write_reg(dev,0x42, 0x20);
|
||||
ret |= gc2053_write_reg(dev,0x46, 0x4f);
|
||||
ret |= gc2053_write_reg(dev,0x47, 0x40);
|
||||
ret |= gc2053_write_reg(dev,0x4f, 0x02);
|
||||
ret |= gc2053_write_reg(dev,0x50, 0x3a);
|
||||
ret |= gc2053_write_reg(dev,0x51, 0x1d);
|
||||
ret |= gc2053_write_reg(dev,0xfe, 0x00);
|
||||
ret |= gc2053_write_reg(dev,0x7b, 0x2a);
|
||||
ret |= gc2053_write_reg(dev,0x23, 0x2d);
|
||||
ret |= gc2053_write_reg(dev,0xfe, 0x03);
|
||||
ret |= gc2053_write_reg(dev,0x01, 0x27);
|
||||
ret |= gc2053_write_reg(dev,0x02, 0x56);
|
||||
ret |= gc2053_write_reg(dev,0x03, 0xb6);
|
||||
ret |= gc2053_write_reg(dev,0x12, 0x80);
|
||||
ret |= gc2053_write_reg(dev,0x13, 0x07);
|
||||
ret |= gc2053_write_reg(dev,0x15, 0x12);
|
||||
ret |= gc2053_write_reg(dev,0xfe, 0x00);
|
||||
ret |= gc2053_write_reg(dev,0x3e, 0x91);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc2053_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
SENSOR_PRINT("==========Galaxycore GC2053_1080P_30FPS_10BIT_WDR_Init_OK!=======================\n");
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
static xmedia_void gc2053_slave_init(xmedia_u32 dev)
|
||||
{
|
||||
// gc2053_write_reg(dev, 0xfe, 0x00);
|
||||
// gc2053_write_reg(dev, 0x7f, 0x9d);
|
||||
// gc2053_write_reg(dev, 0x82, 0x0a);
|
||||
// gc2053_write_reg(dev, 0x83, 0x0b);
|
||||
// gc2053_write_reg(dev, 0x84, 0x80);
|
||||
// gc2053_write_reg(dev, 0x85, 0x51);
|
||||
// gc2053_write_reg(dev, 0x86, 0x00);
|
||||
// gc2053_write_reg(dev, 0x87, 0x13);
|
||||
// gc2053_write_reg(dev, 0x88, 0x00);
|
||||
// gc2053_write_reg(dev, 0x89, 0x04);
|
||||
// gc2053_write_reg(dev, 0x8a, 0x00);
|
||||
// gc2053_write_reg(dev, 0x8b, 0x12);
|
||||
// gc2053_write_reg(dev, 0xfe, 0x00);
|
||||
|
||||
gc2053_write_reg(dev, 0xfe, 0x00);
|
||||
gc2053_write_reg(dev, 0x7f, 0x09);
|
||||
gc2053_write_reg(dev, 0x82, 0x0a);
|
||||
gc2053_write_reg(dev, 0x83, 0x0b);
|
||||
gc2053_write_reg(dev, 0x84, 0x80);
|
||||
gc2053_write_reg(dev, 0x85, 0x51);
|
||||
|
||||
SENSOR_PRINT("====== gc2053 slave setting init success!=======\n");
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc2053_init_image(xmedia_u32 dev, xmedia_u8 image_mode, xmedia_sensor_work_mode work_mode)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
switch(image_mode) {
|
||||
case GC2053_2M_10BIT_LINEAR_MODE:
|
||||
#ifdef GC2053_DVP
|
||||
ret = gc2053_dvp_linear_1920X1080_init(dev);
|
||||
break;
|
||||
#else
|
||||
ret = gc2053_2lane_linear_1920x1080_init(dev);
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support, please check image param!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
if (work_mode == XMEDIA_SENSOR_WORK_MODE_SLAVE && image_mode == GC2053_2M_10BIT_LINEAR_MODE) {
|
||||
gc2053_slave_init(dev);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc2053_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_gc2053_i2c_fd[dev] < 0) {
|
||||
SENSOR_PRINT("Sensor dev [%d], i2c not open. please init i2c at first.\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_set_slave_addr(g_gc2053_i2c_fd[dev], slave_addr);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
|
||||
i2c_close(g_gc2053_i2c_fd[dev]);
|
||||
g_gc2053_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
g_gc2053_i2c_addr[dev] = slave_addr;
|
||||
SENSOR_PRINT("Sensor dev [%d] set slave addr 0x%x success.\n", dev, slave_addr);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc2053_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_gc2053_i2c_fd[dev] >= 0) {
|
||||
SENSOR_PRINT("====== Sensor dev [%d], i2c already init !=======\n", dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
if (i2c_dev == SENSOR_I2C_INVALID) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Sensor i2c dev invalid! Please set i2c dev at first!\n");
|
||||
return XMEDIA_ERRCODE_NOT_CONFIG;
|
||||
}
|
||||
|
||||
g_gc2053_i2c_fd[dev] = i2c_open(i2c_dev);
|
||||
if (g_gc2053_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Open /dev/i2c_drv-%u error!\n", i2c_dev);
|
||||
return XMEDIA_ERRCODE_OPEN_FAILED;
|
||||
}
|
||||
|
||||
ret = gc2053_set_slave_addr(dev, i2c_addr);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
|
||||
SENSOR_PRINT("====== i2c[%d] init success!=======\n", i2c_dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc2053_i2c_exit(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
ret = i2c_close(g_gc2053_i2c_fd[dev]);
|
||||
if(ret < 0 ){
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] close i2c failed!\n", dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
g_gc2053_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc2053_read_reg(xmedia_u32 dev, xmedia_u32 addr,xmedia_u32 *data)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[GC2053_DATA_BYTE];
|
||||
|
||||
if (g_gc2053_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_read(g_gc2053_i2c_fd[dev], g_gc2053_i2c_addr[dev], addr, GC2053_ADDR_BYTE, buf, GC2053_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] read i2c addr [0x%X] failed!\n", dev, addr);
|
||||
return ret;
|
||||
}
|
||||
|
||||
*data = buf[0]; //GC2053_DATA_BYTE == 1
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc2053_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data)
|
||||
{
|
||||
xmedia_s32 idx = 0;
|
||||
xmedia_u8 buf[GC2053_ADDR_BYTE + GC2053_DATA_BYTE];
|
||||
xmedia_s32 ret = 0;
|
||||
|
||||
if (g_gc2053_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not open!\n", dev);
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
// if (GC2053_ADDR_BYTE == 2) {
|
||||
// buf[idx] = (addr >> 8) & 0xff;
|
||||
// idx++;
|
||||
// buf[idx] = addr & 0xff;
|
||||
// idx++;
|
||||
// } else {
|
||||
buf[idx] = addr & 0xFF; //GC2053_ADDR_BYTE == 1
|
||||
idx++;
|
||||
// }
|
||||
|
||||
// if (GC2053_DATA_BYTE == 2) {
|
||||
// buf[idx] = (data >> 8) & 0xff;
|
||||
// idx++;
|
||||
// buf[idx] = data & 0xff;
|
||||
// idx++;
|
||||
// } else {
|
||||
buf[idx] = data & 0xFF; //GC2053_DATA_BYTE == 1
|
||||
// idx++;
|
||||
// }
|
||||
|
||||
ret = i2c_write(g_gc2053_i2c_fd[dev], g_gc2053_i2c_addr[dev], buf, GC2053_ADDR_BYTE + GC2053_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_WRITE error!\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc2053_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u32 mirror_flip_type;
|
||||
|
||||
gc2053_read_reg(dev, GC2053_REG_ADDR_MIRROR_FLIP, &mirror_flip_type);
|
||||
|
||||
if (mirror_en) {
|
||||
mirror_flip_type |= 0x01;
|
||||
} else {
|
||||
mirror_flip_type &= 0xFE;
|
||||
}
|
||||
|
||||
if (flip_en) {
|
||||
mirror_flip_type |= 0x02;
|
||||
} else {
|
||||
mirror_flip_type &= 0xFD;
|
||||
}
|
||||
|
||||
ret = gc2053_write_reg(dev, GC2053_REG_ADDR_MIRROR_FLIP, mirror_flip_type);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sc8238_write_reg failed\n");
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
@@ -0,0 +1,31 @@
|
||||
#ifndef __GC2053_CTRL_H__
|
||||
#define __GC2053_CTRL_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define GC2053_I2C_ADDR 0x6e
|
||||
#define GC2053_ADDR_BYTE 1
|
||||
#define GC2053_DATA_BYTE 1
|
||||
|
||||
//#define GC2053_DVP //DVP模式下需定义此宏，MIPI模式则不需要定义此宏
|
||||
|
||||
// gc2053 specs list
|
||||
#define GC2053_2M_10BIT_LINEAR_MODE 1
|
||||
|
||||
xmedia_s32 gc2053_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr);
|
||||
xmedia_s32 gc2053_i2c_exit(xmedia_u32 dev);
|
||||
xmedia_s32 gc2053_read_reg(xmedia_u32 dev, xmedia_u32 addr,xmedia_u32 *data);
|
||||
xmedia_s32 gc2053_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data);
|
||||
xmedia_s32 gc2053_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en);
|
||||
xmedia_s32 gc2053_init_image(xmedia_u32 dev, xmedia_u8 img_mode, xmedia_sensor_work_mode work_mode);
|
||||
xmedia_s32 gc2053_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
+171
@@ -0,0 +1,171 @@
|
||||
|
||||
// Piris attr
|
||||
static const xmedia_isp_piris_attr g_gc2053_piris_attr = {
|
||||
0,
|
||||
1,
|
||||
94,
|
||||
62,
|
||||
// Step-F number mapping table. Must be from small to large. F1.0 is 1024 and F32.0 is 1
|
||||
{30, 35, 40, 45, 50, 56, 61, 67, 73, 79, 85, 92, 98, 105, 112, 120, 127, 135, 143, 150, 158,
|
||||
166, 174, 183, 191, 200, 208, 217, 225, 234, 243, 252, 261, 270, 279, 289, 298, 307, 316, 325, 335, 344,
|
||||
353, 362, 372, 381, 390, 399, 408, 417, 426, 435, 444, 453, 462, 470, 478, 486, 493, 500, 506, 512},
|
||||
XMEDIA_ISP_IRIS_F_NO_1_4,
|
||||
XMEDIA_ISP_IRIS_F_NO_5_6
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_ccm g_gc2053_awb_ccm = {
|
||||
4,
|
||||
{
|
||||
{
|
||||
6240,
|
||||
{
|
||||
0x023B, 0x8121, 0x801A,
|
||||
0x8062, 0x0230, 0x80CE,
|
||||
0x8001, 0x8106, 0x0207
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
4950,
|
||||
{
|
||||
656, 33122, 32814,
|
||||
32887, 551, 32944,
|
||||
5, 33119, 602
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
3930,
|
||||
{
|
||||
0x02AC, 0x816B, 0x8041,
|
||||
0x807C, 0x0209, 0x808D,
|
||||
0x000F, 0x8176, 0x0267
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
2810,
|
||||
{
|
||||
0x022E, 0x8143, 0x0015,
|
||||
0x807D, 0x01D8, 0x805B,
|
||||
0x0019, 0x82D2, 0x03B9
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
1600,
|
||||
{
|
||||
0x0100, 0x0000, 0x0000,
|
||||
0x0000, 0x0100, 0x0000,
|
||||
0x0000, 0x0000, 0x0100
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
1400,
|
||||
{
|
||||
0x0100, 0x0000, 0x0000,
|
||||
0x0000, 0x0100, 0x0000,
|
||||
0x0000, 0x0000, 0x0100
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
1000,
|
||||
{
|
||||
0x0100, 0x0000, 0x0000,
|
||||
0x0000, 0x0100, 0x0000,
|
||||
0x0000, 0x0000, 0x0100
|
||||
},
|
||||
},
|
||||
|
||||
},
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_gc2053_awb_agc_table = {
|
||||
// bvalid
|
||||
1,
|
||||
|
||||
// saturation
|
||||
// 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768
|
||||
{ 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60, 60 }
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_ccm g_gc2053_awb_wdr_ccm = {
|
||||
3,
|
||||
{
|
||||
{
|
||||
6240,
|
||||
{
|
||||
0x01C8, 0x80B6, 0x8012,
|
||||
0x8032, 0x0184, 0x8052,
|
||||
0x8003, 0x809B, 0x019E
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
3930,
|
||||
{
|
||||
0x0229, 0x80F2, 0x8037,
|
||||
0x8049, 0x0186, 0x803D,
|
||||
0x0002, 0x80C2, 0x01C0
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
2810,
|
||||
{
|
||||
0x01CB, 0x80B0, 0x801B,
|
||||
0x8048, 0x0189, 0x8041,
|
||||
0x0004, 0x8144, 0x0240
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
2100,
|
||||
{
|
||||
0x0100, 0x0000, 0x0000,
|
||||
0x0000, 0x0100, 0x0000,
|
||||
0x0000, 0x0000, 0x0100
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
1600,
|
||||
{
|
||||
0x0100, 0x0000, 0x0000,
|
||||
0x0000, 0x0100, 0x0000,
|
||||
0x0000, 0x0000, 0x0100
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
1400,
|
||||
{
|
||||
0x0100, 0x0000, 0x0000,
|
||||
0x0000, 0x0100, 0x0000,
|
||||
0x0000, 0x0000, 0x0100
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
1000,
|
||||
{
|
||||
0x0100, 0x0000, 0x0000,
|
||||
0x0000, 0x0100, 0x0000,
|
||||
0x0000, 0x0000, 0x0100
|
||||
},
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_gc2053_awb_wdr_agc_table = {
|
||||
// bvalid
|
||||
1,
|
||||
|
||||
// saturation
|
||||
//{ 90, 90, 85, 75, 70, 65, 65, 65, 60, 60, 60, 60, 60, 60, 60, 60 }
|
||||
{ 75, 75, 70, 70, 70, 65, 65, 65, 60, 60, 60, 60, 60, 60, 60, 60 }
|
||||
};
|
||||
|
||||
|
||||
@@ -0,0 +1,5 @@
|
||||
ifneq ($(MCU), )
|
||||
include Makefile.riscv
|
||||
else
|
||||
include Makefile.linux
|
||||
endif
|
||||
@@ -0,0 +1,21 @@
|
||||
ISP_DIR := $(shell cd ../.. && /bin/pwd)
|
||||
SDK_DIR ?= $(shell cd $(ISP_DIR)/../../../.. && /bin/pwd)
|
||||
|
||||
include $(SDK_DIR)/build/base.mk
|
||||
include $(ISP_DIR)/sensor/plat.mk
|
||||
|
||||
LIB_NAME := libsns_gc2083
|
||||
|
||||
SRCS := $(wildcard *.c)
|
||||
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/usr/include
|
||||
SDK_USR_CFLAGS += -I$(ISP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I$(ISP_DIR)/../include
|
||||
SDK_USR_CFLAGS += -I.
|
||||
AT := @
|
||||
|
||||
$(info SRCS=$(SRCS))
|
||||
|
||||
include $(SDK_DIR)/build/sdk_lib_rules.mk
|
||||
|
||||
@@ -0,0 +1,2 @@
|
||||
SRCS-y += gc2083.c
|
||||
SRCS-y += gc2083_ctrl.c
|
||||
+1376
File diff suppressed because it is too large
Load Diff
+71
@@ -0,0 +1,71 @@
|
||||
#ifndef __GC2083_H__
|
||||
#define __GC2083_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// sensor fps mode
|
||||
#define GC2083_FULL_LINES_MAX 0x3FFF
|
||||
#define GC2083_VMAX_2M_LINEAR 1125
|
||||
|
||||
#define GC2083_EXP_OFFSET_LINEAR 2
|
||||
#define GC2083_S_EXP_MAX_DEFAULT_1620P 0xcc
|
||||
|
||||
// the value of the gc2083 exposure register is in half line units, (<< 1) for AE calculation, (>> 1) for EXP reg
|
||||
#define GC2083_EXP_SHIFT 1
|
||||
|
||||
#define GC2083_REG_ADDR_EXP_H 0x0d04
|
||||
#define GC2083_REG_ADDR_EXP_L 0x0d03
|
||||
#define GC2083_REG_ADDR_AGAIN_1 0x00d0
|
||||
#define GC2083_REG_ADDR_AGAIN_2 0x0155
|
||||
#define GC2083_REG_ADDR_AGAIN_3 0x0410
|
||||
#define GC2083_REG_ADDR_AGAIN_4 0x0411
|
||||
#define GC2083_REG_ADDR_AGAIN_5 0x0412
|
||||
#define GC2083_REG_ADDR_AGAIN_6 0x0413
|
||||
#define GC2083_REG_ADDR_AGAIN_7 0x0414
|
||||
#define GC2083_REG_ADDR_AGAIN_8 0x0415
|
||||
#define GC2083_REG_ADDR_AGAIN_9 0x0416
|
||||
#define GC2083_REG_ADDR_AGAIN_10 0x0417
|
||||
#define GC2083_REG_ADDR_AGAIN_11 0x00b8
|
||||
#define GC2083_REG_ADDR_AGAIN_12 0x00b9
|
||||
#define GC2083_REG_ADDR_AGAIN_13 0x031d
|
||||
#define GC2083_REG_ADDR_AGAIN_14 0x0dc1
|
||||
#define GC2083_REG_ADDR_AGAIN_15 0x031d
|
||||
#define GC2083_REG_ADDR_DGAIN_H 0x00b1
|
||||
#define GC2083_REG_ADDR_DGAIN_L 0x00b2
|
||||
#define GC2083_REG_ADDR_VMAX_H 0x0d41
|
||||
#define GC2083_REG_ADDR_VMAX_L 0x0d42
|
||||
|
||||
typedef enum {
|
||||
GC2083_REG_EXP_H = 0,
|
||||
GC2083_REG_EXP_L,
|
||||
GC2083_REG_AGAIN_1,
|
||||
GC2083_REG_AGAIN_2,
|
||||
GC2083_REG_AGAIN_3,
|
||||
GC2083_REG_AGAIN_4,
|
||||
GC2083_REG_AGAIN_5,
|
||||
GC2083_REG_AGAIN_6,
|
||||
GC2083_REG_AGAIN_7,
|
||||
GC2083_REG_AGAIN_8,
|
||||
GC2083_REG_AGAIN_9,
|
||||
GC2083_REG_AGAIN_10,
|
||||
GC2083_REG_AGAIN_11,
|
||||
GC2083_REG_AGAIN_12,
|
||||
GC2083_REG_AGAIN_13,
|
||||
GC2083_REG_AGAIN_14,
|
||||
GC2083_REG_AGAIN_15,
|
||||
GC2083_REG_DGAIN_H,
|
||||
GC2083_REG_DGAIN_L,
|
||||
GC2083_REG_VMAX_H, // VMAX_H需先于VMAX_L更新
|
||||
GC2083_REG_VMAX_L,
|
||||
GC2083_REG_MAX_NUM
|
||||
} gc2083_reg_info;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __GC2083_H__
|
||||
+360
@@ -0,0 +1,360 @@
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "i2c_dev.h"
|
||||
#include "gc2083.h"
|
||||
#include "gc2083_ctrl.h"
|
||||
|
||||
SENSOR_PRIORITY_DATA static xmedia_s32 g_gc2083_i2c_addr[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
SENSOR_PRIORITY_DATA static xmedia_s32 g_gc2083_i2c_fd[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
|
||||
/*
|
||||
* 函数功能: gc2083 MIPI 2lane 1080p线性模式初始化序列 - 1920x1080x30fps
|
||||
* 函数参数：
|
||||
* dev - sensor 设备号
|
||||
* 返回值：
|
||||
*
|
||||
*/
|
||||
SENSOR_PRIORITY_FUNC static xmedia_s32 gc2083_2lane_linear_1920x1080_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
//system
|
||||
ret |= gc2083_write_reg(dev, 0x03fe, 0xf0);
|
||||
ret |= gc2083_write_reg(dev, 0x03fe, 0xf0);
|
||||
ret |= gc2083_write_reg(dev, 0x03fe, 0xf0);
|
||||
ret |= gc2083_write_reg(dev, 0x03fe, 0x00);
|
||||
ret |= gc2083_write_reg(dev, 0x03f2, 0x00);
|
||||
ret |= gc2083_write_reg(dev, 0x03f3, 0x00);
|
||||
ret |= gc2083_write_reg(dev, 0x03f4, 0x36);
|
||||
ret |= gc2083_write_reg(dev, 0x03f5, 0xc0);
|
||||
ret |= gc2083_write_reg(dev, 0x03f6, 0x24);
|
||||
ret |= gc2083_write_reg(dev, 0x03f7, 0x01);
|
||||
ret |= gc2083_write_reg(dev, 0x03f8, 0x2c);
|
||||
ret |= gc2083_write_reg(dev, 0x03f9, 0x43);
|
||||
ret |= gc2083_write_reg(dev, 0x03fc, 0x8e);
|
||||
ret |= gc2083_write_reg(dev, 0x0381, 0x07);
|
||||
ret |= gc2083_write_reg(dev, 0x00d7, 0x29);
|
||||
//CISCTL & ANALOG
|
||||
ret |= gc2083_write_reg(dev, 0x0d6d, 0x18);
|
||||
ret |= gc2083_write_reg(dev, 0x00d5, 0x03);
|
||||
ret |= gc2083_write_reg(dev, 0x0082, 0x01);
|
||||
ret |= gc2083_write_reg(dev, 0x0db3, 0xd4);
|
||||
ret |= gc2083_write_reg(dev, 0x0db0, 0x0d);
|
||||
ret |= gc2083_write_reg(dev, 0x0db5, 0x96);
|
||||
ret |= gc2083_write_reg(dev, 0x0d03, 0x02);
|
||||
ret |= gc2083_write_reg(dev, 0x0d04, 0x02);
|
||||
ret |= gc2083_write_reg(dev, 0x0d05, 0x05);
|
||||
ret |= gc2083_write_reg(dev, 0x0d06, 0xba);
|
||||
ret |= gc2083_write_reg(dev, 0x0d07, 0x00);
|
||||
ret |= gc2083_write_reg(dev, 0x0d08, 0x11);
|
||||
ret |= gc2083_write_reg(dev, 0x0d09, 0x00);
|
||||
ret |= gc2083_write_reg(dev, 0x0d0a, 0x02);
|
||||
ret |= gc2083_write_reg(dev, 0x000b, 0x00);
|
||||
ret |= gc2083_write_reg(dev, 0x000c, 0x02);
|
||||
ret |= gc2083_write_reg(dev, 0x0d0d, 0x04);
|
||||
ret |= gc2083_write_reg(dev, 0x0d0e, 0x40);
|
||||
ret |= gc2083_write_reg(dev, 0x000f, 0x07);
|
||||
ret |= gc2083_write_reg(dev, 0x0010, 0x90);
|
||||
ret |= gc2083_write_reg(dev, 0x0017, 0x0c);
|
||||
ret |= gc2083_write_reg(dev, 0x0d73, 0x92);
|
||||
ret |= gc2083_write_reg(dev, 0x0076, 0x00);
|
||||
ret |= gc2083_write_reg(dev, 0x0d76, 0x00);
|
||||
ret |= gc2083_write_reg(dev, 0x0d41, 0x04);
|
||||
ret |= gc2083_write_reg(dev, 0x0d42, 0x65);
|
||||
ret |= gc2083_write_reg(dev, 0x0d7a, 0x10);
|
||||
ret |= gc2083_write_reg(dev, 0x0d19, 0x31);
|
||||
ret |= gc2083_write_reg(dev, 0x0d25, 0x0b);
|
||||
ret |= gc2083_write_reg(dev, 0x0d20, 0x60);
|
||||
ret |= gc2083_write_reg(dev, 0x0d27, 0x03);
|
||||
ret |= gc2083_write_reg(dev, 0x0d29, 0x60);
|
||||
ret |= gc2083_write_reg(dev, 0x0d43, 0x10);
|
||||
ret |= gc2083_write_reg(dev, 0x0d49, 0x10);
|
||||
ret |= gc2083_write_reg(dev, 0x0d55, 0x18);
|
||||
ret |= gc2083_write_reg(dev, 0x0dc2, 0x44);
|
||||
ret |= gc2083_write_reg(dev, 0x0058, 0x3c);
|
||||
ret |= gc2083_write_reg(dev, 0x00d8, 0x68);
|
||||
ret |= gc2083_write_reg(dev, 0x00d9, 0x14);
|
||||
ret |= gc2083_write_reg(dev, 0x00da, 0xc1);
|
||||
ret |= gc2083_write_reg(dev, 0x0050, 0x18);
|
||||
ret |= gc2083_write_reg(dev, 0x0db6, 0x3d);
|
||||
ret |= gc2083_write_reg(dev, 0x00d2, 0xbc);
|
||||
ret |= gc2083_write_reg(dev, 0x0d66, 0x42);
|
||||
ret |= gc2083_write_reg(dev, 0x008c, 0x07);
|
||||
ret |= gc2083_write_reg(dev, 0x008d, 0xff);
|
||||
//gain
|
||||
ret |= gc2083_write_reg(dev, 0x007a, 0x50); //global gain
|
||||
ret |= gc2083_write_reg(dev, 0x00d0, 0x00);
|
||||
ret |= gc2083_write_reg(dev, 0x0dc1, 0x00);
|
||||
//isp
|
||||
ret |= gc2083_write_reg(dev, 0x0102, 0xa9); //89
|
||||
ret |= gc2083_write_reg(dev, 0x0158, 0x00);
|
||||
ret |= gc2083_write_reg(dev, 0x0107, 0xa6);
|
||||
ret |= gc2083_write_reg(dev, 0x0108, 0xa9);
|
||||
ret |= gc2083_write_reg(dev, 0x0109, 0xa8);
|
||||
ret |= gc2083_write_reg(dev, 0x010a, 0xa7);
|
||||
ret |= gc2083_write_reg(dev, 0x010b, 0xff);
|
||||
ret |= gc2083_write_reg(dev, 0x010c, 0xff);
|
||||
ret |= gc2083_write_reg(dev, 0x0428, 0x86);//84
|
||||
ret |= gc2083_write_reg(dev, 0x0429, 0x86);//84
|
||||
ret |= gc2083_write_reg(dev, 0x042a, 0x86);//84
|
||||
ret |= gc2083_write_reg(dev, 0x042b, 0x68);//84
|
||||
ret |= gc2083_write_reg(dev, 0x042c, 0x68);//84
|
||||
ret |= gc2083_write_reg(dev, 0x042d, 0x68);//84
|
||||
ret |= gc2083_write_reg(dev, 0x042e, 0x68);//83
|
||||
ret |= gc2083_write_reg(dev, 0x042f, 0x68);//82
|
||||
ret |= gc2083_write_reg(dev, 0x0430, 0x4f);//82
|
||||
ret |= gc2083_write_reg(dev, 0x0431, 0x68);//82
|
||||
ret |= gc2083_write_reg(dev, 0x0432, 0x67);//82
|
||||
ret |= gc2083_write_reg(dev, 0x0433, 0x66);//82
|
||||
ret |= gc2083_write_reg(dev, 0x0434, 0x66);//82
|
||||
ret |= gc2083_write_reg(dev, 0x0435, 0x66);//82
|
||||
ret |= gc2083_write_reg(dev, 0x0436, 0x66);//64
|
||||
ret |= gc2083_write_reg(dev, 0x0437, 0x66);//68
|
||||
ret |= gc2083_write_reg(dev, 0x0438, 0x62);
|
||||
ret |= gc2083_write_reg(dev, 0x0439, 0x62);
|
||||
ret |= gc2083_write_reg(dev, 0x043a, 0x62);
|
||||
ret |= gc2083_write_reg(dev, 0x043b, 0x62);
|
||||
ret |= gc2083_write_reg(dev, 0x043c, 0x62);
|
||||
ret |= gc2083_write_reg(dev, 0x043d, 0x62);
|
||||
ret |= gc2083_write_reg(dev, 0x043e, 0x62);
|
||||
ret |= gc2083_write_reg(dev, 0x043f, 0x62);
|
||||
//dark sun
|
||||
ret |= gc2083_write_reg(dev, 0x0077, 0x01); //01 settle_en
|
||||
ret |= gc2083_write_reg(dev, 0x0078, 0x65); //settle_exp_th
|
||||
ret |= gc2083_write_reg(dev, 0x0079, 0x04); //settle_exp_th
|
||||
ret |= gc2083_write_reg(dev, 0x0067, 0xa0); //settle_ref_th
|
||||
ret |= gc2083_write_reg(dev, 0x0054, 0xff); //settle_sig_th
|
||||
ret |= gc2083_write_reg(dev, 0x0055, 0x02); //settle_sig_th
|
||||
ret |= gc2083_write_reg(dev, 0x0056, 0x00); //settle_colgain_th
|
||||
ret |= gc2083_write_reg(dev, 0x0057, 0x04); //settle_colgain_th
|
||||
ret |= gc2083_write_reg(dev, 0x005a, 0xff); //settle_data_value
|
||||
ret |= gc2083_write_reg(dev, 0x005b, 0x07); //settle_data_value
|
||||
//blk
|
||||
ret |= gc2083_write_reg(dev, 0x0026, 0x01);
|
||||
ret |= gc2083_write_reg(dev, 0x0152, 0x02);
|
||||
ret |= gc2083_write_reg(dev, 0x0153, 0x50);
|
||||
ret |= gc2083_write_reg(dev, 0x0155, 0x93);
|
||||
ret |= gc2083_write_reg(dev, 0x0410, 0x16);
|
||||
ret |= gc2083_write_reg(dev, 0x0411, 0x16);
|
||||
ret |= gc2083_write_reg(dev, 0x0412, 0x16);
|
||||
ret |= gc2083_write_reg(dev, 0x0413, 0x16);
|
||||
ret |= gc2083_write_reg(dev, 0x0414, 0x6f);
|
||||
ret |= gc2083_write_reg(dev, 0x0415, 0x6f);
|
||||
ret |= gc2083_write_reg(dev, 0x0416, 0x6f);
|
||||
ret |= gc2083_write_reg(dev, 0x0417, 0x6f);
|
||||
ret |= gc2083_write_reg(dev, 0x04e0, 0x18);
|
||||
//window
|
||||
ret |= gc2083_write_reg(dev, 0x0192, 0x02);
|
||||
ret |= gc2083_write_reg(dev, 0x0194, 0x02);
|
||||
ret |= gc2083_write_reg(dev, 0x0195, 0x04);
|
||||
ret |= gc2083_write_reg(dev, 0x0196, 0x38);
|
||||
ret |= gc2083_write_reg(dev, 0x0197, 0x07);
|
||||
ret |= gc2083_write_reg(dev, 0x0198, 0x80);
|
||||
//DVP & MIPI
|
||||
ret |= gc2083_write_reg(dev, 0x0201, 0x27); //20//27[6:5]clkctr [2]phy-lane1_en [1]phy-lane0_en [0]phy_clk_en
|
||||
ret |= gc2083_write_reg(dev, 0x0202, 0x53); //56//[7:6]data1ctr [5:4]data0ctr [3:0]mipi_diff
|
||||
|
||||
//b2//b6[7]clklane_p2s_sel [6:5]data0hs_ph [4]data0_delay1s [3]clkdelay1s [2]mipi_en [1:0]clkhs_ph
|
||||
ret |= gc2083_write_reg(dev, 0x0203, 0xce);
|
||||
ret |= gc2083_write_reg(dev, 0x0204, 0x40);
|
||||
ret |= gc2083_write_reg(dev, 0x0212, 0x07);
|
||||
ret |= gc2083_write_reg(dev, 0x0213, 0x80); //LWC
|
||||
ret |= gc2083_write_reg(dev, 0x0215, 0x12); //[1:0]clk_lane_mode
|
||||
ret |= gc2083_write_reg(dev, 0x0229, 0x05);
|
||||
ret |= gc2083_write_reg(dev, 0x0237, 0x03);
|
||||
|
||||
//91//40//91[7]lane_ena [6]DVPBUF_ena [5]ULPEna [4]MIPI_ena [3]mipi_set_auto_disable
|
||||
//[2]RAW8_mode [1]ine_sync_mode [0]double_lane_enff 03fe 00
|
||||
ret |= gc2083_write_reg(dev, 0x023e, 0x99);
|
||||
printf("===Galaxycore GC2083_1080P_30FPS_10BIT_LINEAR_Init_OK!===\n");
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc2083_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
} else {
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
SENSOR_PRINT("===== GC2083_27MInput_MIPI_2lane_10bit_1920x1080_30fps linear init success!======\n");
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
static xmedia_void gc2083_slave_init(xmedia_u32 dev)
|
||||
{
|
||||
gc2083_write_reg(dev, 0x0068, 0x93);
|
||||
gc2083_write_reg(dev, 0x0069, 0x00);
|
||||
gc2083_write_reg(dev, 0x0d67, 0x00);
|
||||
gc2083_write_reg(dev, 0x0d69, 0x30);
|
||||
gc2083_write_reg(dev, 0x0d6a, 0x08);
|
||||
gc2083_write_reg(dev, 0x0d6b, 0x70);
|
||||
gc2083_write_reg(dev, 0x0d6c, 0x00);
|
||||
gc2083_write_reg(dev, 0x0d6d, 0x13);
|
||||
gc2083_write_reg(dev, 0x0d6e, 0x00);
|
||||
gc2083_write_reg(dev, 0x0d6f, 0x04);
|
||||
gc2083_write_reg(dev, 0x0d70, 0x00);
|
||||
gc2083_write_reg(dev, 0x0d71, 0x12);
|
||||
|
||||
SENSOR_PRINT("====== GC2083 slave setting init success!=======\n");
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc2083_init_image(xmedia_u32 dev, xmedia_u8 image_mode, xmedia_sensor_work_mode work_mode)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
switch(image_mode) {
|
||||
case GC2083_2M_10BIT_LINEAR_MODE:
|
||||
ret = gc2083_2lane_linear_1920x1080_init(dev);
|
||||
break;
|
||||
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support, please check image param!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
if (work_mode == XMEDIA_SENSOR_WORK_MODE_SLAVE && image_mode == GC2083_2M_10BIT_LINEAR_MODE) {
|
||||
gc2083_slave_init(dev);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc2083_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_gc2083_i2c_fd[dev] < 0) {
|
||||
SENSOR_PRINT("Sensor dev [%d], i2c not open. please init i2c at first.\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_set_slave_addr(g_gc2083_i2c_fd[dev], slave_addr);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
|
||||
i2c_close(g_gc2083_i2c_fd[dev]);
|
||||
g_gc2083_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
g_gc2083_i2c_addr[dev] = slave_addr;
|
||||
SENSOR_PRINT("Sensor dev [%d] set slave addr 0x%x success.\n", dev, slave_addr);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc2083_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_gc2083_i2c_fd[dev] >= 0) {
|
||||
SENSOR_PRINT("====== Sensor dev [%d], i2c already init !=======\n", dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
if (i2c_dev == SENSOR_I2C_INVALID) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Sensor i2c dev invalid! Please set i2c dev at first!\n");
|
||||
return XMEDIA_ERRCODE_NOT_CONFIG;
|
||||
}
|
||||
|
||||
g_gc2083_i2c_fd[dev] = i2c_open(i2c_dev);
|
||||
if (g_gc2083_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Open /dev/i2c_drv-%u error!\n", i2c_dev);
|
||||
return XMEDIA_ERRCODE_OPEN_FAILED;
|
||||
}
|
||||
|
||||
ret = gc2083_set_slave_addr(dev, i2c_addr);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
SENSOR_PRINT("====== i2c[%d] init success!=======\n", i2c_dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc2083_i2c_exit(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
ret = i2c_close(g_gc2083_i2c_fd[dev]);
|
||||
if(ret < 0 ) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] close i2c failed!\n", dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
g_gc2083_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc2083_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[GC2083_DATA_BYTE];
|
||||
|
||||
if (g_gc2083_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_read(g_gc2083_i2c_fd[dev], g_gc2083_i2c_addr[dev], addr, GC2083_ADDR_BYTE, buf, GC2083_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] read i2c addr [0x%X] failed!\n", dev, addr);
|
||||
return ret;
|
||||
}
|
||||
|
||||
*data = buf[0]; //GC2083_DATA_BYTE == 1
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc2083_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data)
|
||||
{
|
||||
xmedia_u32 idx = 0;
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[8];
|
||||
|
||||
if (g_gc2083_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
buf[idx] = (addr >> 8) & 0xff;
|
||||
idx++;
|
||||
buf[idx] = addr & 0xff;
|
||||
idx++;
|
||||
buf[idx] = data & 0xff;
|
||||
|
||||
ret = i2c_write(g_gc2083_i2c_fd[dev], g_gc2083_i2c_addr[dev], buf, GC2083_ADDR_BYTE + GC2083_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_WRITE error!\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc2083_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en)
|
||||
{
|
||||
xmedia_s32 ret = 0;
|
||||
|
||||
if ((!mirror_en) && (!flip_en)) {
|
||||
ret |= gc2083_write_reg(dev, 0x0015, 0x00);
|
||||
ret |= gc2083_write_reg(dev, 0x0d15, 0x00);
|
||||
ret |= gc2083_write_reg(dev, 0x0192, 0x02);
|
||||
} else if((mirror_en) && (!flip_en)) {
|
||||
ret |= gc2083_write_reg(dev, 0x0015, 0x01);
|
||||
ret |= gc2083_write_reg(dev, 0x0d15, 0x00);
|
||||
ret |= gc2083_write_reg(dev, 0x0192, 0x02);
|
||||
} else if((!mirror_en) && (flip_en)) {
|
||||
ret |= gc2083_write_reg(dev, 0x0015, 0x00);
|
||||
ret |= gc2083_write_reg(dev, 0x0d15, 0x02);
|
||||
ret |= gc2083_write_reg(dev, 0x0192, 0x03);
|
||||
} else {
|
||||
ret |= gc2083_write_reg(dev, 0x0015, 0x01);
|
||||
ret |= gc2083_write_reg(dev, 0x0d15, 0x02);
|
||||
ret |= gc2083_write_reg(dev, 0x0192, 0x03);
|
||||
}
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc2083_write_reg failed\n");
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
@@ -0,0 +1,29 @@
|
||||
#ifndef __GC2083_CTRL_H__
|
||||
#define __GC2083_CTRL_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define GC2083_I2C_ADDR 0x6E
|
||||
#define GC2083_ADDR_BYTE 2
|
||||
#define GC2083_DATA_BYTE 1
|
||||
|
||||
// gc2083 specs list
|
||||
#define GC2083_2M_10BIT_LINEAR_MODE 1
|
||||
|
||||
xmedia_s32 gc2083_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr);
|
||||
xmedia_s32 gc2083_i2c_exit(xmedia_u32 dev);
|
||||
xmedia_s32 gc2083_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data);
|
||||
xmedia_s32 gc2083_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data);
|
||||
xmedia_s32 gc2083_init_image(xmedia_u32 dev, xmedia_u8 image_mode, xmedia_sensor_work_mode work_mode);
|
||||
xmedia_s32 gc2083_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en);
|
||||
xmedia_s32 gc2083_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //__GC2083_CTRL_H__
|
||||
+84
@@ -0,0 +1,84 @@
|
||||
#ifndef __GC2083_EX_H__
|
||||
#define __GC2083_EX_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// Piris attr
|
||||
static const xmedia_isp_piris_attr g_gc2083_piris_attr = {
|
||||
0,
|
||||
1,
|
||||
94,
|
||||
62,
|
||||
// Step-F number mapping table. Must be from small to large. F1.0 is 1024 and F32.0 is 1
|
||||
{30, 35, 40, 45, 50, 56, 61, 67, 73, 79, 85, 92, 98, 105, 112, 120, 127, 135, 143, 150, 158,
|
||||
166, 174, 183, 191, 200, 208, 217, 225, 234, 243, 252, 261, 270, 279, 289, 298, 307, 316, 325, 335, 344,
|
||||
353, 362, 372, 381, 390, 399, 408, 417, 426, 435, 444, 453, 462, 470, 478, 486, 493, 500, 506, 512},
|
||||
XMEDIA_ISP_IRIS_F_NO_1_4,
|
||||
XMEDIA_ISP_IRIS_F_NO_5_6
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_ccm g_gc2083_awb_ccm = {
|
||||
4,
|
||||
{
|
||||
{
|
||||
6150,
|
||||
{
|
||||
0x01F3, 0x80E1, 0x8012,
|
||||
0x8054, 0x019E, 0x804A,
|
||||
0x8001, 0x80E2, 0x01E3
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
4850,
|
||||
{
|
||||
0x01F6, 0x80D2, 0x8024,
|
||||
0x805C, 0x01A5, 0x8049,
|
||||
0x8005, 0x80FE, 0x0203
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
3650,
|
||||
{
|
||||
0x01E6, 0x805E, 0x8088,
|
||||
0x809A, 0x01FB, 0x8061,
|
||||
0x8024, 0x80FE, 0x0222
|
||||
},
|
||||
},
|
||||
{
|
||||
2650,
|
||||
{
|
||||
0x01F9, 0x80D5, 0x8024,
|
||||
0x8082, 0x01A9, 0x8027,
|
||||
0x802D, 0x821A, 0x0347
|
||||
},
|
||||
},
|
||||
|
||||
}
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_gc2083_awb_agc_ir_table = {
|
||||
// bvalid
|
||||
1,
|
||||
|
||||
// saturation
|
||||
// 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768
|
||||
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_gc2083_awb_agc_table = {
|
||||
// bvalid
|
||||
1,
|
||||
// saturation
|
||||
// 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768
|
||||
{120,120,115,110,100,90,95,90,72,64,56,56,56,56,56,56}
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,5 @@
|
||||
ifneq ($(MCU), )
|
||||
include Makefile.riscv
|
||||
else
|
||||
include Makefile.linux
|
||||
endif
|
||||
@@ -0,0 +1,19 @@
|
||||
ISP_DIR := $(shell cd ../.. && /bin/pwd)
|
||||
SDK_DIR ?= $(shell cd $(ISP_DIR)/../../../.. && /bin/pwd)
|
||||
|
||||
include $(SDK_DIR)/build/base.mk
|
||||
include $(ISP_DIR)/sensor/plat.mk
|
||||
|
||||
LIB_NAME := libsns_gc20b3
|
||||
|
||||
SRCS := $(wildcard *.c)
|
||||
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/usr/include
|
||||
SDK_USR_CFLAGS += -I$(ISP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I.
|
||||
|
||||
$(info SRCS=$(SRCS))
|
||||
|
||||
include $(SDK_DIR)/build/sdk_lib_rules.mk
|
||||
|
||||
@@ -0,0 +1,4 @@
|
||||
|
||||
SRCS-y += gc20b3.c
|
||||
SRCS-y += gc20b3_ctrl.c
|
||||
|
||||
+1365
File diff suppressed because it is too large
Load Diff
+54
@@ -0,0 +1,54 @@
|
||||
#ifndef __GC20B3_H__
|
||||
#define __GC20B3_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define GC20B3_VMAX_2M_LINEAR 1125
|
||||
|
||||
#define GC20B3_FULL_LINES_MAX 0x3FFF
|
||||
|
||||
// GC20B3 Register Address
|
||||
#define GC20B3_REG_ADDR_EXP_H 0x0d03 //BIT[13:8]
|
||||
#define GC20B3_REG_ADDR_EXP_L 0x0d04 //BIT[7:0]
|
||||
|
||||
#define GC20B3_REG_ADDR_AGC_L 0x00d0 //BIT[7:0]
|
||||
#define GC20B3_REG_ADDR_AGC_H 0x0dc1 //BIT[0]
|
||||
#define GC20B3_REG_ADDR_AGC3 0x00b8
|
||||
#define GC20B3_REG_ADDR_AGC4 0x00b9
|
||||
#define GC20B3_REG_ADDR_AGC5 0x0058
|
||||
#define GC20B3_REG_ADDR_COL_GC_H 0x0080
|
||||
#define GC20B3_REG_ADDR_COL_GC_L 0x0155
|
||||
#define GC20B3_REG_ADDR_DGC_H 0x00b1 //BIT[3:0]
|
||||
#define GC20B3_REG_ADDR_DGC_L 0x00b2 //BIT[7:2]
|
||||
|
||||
#define GC20B3_REG_ADDR_VMAX_H 0x0d41 //BIT[13:8]
|
||||
#define GC20B3_REG_ADDR_VMAX_L 0x0d42 //BIT[7:0]
|
||||
|
||||
#define GC20B3_EXP_OFFSET 8
|
||||
|
||||
typedef enum {
|
||||
GC20B3_REG_EXP_H = 0,
|
||||
GC20B3_REG_EXP_L,
|
||||
GC20B3_REG_AGC_L,
|
||||
GC20B3_REG_AGC_H,
|
||||
GC20B3_REG_AGC3,
|
||||
GC20B3_REG_AGC4,
|
||||
GC20B3_REG_AGC5,
|
||||
GC20B3_REG_COL_GC_H,
|
||||
GC20B3_REG_COL_GC_L,
|
||||
GC20B3_REG_DGC_H,
|
||||
GC20B3_REG_DGC_L,
|
||||
GC20B3_REG_VMAX_H,
|
||||
GC20B3_REG_VMAX_L,
|
||||
GC20B3_REG_L_MAX_NUM,
|
||||
} gc20b3_reg_index;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __GC20B3_H__
|
||||
+323
@@ -0,0 +1,323 @@
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "i2c_dev.h"
|
||||
#include "gc20b3.h"
|
||||
#include "gc20b3_ctrl.h"
|
||||
|
||||
static xmedia_s32 g_gc20b3_i2c_fd[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
static xmedia_s32 g_gc20b3_i2c_addr[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
|
||||
static xmedia_s32 gc20b3_2lane_linear_1920x1080_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
//00_GC20B3_MIPI2L_24M_1920x1080_30fps_raw10_linear
|
||||
//version 1.0
|
||||
//mclk 24Mhz
|
||||
//mipiclk 600Mbps/lane, wpllclk 200Mhz, rpllclk 150Mhz
|
||||
//framelength 1125
|
||||
//rowtime 29.629us
|
||||
//pattern rggb
|
||||
ret |= gc20b3_write_reg(dev, 0x03fe, 0xf0);
|
||||
ret |= gc20b3_write_reg(dev, 0x03fe, 0xf0);
|
||||
ret |= gc20b3_write_reg(dev, 0x03fe, 0xf0);
|
||||
ret |= gc20b3_write_reg(dev, 0x03fe, 0x00);
|
||||
ret |= gc20b3_write_reg(dev, 0x03f2, 0x00);
|
||||
ret |= gc20b3_write_reg(dev, 0x03f3, 0x00);
|
||||
ret |= gc20b3_write_reg(dev, 0x03f4, 0x36);
|
||||
ret |= gc20b3_write_reg(dev, 0x03f5, 0xc0);
|
||||
ret |= gc20b3_write_reg(dev, 0x03f6, 0x24);
|
||||
ret |= gc20b3_write_reg(dev, 0x03f7, 0x01);
|
||||
ret |= gc20b3_write_reg(dev, 0x03f8, 0x32);
|
||||
ret |= gc20b3_write_reg(dev, 0x03f9, 0x43);
|
||||
ret |= gc20b3_write_reg(dev, 0x03fc, 0x8e);
|
||||
ret |= gc20b3_write_reg(dev, 0x0381, 0x07);
|
||||
ret |= gc20b3_write_reg(dev, 0x00d7, 0x29);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d6d, 0x18);
|
||||
ret |= gc20b3_write_reg(dev, 0x00d5, 0x03);
|
||||
ret |= gc20b3_write_reg(dev, 0x0082, 0x01);
|
||||
ret |= gc20b3_write_reg(dev, 0x0db3, 0xd4);
|
||||
ret |= gc20b3_write_reg(dev, 0x0db0, 0x0d);
|
||||
ret |= gc20b3_write_reg(dev, 0x0db5, 0x96);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d03, 0x02);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d04, 0x02);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d05, 0x05);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d06, 0xc9);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d07, 0x00);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d08, 0x11);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d09, 0x00);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d0a, 0x02);
|
||||
ret |= gc20b3_write_reg(dev, 0x000b, 0x00);
|
||||
ret |= gc20b3_write_reg(dev, 0x000c, 0x02);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d0d, 0x04);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d0e, 0x40);
|
||||
ret |= gc20b3_write_reg(dev, 0x000f, 0x07);
|
||||
ret |= gc20b3_write_reg(dev, 0x0010, 0x90);
|
||||
ret |= gc20b3_write_reg(dev, 0x0017, 0x0c);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d73, 0x92);
|
||||
ret |= gc20b3_write_reg(dev, 0x0076, 0x00);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d76, 0x00);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d41, 0x04);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d42, 0x65);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d7a, 0x10);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d19, 0x31);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d25, 0x0b);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d20, 0x70);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d27, 0x03);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d29, 0x90);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d43, 0x25);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d49, 0x10);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d55, 0x18);
|
||||
ret |= gc20b3_write_reg(dev, 0x0dc2, 0x04);
|
||||
ret |= gc20b3_write_reg(dev, 0x0058, 0x3c);
|
||||
ret |= gc20b3_write_reg(dev, 0x00d8, 0x68);
|
||||
ret |= gc20b3_write_reg(dev, 0x00d9, 0x14);
|
||||
ret |= gc20b3_write_reg(dev, 0x00da, 0xc1);
|
||||
ret |= gc20b3_write_reg(dev, 0x0050, 0x18);
|
||||
ret |= gc20b3_write_reg(dev, 0x0db6, 0x3d);
|
||||
ret |= gc20b3_write_reg(dev, 0x00d2, 0xbc);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d66, 0x42);
|
||||
ret |= gc20b3_write_reg(dev, 0x008c, 0x07);
|
||||
ret |= gc20b3_write_reg(dev, 0x008d, 0xff);
|
||||
ret |= gc20b3_write_reg(dev, 0x007a, 0x50);
|
||||
ret |= gc20b3_write_reg(dev, 0x00d0, 0x00);
|
||||
ret |= gc20b3_write_reg(dev, 0x0dc1, 0x00);
|
||||
ret |= gc20b3_write_reg(dev, 0x0102, 0xa9);
|
||||
ret |= gc20b3_write_reg(dev, 0x0158, 0x00);
|
||||
ret |= gc20b3_write_reg(dev, 0x0107, 0xa6);
|
||||
ret |= gc20b3_write_reg(dev, 0x0108, 0xa9);
|
||||
ret |= gc20b3_write_reg(dev, 0x0109, 0xa8);
|
||||
ret |= gc20b3_write_reg(dev, 0x010a, 0xa7);
|
||||
ret |= gc20b3_write_reg(dev, 0x010b, 0xff);
|
||||
ret |= gc20b3_write_reg(dev, 0x010c, 0xff);
|
||||
ret |= gc20b3_write_reg(dev, 0x0428, 0x86);
|
||||
ret |= gc20b3_write_reg(dev, 0x0429, 0x86);
|
||||
ret |= gc20b3_write_reg(dev, 0x042a, 0x86);
|
||||
ret |= gc20b3_write_reg(dev, 0x042b, 0x68);
|
||||
ret |= gc20b3_write_reg(dev, 0x042c, 0x68);
|
||||
ret |= gc20b3_write_reg(dev, 0x042d, 0x68);
|
||||
ret |= gc20b3_write_reg(dev, 0x042e, 0x68);
|
||||
ret |= gc20b3_write_reg(dev, 0x042f, 0x68);
|
||||
ret |= gc20b3_write_reg(dev, 0x0430, 0x4f);
|
||||
ret |= gc20b3_write_reg(dev, 0x0431, 0x68);
|
||||
ret |= gc20b3_write_reg(dev, 0x0432, 0x67);
|
||||
ret |= gc20b3_write_reg(dev, 0x0433, 0x66);
|
||||
ret |= gc20b3_write_reg(dev, 0x0434, 0x66);
|
||||
ret |= gc20b3_write_reg(dev, 0x0435, 0x66);
|
||||
ret |= gc20b3_write_reg(dev, 0x0436, 0x66);
|
||||
ret |= gc20b3_write_reg(dev, 0x0437, 0x66);
|
||||
ret |= gc20b3_write_reg(dev, 0x0438, 0x62);
|
||||
ret |= gc20b3_write_reg(dev, 0x0439, 0x62);
|
||||
ret |= gc20b3_write_reg(dev, 0x043a, 0x62);
|
||||
ret |= gc20b3_write_reg(dev, 0x043b, 0x62);
|
||||
ret |= gc20b3_write_reg(dev, 0x043c, 0x62);
|
||||
ret |= gc20b3_write_reg(dev, 0x043d, 0x62);
|
||||
ret |= gc20b3_write_reg(dev, 0x043e, 0x62);
|
||||
ret |= gc20b3_write_reg(dev, 0x043f, 0x62);
|
||||
ret |= gc20b3_write_reg(dev, 0x0077, 0x01);
|
||||
ret |= gc20b3_write_reg(dev, 0x0078, 0x65);
|
||||
ret |= gc20b3_write_reg(dev, 0x0079, 0x04);
|
||||
ret |= gc20b3_write_reg(dev, 0x0067, 0xa0);
|
||||
ret |= gc20b3_write_reg(dev, 0x0054, 0xff);
|
||||
ret |= gc20b3_write_reg(dev, 0x0055, 0x02);
|
||||
ret |= gc20b3_write_reg(dev, 0x0056, 0x00);
|
||||
ret |= gc20b3_write_reg(dev, 0x0057, 0x04);
|
||||
ret |= gc20b3_write_reg(dev, 0x005a, 0xff);
|
||||
ret |= gc20b3_write_reg(dev, 0x005b, 0x07);
|
||||
ret |= gc20b3_write_reg(dev, 0x0026, 0x01);
|
||||
ret |= gc20b3_write_reg(dev, 0x0152, 0x02);
|
||||
ret |= gc20b3_write_reg(dev, 0x0153, 0x50);
|
||||
ret |= gc20b3_write_reg(dev, 0x0155, 0x05);
|
||||
ret |= gc20b3_write_reg(dev, 0x0410, 0x0b);
|
||||
ret |= gc20b3_write_reg(dev, 0x0411, 0x0a);
|
||||
ret |= gc20b3_write_reg(dev, 0x0412, 0x0a);
|
||||
ret |= gc20b3_write_reg(dev, 0x0413, 0x0b);
|
||||
ret |= gc20b3_write_reg(dev, 0x0414, 0x75);
|
||||
ret |= gc20b3_write_reg(dev, 0x0415, 0x76);
|
||||
ret |= gc20b3_write_reg(dev, 0x0416, 0x76);
|
||||
ret |= gc20b3_write_reg(dev, 0x0417, 0x75);
|
||||
ret |= gc20b3_write_reg(dev, 0x04e0, 0x18);
|
||||
ret |= gc20b3_write_reg(dev, 0x0192, 0x04);
|
||||
ret |= gc20b3_write_reg(dev, 0x0194, 0x04);
|
||||
ret |= gc20b3_write_reg(dev, 0x0195, 0x04);
|
||||
ret |= gc20b3_write_reg(dev, 0x0196, 0x38);
|
||||
ret |= gc20b3_write_reg(dev, 0x0197, 0x07);
|
||||
ret |= gc20b3_write_reg(dev, 0x0198, 0x80);
|
||||
ret |= gc20b3_write_reg(dev, 0x0201, 0x27);
|
||||
ret |= gc20b3_write_reg(dev, 0x0202, 0x53);
|
||||
ret |= gc20b3_write_reg(dev, 0x0203, 0xce);
|
||||
ret |= gc20b3_write_reg(dev, 0x0204, 0x40);
|
||||
ret |= gc20b3_write_reg(dev, 0x0212, 0x07);
|
||||
ret |= gc20b3_write_reg(dev, 0x0213, 0x80);
|
||||
ret |= gc20b3_write_reg(dev, 0x0215, 0x12);
|
||||
ret |= gc20b3_write_reg(dev, 0x0229, 0x05);
|
||||
ret |= gc20b3_write_reg(dev, 0x0237, 0x03);
|
||||
ret |= gc20b3_write_reg(dev, 0x023e, 0x99);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc20b3_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
SENSOR_PRINT("=======================================================================================\n");
|
||||
SENSOR_PRINT("==== GC20B3_24MInput_MIPI_2lane_10bit_linear_1920x1080_30fps init success!=============\n");
|
||||
SENSOR_PRINT("=======================================================================================\n");
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
xmedia_s32 gc20b3_init_image(xmedia_u32 dev, xmedia_u8 image_mode)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
switch(image_mode) {
|
||||
case GC20B3_2M_10BIT_LINEAR_MODE:
|
||||
ret = gc20b3_2lane_linear_1920x1080_init(dev);
|
||||
break;
|
||||
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support, please check image param!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc20b3_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_gc20b3_i2c_fd[dev] < 0) {
|
||||
SENSOR_PRINT("Sensor dev [%d], i2c not open. please init i2c at first.\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_set_slave_addr(g_gc20b3_i2c_fd[dev], slave_addr);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
|
||||
i2c_close(g_gc20b3_i2c_fd[dev]);
|
||||
g_gc20b3_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
g_gc20b3_i2c_addr[dev] = slave_addr;
|
||||
SENSOR_PRINT("Sensor dev [%d] set slave addr 0x%x success.\n", dev, slave_addr);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc20b3_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_gc20b3_i2c_fd[dev] >= 0) {
|
||||
SENSOR_PRINT("====== Sensor dev [%d], i2c already init !=======\n", dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
if (i2c_dev == SENSOR_I2C_INVALID) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Sensor i2c dev invalid! Please set i2c dev at first!\n");
|
||||
return XMEDIA_ERRCODE_NOT_CONFIG;
|
||||
}
|
||||
|
||||
g_gc20b3_i2c_fd[dev] = i2c_open(i2c_dev);
|
||||
if (g_gc20b3_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Open /dev/i2c_drv-%u error!\n", i2c_dev);
|
||||
return XMEDIA_ERRCODE_OPEN_FAILED;
|
||||
}
|
||||
|
||||
ret = gc20b3_set_slave_addr(dev, i2c_addr);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
SENSOR_PRINT("====== i2c[%d] init success!=======\n", i2c_dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc20b3_i2c_exit(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
ret = i2c_close(g_gc20b3_i2c_fd[dev]);
|
||||
if(ret < 0 ) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] close i2c failed!\n", dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
g_gc20b3_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc20b3_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[GC20B3_DATA_BYTE];
|
||||
|
||||
if (g_gc20b3_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_read(g_gc20b3_i2c_fd[dev], g_gc20b3_i2c_addr[dev], addr, GC20B3_ADDR_BYTE, buf, GC20B3_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] read i2c addr [0x%X] failed!\n", dev, addr);
|
||||
return ret;
|
||||
}
|
||||
|
||||
*data = buf[0]; //GC20B3_DATA_BYTE == 1
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc20b3_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data)
|
||||
{
|
||||
xmedia_u32 idx = 0;
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[8];
|
||||
|
||||
if (g_gc20b3_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
buf[idx] = (addr >> 8) & 0xff;
|
||||
idx++;
|
||||
buf[idx] = addr & 0xff;
|
||||
idx++;
|
||||
buf[idx] = data & 0xff;
|
||||
|
||||
ret = i2c_write(g_gc20b3_i2c_fd[dev], g_gc20b3_i2c_addr[dev], buf, GC20B3_ADDR_BYTE + GC20B3_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_WRITE error!\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
xmedia_s32 gc20b3_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
if ((!mirror_en) && (!flip_en)) {
|
||||
ret |= gc20b3_write_reg(dev, 0x0015,0x00);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d15,0x00);
|
||||
|
||||
} else if ((mirror_en) && (!flip_en)) {
|
||||
ret |= gc20b3_write_reg(dev, 0x0015,0x01);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d15,0x01);
|
||||
} else if ((!mirror_en) && (flip_en)) {
|
||||
ret |= gc20b3_write_reg(dev, 0x0015,0x02);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d15,0x02);
|
||||
} else if ((mirror_en) && (flip_en)) {
|
||||
ret |= gc20b3_write_reg(dev, 0x0015,0x03);
|
||||
ret |= gc20b3_write_reg(dev, 0x0d15,0x03);
|
||||
}
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc20b3_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,29 @@
|
||||
#ifndef __GC20B3_CTRL_H__
|
||||
#define __GC20B3_CTRL_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// I2C_ID1: 0x62; I2C_ID2: 0x20
|
||||
#define GC20B3_I2C_ADDR 0x6e
|
||||
#define GC20B3_ADDR_BYTE 2
|
||||
#define GC20B3_DATA_BYTE 1
|
||||
|
||||
#define GC20B3_2M_10BIT_LINEAR_MODE 1
|
||||
|
||||
xmedia_s32 gc20b3_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr);
|
||||
xmedia_s32 gc20b3_i2c_exit(xmedia_u32 dev);
|
||||
xmedia_s32 gc20b3_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data);
|
||||
xmedia_s32 gc20b3_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data);
|
||||
xmedia_s32 gc20b3_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en);
|
||||
xmedia_s32 gc20b3_init_image(xmedia_u32 dev, xmedia_u8 img_mode);
|
||||
xmedia_s32 gc20b3_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //__GC20B3_CTRL_H__
|
||||
+58
@@ -0,0 +1,58 @@
|
||||
#ifndef __GC20B3_EX_H__
|
||||
#define __GC20B3_EX_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// Piris attr
|
||||
static const xmedia_isp_piris_attr g_gc20b3_piris_attr = {
|
||||
0,
|
||||
1,
|
||||
94,
|
||||
62,
|
||||
// Step-F number mapping table. Must be from small to large. F1.0 is 1024 and F32.0 is 1
|
||||
{ 30, 35, 40, 45, 50, 56, 61, 67, 73, 79, 85, 92, 98, 105, 112, 120, 127, 135, 143, 150, 158,
|
||||
166, 174, 183, 191, 200, 208, 217, 225, 234, 243, 252, 261, 270, 279, 289, 298, 307, 316, 325, 335, 344,
|
||||
353, 362, 372, 381, 390, 399, 408, 417, 426, 435, 444, 453, 462, 470, 478, 486, 493, 500, 506, 512 },
|
||||
XMEDIA_ISP_IRIS_F_NO_1_4,
|
||||
XMEDIA_ISP_IRIS_F_NO_5_6
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_ccm g_gc20b3_awb_ccm = {
|
||||
4,
|
||||
{
|
||||
{
|
||||
6175,
|
||||
{ 440, 32967, 15, 32852, 424, 32852, 11, 33014, 491 },
|
||||
},
|
||||
{
|
||||
4990,
|
||||
{ 443, 32969, 14, 32876, 407, 32811, 32769, 33012, 501 },
|
||||
},
|
||||
{
|
||||
3865,
|
||||
{ 458, 32977, 7, 32853, 389, 32816, 24, 33018, 482 },
|
||||
},
|
||||
{
|
||||
2450,
|
||||
{ 427, 32931, 32776, 32897, 401, 32784, 4, 33168, 652 },
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_gc20b3_awb_agc_table = {
|
||||
// bvalid
|
||||
1,
|
||||
|
||||
// 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768
|
||||
// saturation
|
||||
{ 0x80, 0x76, 0x70, 0x6C, 0x69, 0x66, 0x5A, 0x4E, 0x44, 0x40, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38 }
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,5 @@
|
||||
ifneq ($(MCU), )
|
||||
include Makefile.riscv
|
||||
else
|
||||
include Makefile.linux
|
||||
endif
|
||||
@@ -0,0 +1,19 @@
|
||||
ISP_DIR := $(shell cd ../.. && /bin/pwd)
|
||||
SDK_DIR ?= $(shell cd $(ISP_DIR)/../../../.. && /bin/pwd)
|
||||
|
||||
include $(SDK_DIR)/build/base.mk
|
||||
include $(ISP_DIR)/sensor/plat.mk
|
||||
|
||||
LIB_NAME := libsns_gc20c3
|
||||
|
||||
SRCS := $(wildcard *.c)
|
||||
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/usr/include
|
||||
SDK_USR_CFLAGS += -I$(ISP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I.
|
||||
|
||||
$(info SRCS=$(SRCS))
|
||||
|
||||
include $(SDK_DIR)/build/sdk_lib_rules.mk
|
||||
|
||||
@@ -0,0 +1,4 @@
|
||||
|
||||
SRCS-y += gc20c3.c
|
||||
SRCS-y += gc20c3_ctrl.c
|
||||
|
||||
+1375
File diff suppressed because it is too large
Load Diff
+55
@@ -0,0 +1,55 @@
|
||||
#ifndef __GC20C3_H__
|
||||
#define __GC20C3_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
#include "gc20c3_ctrl.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// sensor fps mode
|
||||
#define GC20C3_FULL_LINES_MAX 0x3FFF
|
||||
#if GC20C3_2LANE_LINEAR_1920X1080_30FPS
|
||||
#define GC20C3_VMAX_1920X1080_LINEAR 0x465
|
||||
#else
|
||||
#define GC20C3_VMAX_1920X1080_LINEAR 1501
|
||||
#endif
|
||||
#define GC20C3_EXP_OFFSET_LINEAR 2
|
||||
|
||||
#define GC20C3_REG_ADDR_EXP_H 0x0202
|
||||
#define GC20C3_REG_ADDR_EXP_L 0x0203
|
||||
#define GC20C3_REG_ADDR_AGAIN_1 0x0D04
|
||||
#define GC20C3_REG_ADDR_AGAIN_2 0x0D05
|
||||
#define GC20C3_REG_ADDR_AGAIN_3 0x0E36
|
||||
#define GC20C3_REG_ADDR_AGAIN_4 0x0E39
|
||||
#define GC20C3_REG_ADDR_AGAIN_5 0x04A8
|
||||
#define GC20C3_REG_ADDR_AGAIN_6 0x04A9
|
||||
#define GC20C3_REG_ADDR_AGAIN_7 0x0052
|
||||
#define GC20C3_REG_ADDR_DGAIN_H 0x0474
|
||||
#define GC20C3_REG_ADDR_DGAIN_L 0x0475
|
||||
#define GC20C3_REG_ADDR_VMAX_H 0x0340
|
||||
#define GC20C3_REG_ADDR_VMAX_L 0x0341
|
||||
|
||||
typedef enum {
|
||||
GC20C3_REG_EXP_H = 0,
|
||||
GC20C3_REG_EXP_L,
|
||||
GC20C3_REG_AGAIN_1,
|
||||
GC20C3_REG_AGAIN_2,
|
||||
GC20C3_REG_AGAIN_3,
|
||||
GC20C3_REG_AGAIN_4,
|
||||
GC20C3_REG_AGAIN_5,
|
||||
GC20C3_REG_AGAIN_6,
|
||||
GC20C3_REG_AGAIN_7,
|
||||
GC20C3_REG_DGAIN_H,
|
||||
GC20C3_REG_DGAIN_L,
|
||||
GC20C3_REG_VMAX_H,
|
||||
GC20C3_REG_VMAX_L,
|
||||
GC20C3_REG_MAX_NUM
|
||||
} gc20c3_reg_info;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __GC20C3_H__
|
||||
+478
@@ -0,0 +1,478 @@
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "i2c_dev.h"
|
||||
#include "gc20c3.h"
|
||||
#include "gc20c3_ctrl.h"
|
||||
|
||||
static xmedia_s32 g_gc20c3_i2c_addr[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
|
||||
static xmedia_s32 g_gc20c3_i2c_fd[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
|
||||
#define GC20C3_REG_ADDR_MIRROR_FLIP 0x022C
|
||||
|
||||
#if GC20C3_2LANE_LINEAR_1920X1080_30FPS
|
||||
static xmedia_s32 gc20c3_2lane_linear_1920x1080_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
// mipi_rate = 540 Mbps/lane
|
||||
// wpclk = 135 Mhz
|
||||
// rpclk = 108 Mhz
|
||||
// FL = 1125
|
||||
ret |= gc20c3_write_reg(dev, 0x03fe, 0xff);
|
||||
ret |= gc20c3_write_reg(dev, 0x03fe, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x03fe, 0x10);
|
||||
ret |= gc20c3_write_reg(dev, 0x0190, 0x03);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b4d, 0x02);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d40, 0x01);
|
||||
ret |= gc20c3_write_reg(dev, 0x0087, 0x50);
|
||||
ret |= gc20c3_write_reg(dev, 0x0209, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x03b5, 0x11);
|
||||
ret |= gc20c3_write_reg(dev, 0x031c, 0x18);
|
||||
ret |= gc20c3_write_reg(dev, 0x03b2, 0x03);
|
||||
ret |= gc20c3_write_reg(dev, 0x03bb, 0xff);
|
||||
ret |= gc20c3_write_reg(dev, 0x03be, 0xff);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d10, 0x06);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d11, 0x0b);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d10, 0x07);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d1a, 0x02);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d15, 0x03);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d12, 0x05);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d16, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d17, 0x78);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d18, 0x01);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d19, 0x48);
|
||||
ret |= gc20c3_write_reg(dev, 0x0145, 0x0d);
|
||||
ret |= gc20c3_write_reg(dev, 0x0144, 0x02);
|
||||
ret |= gc20c3_write_reg(dev, 0x0142, 0x04);
|
||||
ret |= gc20c3_write_reg(dev, 0x0143, 0x14);
|
||||
ret |= gc20c3_write_reg(dev, 0x0146, 0x05);
|
||||
ret |= gc20c3_write_reg(dev, 0x0141, 0x05);
|
||||
ret |= gc20c3_write_reg(dev, 0x0149, 0x05);
|
||||
ret |= gc20c3_write_reg(dev, 0x014a, 0x07);
|
||||
ret |= gc20c3_write_reg(dev, 0x014b, 0x06);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b4e, 0x88);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e0c, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e0f, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e3a, 0x98);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b45, 0x06);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b47, 0xf0);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d30, 0x06);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d2f, 0x05);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b40, 0x57);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b43, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b41, 0x0c);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d31, 0x03);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c23, 0x40);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e23, 0x1a);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e2a, 0x09);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e2b, 0xc9);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e41, 0x87);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e3b, 0xb5);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e3a, 0x15);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e37, 0x1f);
|
||||
ret |= gc20c3_write_reg(dev, 0x0217, 0x02);
|
||||
ret |= gc20c3_write_reg(dev, 0x0213, 0x04);
|
||||
ret |= gc20c3_write_reg(dev, 0x0219, 0xc2);
|
||||
ret |= gc20c3_write_reg(dev, 0x0259, 0x04);
|
||||
ret |= gc20c3_write_reg(dev, 0x025a, 0x5e);
|
||||
ret |= gc20c3_write_reg(dev, 0x0211, 0x01);
|
||||
ret |= gc20c3_write_reg(dev, 0x0340, 0x04);
|
||||
ret |= gc20c3_write_reg(dev, 0x0341, 0x65);
|
||||
ret |= gc20c3_write_reg(dev, 0x0342, 0x03);
|
||||
ret |= gc20c3_write_reg(dev, 0x0343, 0xe8);
|
||||
ret |= gc20c3_write_reg(dev, 0x0212, 0x14);
|
||||
ret |= gc20c3_write_reg(dev, 0x0350, 0x06);
|
||||
ret |= gc20c3_write_reg(dev, 0x0348, 0x07);
|
||||
ret |= gc20c3_write_reg(dev, 0x0349, 0x88);
|
||||
ret |= gc20c3_write_reg(dev, 0x034a, 0x04);
|
||||
ret |= gc20c3_write_reg(dev, 0x034b, 0x40);
|
||||
ret |= gc20c3_write_reg(dev, 0x0347, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b0c, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b0d, 0x02);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b0e, 0x07);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b0f, 0x8a);
|
||||
ret |= gc20c3_write_reg(dev, 0x034e, 0x07);
|
||||
ret |= gc20c3_write_reg(dev, 0x034f, 0xa8);
|
||||
ret |= gc20c3_write_reg(dev, 0x0004, 0x0f);
|
||||
ret |= gc20c3_write_reg(dev, 0x0444, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0038, 0x20);
|
||||
ret |= gc20c3_write_reg(dev, 0x0039, 0x20);
|
||||
ret |= gc20c3_write_reg(dev, 0x003a, 0x20);
|
||||
ret |= gc20c3_write_reg(dev, 0x003b, 0x20);
|
||||
ret |= gc20c3_write_reg(dev, 0x0492, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0493, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0070, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0094, 0x07);
|
||||
ret |= gc20c3_write_reg(dev, 0x0095, 0x80);
|
||||
ret |= gc20c3_write_reg(dev, 0x0096, 0x04);
|
||||
ret |= gc20c3_write_reg(dev, 0x0097, 0x38);
|
||||
ret |= gc20c3_write_reg(dev, 0x0099, 0x04);
|
||||
ret |= gc20c3_write_reg(dev, 0x009b, 0x04);
|
||||
ret |= gc20c3_write_reg(dev, 0x0438, 0x0f);
|
||||
ret |= gc20c3_write_reg(dev, 0x0439, 0xf0);
|
||||
ret |= gc20c3_write_reg(dev, 0x021a, 0x10);
|
||||
ret |= gc20c3_write_reg(dev, 0x0476, 0x01);
|
||||
ret |= gc20c3_write_reg(dev, 0x0430, 0x23);
|
||||
ret |= gc20c3_write_reg(dev, 0x0443, 0x02);
|
||||
ret |= gc20c3_write_reg(dev, 0x0038, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0039, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x003a, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x003b, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0070, 0x80);
|
||||
ret |= gc20c3_write_reg(dev, 0x0448, 0x0d);
|
||||
ret |= gc20c3_write_reg(dev, 0x0449, 0x0d);
|
||||
ret |= gc20c3_write_reg(dev, 0x044a, 0x0d);
|
||||
ret |= gc20c3_write_reg(dev, 0x044b, 0x0d);
|
||||
ret |= gc20c3_write_reg(dev, 0x044c, 0x74);
|
||||
ret |= gc20c3_write_reg(dev, 0x044d, 0x74);
|
||||
ret |= gc20c3_write_reg(dev, 0x044e, 0x74);
|
||||
ret |= gc20c3_write_reg(dev, 0x044f, 0x74);
|
||||
ret |= gc20c3_write_reg(dev, 0x0485, 0x68);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d38, 0x07);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d39, 0x57);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e4e, 0xa9);
|
||||
ret |= gc20c3_write_reg(dev, 0x0072, 0x09);
|
||||
ret |= gc20c3_write_reg(dev, 0x0073, 0x05);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c20, 0x09);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c1d, 0x02);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c1e, 0x2c);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c1f, 0xe6);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c19, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c1a, 0x11);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c1b, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c1c, 0x80);
|
||||
ret |= gc20c3_write_reg(dev, 0x0261, 0x13);
|
||||
ret |= gc20c3_write_reg(dev, 0x0004, 0x0f);
|
||||
ret |= gc20c3_write_reg(dev, 0x0052, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0053, 0x20);
|
||||
ret |= gc20c3_write_reg(dev, 0x0055, 0x20);
|
||||
ret |= gc20c3_write_reg(dev, 0x0152, 0x14);
|
||||
ret |= gc20c3_write_reg(dev, 0x0100, 0x03);
|
||||
ret |= gc20c3_write_reg(dev, 0x031c, 0x1f);
|
||||
ret |= gc20c3_write_reg(dev, 0x0336, 0x01);
|
||||
ret |= gc20c3_write_reg(dev, 0x0336, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x03fe, 0x00);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc20c3_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
} else {
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
SENSOR_PRINT("========= GC20C3_27MInput_MIPI_2lane_10bit_1920x1080_30fps init success!==========\n");
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
}
|
||||
#else
|
||||
static xmedia_s32 gc20c3_2lane_linear_1920x1080_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
// 03_GC20C3_MIPI2L_27M_1920x1080_40fps_raw10_linear
|
||||
// RESOLUTION width="1920" height="1080"
|
||||
// BAYERMODE type= GrRBGb
|
||||
// mipi_rate = 783 Mbps/lane
|
||||
// vts = 1220,row time=18.214us,40fps
|
||||
ret |= gc20c3_write_reg(dev, 0x03fe, 0xff);
|
||||
ret |= gc20c3_write_reg(dev, 0x03fe, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x03fe, 0x10);
|
||||
ret |= gc20c3_write_reg(dev, 0x0190, 0x03);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b4d, 0x02);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d40, 0x01);
|
||||
ret |= gc20c3_write_reg(dev, 0x0087, 0x50);
|
||||
ret |= gc20c3_write_reg(dev, 0x0209, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x03b5, 0x11);
|
||||
ret |= gc20c3_write_reg(dev, 0x031c, 0x18);
|
||||
ret |= gc20c3_write_reg(dev, 0x03b2, 0x03);
|
||||
ret |= gc20c3_write_reg(dev, 0x03bb, 0xff);
|
||||
ret |= gc20c3_write_reg(dev, 0x03be, 0xff);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d10, 0x06);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d11, 0x0b);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d10, 0x07);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d1a, 0x02);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d15, 0x04);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d12, 0x25);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d16, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d17, 0xc8); // 0xf4
|
||||
ret |= gc20c3_write_reg(dev, 0x0d18, 0x01);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d19, 0x48);
|
||||
ret |= gc20c3_write_reg(dev, 0x0145, 0x0d);
|
||||
ret |= gc20c3_write_reg(dev, 0x0144, 0x02);
|
||||
ret |= gc20c3_write_reg(dev, 0x0142, 0x07);
|
||||
ret |= gc20c3_write_reg(dev, 0x0143, 0x1c);
|
||||
ret |= gc20c3_write_reg(dev, 0x0146, 0x08);
|
||||
ret |= gc20c3_write_reg(dev, 0x0141, 0x08);
|
||||
ret |= gc20c3_write_reg(dev, 0x0149, 0x07);
|
||||
ret |= gc20c3_write_reg(dev, 0x014a, 0x0b);
|
||||
ret |= gc20c3_write_reg(dev, 0x014b, 0x08);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b4e, 0x88);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e0c, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e0f, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e3a, 0x98);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b45, 0x06);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b47, 0xf0);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d30, 0x06);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d2f, 0x05);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b40, 0x57);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b43, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b41, 0x0c);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d31, 0x03);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c23, 0x40);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e23, 0x1a);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e2a, 0x09);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e2b, 0xc9);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e41, 0x87);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e3b, 0xb5);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e3a, 0x15);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e37, 0x1f);
|
||||
ret |= gc20c3_write_reg(dev, 0x0217, 0x02);
|
||||
ret |= gc20c3_write_reg(dev, 0x0212, 0x14);
|
||||
ret |= gc20c3_write_reg(dev, 0x0213, 0x04);
|
||||
ret |= gc20c3_write_reg(dev, 0x0219, 0xc2);
|
||||
ret |= gc20c3_write_reg(dev, 0x0259, 0x04);
|
||||
ret |= gc20c3_write_reg(dev, 0x025a, 0x5e);
|
||||
ret |= gc20c3_write_reg(dev, 0x0211, 0x01);
|
||||
ret |= gc20c3_write_reg(dev, 0x0340, 0x04);
|
||||
ret |= gc20c3_write_reg(dev, 0x0341, 0x66);
|
||||
ret |= gc20c3_write_reg(dev, 0x0342, 0x03);
|
||||
ret |= gc20c3_write_reg(dev, 0x0343, 0xa9);
|
||||
ret |= gc20c3_write_reg(dev, 0x0350, 0x14);
|
||||
ret |= gc20c3_write_reg(dev, 0x0348, 0x07);
|
||||
ret |= gc20c3_write_reg(dev, 0x0349, 0x88);
|
||||
ret |= gc20c3_write_reg(dev, 0x034a, 0x04);
|
||||
ret |= gc20c3_write_reg(dev, 0x034b, 0x40);
|
||||
ret |= gc20c3_write_reg(dev, 0x0347, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b0c, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b0d, 0x02);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b0e, 0x07);
|
||||
ret |= gc20c3_write_reg(dev, 0x0b0f, 0x8a);
|
||||
ret |= gc20c3_write_reg(dev, 0x034e, 0x07);
|
||||
ret |= gc20c3_write_reg(dev, 0x034f, 0xa8);
|
||||
ret |= gc20c3_write_reg(dev, 0x0004, 0x0f);
|
||||
ret |= gc20c3_write_reg(dev, 0x0444, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0038, 0x20);
|
||||
ret |= gc20c3_write_reg(dev, 0x0039, 0x20);
|
||||
ret |= gc20c3_write_reg(dev, 0x003a, 0x20);
|
||||
ret |= gc20c3_write_reg(dev, 0x003b, 0x20);
|
||||
ret |= gc20c3_write_reg(dev, 0x0492, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0493, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0070, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0094, 0x07);
|
||||
ret |= gc20c3_write_reg(dev, 0x0095, 0x80);
|
||||
ret |= gc20c3_write_reg(dev, 0x0096, 0x04);
|
||||
ret |= gc20c3_write_reg(dev, 0x0097, 0x38);
|
||||
ret |= gc20c3_write_reg(dev, 0x0099, 0x04);
|
||||
ret |= gc20c3_write_reg(dev, 0x009b, 0x04);
|
||||
ret |= gc20c3_write_reg(dev, 0x0438, 0x0f);
|
||||
ret |= gc20c3_write_reg(dev, 0x0439, 0xf0);
|
||||
ret |= gc20c3_write_reg(dev, 0x021a, 0x10);
|
||||
ret |= gc20c3_write_reg(dev, 0x0476, 0x01);
|
||||
ret |= gc20c3_write_reg(dev, 0x0430, 0x23);
|
||||
ret |= gc20c3_write_reg(dev, 0x0443, 0x02);
|
||||
ret |= gc20c3_write_reg(dev, 0x0038, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0039, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x003a, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x003b, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0070, 0x80);
|
||||
ret |= gc20c3_write_reg(dev, 0x0448, 0x0d);
|
||||
ret |= gc20c3_write_reg(dev, 0x0449, 0x0d);
|
||||
ret |= gc20c3_write_reg(dev, 0x044a, 0x0d);
|
||||
ret |= gc20c3_write_reg(dev, 0x044b, 0x0d);
|
||||
ret |= gc20c3_write_reg(dev, 0x044c, 0x74);
|
||||
ret |= gc20c3_write_reg(dev, 0x044d, 0x74);
|
||||
ret |= gc20c3_write_reg(dev, 0x044e, 0x74);
|
||||
ret |= gc20c3_write_reg(dev, 0x044f, 0x74);
|
||||
ret |= gc20c3_write_reg(dev, 0x0485, 0x68);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d38, 0x07);
|
||||
ret |= gc20c3_write_reg(dev, 0x0d39, 0x57);
|
||||
ret |= gc20c3_write_reg(dev, 0x0e4e, 0xa9);
|
||||
ret |= gc20c3_write_reg(dev, 0x0072, 0x09);
|
||||
ret |= gc20c3_write_reg(dev, 0x0073, 0x05);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c20, 0x09);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c1d, 0x02);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c1e, 0x2c);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c1f, 0xe6);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c19, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c1a, 0x11);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c1b, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0c1c, 0x80);
|
||||
ret |= gc20c3_write_reg(dev, 0x0261, 0x13);
|
||||
ret |= gc20c3_write_reg(dev, 0x0004, 0x0f);
|
||||
ret |= gc20c3_write_reg(dev, 0x0052, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x0053, 0x20);
|
||||
ret |= gc20c3_write_reg(dev, 0x0055, 0x20);
|
||||
ret |= gc20c3_write_reg(dev, 0x0100, 0x03);
|
||||
ret |= gc20c3_write_reg(dev, 0x0152, 0x14);
|
||||
ret |= gc20c3_write_reg(dev, 0x031c, 0x1f);
|
||||
ret |= gc20c3_write_reg(dev, 0x0336, 0x01);
|
||||
ret |= gc20c3_write_reg(dev, 0x0336, 0x00);
|
||||
ret |= gc20c3_write_reg(dev, 0x03fe, 0x00);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc20c3_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
} else {
|
||||
SENSOR_PRINT("============================================================================================\n");
|
||||
SENSOR_PRINT("=== gc20c3_normal_mipi_27Minput_2lane_783Mbps_10bit_linear_1920x1080_40fps init success! ===\n");
|
||||
SENSOR_PRINT("============================================================================================\n");
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
xmedia_s32 gc20c3_init_image(xmedia_u32 dev, xmedia_u8 image_mode, xmedia_sensor_work_mode work_mode)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
switch(image_mode) {
|
||||
case GC20C3_2M_1920X1080_LINEAR_MODE:
|
||||
ret = gc20c3_2lane_linear_1920x1080_init(dev);
|
||||
break;
|
||||
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support, please check image param!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc20c3_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_gc20c3_i2c_fd[dev] < 0) {
|
||||
SENSOR_PRINT("Sensor dev [%d], i2c not open. please init i2c at first.\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_set_slave_addr(g_gc20c3_i2c_fd[dev], slave_addr);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
|
||||
i2c_close(g_gc20c3_i2c_fd[dev]);
|
||||
g_gc20c3_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
g_gc20c3_i2c_addr[dev] = slave_addr;
|
||||
SENSOR_PRINT("Sensor dev [%d] set slave addr 0x%x success.\n", dev, slave_addr);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc20c3_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_gc20c3_i2c_fd[dev] >= 0) {
|
||||
SENSOR_PRINT("====== Sensor dev [%d], i2c already init !=======\n", dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
if (i2c_dev == SENSOR_I2C_INVALID) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Sensor i2c dev invalid! Please set i2c dev at first!\n");
|
||||
return XMEDIA_ERRCODE_NOT_CONFIG;
|
||||
}
|
||||
|
||||
g_gc20c3_i2c_fd[dev] = i2c_open(i2c_dev);
|
||||
if (g_gc20c3_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Open /dev/i2c_drv-%u error!\n", i2c_dev);
|
||||
return XMEDIA_ERRCODE_OPEN_FAILED;
|
||||
}
|
||||
|
||||
ret = gc20c3_set_slave_addr(dev, i2c_addr);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
SENSOR_PRINT("====== i2c[%d] init success!=======\n", i2c_dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc20c3_i2c_exit(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
ret = i2c_close(g_gc20c3_i2c_fd[dev]);
|
||||
if(ret < 0 ) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] close i2c failed!\n", dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
g_gc20c3_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc20c3_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[GC20C3_DATA_BYTE];
|
||||
|
||||
if (g_gc20c3_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_read(g_gc20c3_i2c_fd[dev], g_gc20c3_i2c_addr[dev], addr, GC20C3_ADDR_BYTE, buf, GC20C3_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] read i2c addr [0x%X] failed!\n", dev, addr);
|
||||
return ret;
|
||||
}
|
||||
|
||||
*data = buf[0]; //GC20C3_DATA_BYTE == 1
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc20c3_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data)
|
||||
{
|
||||
xmedia_u32 idx = 0;
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[8];
|
||||
|
||||
if (g_gc20c3_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
buf[idx] = (addr >> 8) & 0xff;
|
||||
idx++;
|
||||
buf[idx] = addr & 0xff;
|
||||
idx++;
|
||||
buf[idx] = data & 0xff;
|
||||
|
||||
ret = i2c_write(g_gc20c3_i2c_fd[dev], g_gc20c3_i2c_addr[dev], buf, GC20C3_ADDR_BYTE + GC20C3_DATA_BYTE);
|
||||
if (ret != (GC20C3_ADDR_BYTE + GC20C3_DATA_BYTE)) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_WRITE error!ret=%d.\n", ret);
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
xmedia_s32 gc20c3_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u32 mirror_flip_type;
|
||||
|
||||
gc20c3_read_reg(dev, GC20C3_REG_ADDR_MIRROR_FLIP, &mirror_flip_type);
|
||||
|
||||
if (mirror_en) {
|
||||
mirror_flip_type |= 0x01;
|
||||
} else {
|
||||
mirror_flip_type &= 0xFE;
|
||||
}
|
||||
|
||||
if (flip_en) {
|
||||
mirror_flip_type |= 0x02;
|
||||
} else {
|
||||
mirror_flip_type &= 0xFD;
|
||||
}
|
||||
|
||||
ret = gc20c3_write_reg(dev, GC20C3_REG_ADDR_MIRROR_FLIP, mirror_flip_type);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc20c3_write_reg failed\n");
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
@@ -0,0 +1,31 @@
|
||||
#ifndef __GC20C3_CTRL_H__
|
||||
#define __GC20C3_CTRL_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define GC20C3_I2C_ADDR 0x62
|
||||
#define GC20C3_ADDR_BYTE 2
|
||||
#define GC20C3_DATA_BYTE 1
|
||||
|
||||
#define GC20C3_2LANE_LINEAR_1920X1080_30FPS 1 // 0: 使用40fps的序列； 1: 使用30fps的序列
|
||||
|
||||
// gc20c3 specs list
|
||||
#define GC20C3_2M_1920X1080_LINEAR_MODE 1
|
||||
|
||||
xmedia_s32 gc20c3_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr);
|
||||
xmedia_s32 gc20c3_i2c_exit(xmedia_u32 dev);
|
||||
xmedia_s32 gc20c3_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data);
|
||||
xmedia_s32 gc20c3_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data);
|
||||
xmedia_s32 gc20c3_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en);
|
||||
xmedia_s32 gc20c3_init_image(xmedia_u32 dev, xmedia_u8 img_mode, xmedia_sensor_work_mode work_mode);
|
||||
xmedia_s32 gc20c3_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //__GC20C3_CTRL_H__
|
||||
+84
@@ -0,0 +1,84 @@
|
||||
#ifndef __GC20C3_EX_H__
|
||||
#define __GC20C3_EX_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// Piris attr
|
||||
static const xmedia_isp_piris_attr g_gc20c3_piris_attr = {
|
||||
0,
|
||||
1,
|
||||
94,
|
||||
62,
|
||||
// Step-F number mapping table. Must be from small to large. F1.0 is 1024 and F32.0 is 1
|
||||
{30, 35, 40, 45, 50, 56, 61, 67, 73, 79, 85, 92, 98, 105, 112, 120, 127, 135, 143, 150, 158,
|
||||
166, 174, 183, 191, 200, 208, 217, 225, 234, 243, 252, 261, 270, 279, 289, 298, 307, 316, 325, 335, 344,
|
||||
353, 362, 372, 381, 390, 399, 408, 417, 426, 435, 444, 453, 462, 470, 478, 486, 493, 500, 506, 512},
|
||||
XMEDIA_ISP_IRIS_F_NO_1_4,
|
||||
XMEDIA_ISP_IRIS_F_NO_5_6
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_ccm g_gc20c3_awb_ccm = {
|
||||
4,
|
||||
{
|
||||
{
|
||||
6150,
|
||||
{
|
||||
0x01F3, 0x80E1, 0x8012,
|
||||
0x8054, 0x019E, 0x804A,
|
||||
0x8001, 0x80E2, 0x01E3
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
4850,
|
||||
{
|
||||
0x01F6, 0x80D2, 0x8024,
|
||||
0x805C, 0x01A5, 0x8049,
|
||||
0x8005, 0x80FE, 0x0203
|
||||
},
|
||||
},
|
||||
|
||||
{
|
||||
3650,
|
||||
{
|
||||
0x01E6, 0x805E, 0x8088,
|
||||
0x809A, 0x01FB, 0x8061,
|
||||
0x8024, 0x80FE, 0x0222
|
||||
},
|
||||
},
|
||||
{
|
||||
2650,
|
||||
{
|
||||
0x01F9, 0x80D5, 0x8024,
|
||||
0x8082, 0x01A9, 0x8027,
|
||||
0x802D, 0x821A, 0x0347
|
||||
},
|
||||
},
|
||||
|
||||
}
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_gc20c3_awb_agc_ir_table = {
|
||||
// bvalid
|
||||
1,
|
||||
|
||||
// saturation
|
||||
// 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768
|
||||
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_gc20c3_awb_agc_table = {
|
||||
// bvalid
|
||||
1,
|
||||
// saturation
|
||||
// 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768
|
||||
{120,120,115,110,100,90,95,90,72,64,56,56,56,56,56,56}
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,7 @@
|
||||
|
||||
ifneq ($(MCU), )
|
||||
include Makefile.riscv
|
||||
else
|
||||
include Makefile.linux
|
||||
endif
|
||||
|
||||
@@ -0,0 +1,18 @@
|
||||
ISP_DIR := $(shell cd ../.. && /bin/pwd)
|
||||
SDK_DIR ?= $(shell cd $(ISP_DIR)/../../../.. && /bin/pwd)
|
||||
|
||||
include $(SDK_DIR)/build/base.mk
|
||||
include $(ISP_DIR)/sensor/plat.mk
|
||||
|
||||
LIB_NAME := libsns_gc4653
|
||||
|
||||
SRCS := $(wildcard *.c)
|
||||
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/usr/include
|
||||
SDK_USR_CFLAGS += -I$(ISP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I.
|
||||
|
||||
$(info SRCS=$(SRCS))
|
||||
|
||||
include $(SDK_DIR)/build/sdk_lib_rules.mk
|
||||
@@ -0,0 +1,4 @@
|
||||
|
||||
SRCS-y += gc4653.c
|
||||
SRCS-y += gc4653_ctrl.c
|
||||
|
||||
+1392
File diff suppressed because it is too large
Load Diff
+52
@@ -0,0 +1,52 @@
|
||||
#ifndef __GC4653_H__
|
||||
#define __GC4653_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define GC4653_VMAX_4M_LINEAR 1500
|
||||
|
||||
#define GC4653_FULL_LINES_MAX 0x3FFF
|
||||
|
||||
// GC4653 Register Address
|
||||
#define GC4653_REG_ADDR_EXP_H 0x0202
|
||||
#define GC4653_REG_ADDR_EXP_L 0x0203
|
||||
#define GC4653_REG_ADDR_AGC_EXT0 0x02b3
|
||||
#define GC4653_REG_ADDR_AGC_EXT1 0x02b4
|
||||
#define GC4653_REG_ADDR_AGC_EXT2 0x02b8
|
||||
#define GC4653_REG_ADDR_AGC_EXT3 0x02b9
|
||||
#define GC4653_REG_ADDR_AGC_EXT4 0x0515
|
||||
#define GC4653_REG_ADDR_AGC_EXT5 0x0519
|
||||
#define GC4653_REG_ADDR_AGC_EXT6 0x02d9
|
||||
#define GC4653_REG_ADDR_DGC_H 0x020e
|
||||
#define GC4653_REG_ADDR_DGC_L 0x020f
|
||||
#define GC4653_REG_ADDR_VMAX_H 0x0340
|
||||
#define GC4653_REG_ADDR_VMAX_L 0x0341
|
||||
|
||||
#define GC4653_EXP_OFFSET 8
|
||||
|
||||
typedef enum {
|
||||
GC4653_REG_EXP_H = 0,
|
||||
GC4653_REG_EXP_L,
|
||||
GC4653_REG_AGC_EXT0,
|
||||
GC4653_REG_AGC_EXT1,
|
||||
GC4653_REG_AGC_EXT2,
|
||||
GC4653_REG_AGC_EXT3,
|
||||
GC4653_REG_AGC_EXT4,
|
||||
GC4653_REG_AGC_EXT5,
|
||||
GC4653_REG_AGC_EXT6,
|
||||
GC4653_REG_DGC_H,
|
||||
GC4653_REG_DGC_L,
|
||||
GC4653_REG_VMAX_H,
|
||||
GC4653_REG_VMAX_L,
|
||||
GC4653_REG_L_MAX_NUM,
|
||||
} gc4653_reg_index;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __GC4653_H__
|
||||
+332
@@ -0,0 +1,332 @@
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "i2c_dev.h"
|
||||
#include "gc4653.h"
|
||||
#include "gc4653_ctrl.h"
|
||||
|
||||
static xmedia_s32 g_gc4653_i2c_fd[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
static xmedia_s32 g_gc4653_i2c_addr[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
|
||||
static void gc4653_delay_ms(xmedia_s32 ms)
|
||||
{
|
||||
usleep(ms * 1000); // 1ms: 1000us
|
||||
return;
|
||||
}
|
||||
|
||||
static xmedia_s32 gc4653_2lane_linear_2560x1440_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
ret |= gc4653_write_reg(dev, 0x03fe, 0xf0);
|
||||
ret |= gc4653_write_reg(dev, 0x03fe, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x0317, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x0320, 0x77);
|
||||
ret |= gc4653_write_reg(dev, 0x0324, 0xc8);
|
||||
ret |= gc4653_write_reg(dev, 0x0325, 0x06);
|
||||
ret |= gc4653_write_reg(dev, 0x0326, 0x60);
|
||||
ret |= gc4653_write_reg(dev, 0x0327, 0x03);
|
||||
ret |= gc4653_write_reg(dev, 0x0334, 0x40);
|
||||
ret |= gc4653_write_reg(dev, 0x0336, 0x60);
|
||||
ret |= gc4653_write_reg(dev, 0x0337, 0x82);
|
||||
ret |= gc4653_write_reg(dev, 0x0315, 0x25);
|
||||
ret |= gc4653_write_reg(dev, 0x031c, 0xc6);
|
||||
ret |= gc4653_write_reg(dev, 0x0287, 0x18);
|
||||
ret |= gc4653_write_reg(dev, 0x0084, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x0087, 0x50);
|
||||
ret |= gc4653_write_reg(dev, 0x029d, 0x08);
|
||||
ret |= gc4653_write_reg(dev, 0x0290, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x0340, 0x05);
|
||||
ret |= gc4653_write_reg(dev, 0x0341, 0xdc);
|
||||
ret |= gc4653_write_reg(dev, 0x0345, 0x06);
|
||||
ret |= gc4653_write_reg(dev, 0x034b, 0xb0);
|
||||
ret |= gc4653_write_reg(dev, 0x0352, 0x08);
|
||||
ret |= gc4653_write_reg(dev, 0x0354, 0x08);
|
||||
ret |= gc4653_write_reg(dev, 0x02d1, 0xe0);
|
||||
ret |= gc4653_write_reg(dev, 0x0223, 0xf2);
|
||||
ret |= gc4653_write_reg(dev, 0x0238, 0xa4);
|
||||
ret |= gc4653_write_reg(dev, 0x02ce, 0x7f);
|
||||
ret |= gc4653_write_reg(dev, 0x0232, 0xc4);
|
||||
ret |= gc4653_write_reg(dev, 0x02d3, 0x05);
|
||||
ret |= gc4653_write_reg(dev, 0x0243, 0x06);
|
||||
ret |= gc4653_write_reg(dev, 0x02ee, 0x30);
|
||||
ret |= gc4653_write_reg(dev, 0x026f, 0x70);
|
||||
ret |= gc4653_write_reg(dev, 0x0257, 0x09);
|
||||
ret |= gc4653_write_reg(dev, 0x0211, 0x02);
|
||||
ret |= gc4653_write_reg(dev, 0x0219, 0x09);
|
||||
ret |= gc4653_write_reg(dev, 0x023f, 0x2d);
|
||||
ret |= gc4653_write_reg(dev, 0x0518, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x0519, 0x01);
|
||||
ret |= gc4653_write_reg(dev, 0x0515, 0x08);
|
||||
ret |= gc4653_write_reg(dev, 0x02d9, 0x3f);
|
||||
ret |= gc4653_write_reg(dev, 0x02da, 0x02);
|
||||
ret |= gc4653_write_reg(dev, 0x02db, 0xe8);
|
||||
ret |= gc4653_write_reg(dev, 0x02e6, 0x20);
|
||||
ret |= gc4653_write_reg(dev, 0x021b, 0x10);
|
||||
ret |= gc4653_write_reg(dev, 0x0252, 0x22);
|
||||
ret |= gc4653_write_reg(dev, 0x024e, 0x22);
|
||||
ret |= gc4653_write_reg(dev, 0x02c4, 0x01);
|
||||
ret |= gc4653_write_reg(dev, 0x021d, 0x17);
|
||||
ret |= gc4653_write_reg(dev, 0x024a, 0x01);
|
||||
ret |= gc4653_write_reg(dev, 0x02ca, 0x02);
|
||||
ret |= gc4653_write_reg(dev, 0x0262, 0x10);
|
||||
ret |= gc4653_write_reg(dev, 0x029a, 0x20);
|
||||
ret |= gc4653_write_reg(dev, 0x021c, 0x0e);
|
||||
ret |= gc4653_write_reg(dev, 0x0298, 0x03);
|
||||
ret |= gc4653_write_reg(dev, 0x029c, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x027e, 0x14);
|
||||
ret |= gc4653_write_reg(dev, 0x02c2, 0x10);
|
||||
ret |= gc4653_write_reg(dev, 0x0540, 0x20);
|
||||
ret |= gc4653_write_reg(dev, 0x0546, 0x01);
|
||||
ret |= gc4653_write_reg(dev, 0x0548, 0x01);
|
||||
ret |= gc4653_write_reg(dev, 0x0544, 0x01);
|
||||
ret |= gc4653_write_reg(dev, 0x0242, 0x1b);
|
||||
ret |= gc4653_write_reg(dev, 0x02c0, 0x1b);
|
||||
ret |= gc4653_write_reg(dev, 0x02c3, 0x20);
|
||||
ret |= gc4653_write_reg(dev, 0x02e4, 0x10);
|
||||
ret |= gc4653_write_reg(dev, 0x022e, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x027b, 0x3f);
|
||||
ret |= gc4653_write_reg(dev, 0x0269, 0x0f);
|
||||
ret |= gc4653_write_reg(dev, 0x02d2, 0x40);
|
||||
ret |= gc4653_write_reg(dev, 0x027c, 0x08);
|
||||
ret |= gc4653_write_reg(dev, 0x023a, 0x2e);
|
||||
ret |= gc4653_write_reg(dev, 0x0245, 0xce);
|
||||
ret |= gc4653_write_reg(dev, 0x0530, 0x20);
|
||||
ret |= gc4653_write_reg(dev, 0x0531, 0x02);
|
||||
ret |= gc4653_write_reg(dev, 0x0228, 0x50);
|
||||
ret |= gc4653_write_reg(dev, 0x02ab, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x0250, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x0221, 0x50);
|
||||
ret |= gc4653_write_reg(dev, 0x02ac, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x02a5, 0x02);
|
||||
ret |= gc4653_write_reg(dev, 0x0260, 0x0b);
|
||||
ret |= gc4653_write_reg(dev, 0x0216, 0x04);
|
||||
ret |= gc4653_write_reg(dev, 0x0299, 0x1C);
|
||||
ret |= gc4653_write_reg(dev, 0x02bb, 0x0d);
|
||||
ret |= gc4653_write_reg(dev, 0x02a3, 0x02);
|
||||
ret |= gc4653_write_reg(dev, 0x02a4, 0x02);
|
||||
ret |= gc4653_write_reg(dev, 0x021e, 0x02);
|
||||
ret |= gc4653_write_reg(dev, 0x024f, 0x08);
|
||||
ret |= gc4653_write_reg(dev, 0x028c, 0x08);
|
||||
ret |= gc4653_write_reg(dev, 0x0532, 0x3f);
|
||||
ret |= gc4653_write_reg(dev, 0x0533, 0x02);
|
||||
ret |= gc4653_write_reg(dev, 0x0277, 0xc0);
|
||||
ret |= gc4653_write_reg(dev, 0x0276, 0xc0);
|
||||
ret |= gc4653_write_reg(dev, 0x0239, 0xc0);
|
||||
ret |= gc4653_write_reg(dev, 0x0202, 0x05);
|
||||
ret |= gc4653_write_reg(dev, 0x0203, 0xd0);
|
||||
ret |= gc4653_write_reg(dev, 0x0205, 0xc0);
|
||||
ret |= gc4653_write_reg(dev, 0x02b0, 0x68);
|
||||
ret |= gc4653_write_reg(dev, 0x0002, 0xa9);
|
||||
ret |= gc4653_write_reg(dev, 0x0004, 0x01);
|
||||
ret |= gc4653_write_reg(dev, 0x021a, 0x98);
|
||||
ret |= gc4653_write_reg(dev, 0x0266, 0xa0);
|
||||
ret |= gc4653_write_reg(dev, 0x0020, 0x01);
|
||||
ret |= gc4653_write_reg(dev, 0x0021, 0x03);
|
||||
ret |= gc4653_write_reg(dev, 0x0022, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x0023, 0x04);
|
||||
ret |= gc4653_write_reg(dev, 0x0342, 0x06);
|
||||
ret |= gc4653_write_reg(dev, 0x0343, 0x40);
|
||||
ret |= gc4653_write_reg(dev, 0x03fe, 0x10);
|
||||
ret |= gc4653_write_reg(dev, 0x03fe, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x0106, 0x78);
|
||||
ret |= gc4653_write_reg(dev, 0x0108, 0x0c);
|
||||
ret |= gc4653_write_reg(dev, 0x0114, 0x01);
|
||||
ret |= gc4653_write_reg(dev, 0x0115, 0x12);
|
||||
ret |= gc4653_write_reg(dev, 0x0180, 0x46);
|
||||
ret |= gc4653_write_reg(dev, 0x0181, 0x30);
|
||||
ret |= gc4653_write_reg(dev, 0x0182, 0x05);
|
||||
ret |= gc4653_write_reg(dev, 0x0185, 0x01);
|
||||
ret |= gc4653_write_reg(dev, 0x03fe, 0x10);
|
||||
ret |= gc4653_write_reg(dev, 0x03fe, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x0100, 0x09);
|
||||
ret |= gc4653_write_reg(dev, 0x000f, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x0080, 0x02);
|
||||
ret |= gc4653_write_reg(dev, 0x0097, 0x0a);
|
||||
ret |= gc4653_write_reg(dev, 0x0098, 0x10);
|
||||
ret |= gc4653_write_reg(dev, 0x0099, 0x05);
|
||||
ret |= gc4653_write_reg(dev, 0x009a, 0xb0);
|
||||
ret |= gc4653_write_reg(dev, 0x0317, 0x08);
|
||||
ret |= gc4653_write_reg(dev, 0x0a67, 0x80);
|
||||
ret |= gc4653_write_reg(dev, 0x0a70, 0x03);
|
||||
ret |= gc4653_write_reg(dev, 0x0a82, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x0a83, 0x10);
|
||||
ret |= gc4653_write_reg(dev, 0x0a80, 0x2b);
|
||||
ret |= gc4653_write_reg(dev, 0x05be, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x05a9, 0x01);
|
||||
ret |= gc4653_write_reg(dev, 0x0313, 0x80);
|
||||
ret |= gc4653_write_reg(dev, 0x05be, 0x01);
|
||||
ret |= gc4653_write_reg(dev, 0x0317, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x0a67, 0x00);
|
||||
|
||||
gc4653_delay_ms(18);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc4653_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
SENSOR_PRINT("=======================================================================================\n");
|
||||
SENSOR_PRINT("==== GC4653_27MInput_MIPI_2lane_10bit_linear_2560x1440_30fps init success!=============\n");
|
||||
SENSOR_PRINT("=======================================================================================\n");
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
xmedia_s32 gc4653_init_image(xmedia_u32 dev, xmedia_u8 image_mode)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
switch(image_mode) {
|
||||
case GC4653_4M_10BIT_LINEAR_MODE:
|
||||
ret = gc4653_2lane_linear_2560x1440_init(dev);
|
||||
break;
|
||||
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support, please check image param!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc4653_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_gc4653_i2c_fd[dev] < 0) {
|
||||
SENSOR_PRINT("Sensor dev [%d], i2c not open. please init i2c at first.\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_set_slave_addr(g_gc4653_i2c_fd[dev], slave_addr);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
|
||||
i2c_close(g_gc4653_i2c_fd[dev]);
|
||||
g_gc4653_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
g_gc4653_i2c_addr[dev] = slave_addr;
|
||||
SENSOR_PRINT("Sensor dev [%d] set slave addr 0x%x success.\n", dev, slave_addr);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc4653_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_gc4653_i2c_fd[dev] >= 0) {
|
||||
SENSOR_PRINT("====== Sensor dev [%d], i2c already init !=======\n", dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
if (i2c_dev == SENSOR_I2C_INVALID) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Sensor i2c dev invalid! Please set i2c dev at first!\n");
|
||||
return XMEDIA_ERRCODE_NOT_CONFIG;
|
||||
}
|
||||
|
||||
g_gc4653_i2c_fd[dev] = i2c_open(i2c_dev);
|
||||
if (g_gc4653_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Open /dev/i2c_drv-%u error!\n", i2c_dev);
|
||||
return XMEDIA_ERRCODE_OPEN_FAILED;
|
||||
}
|
||||
|
||||
ret = gc4653_set_slave_addr(dev, i2c_addr);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
SENSOR_PRINT("====== i2c[%d] init success!=======\n", i2c_dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc4653_i2c_exit(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
ret = i2c_close(g_gc4653_i2c_fd[dev]);
|
||||
if(ret < 0 ) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] close i2c failed!\n", dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
g_gc4653_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc4653_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[GC4653_DATA_BYTE];
|
||||
|
||||
if (g_gc4653_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_read(g_gc4653_i2c_fd[dev], g_gc4653_i2c_addr[dev], addr, GC4653_ADDR_BYTE, buf, GC4653_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] read i2c addr [0x%X] failed!\n", dev, addr);
|
||||
return ret;
|
||||
}
|
||||
|
||||
*data = buf[0]; //GC4653_DATA_BYTE == 1
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc4653_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data)
|
||||
{
|
||||
xmedia_u32 idx = 0;
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[8];
|
||||
|
||||
if (g_gc4653_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
buf[idx] = (addr >> 8) & 0xff;
|
||||
idx++;
|
||||
buf[idx] = addr & 0xff;
|
||||
idx++;
|
||||
buf[idx] = data & 0xff;
|
||||
|
||||
ret = i2c_write(g_gc4653_i2c_fd[dev], g_gc4653_i2c_addr[dev], buf, GC4653_ADDR_BYTE + GC4653_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_WRITE error!\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
xmedia_s32 gc4653_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
if ((!mirror_en) && (!flip_en)) {
|
||||
ret |= gc4653_write_reg(dev, 0x031d, 0x2e);
|
||||
ret |= gc4653_write_reg(dev, 0x0101, 0x00);
|
||||
ret |= gc4653_write_reg(dev, 0x031d, 0x28);
|
||||
} else if ((mirror_en) && (!flip_en)) {
|
||||
ret |= gc4653_write_reg(dev, 0x031d, 0x2e);
|
||||
ret |= gc4653_write_reg(dev, 0x0101, 0x01);
|
||||
ret |= gc4653_write_reg(dev, 0x031d, 0x28);
|
||||
} else if ((!mirror_en) && (flip_en)) {
|
||||
ret |= gc4653_write_reg(dev, 0x031d, 0x2e);
|
||||
ret |= gc4653_write_reg(dev, 0x0101, 0x02);
|
||||
ret |= gc4653_write_reg(dev, 0x031d, 0x28);
|
||||
} else if ((mirror_en) && (flip_en)) {
|
||||
ret |= gc4653_write_reg(dev, 0x031d, 0x2e);
|
||||
ret |= gc4653_write_reg(dev, 0x0101, 0x03);
|
||||
ret |= gc4653_write_reg(dev, 0x031d, 0x28);
|
||||
}
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc4653_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,28 @@
|
||||
#ifndef __GC4653_CTRL_H__
|
||||
#define __GC4653_CTRL_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define GC4653_I2C_ADDR 0x52
|
||||
#define GC4653_ADDR_BYTE 2
|
||||
#define GC4653_DATA_BYTE 1
|
||||
|
||||
#define GC4653_4M_10BIT_LINEAR_MODE 1
|
||||
|
||||
xmedia_s32 gc4653_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr);
|
||||
xmedia_s32 gc4653_i2c_exit(xmedia_u32 dev);
|
||||
xmedia_s32 gc4653_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data);
|
||||
xmedia_s32 gc4653_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data);
|
||||
xmedia_s32 gc4653_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en);
|
||||
xmedia_s32 gc4653_init_image(xmedia_u32 dev, xmedia_u8 img_mode);
|
||||
xmedia_s32 gc4653_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //__GC4653_CTRL_H__
|
||||
+58
@@ -0,0 +1,58 @@
|
||||
#ifndef __GC4653_EX_H__
|
||||
#define __GC4653_EX_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// Piris attr
|
||||
static const xmedia_isp_piris_attr g_gc4653_piris_attr = {
|
||||
0,
|
||||
1,
|
||||
94,
|
||||
62,
|
||||
// Step-F number mapping table. Must be from small to large. F1.0 is 1024 and F32.0 is 1
|
||||
{ 30, 35, 40, 45, 50, 56, 61, 67, 73, 79, 85, 92, 98, 105, 112, 120, 127, 135, 143, 150, 158,
|
||||
166, 174, 183, 191, 200, 208, 217, 225, 234, 243, 252, 261, 270, 279, 289, 298, 307, 316, 325, 335, 344,
|
||||
353, 362, 372, 381, 390, 399, 408, 417, 426, 435, 444, 453, 462, 470, 478, 486, 493, 500, 506, 512 },
|
||||
XMEDIA_ISP_IRIS_F_NO_1_4,
|
||||
XMEDIA_ISP_IRIS_F_NO_5_6
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_ccm g_gc4653_awb_ccm = {
|
||||
4,
|
||||
{
|
||||
{
|
||||
6175,
|
||||
{ 440, 32967, 15, 32852, 424, 32852, 11, 33014, 491 },
|
||||
},
|
||||
{
|
||||
4990,
|
||||
{ 443, 32969, 14, 32876, 407, 32811, 32769, 33012, 501 },
|
||||
},
|
||||
{
|
||||
3865,
|
||||
{ 458, 32977, 7, 32853, 389, 32816, 24, 33018, 482 },
|
||||
},
|
||||
{
|
||||
2450,
|
||||
{ 427, 32931, 32776, 32897, 401, 32784, 4, 33168, 652 },
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_gc4653_awb_agc_table = {
|
||||
// bvalid
|
||||
1,
|
||||
|
||||
// 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768
|
||||
// saturation
|
||||
{ 0x80, 0x76, 0x70, 0x6C, 0x69, 0x66, 0x5A, 0x4E, 0x44, 0x40, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38 }
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,7 @@
|
||||
|
||||
ifneq ($(MCU), )
|
||||
include Makefile.riscv
|
||||
else
|
||||
include Makefile.linux
|
||||
endif
|
||||
|
||||
@@ -0,0 +1,18 @@
|
||||
ISP_DIR := $(shell cd ../.. && /bin/pwd)
|
||||
SDK_DIR ?= $(shell cd $(ISP_DIR)/../../../.. && /bin/pwd)
|
||||
|
||||
include $(SDK_DIR)/build/base.mk
|
||||
include $(ISP_DIR)/sensor/plat.mk
|
||||
|
||||
LIB_NAME := libsns_gc4663
|
||||
|
||||
SRCS := $(wildcard *.c)
|
||||
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/usr/include
|
||||
SDK_USR_CFLAGS += -I$(ISP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I.
|
||||
|
||||
$(info SRCS=$(SRCS))
|
||||
|
||||
include $(SDK_DIR)/build/sdk_lib_rules.mk
|
||||
@@ -0,0 +1,4 @@
|
||||
|
||||
SRCS-y += gc4663.c
|
||||
SRCS-y += gc4663_ctrl.c
|
||||
|
||||
+1624
File diff suppressed because it is too large
Load Diff
+73
@@ -0,0 +1,73 @@
|
||||
#ifndef __GC4663_H__
|
||||
#define __GC4663_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define GC4663_FULL_LINES_MAX (0x3FFF)
|
||||
|
||||
#define GC4663_SHUTTER_MAX (0x3fdb)
|
||||
#define GC4663_AGAIN_MIN (1024)
|
||||
#define GC4663_AGAIN_MAX (77660) //the max again is 77660 mean 75.84 recommend
|
||||
#define GC4663_DGAIN_MIN (1024)
|
||||
#define GC4663_DGAIN_MAX (16368) //the max dgain is 16368 mean 15.98 recommend
|
||||
|
||||
#define GC4663_WDR_AGAIN_MIN (1024)
|
||||
#define GC4663_WDR_AGAIN_MAX (113168)
|
||||
|
||||
#define GC4663_INCREASE_LINES (0) /* make real fps less than stand fps because NVR require*/
|
||||
//#define GC4663_VMAX_4M_LINEAR (1500+GC4663_INCREASE_LINES)
|
||||
#define GC4663_VMAX_4M_LINEAR (1500+GC4663_INCREASE_LINES)
|
||||
#define GC4663_VMAX_4M_WDR (1600+GC4663_INCREASE_LINES)
|
||||
|
||||
#define GC4663_EXP_OFFSET_LINEAR 2
|
||||
#define GC4663_EXP_OFFSET_WDR 2
|
||||
|
||||
#define GC4663_REG_DELAY_CONFIG_NUM 0
|
||||
|
||||
#define GC4663_REG_ADDR_EXP_H 0x0203
|
||||
#define GC4663_REG_ADDR_EXP_L 0x0202
|
||||
#define GC4663_REG_ADDR_AGAIN_0_H 0x02b3
|
||||
#define GC4663_REG_ADDR_AGAIN_0_L 0x02b4
|
||||
#define GC4663_REG_ADDR_AGAIN_1_H 0x02b8
|
||||
#define GC4663_REG_ADDR_AGAIN_1_L 0x02b9
|
||||
#define GC4663_REG_ADDR_AGAIN_2 0x0515
|
||||
#define GC4663_REG_ADDR_AGAIN_3 0x0519
|
||||
#define GC4663_REG_ADDR_AGAIN_4 0x02d9
|
||||
#define GC4663_REG_ADDR_DGAIN_H 0x020e
|
||||
#define GC4663_REG_ADDR_DGAIN_L 0x020f
|
||||
#define GC4663_REG_ADDR_VMAX_H 0x0340
|
||||
#define GC4663_REG_ADDR_VMAX_L 0x0341
|
||||
#define GC4663_REG_ADDR_S_EXP_H 0x0201
|
||||
#define GC4663_REG_ADDR_S_EXP_L 0x0200
|
||||
|
||||
typedef enum {
|
||||
GC4663_REG_EXP_H = 0,
|
||||
GC4663_REG_EXP_L,
|
||||
GC4663_REG_AGAIN_0_H,
|
||||
GC4663_REG_AGAIN_0_L,
|
||||
GC4663_REG_AGAIN_1_H,
|
||||
GC4663_REG_AGAIN_1_L,
|
||||
GC4663_REG_AGAIN_2,
|
||||
GC4663_REG_AGAIN_3,
|
||||
GC4663_REG_AGAIN_4,
|
||||
GC4663_REG_DGAIN_H,
|
||||
GC4663_REG_DGAIN_L,
|
||||
GC4663_REG_VMAX_H,
|
||||
GC4663_REG_VMAX_L,
|
||||
GC4663_REG_L_MAX_NUM,
|
||||
|
||||
// short frame reg info from here
|
||||
GC4663_REG_S_EXP_MAX_H = GC4663_REG_L_MAX_NUM,
|
||||
GC4663_REG_S_EXP_MAX_L,
|
||||
GC4663_REG_MAX_NUM
|
||||
} gc4663_reg_info;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __GC4663_H__
|
||||
+565
@@ -0,0 +1,565 @@
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "i2c_dev.h"
|
||||
#include "gc4663.h"
|
||||
#include "gc4663_ctrl.h"
|
||||
|
||||
static xmedia_s32 g_gc4663_i2c_addr[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
static xmedia_s32 g_gc4663_i2c_fd[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
#define GC4663_REG_ADDR_MIRROR_FLIP 0x0101
|
||||
|
||||
static xmedia_void gc4663_delay_ms(xmedia_s32 ms)
|
||||
{
|
||||
usleep(ms * 1000);
|
||||
}
|
||||
|
||||
/*
|
||||
* 函数功能: gc4663 MIPI 2lane 4M线性模式初始化序列 - 2560x1440x30fps
|
||||
* 函数参数：
|
||||
* dev - sensor 设备号
|
||||
* 返回值：
|
||||
*
|
||||
*/
|
||||
static xmedia_s32 gc4663_2lane_linear_2560x1440_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
ret |= gc4663_write_reg(dev, 0x0100, 0x00); // standby
|
||||
gc4663_delay_ms(10);
|
||||
ret |= gc4663_write_reg(dev, 0x03fe, 0xf0);
|
||||
ret |= gc4663_write_reg(dev, 0x03fe, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0317, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0320, 0x77);
|
||||
ret |= gc4663_write_reg(dev, 0x0324, 0xc8);
|
||||
ret |= gc4663_write_reg(dev, 0x0325, 0x06);
|
||||
ret |= gc4663_write_reg(dev, 0x0326, 0x6c);
|
||||
ret |= gc4663_write_reg(dev, 0x0327, 0x03);
|
||||
ret |= gc4663_write_reg(dev, 0x0334, 0x40);
|
||||
ret |= gc4663_write_reg(dev, 0x0336, 0x6c);
|
||||
ret |= gc4663_write_reg(dev, 0x0337, 0x82);
|
||||
ret |= gc4663_write_reg(dev, 0x0315, 0x25);
|
||||
ret |= gc4663_write_reg(dev, 0x031c, 0xc6);
|
||||
/****************************************/
|
||||
/*frame structure*/
|
||||
/****************************************/
|
||||
ret |= gc4663_write_reg(dev, 0x0287, 0x18);
|
||||
ret |= gc4663_write_reg(dev, 0x0084, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0087, 0x50);
|
||||
ret |= gc4663_write_reg(dev, 0x029d, 0x08);
|
||||
ret |= gc4663_write_reg(dev, 0x0290, 0x00);
|
||||
/**********AHD 30 other need change ******************/
|
||||
ret |= gc4663_write_reg(dev, 0x0340, 0x05); // vts: 0x5dc
|
||||
ret |= gc4663_write_reg(dev, 0x0341, 0xdc);
|
||||
ret |= gc4663_write_reg(dev, 0x0345, 0x06);
|
||||
ret |= gc4663_write_reg(dev, 0x034b, 0xb0);
|
||||
ret |= gc4663_write_reg(dev, 0x0352, 0x08);
|
||||
ret |= gc4663_write_reg(dev, 0x0354, 0x08);
|
||||
/****************************************/
|
||||
/*ANALOG CIRCUIT*/
|
||||
/****************************************/
|
||||
ret |= gc4663_write_reg(dev, 0x02d1, 0xe0);
|
||||
ret |= gc4663_write_reg(dev, 0x0223, 0xf2);
|
||||
ret |= gc4663_write_reg(dev, 0x0238, 0xa4);
|
||||
ret |= gc4663_write_reg(dev, 0x02ce, 0x7f);
|
||||
ret |= gc4663_write_reg(dev, 0x0232, 0xc4);
|
||||
ret |= gc4663_write_reg(dev, 0x02d3, 0x05);
|
||||
ret |= gc4663_write_reg(dev, 0x0243, 0x06);
|
||||
ret |= gc4663_write_reg(dev, 0x02ee, 0x30);
|
||||
ret |= gc4663_write_reg(dev, 0x026f, 0x70);
|
||||
ret |= gc4663_write_reg(dev, 0x0257, 0x09);
|
||||
ret |= gc4663_write_reg(dev, 0x0211, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x0219, 0x09);
|
||||
ret |= gc4663_write_reg(dev, 0x023f, 0x2d);
|
||||
ret |= gc4663_write_reg(dev, 0x0518, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0519, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x0515, 0x08);
|
||||
ret |= gc4663_write_reg(dev, 0x02d9, 0x3f);
|
||||
ret |= gc4663_write_reg(dev, 0x02da, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x02db, 0xe8);
|
||||
ret |= gc4663_write_reg(dev, 0x02e6, 0x20);
|
||||
ret |= gc4663_write_reg(dev, 0x021b, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x0252, 0x22);
|
||||
ret |= gc4663_write_reg(dev, 0x024e, 0x22);
|
||||
ret |= gc4663_write_reg(dev, 0x02c4, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x021d, 0x17);
|
||||
ret |= gc4663_write_reg(dev, 0x024a, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x02ca, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x0262, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x029a, 0x20);
|
||||
ret |= gc4663_write_reg(dev, 0x021c, 0x0e);
|
||||
ret |= gc4663_write_reg(dev, 0x0298, 0x03);
|
||||
ret |= gc4663_write_reg(dev, 0x029c, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x027e, 0x14);
|
||||
ret |= gc4663_write_reg(dev, 0x02c2, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x0540, 0x20);
|
||||
ret |= gc4663_write_reg(dev, 0x0546, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x0548, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x0544, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x0242, 0x1b);
|
||||
ret |= gc4663_write_reg(dev, 0x02c0, 0x1b);
|
||||
ret |= gc4663_write_reg(dev, 0x02c3, 0x20);
|
||||
ret |= gc4663_write_reg(dev, 0x02e4, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x022e, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x027b, 0x3f);
|
||||
ret |= gc4663_write_reg(dev, 0x0269, 0x0f);
|
||||
ret |= gc4663_write_reg(dev, 0x000f, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x02d2, 0x40);
|
||||
ret |= gc4663_write_reg(dev, 0x027c, 0x08);
|
||||
ret |= gc4663_write_reg(dev, 0x023a, 0x2e);
|
||||
ret |= gc4663_write_reg(dev, 0x0245, 0xce);
|
||||
ret |= gc4663_write_reg(dev, 0x0530, 0x20);
|
||||
ret |= gc4663_write_reg(dev, 0x0531, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x0228, 0x50);
|
||||
ret |= gc4663_write_reg(dev, 0x02ab, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0250, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0221, 0x50);
|
||||
ret |= gc4663_write_reg(dev, 0x02ac, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x02a5, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x0260, 0x0b);
|
||||
ret |= gc4663_write_reg(dev, 0x0216, 0x04);
|
||||
ret |= gc4663_write_reg(dev, 0x0299, 0x1C);
|
||||
ret |= gc4663_write_reg(dev, 0x02bb, 0x0d);
|
||||
ret |= gc4663_write_reg(dev, 0x02a3, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x02a4, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x021e, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x024f, 0x08);
|
||||
ret |= gc4663_write_reg(dev, 0x028c, 0x08);
|
||||
ret |= gc4663_write_reg(dev, 0x0532, 0x3f);
|
||||
ret |= gc4663_write_reg(dev, 0x0533, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x0277, 0xc0);
|
||||
ret |= gc4663_write_reg(dev, 0x0276, 0xc0);
|
||||
ret |= gc4663_write_reg(dev, 0x0239, 0xc0);
|
||||
/*exp*/
|
||||
ret |= gc4663_write_reg(dev, 0x0202, 0x05);
|
||||
ret |= gc4663_write_reg(dev, 0x0203, 0xd0);
|
||||
/*gain*/
|
||||
ret |= gc4663_write_reg(dev, 0x0205, 0xc0);
|
||||
ret |= gc4663_write_reg(dev, 0x02b0, 0x68);
|
||||
/*dpc*/
|
||||
ret |= gc4663_write_reg(dev, 0x0002, 0xa9);
|
||||
ret |= gc4663_write_reg(dev, 0x0004, 0x01);
|
||||
/*dark_sun*/
|
||||
ret |= gc4663_write_reg(dev, 0x021a, 0x98);
|
||||
ret |= gc4663_write_reg(dev, 0x0266, 0xa0);
|
||||
ret |= gc4663_write_reg(dev, 0x0020, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x0021, 0x03);
|
||||
ret |= gc4663_write_reg(dev, 0x0022, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0023, 0x04);
|
||||
|
||||
ret |= gc4663_write_reg(dev, 0x010d, 0x6a);
|
||||
ret |= gc4663_write_reg(dev, 0x010e, 0x09);
|
||||
|
||||
ret |= gc4663_write_reg(dev, 0x034c, 0x0a);
|
||||
ret |= gc4663_write_reg(dev, 0x034d, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x034e, 0x05);
|
||||
ret |= gc4663_write_reg(dev, 0x034f, 0xa0);
|
||||
|
||||
ret |= gc4663_write_reg(dev, 0x0352, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0353, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0354, 0x00);
|
||||
|
||||
/****************************************/
|
||||
/*mipi*/
|
||||
/****************************************/
|
||||
/*********** AHD 30 ******************/
|
||||
/*30fps*/
|
||||
ret |= gc4663_write_reg(dev, 0x0342, 0x06);
|
||||
ret |= gc4663_write_reg(dev, 0x0343, 0x40);
|
||||
/*30fps*/
|
||||
ret |= gc4663_write_reg(dev, 0x03fe, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x03fe, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0106, 0x78);
|
||||
ret |= gc4663_write_reg(dev, 0x0108, 0x0c);
|
||||
ret |= gc4663_write_reg(dev, 0x0114, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x0115, 0x12);
|
||||
ret |= gc4663_write_reg(dev, 0x0180, 0x46);
|
||||
ret |= gc4663_write_reg(dev, 0x0181, 0x30);
|
||||
ret |= gc4663_write_reg(dev, 0x0182, 0x05);
|
||||
ret |= gc4663_write_reg(dev, 0x0185, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x03fe, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x03fe, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0100, 0x09);
|
||||
ret |= gc4663_write_reg(dev, 0x0080, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x0097, 0x0a);
|
||||
ret |= gc4663_write_reg(dev, 0x0098, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x0099, 0x05);
|
||||
ret |= gc4663_write_reg(dev, 0x009a, 0xb0);
|
||||
ret |= gc4663_write_reg(dev, 0x0317, 0x08);
|
||||
ret |= gc4663_write_reg(dev, 0x0a67, 0x80);
|
||||
ret |= gc4663_write_reg(dev, 0x0a70, 0x03);
|
||||
ret |= gc4663_write_reg(dev, 0x0a82, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0a83, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x0a80, 0x2b);
|
||||
ret |= gc4663_write_reg(dev, 0x05be, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x05a9, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x0313, 0x80);
|
||||
ret |= gc4663_write_reg(dev, 0x05be, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x0317, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0a67, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0100, 0x09); // resume
|
||||
gc4663_delay_ms(18);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc4663_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
} else {
|
||||
SENSOR_PRINT("=======================================================================\n");
|
||||
SENSOR_PRINT("=== GC4663_24MInput_MIPI_2lane_10bit_2560x1440_30fps init success!=====\n");
|
||||
SENSOR_PRINT("=======================================================================\n");
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* 函数功能: gc4663 MIPI 2lanes 4M wdr初始化序列 - 2560x1440x25fps
|
||||
* 函数参数：
|
||||
* dev - sensor 设备号
|
||||
* 返回值：
|
||||
*
|
||||
*/
|
||||
static xmedia_s32 gc4663_2lane_wdr_2560x1440_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
/***************************************
|
||||
*version 4.2
|
||||
*mclk 24Mhz
|
||||
*mipidata rate 1080Mbps
|
||||
*framelength 1600 ,vb=108
|
||||
*exp_L <= vb ,vb=frame_length-window_height-20-16
|
||||
*exp_H+exp_L<= framelength
|
||||
*if exp1 * 16 = exp2
|
||||
*exp1_max = 94,exp2_max = 1504
|
||||
*linelength
|
||||
*pclk
|
||||
*rowtime 12.5us,frame rate=25fps
|
||||
*pattern grbg
|
||||
*/
|
||||
ret |= gc4663_write_reg(dev, 0x0100, 0x00);
|
||||
gc4663_delay_ms(1000);
|
||||
ret |= gc4663_write_reg(dev, 0x03fe, 0xf0);
|
||||
ret |= gc4663_write_reg(dev, 0x03fe, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0317, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0320, 0x77);
|
||||
ret |= gc4663_write_reg(dev, 0x0324, 0xc4);
|
||||
ret |= gc4663_write_reg(dev, 0x0326, 0x37);
|
||||
ret |= gc4663_write_reg(dev, 0x0327, 0x03);
|
||||
ret |= gc4663_write_reg(dev, 0x0321, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x0314, 0x50);
|
||||
ret |= gc4663_write_reg(dev, 0x0334, 0x40);
|
||||
ret |= gc4663_write_reg(dev, 0x0335, 0xd1);
|
||||
ret |= gc4663_write_reg(dev, 0x0336, 0x5a);
|
||||
ret |= gc4663_write_reg(dev, 0x0337, 0x82);
|
||||
ret |= gc4663_write_reg(dev, 0x0315, 0x33);
|
||||
ret |= gc4663_write_reg(dev, 0x031c, 0xce);
|
||||
ret |= gc4663_write_reg(dev, 0x0287, 0x18);
|
||||
ret |= gc4663_write_reg(dev, 0x0084, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0087, 0x50);
|
||||
ret |= gc4663_write_reg(dev, 0x029d, 0x08);
|
||||
ret |= gc4663_write_reg(dev, 0x0290, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0340, 0x06);
|
||||
ret |= gc4663_write_reg(dev, 0x0341, 0x40);
|
||||
ret |= gc4663_write_reg(dev, 0x0345, 0x06);
|
||||
ret |= gc4663_write_reg(dev, 0x034b, 0xb0);
|
||||
ret |= gc4663_write_reg(dev, 0x0352, 0x08);
|
||||
ret |= gc4663_write_reg(dev, 0x0354, 0x08);
|
||||
ret |= gc4663_write_reg(dev, 0x02d1, 0xc0);
|
||||
ret |= gc4663_write_reg(dev, 0x023c, 0x04);
|
||||
ret |= gc4663_write_reg(dev, 0x0238, 0xb4);
|
||||
ret |= gc4663_write_reg(dev, 0x0223, 0xfb);
|
||||
ret |= gc4663_write_reg(dev, 0x0232, 0xc4);
|
||||
ret |= gc4663_write_reg(dev, 0x0279, 0x53);
|
||||
ret |= gc4663_write_reg(dev, 0x02d3, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x0243, 0x06);
|
||||
ret |= gc4663_write_reg(dev, 0x02ce, 0xbf);
|
||||
ret |= gc4663_write_reg(dev, 0x02ee, 0x30);
|
||||
ret |= gc4663_write_reg(dev, 0x026f, 0x70);
|
||||
ret |= gc4663_write_reg(dev, 0x0257, 0x09);
|
||||
ret |= gc4663_write_reg(dev, 0x0211, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x0219, 0x09);
|
||||
ret |= gc4663_write_reg(dev, 0x023f, 0x2d);
|
||||
ret |= gc4663_write_reg(dev, 0x0518, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0519, 0x14);
|
||||
ret |= gc4663_write_reg(dev, 0x0515, 0x18);
|
||||
ret |= gc4663_write_reg(dev, 0x02d9, 0x50);
|
||||
ret |= gc4663_write_reg(dev, 0x02da, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x02db, 0xe8);
|
||||
ret |= gc4663_write_reg(dev, 0x02e6, 0x20);
|
||||
ret |= gc4663_write_reg(dev, 0x021b, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x0252, 0x22);
|
||||
ret |= gc4663_write_reg(dev, 0x024e, 0x22);
|
||||
ret |= gc4663_write_reg(dev, 0x02c4, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x021d, 0x17);
|
||||
ret |= gc4663_write_reg(dev, 0x024a, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x02ca, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x0262, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x029a, 0x20);
|
||||
ret |= gc4663_write_reg(dev, 0x021c, 0x0e);
|
||||
ret |= gc4663_write_reg(dev, 0x0298, 0x03);
|
||||
ret |= gc4663_write_reg(dev, 0x029c, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x027e, 0x14);
|
||||
ret |= gc4663_write_reg(dev, 0x02c2, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x0540, 0x20);
|
||||
ret |= gc4663_write_reg(dev, 0x0546, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x0548, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x0544, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x0242, 0x36);
|
||||
ret |= gc4663_write_reg(dev, 0x02c0, 0x36);
|
||||
ret |= gc4663_write_reg(dev, 0x02c3, 0x4d);
|
||||
ret |= gc4663_write_reg(dev, 0x02e4, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x022e, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x027b, 0x3f);
|
||||
ret |= gc4663_write_reg(dev, 0x0269, 0x0f);
|
||||
ret |= gc4663_write_reg(dev, 0x02d2, 0x40);
|
||||
ret |= gc4663_write_reg(dev, 0x027c, 0x08);
|
||||
ret |= gc4663_write_reg(dev, 0x023a, 0x2e);
|
||||
ret |= gc4663_write_reg(dev, 0x0245, 0xce);
|
||||
ret |= gc4663_write_reg(dev, 0x0530, 0x3f);
|
||||
ret |= gc4663_write_reg(dev, 0x0531, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x0228, 0x50);
|
||||
ret |= gc4663_write_reg(dev, 0x02ab, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0250, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0221, 0x50);
|
||||
ret |= gc4663_write_reg(dev, 0x02ac, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x02a5, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x0260, 0x0b);
|
||||
ret |= gc4663_write_reg(dev, 0x0216, 0x04);
|
||||
ret |= gc4663_write_reg(dev, 0x0299, 0x1C);
|
||||
ret |= gc4663_write_reg(dev, 0x021a, 0x98);
|
||||
ret |= gc4663_write_reg(dev, 0x0266, 0xd0);
|
||||
ret |= gc4663_write_reg(dev, 0x0020, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x0021, 0x05);
|
||||
ret |= gc4663_write_reg(dev, 0x0022, 0xc0);
|
||||
ret |= gc4663_write_reg(dev, 0x0023, 0x08);
|
||||
ret |= gc4663_write_reg(dev, 0x0098, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x009a, 0xb0);
|
||||
ret |= gc4663_write_reg(dev, 0x02bb, 0x0d);
|
||||
ret |= gc4663_write_reg(dev, 0x02a3, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x02a4, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x021e, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x024f, 0x08);
|
||||
ret |= gc4663_write_reg(dev, 0x028c, 0x08);
|
||||
ret |= gc4663_write_reg(dev, 0x0532, 0x3f);
|
||||
ret |= gc4663_write_reg(dev, 0x0533, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x0277, 0x70);
|
||||
ret |= gc4663_write_reg(dev, 0x0276, 0xc0);
|
||||
ret |= gc4663_write_reg(dev, 0x0239, 0xc0);
|
||||
ret |= gc4663_write_reg(dev, 0x0200, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0201, 0x50);
|
||||
ret |= gc4663_write_reg(dev, 0x0202, 0x05);
|
||||
ret |= gc4663_write_reg(dev, 0x0203, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0205, 0xc0);
|
||||
ret |= gc4663_write_reg(dev, 0x02b0, 0x68);
|
||||
ret |= gc4663_write_reg(dev, 0x000f, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0006, 0xe0);
|
||||
ret |= gc4663_write_reg(dev, 0x0002, 0xa9);
|
||||
ret |= gc4663_write_reg(dev, 0x0004, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x0060, 0x40);
|
||||
ret |= gc4663_write_reg(dev, 0x0218, 0x12);
|
||||
ret |= gc4663_write_reg(dev, 0x0342, 0x05);
|
||||
ret |= gc4663_write_reg(dev, 0x0343, 0x5f);
|
||||
ret |= gc4663_write_reg(dev, 0x03fe, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x03fe, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0106, 0x78);
|
||||
ret |= gc4663_write_reg(dev, 0x0107, 0x89);
|
||||
ret |= gc4663_write_reg(dev, 0x0108, 0x0c);
|
||||
ret |= gc4663_write_reg(dev, 0x0114, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x0115, 0x12);
|
||||
ret |= gc4663_write_reg(dev, 0x0129, 0x09);
|
||||
ret |= gc4663_write_reg(dev, 0x0180, 0x4f);
|
||||
ret |= gc4663_write_reg(dev, 0x0181, 0x30);
|
||||
ret |= gc4663_write_reg(dev, 0x0182, 0x05);
|
||||
ret |= gc4663_write_reg(dev, 0x0185, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x03fe, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x03fe, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0100, 0x09);
|
||||
ret |= gc4663_write_reg(dev, 0x0080, 0x02);
|
||||
ret |= gc4663_write_reg(dev, 0x0097, 0x0a);
|
||||
ret |= gc4663_write_reg(dev, 0x0098, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x0099, 0x05);
|
||||
ret |= gc4663_write_reg(dev, 0x009a, 0xb0);
|
||||
ret |= gc4663_write_reg(dev, 0x0317, 0x08);
|
||||
ret |= gc4663_write_reg(dev, 0x0a67, 0x80);
|
||||
ret |= gc4663_write_reg(dev, 0x0a70, 0x03);
|
||||
ret |= gc4663_write_reg(dev, 0x0a82, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0a83, 0x10);
|
||||
ret |= gc4663_write_reg(dev, 0x0a80, 0x2b);
|
||||
ret |= gc4663_write_reg(dev, 0x05be, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x05a9, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x0313, 0x80);
|
||||
ret |= gc4663_write_reg(dev, 0x05be, 0x01);
|
||||
ret |= gc4663_write_reg(dev, 0x0317, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0a67, 0x00);
|
||||
ret |= gc4663_write_reg(dev, 0x0100, 0x09);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc4663_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}else {
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
SENSOR_PRINT("=== GC4663_raw10_2560X1440_2to1wdr_25fps_2lane_24M init success!================\n");
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
xmedia_s32 gc4663_init_image(xmedia_u32 dev, xmedia_u8 image_mode)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
switch(image_mode) {
|
||||
case GC4663_4M_10BIT_LINEAR_MODE:
|
||||
ret = gc4663_2lane_linear_2560x1440_init(dev);
|
||||
break;
|
||||
|
||||
case GC4663_4M_10BIT_WDR_MODE:
|
||||
ret = gc4663_2lane_wdr_2560x1440_init(dev);
|
||||
break;
|
||||
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support, please check image param!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc4663_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_gc4663_i2c_fd[dev] < 0) {
|
||||
SENSOR_PRINT("Sensor dev [%d], i2c not open. please init i2c at first.\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_set_slave_addr(g_gc4663_i2c_fd[dev], slave_addr);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
|
||||
i2c_close(g_gc4663_i2c_fd[dev]);
|
||||
g_gc4663_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
g_gc4663_i2c_addr[dev] = slave_addr;
|
||||
SENSOR_PRINT("Sensor dev [%d] set slave addr 0x%x success.\n", dev, slave_addr);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc4663_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_gc4663_i2c_fd[dev] >= 0) {
|
||||
SENSOR_PRINT("====== Sensor dev [%d], i2c already init !=======\n", dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
if (i2c_dev == SENSOR_I2C_INVALID) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Sensor i2c dev invalid! Please set i2c dev at first!\n");
|
||||
return XMEDIA_ERRCODE_NOT_CONFIG;
|
||||
}
|
||||
|
||||
g_gc4663_i2c_fd[dev] = i2c_open(i2c_dev);
|
||||
if (g_gc4663_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Open /dev/i2c_drv-%u error!\n", i2c_dev);
|
||||
return XMEDIA_ERRCODE_OPEN_FAILED;
|
||||
}
|
||||
|
||||
ret = gc4663_set_slave_addr(dev, i2c_addr);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
SENSOR_PRINT("====== i2c[%d] init success!=======\n", i2c_dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc4663_i2c_exit(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
ret = i2c_close(g_gc4663_i2c_fd[dev]);
|
||||
if(ret < 0 ) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] close i2c failed!\n", dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
g_gc4663_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc4663_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[GC4663_DATA_BYTE];
|
||||
|
||||
if (g_gc4663_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_read(g_gc4663_i2c_fd[dev], g_gc4663_i2c_addr[dev], addr, GC4663_ADDR_BYTE, buf, GC4663_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] read i2c addr [0x%X] failed!\n", dev, addr);
|
||||
return ret;
|
||||
}
|
||||
|
||||
*data = buf[0]; //GC4663_DATA_BYTE == 1
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc4663_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data)
|
||||
{
|
||||
xmedia_u32 idx = 0;
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[8];
|
||||
|
||||
if (g_gc4663_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
buf[idx] = (addr >> 8) & 0xff;
|
||||
idx++;
|
||||
buf[idx] = addr & 0xff;
|
||||
idx++;
|
||||
buf[idx] = data & 0xff;
|
||||
|
||||
ret = i2c_write(g_gc4663_i2c_fd[dev], g_gc4663_i2c_addr[dev], buf, GC4663_ADDR_BYTE + GC4663_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_WRITE error!\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
xmedia_s32 gc4663_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u32 mirror_flip_type;
|
||||
|
||||
gc4663_read_reg(dev, GC4663_REG_ADDR_MIRROR_FLIP, &mirror_flip_type);
|
||||
|
||||
if (mirror_en){
|
||||
mirror_flip_type |= 0x01;
|
||||
} else {
|
||||
mirror_flip_type &= 0xfe;
|
||||
}
|
||||
|
||||
if (flip_en){
|
||||
mirror_flip_type |= 0x02;
|
||||
} else {
|
||||
mirror_flip_type &= 0xfd;
|
||||
}
|
||||
|
||||
ret = gc4663_write_reg(dev, GC4663_REG_ADDR_MIRROR_FLIP, mirror_flip_type);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc4663_write_reg failed\n");
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
@@ -0,0 +1,30 @@
|
||||
#ifndef __GC4663_CTRL_H__
|
||||
#define __GC4663_CTRL_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define GC4663_I2C_ADDR 0x52
|
||||
#define GC4663_ADDR_BYTE 2
|
||||
#define GC4663_DATA_BYTE 1
|
||||
|
||||
// gc4663 specs list
|
||||
#define GC4663_4M_10BIT_LINEAR_MODE 1 // 2560x1440x30fps
|
||||
#define GC4663_4M_10BIT_WDR_MODE 2 // 2560x1440x25fps
|
||||
|
||||
xmedia_s32 gc4663_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr);
|
||||
xmedia_s32 gc4663_i2c_exit(xmedia_u32 dev);
|
||||
xmedia_s32 gc4663_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data);
|
||||
xmedia_s32 gc4663_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data);
|
||||
xmedia_s32 gc4663_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en);
|
||||
xmedia_s32 gc4663_init_image(xmedia_u32 dev, xmedia_u8 img_mode);
|
||||
xmedia_s32 gc4663_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //__GC4663_CTRL_H__
|
||||
+1012
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,5 @@
|
||||
ifneq ($(MCU), )
|
||||
include Makefile.riscv
|
||||
else
|
||||
include Makefile.linux
|
||||
endif
|
||||
@@ -0,0 +1,20 @@
|
||||
ISP_DIR := $(shell cd ../.. && /bin/pwd)
|
||||
SDK_DIR ?= $(shell cd $(ISP_DIR)/../../../.. && /bin/pwd)
|
||||
|
||||
include $(SDK_DIR)/build/base.mk
|
||||
include $(ISP_DIR)/sensor/plat.mk
|
||||
|
||||
LIB_NAME := libsns_gc4683
|
||||
|
||||
SRCS := $(wildcard *.c)
|
||||
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/usr/include
|
||||
SDK_USR_CFLAGS += -I$(ISP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I$(ISP_DIR)/../include
|
||||
SDK_USR_CFLAGS += -I.
|
||||
AT := @
|
||||
|
||||
$(info SRCS=$(SRCS))
|
||||
|
||||
include $(SDK_DIR)/build/sdk_lib_rules.mk
|
||||
@@ -0,0 +1,4 @@
|
||||
|
||||
SRCS-y += gc4683.c
|
||||
SRCS-y += gc4683_ctrl.c
|
||||
|
||||
+1319
File diff suppressed because it is too large
Load Diff
+57
@@ -0,0 +1,57 @@
|
||||
#ifndef __GC4683_H__
|
||||
#define __GC4683_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define GC4683_VMAX_4M_LINEAR 0x0c80
|
||||
|
||||
#define GC4683_FULL_LINES_MAX 0x3FFF
|
||||
|
||||
// GC4683 Register Address
|
||||
#define GC4683_REG_ADDR_EXP_H 0x0202
|
||||
#define GC4683_REG_ADDR_EXP_L 0x0203
|
||||
|
||||
#define GC4683_REG_ADDR_AGAIN_1 0x02aa
|
||||
#define GC4683_REG_ADDR_AGAIN_2 0x02ab
|
||||
#define GC4683_REG_ADDR_AGAIN_3 0x02a9
|
||||
#define GC4683_REG_ADDR_AGAIN_4 0x14ac
|
||||
#define GC4683_REG_ADDR_AGAIN_5 0x1476
|
||||
#define GC4683_REG_ADDR_AGAIN_6 0x1467
|
||||
#define GC4683_REG_ADDR_AGAIN_7 0x1468
|
||||
#define GC4683_REG_ADDR_AGAIN_8 0x00a8
|
||||
#define GC4683_REG_ADDR_AGAIN_9 0x00a9
|
||||
#define GC4683_REG_ADDR_DGAIN_H 0x0064
|
||||
#define GC4683_REG_ADDR_DGAIN_L 0x0065
|
||||
#define GC4683_REG_ADDR_VMAX_H 0x0340
|
||||
#define GC4683_REG_ADDR_VMAX_L 0x0341
|
||||
|
||||
#define GC4683_EXP_OFFSET 8
|
||||
|
||||
typedef enum {
|
||||
GC4683_REG_EXP_H = 0,
|
||||
GC4683_REG_EXP_L,
|
||||
GC4683_REG_AGAIN_1,
|
||||
GC4683_REG_AGAIN_2,
|
||||
GC4683_REG_AGAIN_3,
|
||||
GC4683_REG_AGAIN_4,
|
||||
GC4683_REG_AGAIN_5,
|
||||
GC4683_REG_AGAIN_6,
|
||||
GC4683_REG_AGAIN_7,
|
||||
GC4683_REG_AGAIN_8,
|
||||
GC4683_REG_AGAIN_9,
|
||||
GC4683_REG_DGAIN_H,
|
||||
GC4683_REG_DGAIN_L,
|
||||
GC4683_REG_VMAX_H,
|
||||
GC4683_REG_VMAX_L,
|
||||
GC4683_REG_MAX_NUM
|
||||
} gc4683_reg_index;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __GC4683_H__
|
||||
+462
@@ -0,0 +1,462 @@
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "i2c_dev.h"
|
||||
#include "gc4683.h"
|
||||
#include "gc4683_ctrl.h"
|
||||
|
||||
#define GC4683_REG_ADDR_MIRROR_FLIP 0x022c
|
||||
|
||||
static xmedia_s32 g_gc4683_i2c_fd[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
static xmedia_s32 g_gc4683_i2c_addr[XMEDIA_SENSOR_DEV_MAX_NUM] =
|
||||
{ [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] = SENSOR_I2C_INVALID };
|
||||
|
||||
static void gc4683_delay_ms(xmedia_s32 ms)
|
||||
{
|
||||
usleep(ms * 1000); // 1ms: 1000us
|
||||
return;
|
||||
}
|
||||
|
||||
static xmedia_s32 gc4683_4lane_linear_2560x1440_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
//version:0e70f3
|
||||
//<MODE_2 type="00_GC4683_MIPI4L_27M_2560x1440_30fps_raw10_linear">
|
||||
//<RESOLUTION width="2560" height="1440"/>
|
||||
//<MCLK type="27.0"/>
|
||||
//<BAYERMODE type="GrRBGb"/>
|
||||
//mipi_rate 801Mbps/lane
|
||||
//wpclk=211.5Mhz
|
||||
//rpclk=319.5Mhz
|
||||
//FL=3200
|
||||
//HB=552
|
||||
ret|=gc4683_write_reg(dev,0x03fe,0xf0);
|
||||
ret|=gc4683_write_reg(dev,0x03fe,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x03fe,0x10);
|
||||
ret|=gc4683_write_reg(dev,0x0a38,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x0a38,0x05);
|
||||
ret|=gc4683_write_reg(dev,0x0331,0x07);
|
||||
ret|=gc4683_write_reg(dev,0x0320,0xf2);
|
||||
ret|=gc4683_write_reg(dev,0x0a22,0x04);
|
||||
ret|=gc4683_write_reg(dev,0x0a27,0x02);
|
||||
ret|=gc4683_write_reg(dev,0x0a20,0x1a);
|
||||
ret|=gc4683_write_reg(dev,0x0a21,0x1a);
|
||||
ret|=gc4683_write_reg(dev,0x032b,0x54);
|
||||
ret|=gc4683_write_reg(dev,0x032a,0x55);
|
||||
ret|=gc4683_write_reg(dev,0x0a22,0x17);
|
||||
ret|=gc4683_write_reg(dev,0x0a23,0x24);
|
||||
ret|=gc4683_write_reg(dev,0x0a24,0x0c);
|
||||
ret|=gc4683_write_reg(dev,0x0a25,0x47);
|
||||
ret|=gc4683_write_reg(dev,0x0a34,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x0a35,0x60);
|
||||
ret|=gc4683_write_reg(dev,0x0a36,0x0c);
|
||||
ret|=gc4683_write_reg(dev,0x0a37,0x59);
|
||||
ret|=gc4683_write_reg(dev,0x0a27,0x0b);
|
||||
ret|=gc4683_write_reg(dev,0x0a28,0x24);
|
||||
ret|=gc4683_write_reg(dev,0x0a29,0x14);
|
||||
ret|=gc4683_write_reg(dev,0x0a2a,0x9d);
|
||||
ret|=gc4683_write_reg(dev,0x031c,0x46);
|
||||
ret|=gc4683_write_reg(dev,0x0213,0x1c);
|
||||
ret|=gc4683_write_reg(dev,0x0219,0xc7);
|
||||
ret|=gc4683_write_reg(dev,0x0261,0x98);
|
||||
ret|=gc4683_write_reg(dev,0x0342,0x02);
|
||||
ret|=gc4683_write_reg(dev,0x0343,0x28);
|
||||
ret|=gc4683_write_reg(dev,0x0259,0x06);
|
||||
ret|=gc4683_write_reg(dev,0x025a,0x18);
|
||||
ret|=gc4683_write_reg(dev,0x0340,0x0c);
|
||||
ret|=gc4683_write_reg(dev,0x0341,0x80);
|
||||
ret|=gc4683_write_reg(dev,0x0346,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x0347,0x30);
|
||||
ret|=gc4683_write_reg(dev,0x0348,0x0a);
|
||||
ret|=gc4683_write_reg(dev,0x0349,0x08);
|
||||
ret|=gc4683_write_reg(dev,0x034a,0x05);
|
||||
ret|=gc4683_write_reg(dev,0x034b,0xa8);
|
||||
ret|=gc4683_write_reg(dev,0x034e,0x0a);
|
||||
ret|=gc4683_write_reg(dev,0x034f,0xb0);
|
||||
ret|=gc4683_write_reg(dev,0x0094,0x0a);
|
||||
ret|=gc4683_write_reg(dev,0x0095,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x0096,0x05);
|
||||
ret|=gc4683_write_reg(dev,0x0097,0xa0);
|
||||
ret|=gc4683_write_reg(dev,0x0099,0x04);
|
||||
ret|=gc4683_write_reg(dev,0x009b,0x04);
|
||||
ret|=gc4683_write_reg(dev,0x070c,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x070d,0x0a);
|
||||
ret|=gc4683_write_reg(dev,0x070e,0x05);
|
||||
ret|=gc4683_write_reg(dev,0x070f,0x0e);
|
||||
ret|=gc4683_write_reg(dev,0x0902,0x0b);
|
||||
ret|=gc4683_write_reg(dev,0x0903,0x03);
|
||||
ret|=gc4683_write_reg(dev,0x0904,0x0a);
|
||||
ret|=gc4683_write_reg(dev,0x0907,0x35);
|
||||
ret|=gc4683_write_reg(dev,0x0909,0x07);
|
||||
ret|=gc4683_write_reg(dev,0x090d,0x0c);
|
||||
ret|=gc4683_write_reg(dev,0x0276,0x07);
|
||||
ret|=gc4683_write_reg(dev,0x0277,0xa4);
|
||||
ret|=gc4683_write_reg(dev,0x0278,0x3d);
|
||||
ret|=gc4683_write_reg(dev,0x0279,0x57);
|
||||
ret|=gc4683_write_reg(dev,0x027b,0x16);
|
||||
ret|=gc4683_write_reg(dev,0x072a,0x38);
|
||||
ret|=gc4683_write_reg(dev,0x0724,0x03);
|
||||
ret|=gc4683_write_reg(dev,0x0727,0x03);
|
||||
ret|=gc4683_write_reg(dev,0x072a,0x38);
|
||||
ret|=gc4683_write_reg(dev,0x072b,0x19);
|
||||
ret|=gc4683_write_reg(dev,0x072f,0x02);
|
||||
ret|=gc4683_write_reg(dev,0x0002,0x80);
|
||||
ret|=gc4683_write_reg(dev,0x0004,0x1f);
|
||||
ret|=gc4683_write_reg(dev,0x0060,0x40);
|
||||
ret|=gc4683_write_reg(dev,0x0038,0x40);
|
||||
ret|=gc4683_write_reg(dev,0x0039,0x40);
|
||||
ret|=gc4683_write_reg(dev,0x003a,0x40);
|
||||
ret|=gc4683_write_reg(dev,0x003b,0x40);
|
||||
ret|=gc4683_write_reg(dev,0x02ac,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x0274,0x0a);
|
||||
ret|=gc4683_write_reg(dev,0x02ad,0x04);
|
||||
ret|=gc4683_write_reg(dev,0x02ae,0x01);
|
||||
ret|=gc4683_write_reg(dev,0x0247,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x0248,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x1466,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x1467,0x24);
|
||||
ret|=gc4683_write_reg(dev,0x1468,0x24);
|
||||
ret|=gc4683_write_reg(dev,0x1469,0x02);
|
||||
ret|=gc4683_write_reg(dev,0x146a,0x40);
|
||||
ret|=gc4683_write_reg(dev,0x146b,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x0707,0x08);
|
||||
ret|=gc4683_write_reg(dev,0x0704,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x0719,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x071a,0x40);
|
||||
ret|=gc4683_write_reg(dev,0x021b,0xb0);
|
||||
ret|=gc4683_write_reg(dev,0x0006,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x0216,0x01);
|
||||
ret|=gc4683_write_reg(dev,0x027c,0x0f);
|
||||
ret|=gc4683_write_reg(dev,0x1430,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x1409,0x03);
|
||||
ret|=gc4683_write_reg(dev,0x143a,0x03);
|
||||
ret|=gc4683_write_reg(dev,0x1433,0x80);
|
||||
ret|=gc4683_write_reg(dev,0x140f,0x21);
|
||||
ret|=gc4683_write_reg(dev,0x1461,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x1462,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x146e,0x40);
|
||||
ret|=gc4683_write_reg(dev,0x146f,0x02);
|
||||
ret|=gc4683_write_reg(dev,0x1470,0x3e);
|
||||
ret|=gc4683_write_reg(dev,0x1471,0x02);
|
||||
ret|=gc4683_write_reg(dev,0x1474,0x40);
|
||||
ret|=gc4683_write_reg(dev,0x1479,0x12);
|
||||
ret|=gc4683_write_reg(dev,0x1485,0x06);
|
||||
ret|=gc4683_write_reg(dev,0x1475,0x12);
|
||||
ret|=gc4683_write_reg(dev,0x1476,0xe0);
|
||||
ret|=gc4683_write_reg(dev,0x14a1,0x0d);
|
||||
ret|=gc4683_write_reg(dev,0x14a8,0x70);
|
||||
ret|=gc4683_write_reg(dev,0x14a6,0x30);
|
||||
ret|=gc4683_write_reg(dev,0x1420,0x14);
|
||||
ret|=gc4683_write_reg(dev,0x1464,0x15);
|
||||
ret|=gc4683_write_reg(dev,0x146c,0x08);
|
||||
ret|=gc4683_write_reg(dev,0x146d,0x08);
|
||||
ret|=gc4683_write_reg(dev,0x1423,0x08);
|
||||
ret|=gc4683_write_reg(dev,0x1428,0x40);
|
||||
ret|=gc4683_write_reg(dev,0x0245,0xd9);
|
||||
ret|=gc4683_write_reg(dev,0x023a,0x08);
|
||||
ret|=gc4683_write_reg(dev,0x02cd,0x42);
|
||||
ret|=gc4683_write_reg(dev,0x0243,0x04);
|
||||
ret|=gc4683_write_reg(dev,0x029e,0x3f);
|
||||
ret|=gc4683_write_reg(dev,0x029d,0x3c);
|
||||
ret|=gc4683_write_reg(dev,0x0089,0x03);
|
||||
ret|=gc4683_write_reg(dev,0x0040,0xa3);
|
||||
ret|=gc4683_write_reg(dev,0x0075,0x60);
|
||||
ret|=gc4683_write_reg(dev,0x0004,0x1f);
|
||||
ret|=gc4683_write_reg(dev,0x0002,0x82);
|
||||
ret|=gc4683_write_reg(dev,0x0053,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x0205,0x0c);
|
||||
ret|=gc4683_write_reg(dev,0x0317,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x021a,0x10);
|
||||
ret|=gc4683_write_reg(dev,0x0076,0x01);
|
||||
ret|=gc4683_write_reg(dev,0x0054,0x98);
|
||||
ret|=gc4683_write_reg(dev,0x0042,0x60);
|
||||
ret|=gc4683_write_reg(dev,0x0052,0x02);
|
||||
ret|=gc4683_write_reg(dev,0x0046,0x60);
|
||||
ret|=gc4683_write_reg(dev,0x0448,0x09);
|
||||
ret|=gc4683_write_reg(dev,0x0449,0x09);
|
||||
ret|=gc4683_write_reg(dev,0x044a,0x09);
|
||||
ret|=gc4683_write_reg(dev,0x044b,0x09);
|
||||
ret|=gc4683_write_reg(dev,0x044c,0x77);
|
||||
ret|=gc4683_write_reg(dev,0x044d,0x77);
|
||||
ret|=gc4683_write_reg(dev,0x044e,0x77);
|
||||
ret|=gc4683_write_reg(dev,0x044f,0x77);
|
||||
ret|=gc4683_write_reg(dev,0x0468,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x0010,0x08);
|
||||
ret|=gc4683_write_reg(dev,0x04b0,0x30);
|
||||
ret|=gc4683_write_reg(dev,0x04b1,0x10);
|
||||
ret|=gc4683_write_reg(dev,0x04c0,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04c1,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04d0,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04d1,0x5f);
|
||||
ret|=gc4683_write_reg(dev,0x04b2,0x30);
|
||||
ret|=gc4683_write_reg(dev,0x04b3,0x10);
|
||||
ret|=gc4683_write_reg(dev,0x04c2,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04c3,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04d2,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04d3,0x5f);
|
||||
ret|=gc4683_write_reg(dev,0x04b4,0x30);
|
||||
ret|=gc4683_write_reg(dev,0x04b5,0x10);
|
||||
ret|=gc4683_write_reg(dev,0x04c4,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04c5,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04d4,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04d5,0x5f);
|
||||
ret|=gc4683_write_reg(dev,0x04b6,0x40);
|
||||
ret|=gc4683_write_reg(dev,0x04b7,0x10);
|
||||
ret|=gc4683_write_reg(dev,0x04c6,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04c7,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04d6,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04d7,0x5f);
|
||||
ret|=gc4683_write_reg(dev,0x04b8,0x40);
|
||||
ret|=gc4683_write_reg(dev,0x04b9,0x10);
|
||||
ret|=gc4683_write_reg(dev,0x04c8,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04c9,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04d8,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04d9,0x5f);
|
||||
ret|=gc4683_write_reg(dev,0x04ba,0x40);
|
||||
ret|=gc4683_write_reg(dev,0x04bb,0x10);
|
||||
ret|=gc4683_write_reg(dev,0x04ca,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04cb,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04da,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04db,0x5f);
|
||||
ret|=gc4683_write_reg(dev,0x04bc,0x40);
|
||||
ret|=gc4683_write_reg(dev,0x04bd,0x10);
|
||||
ret|=gc4683_write_reg(dev,0x04cc,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04cd,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04dc,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04dd,0x5f);
|
||||
ret|=gc4683_write_reg(dev,0x04be,0x50);
|
||||
ret|=gc4683_write_reg(dev,0x04bf,0x10);
|
||||
ret|=gc4683_write_reg(dev,0x04ce,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04cf,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04de,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x04df,0x5f);
|
||||
ret|=gc4683_write_reg(dev,0x0704,0x07);
|
||||
ret|=gc4683_write_reg(dev,0x0715,0x04);
|
||||
ret|=gc4683_write_reg(dev,0x0716,0xb0);
|
||||
ret|=gc4683_write_reg(dev,0x0718,0xd0);
|
||||
ret|=gc4683_write_reg(dev,0x071b,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x071c,0x40);
|
||||
ret|=gc4683_write_reg(dev,0x071d,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x071e,0x40);
|
||||
ret|=gc4683_write_reg(dev,0x031f,0x02);
|
||||
ret|=gc4683_write_reg(dev,0x031f,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x0a67,0x80);
|
||||
ret|=gc4683_write_reg(dev,0x0a51,0x41);
|
||||
ret|=gc4683_write_reg(dev,0x0a52,0x41);
|
||||
ret|=gc4683_write_reg(dev,0x0a4e,0x0c);
|
||||
ret|=gc4683_write_reg(dev,0x0a4f,0x0c);
|
||||
ret|=gc4683_write_reg(dev,0x0a54,0x36);
|
||||
ret|=gc4683_write_reg(dev,0x0a55,0x36);
|
||||
ret|=gc4683_write_reg(dev,0x0a9f,0x17);
|
||||
ret|=gc4683_write_reg(dev,0x0a9e,0x10);
|
||||
ret|=gc4683_write_reg(dev,0x0aa1,0x10);
|
||||
ret|=gc4683_write_reg(dev,0x0a53,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x05be,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x05a9,0x01);
|
||||
ret|=gc4683_write_reg(dev,0x0028,0x0a);
|
||||
ret|=gc4683_write_reg(dev,0x0029,0x08);
|
||||
ret|=gc4683_write_reg(dev,0x002a,0x05);
|
||||
ret|=gc4683_write_reg(dev,0x002b,0xa8);
|
||||
ret|=gc4683_write_reg(dev,0x0022,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x0023,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x0024,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x0025,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x0a70,0x03);
|
||||
ret|=gc4683_write_reg(dev,0x0a71,0x02);
|
||||
ret|=gc4683_write_reg(dev,0x0a73,0x60);
|
||||
ret|=gc4683_write_reg(dev,0x0a82,0x01);
|
||||
ret|=gc4683_write_reg(dev,0x0a83,0x10);
|
||||
ret|=gc4683_write_reg(dev,0x0a5a,0x80);
|
||||
ret|=gc4683_write_reg(dev,0x0313,0x80);
|
||||
gc4683_delay_ms(20);
|
||||
ret|=gc4683_write_reg(dev,0x05be,0x01);
|
||||
ret|=gc4683_write_reg(dev,0x0080,0x02);
|
||||
ret|=gc4683_write_reg(dev,0x0021,0x40);
|
||||
ret|=gc4683_write_reg(dev,0x0020,0x8c);
|
||||
ret|=gc4683_write_reg(dev,0x0202,0x01);
|
||||
ret|=gc4683_write_reg(dev,0x0203,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x02aa,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x02ab,0x00);
|
||||
ret|=gc4683_write_reg(dev,0x0181,0xf0);
|
||||
ret|=gc4683_write_reg(dev,0x0185,0x08);
|
||||
ret|=gc4683_write_reg(dev,0x0111,0x2b);
|
||||
ret|=gc4683_write_reg(dev,0x0180,0x46);
|
||||
ret|=gc4683_write_reg(dev,0x02ce,0x45);
|
||||
ret|=gc4683_write_reg(dev,0x0100,0x09);
|
||||
ret|=gc4683_write_reg(dev,0x0106,0x38);
|
||||
ret|=gc4683_write_reg(dev,0x010d,0x0c);
|
||||
ret|=gc4683_write_reg(dev,0x010e,0x80);
|
||||
ret|=gc4683_write_reg(dev,0x0112,0x01);
|
||||
ret|=gc4683_write_reg(dev,0x0114,0x03);
|
||||
ret|=gc4683_write_reg(dev,0x0115,0x10);
|
||||
ret|=gc4683_write_reg(dev,0x0125,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x0124,0x02);
|
||||
ret|=gc4683_write_reg(dev,0x0122,0x06);
|
||||
ret|=gc4683_write_reg(dev,0x0123,0x20);
|
||||
ret|=gc4683_write_reg(dev,0x0126,0x08);
|
||||
ret|=gc4683_write_reg(dev,0x0121,0x10);
|
||||
ret|=gc4683_write_reg(dev,0x0129,0x08);
|
||||
ret|=gc4683_write_reg(dev,0x012a,0x0a);
|
||||
ret|=gc4683_write_reg(dev,0x012b,0x08);
|
||||
ret|=gc4683_write_reg(dev,0x03fe,0x00);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc4683_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
} else {
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
SENSOR_PRINT("========= GC4683_27MInput_MIPI_4lane_10bit_2560x1440_30fps init success!=========\n");
|
||||
SENSOR_PRINT("=================================================================================\n");
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
xmedia_s32 gc4683_init_image(xmedia_u32 dev, xmedia_u8 image_mode)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
switch(image_mode) {
|
||||
case GC4683_4M_10BIT_LINEAR_MODE:
|
||||
ret = gc4683_4lane_linear_2560x1440_init(dev);
|
||||
break;
|
||||
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support, please check image param!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc4683_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_gc4683_i2c_fd[dev] < 0) {
|
||||
SENSOR_PRINT("Sensor dev [%d], i2c not open. please init i2c at first.\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_set_slave_addr(g_gc4683_i2c_fd[dev], slave_addr);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
|
||||
i2c_close(g_gc4683_i2c_fd[dev]);
|
||||
g_gc4683_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
g_gc4683_i2c_addr[dev] = slave_addr;
|
||||
SENSOR_PRINT("Sensor dev [%d] set slave addr 0x%x success.\n", dev, slave_addr);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc4683_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_gc4683_i2c_fd[dev] >= 0) {
|
||||
SENSOR_PRINT("====== Sensor dev [%d], i2c already init !=======\n", dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
if (i2c_dev == SENSOR_I2C_INVALID) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Sensor i2c dev invalid! Please set i2c dev at first!\n");
|
||||
return XMEDIA_ERRCODE_NOT_CONFIG;
|
||||
}
|
||||
|
||||
g_gc4683_i2c_fd[dev] = i2c_open(i2c_dev);
|
||||
if (g_gc4683_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Open /dev/i2c_drv-%u error!\n", i2c_dev);
|
||||
return XMEDIA_ERRCODE_OPEN_FAILED;
|
||||
}
|
||||
|
||||
ret = gc4683_set_slave_addr(dev, i2c_addr);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
SENSOR_PRINT("====== i2c[%d] init success!=======\n", i2c_dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc4683_i2c_exit(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
ret = i2c_close(g_gc4683_i2c_fd[dev]);
|
||||
if(ret < 0 ) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] close i2c failed!\n", dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
g_gc4683_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc4683_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[GC4683_DATA_BYTE];
|
||||
|
||||
if (g_gc4683_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_read(g_gc4683_i2c_fd[dev], g_gc4683_i2c_addr[dev], addr, GC4683_ADDR_BYTE, buf, GC4683_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] read i2c addr [0x%X] failed!\n", dev, addr);
|
||||
return ret;
|
||||
}
|
||||
|
||||
*data = buf[0]; //GC4683_DATA_BYTE == 1
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc4683_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data)
|
||||
{
|
||||
xmedia_u32 idx = 0;
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[8];
|
||||
|
||||
if (g_gc4683_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
buf[idx] = (addr >> 8) & 0xff;
|
||||
idx++;
|
||||
buf[idx] = addr & 0xff;
|
||||
idx++;
|
||||
buf[idx] = data & 0xff;
|
||||
|
||||
ret = i2c_write(g_gc4683_i2c_fd[dev], g_gc4683_i2c_addr[dev], buf, GC4683_ADDR_BYTE + GC4683_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_WRITE error!\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
xmedia_s32 gc4683_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
if ((!mirror_en) && (!flip_en)) {
|
||||
ret |= gc4683_write_reg(dev, 0x022c, 0x00);
|
||||
} else if ((mirror_en) && (!flip_en)) {
|
||||
ret |= gc4683_write_reg(dev, 0x022c, 0x01);
|
||||
} else if ((!mirror_en) && (flip_en)) {
|
||||
ret |= gc4683_write_reg(dev, 0x022c, 0x02);
|
||||
} else if ((mirror_en) && (flip_en)) {
|
||||
ret |= gc4683_write_reg(dev, 0x022c, 0x03);
|
||||
}
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc4683_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,29 @@
|
||||
#ifndef __GC4683_CTRL_H__
|
||||
#define __GC4683_CTRL_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// I2C_ID1: 0x62; I2C_ID2: 0x20
|
||||
#define GC4683_I2C_ADDR 0x62
|
||||
#define GC4683_ADDR_BYTE 2
|
||||
#define GC4683_DATA_BYTE 1
|
||||
|
||||
#define GC4683_4M_10BIT_LINEAR_MODE 1
|
||||
|
||||
xmedia_s32 gc4683_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr);
|
||||
xmedia_s32 gc4683_i2c_exit(xmedia_u32 dev);
|
||||
xmedia_s32 gc4683_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data);
|
||||
xmedia_s32 gc4683_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data);
|
||||
xmedia_s32 gc4683_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en);
|
||||
xmedia_s32 gc4683_init_image(xmedia_u32 dev, xmedia_u8 img_mode);
|
||||
xmedia_s32 gc4683_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //__GC4683_CTRL_H__
|
||||
@@ -0,0 +1,58 @@
|
||||
#ifndef __GC4683_EX_H__
|
||||
#define __GC4683_EX_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// Piris attr
|
||||
static const xmedia_isp_piris_attr g_gc4683_piris_attr = {
|
||||
0,
|
||||
1,
|
||||
94,
|
||||
62,
|
||||
// Step-F number mapping table. Must be from small to large. F1.0 is 1024 and F32.0 is 1
|
||||
{ 30, 35, 40, 45, 50, 56, 61, 67, 73, 79, 85, 92, 98, 105, 112, 120, 127, 135, 143, 150, 158,
|
||||
166, 174, 183, 191, 200, 208, 217, 225, 234, 243, 252, 261, 270, 279, 289, 298, 307, 316, 325, 335, 344,
|
||||
353, 362, 372, 381, 390, 399, 408, 417, 426, 435, 444, 453, 462, 470, 478, 486, 493, 500, 506, 512 },
|
||||
XMEDIA_ISP_IRIS_F_NO_1_4,
|
||||
XMEDIA_ISP_IRIS_F_NO_5_6
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_ccm g_gc4683_awb_ccm = {
|
||||
4,
|
||||
{
|
||||
{
|
||||
6175,
|
||||
{ 440, 32967, 15, 32852, 424, 32852, 11, 33014, 491 },
|
||||
},
|
||||
{
|
||||
4990,
|
||||
{ 443, 32969, 14, 32876, 407, 32811, 32769, 33012, 501 },
|
||||
},
|
||||
{
|
||||
3865,
|
||||
{ 458, 32977, 7, 32853, 389, 32816, 24, 33018, 482 },
|
||||
},
|
||||
{
|
||||
2450,
|
||||
{ 427, 32931, 32776, 32897, 401, 32784, 4, 33168, 652 },
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_gc4683_awb_agc_table = {
|
||||
// bvalid
|
||||
1,
|
||||
|
||||
// 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768
|
||||
// saturation
|
||||
{ 0x80, 0x76, 0x70, 0x6C, 0x69, 0x66, 0x5A, 0x4E, 0x44, 0x40, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38 }
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,7 @@
|
||||
|
||||
ifneq ($(MCU), )
|
||||
include Makefile.riscv
|
||||
else
|
||||
include Makefile.linux
|
||||
endif
|
||||
|
||||
@@ -0,0 +1,18 @@
|
||||
ISP_DIR := $(shell cd ../.. && /bin/pwd)
|
||||
SDK_DIR ?= $(shell cd $(ISP_DIR)/../../../.. && /bin/pwd)
|
||||
|
||||
include $(SDK_DIR)/build/base.mk
|
||||
include $(ISP_DIR)/sensor/plat.mk
|
||||
|
||||
LIB_NAME := libsns_gc5603
|
||||
|
||||
SRCS := $(wildcard *.c)
|
||||
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I$(GMP_DIR)/usr/include
|
||||
SDK_USR_CFLAGS += -I$(ISP_DIR)/include
|
||||
SDK_USR_CFLAGS += -I.
|
||||
|
||||
$(info SRCS=$(SRCS))
|
||||
|
||||
include $(SDK_DIR)/build/sdk_lib_rules.mk
|
||||
@@ -0,0 +1,4 @@
|
||||
|
||||
SRCS-y += gc5603.c
|
||||
SRCS-y += gc5603_ctrl.c
|
||||
|
||||
+1381
File diff suppressed because it is too large
Load Diff
+56
@@ -0,0 +1,56 @@
|
||||
#ifndef __GC5603_H__
|
||||
#define __GC5603_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define GC5603_VMAX_5M_LINEAR 1750
|
||||
|
||||
#define GC5603_FULL_LINES_MAX 0x3FFF
|
||||
|
||||
// GC5603 Register Address
|
||||
#define GC5603_REG_ADDR_EXP_H 0x0202 //BIT[13:8]
|
||||
#define GC5603_REG_ADDR_EXP_L 0x0203 //BIT[7:0]
|
||||
#define GC5603_REG_ADDR_AGC_CTL 0x031d
|
||||
#define GC5603_REG_ADDR_AGC_L 0x0614 //BIT[7:0]
|
||||
#define GC5603_REG_ADDR_AGC_M 0x0615 //BIT[3:0]
|
||||
#define GC5603_REG_ADDR_AGC_H 0x0225 //BIT[0]
|
||||
#define GC5603_REG_ADDR_AGC3 0x1467
|
||||
#define GC5603_REG_ADDR_AGC4 0x1468
|
||||
#define GC5603_REG_ADDR_COL_GC_H 0x00b8
|
||||
#define GC5603_REG_ADDR_COL_GC_L 0x00b9
|
||||
#define GC5603_REG_ADDR_DGC_H 0x0064 //BIT[3:0]
|
||||
#define GC5603_REG_ADDR_DGC_L 0x0065 //BIT[7:2]
|
||||
|
||||
#define GC5603_REG_ADDR_VMAX_H 0x0340 //BIT[13:8]
|
||||
#define GC5603_REG_ADDR_VMAX_L 0x0341 //BIT[7:0]
|
||||
|
||||
#define GC5603_EXP_OFFSET 8
|
||||
|
||||
typedef enum {
|
||||
GC5603_REG_EXP_H = 0,
|
||||
GC5603_REG_EXP_L,
|
||||
GC5603_REG_AGC_CTL,
|
||||
GC5603_REG_AGC_L,
|
||||
GC5603_REG_AGC_M,
|
||||
GC5603_REG_AGC_H,
|
||||
GC5603_REG_AGC_CTL1,
|
||||
GC5603_REG_AGC3,
|
||||
GC5603_REG_AGC4,
|
||||
GC5603_REG_COL_GC_H,
|
||||
GC5603_REG_COL_GC_L,
|
||||
GC5603_REG_DGC_H,
|
||||
GC5603_REG_DGC_L,
|
||||
GC5603_REG_VMAX_H,
|
||||
GC5603_REG_VMAX_L,
|
||||
GC5603_REG_L_MAX_NUM,
|
||||
} gc5603_reg_index;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __GC5603_H__
|
||||
+467
@@ -0,0 +1,467 @@
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "i2c_dev.h"
|
||||
#include "gc5603.h"
|
||||
#include "gc5603_ctrl.h"
|
||||
|
||||
#define GC5603_REG_ADDR_MIRROR_FLIP 0x0101
|
||||
|
||||
static xmedia_s32 g_gc5603_i2c_fd[XMEDIA_SENSOR_DEV_MAX_NUM] = { [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] =
|
||||
SENSOR_I2C_INVALID };
|
||||
static xmedia_s32 g_gc5603_i2c_addr[XMEDIA_SENSOR_DEV_MAX_NUM] = { [0 ...(XMEDIA_SENSOR_DEV_MAX_NUM - 1)] =
|
||||
SENSOR_I2C_INVALID };
|
||||
|
||||
static void gc5603_delay_ms(xmedia_s32 ms)
|
||||
{
|
||||
usleep(ms * 1000); // 1ms: 1000us
|
||||
return;
|
||||
}
|
||||
|
||||
static xmedia_s32 gc5603_2lane_linear_2960x1620_init(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
ret |= gc5603_write_reg(dev, 0x03fe, 0xf0);
|
||||
ret |= gc5603_write_reg(dev, 0x03fe, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x03fe, 0x10);
|
||||
ret |= gc5603_write_reg(dev, 0x03fe, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0a38, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0a38, 0x03);
|
||||
ret |= gc5603_write_reg(dev, 0x0a20, 0x07);
|
||||
ret |= gc5603_write_reg(dev, 0x061b, 0x03);
|
||||
ret |= gc5603_write_reg(dev, 0x061c, 0x50);
|
||||
ret |= gc5603_write_reg(dev, 0x061d, 0x05);
|
||||
ret |= gc5603_write_reg(dev, 0x061e, 0x70);
|
||||
ret |= gc5603_write_reg(dev, 0x061f, 0x03);
|
||||
ret |= gc5603_write_reg(dev, 0x0a21, 0x08);
|
||||
ret |= gc5603_write_reg(dev, 0x0a34, 0x40);
|
||||
ret |= gc5603_write_reg(dev, 0x0a35, 0x11);
|
||||
ret |= gc5603_write_reg(dev, 0x0a36, 0x5e);
|
||||
ret |= gc5603_write_reg(dev, 0x0a37, 0x03);
|
||||
ret |= gc5603_write_reg(dev, 0x0314, 0x50);
|
||||
ret |= gc5603_write_reg(dev, 0x0315, 0x32);
|
||||
ret |= gc5603_write_reg(dev, 0x031c, 0xce);
|
||||
ret |= gc5603_write_reg(dev, 0x0219, 0x47);
|
||||
ret |= gc5603_write_reg(dev, 0x0342, 0x04);
|
||||
ret |= gc5603_write_reg(dev, 0x0343, 0xb0);
|
||||
ret |= gc5603_write_reg(dev, 0x0259, 0x06);
|
||||
ret |= gc5603_write_reg(dev, 0x025a, 0x8a);
|
||||
ret |= gc5603_write_reg(dev, 0x0340, 0x06);
|
||||
ret |= gc5603_write_reg(dev, 0x0341, 0xd6);
|
||||
ret |= gc5603_write_reg(dev, 0x0345, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0347, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0348, 0x0b);
|
||||
ret |= gc5603_write_reg(dev, 0x0349, 0x98);
|
||||
ret |= gc5603_write_reg(dev, 0x034a, 0x06);
|
||||
ret |= gc5603_write_reg(dev, 0x034b, 0x8a);
|
||||
ret |= gc5603_write_reg(dev, 0x0094, 0x0b);
|
||||
ret |= gc5603_write_reg(dev, 0x0095, 0x90);
|
||||
ret |= gc5603_write_reg(dev, 0x0096, 0x06);
|
||||
ret |= gc5603_write_reg(dev, 0x0097, 0x54);
|
||||
ret |= gc5603_write_reg(dev, 0x0099, 0x04);
|
||||
ret |= gc5603_write_reg(dev, 0x009b, 0x04);
|
||||
ret |= gc5603_write_reg(dev, 0x060c, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x060e, 0xd2);
|
||||
ret |= gc5603_write_reg(dev, 0x060f, 0x05);
|
||||
ret |= gc5603_write_reg(dev, 0x070c, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x070e, 0xd2);
|
||||
ret |= gc5603_write_reg(dev, 0x070f, 0x05);
|
||||
ret |= gc5603_write_reg(dev, 0x0709, 0x40);
|
||||
ret |= gc5603_write_reg(dev, 0x0719, 0x40);
|
||||
ret |= gc5603_write_reg(dev, 0x0909, 0x07);
|
||||
ret |= gc5603_write_reg(dev, 0x0902, 0x04);
|
||||
ret |= gc5603_write_reg(dev, 0x0904, 0x0b);
|
||||
ret |= gc5603_write_reg(dev, 0x0907, 0x54);
|
||||
ret |= gc5603_write_reg(dev, 0x0908, 0x06);
|
||||
ret |= gc5603_write_reg(dev, 0x0903, 0x9d);
|
||||
ret |= gc5603_write_reg(dev, 0x072a, 0x1c);
|
||||
ret |= gc5603_write_reg(dev, 0x072b, 0x1c);
|
||||
ret |= gc5603_write_reg(dev, 0x0724, 0x2b);
|
||||
ret |= gc5603_write_reg(dev, 0x0727, 0x2b);
|
||||
ret |= gc5603_write_reg(dev, 0x1466, 0x18);
|
||||
ret |= gc5603_write_reg(dev, 0x1467, 0x15);
|
||||
ret |= gc5603_write_reg(dev, 0x1468, 0x15);
|
||||
ret |= gc5603_write_reg(dev, 0x1469, 0x70);
|
||||
ret |= gc5603_write_reg(dev, 0x146a, 0xe8);
|
||||
ret |= gc5603_write_reg(dev, 0x0707, 0x07);
|
||||
ret |= gc5603_write_reg(dev, 0x0737, 0x0f);
|
||||
ret |= gc5603_write_reg(dev, 0x0704, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0706, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0716, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0708, 0xc8);
|
||||
ret |= gc5603_write_reg(dev, 0x0718, 0xc8);
|
||||
ret |= gc5603_write_reg(dev, 0x061a, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x1430, 0x80);
|
||||
ret |= gc5603_write_reg(dev, 0x1407, 0x10);
|
||||
ret |= gc5603_write_reg(dev, 0x1408, 0x16);
|
||||
ret |= gc5603_write_reg(dev, 0x1409, 0x03);
|
||||
ret |= gc5603_write_reg(dev, 0x1438, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x02ce, 0x03);
|
||||
ret |= gc5603_write_reg(dev, 0x0245, 0xc9);
|
||||
ret |= gc5603_write_reg(dev, 0x023a, 0x08);
|
||||
ret |= gc5603_write_reg(dev, 0x02cd, 0x88);
|
||||
ret |= gc5603_write_reg(dev, 0x0612, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0613, 0xc7);
|
||||
ret |= gc5603_write_reg(dev, 0x0243, 0x03);
|
||||
ret |= gc5603_write_reg(dev, 0x0089, 0x03);
|
||||
ret |= gc5603_write_reg(dev, 0x0002, 0xab);
|
||||
ret |= gc5603_write_reg(dev, 0x0040, 0xa3);
|
||||
ret |= gc5603_write_reg(dev, 0x0075, 0x64);
|
||||
ret |= gc5603_write_reg(dev, 0x0004, 0x0f);
|
||||
ret |= gc5603_write_reg(dev, 0x0053, 0x0a);
|
||||
ret |= gc5603_write_reg(dev, 0x0205, 0x0c);
|
||||
ret |= gc5603_write_reg(dev, 0x0052, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0076, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x021a, 0x10);
|
||||
ret |= gc5603_write_reg(dev, 0x0049, 0x0f);
|
||||
ret |= gc5603_write_reg(dev, 0x004a, 0x3c);
|
||||
ret |= gc5603_write_reg(dev, 0x004b, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0430, 0x25);
|
||||
ret |= gc5603_write_reg(dev, 0x0431, 0x25);
|
||||
ret |= gc5603_write_reg(dev, 0x0432, 0x25);
|
||||
ret |= gc5603_write_reg(dev, 0x0433, 0x25);
|
||||
ret |= gc5603_write_reg(dev, 0x0434, 0x59);
|
||||
ret |= gc5603_write_reg(dev, 0x0435, 0x59);
|
||||
ret |= gc5603_write_reg(dev, 0x0436, 0x59);
|
||||
ret |= gc5603_write_reg(dev, 0x0437, 0x59);
|
||||
ret |= gc5603_write_reg(dev, 0x0181, 0x30);
|
||||
ret |= gc5603_write_reg(dev, 0x0182, 0x05);
|
||||
ret |= gc5603_write_reg(dev, 0x0185, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0180, 0x46);
|
||||
ret |= gc5603_write_reg(dev, 0x0100, 0x08);
|
||||
ret |= gc5603_write_reg(dev, 0x010d, 0x74);
|
||||
ret |= gc5603_write_reg(dev, 0x010e, 0x0e);
|
||||
ret |= gc5603_write_reg(dev, 0x0113, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0114, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0115, 0x10);
|
||||
ret |= gc5603_write_reg(dev, 0x031f, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x031f, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0317, 0x1c);
|
||||
ret |= gc5603_write_reg(dev, 0x0a67, 0x80);
|
||||
ret |= gc5603_write_reg(dev, 0x0a50, 0x80);
|
||||
ret |= gc5603_write_reg(dev, 0x0a53, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0a51, 0x80);
|
||||
ret |= gc5603_write_reg(dev, 0x0a54, 0xa0);
|
||||
ret |= gc5603_write_reg(dev, 0x0a63, 0x20);
|
||||
ret |= gc5603_write_reg(dev, 0x0a65, 0x20);
|
||||
ret |= gc5603_write_reg(dev, 0x0a68, 0x21);
|
||||
ret |= gc5603_write_reg(dev, 0x05be, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x05a9, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0024, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0025, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0028, 0x0b);
|
||||
ret |= gc5603_write_reg(dev, 0x0029, 0x98);
|
||||
ret |= gc5603_write_reg(dev, 0x002a, 0x06);
|
||||
ret |= gc5603_write_reg(dev, 0x002b, 0x8a);
|
||||
ret |= gc5603_write_reg(dev, 0x0a82, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0a83, 0xe0);
|
||||
ret |= gc5603_write_reg(dev, 0x0a72, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0a73, 0x60);
|
||||
ret |= gc5603_write_reg(dev, 0x0a80, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0a70, 0x03);
|
||||
ret |= gc5603_write_reg(dev, 0x0a75, 0x41);
|
||||
ret |= gc5603_write_reg(dev, 0x0a5a, 0x80);
|
||||
gc5603_delay_ms(20);
|
||||
ret |= gc5603_write_reg(dev, 0x05be, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0a70, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0080, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0021, 0x40);
|
||||
ret |= gc5603_write_reg(dev, 0x0a67, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0100, 0x09);
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc5603_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
SENSOR_PRINT("=======================================================================================\n");
|
||||
SENSOR_PRINT("==== GC5603_27MInput_MIPI_2lane_10bit_linear_2960x1620_30fps init success!=============\n");
|
||||
SENSOR_PRINT("=======================================================================================\n");
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
xmedia_s32 gc5603_init_image(xmedia_u32 dev, xmedia_u8 image_mode)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
switch(image_mode) {
|
||||
case GC5603_5M_10BIT_LINEAR_MODE:
|
||||
ret = gc5603_2lane_linear_2960x1620_init(dev);
|
||||
break;
|
||||
|
||||
default:
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Not support, please check image param!\n");
|
||||
return XMEDIA_ERRCODE_NOT_SUPPORT;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc5603_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_gc5603_i2c_fd[dev] < 0) {
|
||||
SENSOR_PRINT("Sensor dev [%d], i2c not open. please init i2c at first.\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_set_slave_addr(g_gc5603_i2c_fd[dev], slave_addr);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_SLAVE_FORCE error!\n");
|
||||
i2c_close(g_gc5603_i2c_fd[dev]);
|
||||
g_gc5603_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
g_gc5603_i2c_addr[dev] = slave_addr;
|
||||
SENSOR_PRINT("Sensor dev [%d] set slave addr 0x%x success.\n", dev, slave_addr);
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc5603_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
if (g_gc5603_i2c_fd[dev] >= 0) {
|
||||
SENSOR_PRINT("====== Sensor dev [%d], i2c already init !=======\n", dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
if (i2c_dev == SENSOR_I2C_INVALID) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Sensor i2c dev invalid! Please set i2c dev at first!\n");
|
||||
return XMEDIA_ERRCODE_NOT_CONFIG;
|
||||
}
|
||||
|
||||
g_gc5603_i2c_fd[dev] = i2c_open(i2c_dev);
|
||||
if (g_gc5603_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "Open /dev/i2c_drv-%u error!\n", i2c_dev);
|
||||
return XMEDIA_ERRCODE_OPEN_FAILED;
|
||||
}
|
||||
|
||||
ret = gc5603_set_slave_addr(dev, i2c_addr);
|
||||
SENSOR_CHECK_RET_RETURN(ret);
|
||||
SENSOR_PRINT("====== i2c[%d] init success!=======\n", i2c_dev);
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc5603_i2c_exit(xmedia_u32 dev)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
|
||||
ret = i2c_close(g_gc5603_i2c_fd[dev]);
|
||||
if(ret < 0 ) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] close i2c failed!\n", dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
g_gc5603_i2c_fd[dev] = SENSOR_I2C_INVALID;
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc5603_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data)
|
||||
{
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[GC5603_DATA_BYTE];
|
||||
|
||||
if (g_gc5603_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
ret = i2c_read(g_gc5603_i2c_fd[dev], g_gc5603_i2c_addr[dev], addr, GC5603_ADDR_BYTE, buf, GC5603_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d] read i2c addr [0x%X] failed!\n", dev, addr);
|
||||
return ret;
|
||||
}
|
||||
|
||||
*data = buf[0]; //GC5603_DATA_BYTE == 1
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
SENSOR_PRIORITY_FUNC xmedia_s32 gc5603_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data)
|
||||
{
|
||||
xmedia_u32 idx = 0;
|
||||
xmedia_s32 ret;
|
||||
xmedia_u8 buf[8];
|
||||
|
||||
if (g_gc5603_i2c_fd[dev] < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "sensor dev[%d]'s i2c is not init!\n", dev);
|
||||
return XMEDIA_ERRCODE_NOT_INIT;
|
||||
}
|
||||
|
||||
buf[idx] = (addr >> 8) & 0xff;
|
||||
idx++;
|
||||
buf[idx] = addr & 0xff;
|
||||
idx++;
|
||||
buf[idx] = data & 0xff;
|
||||
|
||||
ret = i2c_write(g_gc5603_i2c_fd[dev], g_gc5603_i2c_addr[dev], buf, GC5603_ADDR_BYTE + GC5603_DATA_BYTE);
|
||||
if (ret < 0) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "I2C_WRITE error!\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
xmedia_s32 gc5603_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en)
|
||||
{
|
||||
xmedia_s32 ret = XMEDIA_SUCCESS;
|
||||
|
||||
if ((!mirror_en) && (!flip_en)) {
|
||||
ret |= gc5603_write_reg(dev, 0x022c, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0063, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x031f, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x031f, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0317, 0x1c);
|
||||
ret |= gc5603_write_reg(dev, 0x0a67, 0x80);
|
||||
ret |= gc5603_write_reg(dev, 0x0a50, 0x80);
|
||||
ret |= gc5603_write_reg(dev, 0x0a53, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0a51, 0x80);
|
||||
ret |= gc5603_write_reg(dev, 0x0a54, 0xa0);
|
||||
ret |= gc5603_write_reg(dev, 0x0a63, 0x20);
|
||||
ret |= gc5603_write_reg(dev, 0x0a65, 0x20);
|
||||
ret |= gc5603_write_reg(dev, 0x0a68, 0x21);
|
||||
ret |= gc5603_write_reg(dev, 0x05be, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x05a9, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0024, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0025, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0028, 0x0b);
|
||||
ret |= gc5603_write_reg(dev, 0x0029, 0x98);
|
||||
ret |= gc5603_write_reg(dev, 0x002a, 0x06);
|
||||
ret |= gc5603_write_reg(dev, 0x002b, 0x8a);
|
||||
ret |= gc5603_write_reg(dev, 0x0a82, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0a83, 0xe0);
|
||||
ret |= gc5603_write_reg(dev, 0x0a72, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0a73, 0x60);
|
||||
ret |= gc5603_write_reg(dev, 0x0a80, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0a70, 0x03);
|
||||
ret |= gc5603_write_reg(dev, 0x0a75, 0x41);
|
||||
ret |= gc5603_write_reg(dev, 0x0a5a, 0x80);
|
||||
gc5603_delay_ms(20);
|
||||
ret |= gc5603_write_reg(dev, 0x05be, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0a70, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0080, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0021, 0x40);
|
||||
ret |= gc5603_write_reg(dev, 0x0a67, 0x00);
|
||||
} else if ((mirror_en) && (!flip_en)) {
|
||||
ret |= gc5603_write_reg(dev, 0x022c, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0063, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x031f, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x031f, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0317, 0x1c);
|
||||
ret |= gc5603_write_reg(dev, 0x0a67, 0x80);
|
||||
ret |= gc5603_write_reg(dev, 0x0a50, 0x80);
|
||||
ret |= gc5603_write_reg(dev, 0x0a53, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0a51, 0x80);
|
||||
ret |= gc5603_write_reg(dev, 0x0a54, 0xa0);
|
||||
ret |= gc5603_write_reg(dev, 0x0a63, 0x20);
|
||||
ret |= gc5603_write_reg(dev, 0x0a65, 0x20);
|
||||
ret |= gc5603_write_reg(dev, 0x0a68, 0x21);
|
||||
ret |= gc5603_write_reg(dev, 0x05be, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x05a9, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0024, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0025, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0028, 0x0b);
|
||||
ret |= gc5603_write_reg(dev, 0x0029, 0x98);
|
||||
ret |= gc5603_write_reg(dev, 0x002a, 0x06);
|
||||
ret |= gc5603_write_reg(dev, 0x002b, 0x8a);
|
||||
ret |= gc5603_write_reg(dev, 0x0a82, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0a83, 0xe0);
|
||||
ret |= gc5603_write_reg(dev, 0x0a72, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0a73, 0x61);
|
||||
ret |= gc5603_write_reg(dev, 0x0a80, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0a70, 0x03);
|
||||
ret |= gc5603_write_reg(dev, 0x0a75, 0x41);
|
||||
ret |= gc5603_write_reg(dev, 0x0a5a, 0x80);
|
||||
gc5603_delay_ms(20);
|
||||
ret |= gc5603_write_reg(dev, 0x05be, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0a70, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0080, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0021, 0x40);
|
||||
ret |= gc5603_write_reg(dev, 0x0a67, 0x00);
|
||||
} else if ((!mirror_en) && (flip_en)) {
|
||||
ret |= gc5603_write_reg(dev, 0x022c, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0063, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x031f, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x031f, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0317, 0x1c);
|
||||
ret |= gc5603_write_reg(dev, 0x0a67, 0x80);
|
||||
ret |= gc5603_write_reg(dev, 0x0a50, 0x80);
|
||||
ret |= gc5603_write_reg(dev, 0x0a53, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0a51, 0x80);
|
||||
ret |= gc5603_write_reg(dev, 0x0a54, 0xa0);
|
||||
ret |= gc5603_write_reg(dev, 0x0a63, 0x20);
|
||||
ret |= gc5603_write_reg(dev, 0x0a65, 0x20);
|
||||
ret |= gc5603_write_reg(dev, 0x0a68, 0x21);
|
||||
ret |= gc5603_write_reg(dev, 0x05be, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x05a9, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0024, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0025, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0028, 0x0b);
|
||||
ret |= gc5603_write_reg(dev, 0x0029, 0x98);
|
||||
ret |= gc5603_write_reg(dev, 0x002a, 0x06);
|
||||
ret |= gc5603_write_reg(dev, 0x002b, 0x8a);
|
||||
ret |= gc5603_write_reg(dev, 0x0a82, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0a83, 0xe0);
|
||||
ret |= gc5603_write_reg(dev, 0x0a72, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0a73, 0x62);
|
||||
ret |= gc5603_write_reg(dev, 0x0a80, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0a70, 0x03);
|
||||
ret |= gc5603_write_reg(dev, 0x0a75, 0x41);
|
||||
ret |= gc5603_write_reg(dev, 0x0a5a, 0x80);
|
||||
gc5603_delay_ms(20);
|
||||
ret |= gc5603_write_reg(dev, 0x05be, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0a70, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0080, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0021, 0x40);
|
||||
ret |= gc5603_write_reg(dev, 0x0a67, 0x00);
|
||||
} else if ((mirror_en) && (flip_en)) {
|
||||
ret |= gc5603_write_reg(dev, 0x022c, 0x03);
|
||||
ret |= gc5603_write_reg(dev, 0x0063, 0x03);
|
||||
ret |= gc5603_write_reg(dev, 0x031f, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x031f, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0317, 0x1c);
|
||||
ret |= gc5603_write_reg(dev, 0x0a67, 0x80);
|
||||
ret |= gc5603_write_reg(dev, 0x0a50, 0x80);
|
||||
ret |= gc5603_write_reg(dev, 0x0a53, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0a51, 0x80);
|
||||
ret |= gc5603_write_reg(dev, 0x0a54, 0xa0);
|
||||
ret |= gc5603_write_reg(dev, 0x0a63, 0x20);
|
||||
ret |= gc5603_write_reg(dev, 0x0a65, 0x20);
|
||||
ret |= gc5603_write_reg(dev, 0x0a68, 0x21);
|
||||
ret |= gc5603_write_reg(dev, 0x05be, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x05a9, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0024, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0025, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0028, 0x0b);
|
||||
ret |= gc5603_write_reg(dev, 0x0029, 0x98);
|
||||
ret |= gc5603_write_reg(dev, 0x002a, 0x06);
|
||||
ret |= gc5603_write_reg(dev, 0x002b, 0x8a);
|
||||
ret |= gc5603_write_reg(dev, 0x0a82, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0a83, 0xe0);
|
||||
ret |= gc5603_write_reg(dev, 0x0a72, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0a73, 0x63);
|
||||
ret |= gc5603_write_reg(dev, 0x0a80, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0a70, 0x03);
|
||||
ret |= gc5603_write_reg(dev, 0x0a75, 0x41);
|
||||
ret |= gc5603_write_reg(dev, 0x0a5a, 0x80);
|
||||
gc5603_delay_ms(20);
|
||||
ret |= gc5603_write_reg(dev, 0x05be, 0x01);
|
||||
ret |= gc5603_write_reg(dev, 0x0a70, 0x00);
|
||||
ret |= gc5603_write_reg(dev, 0x0080, 0x02);
|
||||
ret |= gc5603_write_reg(dev, 0x0021, 0x40);
|
||||
ret |= gc5603_write_reg(dev, 0x0a67, 0x00);
|
||||
}
|
||||
|
||||
if (ret != XMEDIA_SUCCESS) {
|
||||
SENSOR_TRACE(MODULE_DBG_ERR, "gc5603_write_reg failed\n");
|
||||
return XMEDIA_FAILURE;
|
||||
}
|
||||
|
||||
return XMEDIA_SUCCESS;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,29 @@
|
||||
#ifndef __GC5603_CTRL_H__
|
||||
#define __GC5603_CTRL_H__
|
||||
|
||||
#include "sns_comm.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// I2C_ID1: 0x62; I2C_ID2: 0x20
|
||||
#define GC5603_I2C_ADDR 0x62
|
||||
#define GC5603_ADDR_BYTE 2
|
||||
#define GC5603_DATA_BYTE 1
|
||||
|
||||
#define GC5603_5M_10BIT_LINEAR_MODE 1
|
||||
|
||||
xmedia_s32 gc5603_i2c_init(xmedia_u32 dev, xmedia_s8 i2c_dev, xmedia_u32 i2c_addr);
|
||||
xmedia_s32 gc5603_i2c_exit(xmedia_u32 dev);
|
||||
xmedia_s32 gc5603_read_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 *data);
|
||||
xmedia_s32 gc5603_write_reg(xmedia_u32 dev, xmedia_u32 addr, xmedia_u32 data);
|
||||
xmedia_s32 gc5603_set_mirror_flip(xmedia_u32 dev, xmedia_bool mirror_en, xmedia_bool flip_en);
|
||||
xmedia_s32 gc5603_init_image(xmedia_u32 dev, xmedia_u8 img_mode);
|
||||
xmedia_s32 gc5603_set_slave_addr(xmedia_u32 dev, xmedia_u32 slave_addr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //__GC5603_CTRL_H__
|
||||
+58
@@ -0,0 +1,58 @@
|
||||
#ifndef __GC5603_EX_H__
|
||||
#define __GC5603_EX_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// Piris attr
|
||||
static const xmedia_isp_piris_attr g_gc5603_piris_attr = {
|
||||
0,
|
||||
1,
|
||||
94,
|
||||
62,
|
||||
// Step-F number mapping table. Must be from small to large. F1.0 is 1024 and F32.0 is 1
|
||||
{ 30, 35, 40, 45, 50, 56, 61, 67, 73, 79, 85, 92, 98, 105, 112, 120, 127, 135, 143, 150, 158,
|
||||
166, 174, 183, 191, 200, 208, 217, 225, 234, 243, 252, 261, 270, 279, 289, 298, 307, 316, 325, 335, 344,
|
||||
353, 362, 372, 381, 390, 399, 408, 417, 426, 435, 444, 453, 462, 470, 478, 486, 493, 500, 506, 512 },
|
||||
XMEDIA_ISP_IRIS_F_NO_1_4,
|
||||
XMEDIA_ISP_IRIS_F_NO_5_6
|
||||
};
|
||||
|
||||
static const xmedia_isp_awb_ccm g_gc5603_awb_ccm = {
|
||||
4,
|
||||
{
|
||||
{
|
||||
6175,
|
||||
{ 440, 32967, 15, 32852, 424, 32852, 11, 33014, 491 },
|
||||
},
|
||||
{
|
||||
4990,
|
||||
{ 443, 32969, 14, 32876, 407, 32811, 32769, 33012, 501 },
|
||||
},
|
||||
{
|
||||
3865,
|
||||
{ 458, 32977, 7, 32853, 389, 32816, 24, 33018, 482 },
|
||||
},
|
||||
{
|
||||
2450,
|
||||
{ 427, 32931, 32776, 32897, 401, 32784, 4, 33168, 652 },
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
static const xmedia_isp_awb_agc_table g_gc5603_awb_agc_table = {
|
||||
// bvalid
|
||||
1,
|
||||
|
||||
// 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768
|
||||
// saturation
|
||||
{ 0x80, 0x76, 0x70, 0x6C, 0x69, 0x66, 0x5A, 0x4E, 0x44, 0x40, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38 }
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,7 @@
|
||||
|
||||
ifneq ($(MCU), )
|
||||
include Makefile.riscv
|
||||
else
|
||||
include Makefile.linux
|
||||
endif
|
||||
|
||||
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Reference in New Issue
Block a user