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hisi_SS524V100_SDK/interdrv/sysconfig/sys_config.c
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/*
Copyright (c), 2001-2022, Shenshu Tech. Co., Ltd.
*/
#include "sys_config.h"
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/printk.h>
#include <linux/version.h>
#include <linux/of_platform.h>
#include <asm/io.h>
#define OT_BOARD_MIPI 0
#define OT_BOARD_CMOS 1
#define VO_BT1120_EN 0 /* only for ss624v100, not support by default */
#define VO_BT1120_MODE 0
#define VO_BT656_MODE 1
#define VO_RGB_16BIT_MODE 2 /* only for ss522v100 */
#define VO_RGB_18BIT_MODE 3 /* only for ss522v100 */
#define VO_RGB_24BIT_MODE 4 /* only for ss522v100 */
#define VO_DIGITAL_NAME_LEN 16
#define NAME_LEN 16
#define sys_writel(addr, value) ((*(volatile unsigned int *)(addr)) = (value))
#define sys_read(addr) (*((volatile int *)(addr)))
static void *g_reg_crg_base = NULL;
static void *g_reg_sys_base = NULL;
static void *g_reg_misc_base = NULL;
static void *g_reg_iocfg_base = NULL;
static void *g_reg_iocfg_base1 = NULL;
static void *g_reg_iocfg_base2 = NULL;
static void *g_reg_gpio_base = NULL;
static void *g_reg_aio_base = NULL;
static void *g_reg_mipi_base = NULL;
static int g_board_type = OT_BOARD_MIPI;
static char g_chip_list[NAME_LEN]; /* ss524v100 ss522v100 */
static char g_vo_digital_mode[VO_DIGITAL_NAME_LEN]; /* bt.1120 bt.656 rgb_16bit rgb_18bit rgb_24bit */
module_param(g_board_type, int, S_IRUGO);
module_param_string(chip, g_chip_list, NAME_LEN, 0600);
module_param_string(vo_digital, g_vo_digital_mode, VO_DIGITAL_NAME_LEN, 0600);
/* spi1 clk en */
static void spi1_clk_cfg_ss522v100(void)
{
sys_writel(g_reg_crg_base + 0x4488, 0x1);
sys_writel(g_reg_crg_base + 0x4488, 0x10);
}
static int clkcfg_ss524v100(void)
{
/* vi ppc 400M, ppc axi abp off */
sys_writel(g_reg_crg_base + 0x9140, 0x5000);
if (g_board_type == OT_BOARD_MIPI) {
/* vi port 400M */
sys_writel(g_reg_crg_base + 0x9164, 0x5000);
sys_writel(g_reg_crg_base + 0x9184, 0x5000);
sys_writel(g_reg_crg_base + 0x91a4, 0x5000);
sys_writel(g_reg_crg_base + 0x91c4, 0x5000);
} else {
sys_writel(g_reg_crg_base + 0x9164, 0x6000);
sys_writel(g_reg_crg_base + 0x9184, 0x6000);
sys_writel(g_reg_crg_base + 0x91a4, 0x6000);
sys_writel(g_reg_crg_base + 0x91c4, 0x6000);
}
/* vi AD ref_clk 27M */
sys_writel(g_reg_crg_base + 0x8940, 0x1010);
sys_writel(g_reg_crg_base + 0x8960, 0x1010);
sys_writel(g_reg_crg_base + 0x8980, 0x1010);
sys_writel(g_reg_crg_base + 0x89a0, 0x1010);
/* aio clk */
sys_writel(g_reg_crg_base + 0xa880, 0x30);
sys_writel(g_reg_aio_base + 0x0060, 0xe);
sys_writel(g_reg_aio_base + 0x0140, 0x00152ef0);
sys_writel(g_reg_aio_base + 0x0144, 0xd37);
return 0;
}
static int clkcfg_ss522v100(void)
{
/* vi ppc 400M, ppc axi abp off */
sys_writel(g_reg_crg_base + 0x9140, 0x5000);
if (g_board_type == OT_BOARD_MIPI) {
/* vi port 400M */
sys_writel(g_reg_crg_base + 0x9164, 0x5000);
sys_writel(g_reg_crg_base + 0x9184, 0x5000);
} else {
sys_writel(g_reg_crg_base + 0x9164, 0x6000);
sys_writel(g_reg_crg_base + 0x9184, 0x6000);
}
/* vi AD ref_clk 27M */
sys_writel(g_reg_crg_base + 0x8940, 0x1010);
sys_writel(g_reg_crg_base + 0x8960, 0x1010);
/* aio clk */
sys_writel(g_reg_crg_base + 0xa880, 0x30);
sys_writel(g_reg_aio_base + 0x0060, 0xe);
sys_writel(g_reg_aio_base + 0x0140, 0x00152ef0);
sys_writel(g_reg_aio_base + 0x0144, 0xd37);
/* spi1 lck */
spi1_clk_cfg_ss522v100();
return 0;
}
static int clkcfg_ss624v100(void)
{
/* aio clk */
sys_writel(g_reg_crg_base + 0xa880, 0x30);
sys_writel(g_reg_aio_base + 0x0060, 0xe);
sys_writel(g_reg_aio_base + 0x0140, 0x00152ef0);
sys_writel(g_reg_aio_base + 0x0144, 0xd37);
return 0;
}
static void clkcfg(int chip)
{
if (chip == CHIP_SS524V100) {
clkcfg_ss524v100();
} else if (chip == CHIP_SS522V100) {
clkcfg_ss522v100();
} else if (chip == CHIP_SS624V100) {
clkcfg_ss624v100();
} else {
printk("chip err\n");
}
}
/* ############## qosbuf ############# */
static int sysctl(void)
{
return 0;
}
static void vi_port_mode_ctl(void)
{
if (g_board_type == OT_BOARD_MIPI) {
sys_writel(g_reg_misc_base + 0x1000, 0x0);
} else {
sys_writel(g_reg_misc_base + 0x1000, 0xff0000);
}
}
/* i2c0 -> ad */
static void i2c0_pin_mux(void)
{
/* SDA SCL */
sys_writel(g_reg_iocfg_base + 0x0014, 0x1501);
sys_writel(g_reg_iocfg_base + 0x0018, 0x1501);
}
/* i2c1 -> ad */
static void i2c1_pin_mux(void)
{
/* SDA SCL */
sys_writel(g_reg_iocfg_base + 0x001C, 0x1501);
sys_writel(g_reg_iocfg_base + 0x0020, 0x1501);
}
static void vo_bt1120_mode_ss524v100(void)
{
sys_writel(g_reg_iocfg_base2 + 0x0008, 0x1042); /* BT.1120 CLK */
sys_writel(g_reg_iocfg_base2 + 0x0034, 0x1022); /* BT.1120 DATA0 */
sys_writel(g_reg_iocfg_base2 + 0x0018, 0x1052); /* BT.1120 DATA1 */
sys_writel(g_reg_iocfg_base2 + 0x001C, 0x1012); /* BT.1120 DATA2 */
sys_writel(g_reg_iocfg_base2 + 0x0020, 0x1012); /* BT.1120 DATA3 */
sys_writel(g_reg_iocfg_base2 + 0x0030, 0x1012); /* BT.1120 DATA4 */
sys_writel(g_reg_iocfg_base2 + 0x002C, 0x1012); /* BT.1120 DATA5 */
sys_writel(g_reg_iocfg_base2 + 0x0024, 0x1022); /* BT.1120 DATA6 */
sys_writel(g_reg_iocfg_base2 + 0x0038, 0x1012); /* BT.1120 DATA7 */
sys_writel(g_reg_iocfg_base2 + 0x0050, 0x1012); /* BT.1120 DATA8 */
sys_writel(g_reg_iocfg_base2 + 0x004C, 0x1012); /* BT.1120 DATA9 */
sys_writel(g_reg_iocfg_base2 + 0x0044, 0x1112); /* BT.1120 DATA10 */
sys_writel(g_reg_iocfg_base2 + 0x0048, 0x1012); /* BT.1120 DATA11 */
sys_writel(g_reg_iocfg_base2 + 0x000C, 0x1052); /* BT.1120 DATA12 */
sys_writel(g_reg_iocfg_base2 + 0x0010, 0x1052); /* BT.1120 DATA13 */
sys_writel(g_reg_iocfg_base2 + 0x0014, 0x1052); /* BT.1120 DATA14 */
sys_writel(g_reg_iocfg_base2 + 0x0028, 0x1022); /* BT.1120 DATA15 */
}
static void vo_bt1120_mode_ss522v100(void)
{
sys_writel(g_reg_iocfg_base2 + 0x0008, 0x1042); /* BT.1120 CLK */
sys_writel(g_reg_iocfg_base2 + 0x0034, 0x1022); /* BT.1120 DATA0 */
sys_writel(g_reg_iocfg_base2 + 0x0018, 0x1052); /* BT.1120 DATA1 */
sys_writel(g_reg_iocfg_base2 + 0x0020, 0x1013); /* BT.1120 DATA2 */
sys_writel(g_reg_iocfg_base2 + 0x0030, 0x1013); /* BT.1120 DATA3 */
sys_writel(g_reg_iocfg_base2 + 0x002C, 0x1013); /* BT.1120 DATA4 */
sys_writel(g_reg_iocfg_base2 + 0x001C, 0x1013); /* BT.1120 DATA5 */
sys_writel(g_reg_iocfg_base2 + 0x0038, 0x1013); /* BT.1120 DATA6 */
sys_writel(g_reg_iocfg_base2 + 0x0024, 0x1023); /* BT.1120 DATA7 */
sys_writel(g_reg_iocfg_base2 + 0x0050, 0x1012); /* BT.1120 DATA8 */
sys_writel(g_reg_iocfg_base2 + 0x004C, 0x1012); /* BT.1120 DATA9 */
sys_writel(g_reg_iocfg_base2 + 0x0044, 0x1112); /* BT.1120 DATA10 */
sys_writel(g_reg_iocfg_base2 + 0x0048, 0x1012); /* BT.1120 DATA11 */
sys_writel(g_reg_iocfg_base2 + 0x000C, 0x1052); /* BT.1120 DATA12 */
sys_writel(g_reg_iocfg_base2 + 0x0010, 0x1052); /* BT.1120 DATA13 */
sys_writel(g_reg_iocfg_base2 + 0x0014, 0x1052); /* BT.1120 DATA14 */
sys_writel(g_reg_iocfg_base2 + 0x0028, 0x1022); /* BT.1120 DATA15 */
}
#if VO_BT1120_EN
static void vo_bt1120_mode_ss624v100(void)
{
sys_writel(g_reg_iocfg_base2 + 0x0008, 0x1042); /* BT.1120 CLK */
sys_writel(g_reg_iocfg_base2 + 0x0034, 0x1022); /* BT.1120 DATA0 */
sys_writel(g_reg_iocfg_base2 + 0x0018, 0x1052); /* BT.1120 DATA1 */
sys_writel(g_reg_iocfg_base2 + 0x001C, 0x1012); /* BT.1120 DATA2 */
sys_writel(g_reg_iocfg_base2 + 0x0020, 0x1012); /* BT.1120 DATA3 */
sys_writel(g_reg_iocfg_base2 + 0x0030, 0x1012); /* BT.1120 DATA4 */
sys_writel(g_reg_iocfg_base2 + 0x002C, 0x1012); /* BT.1120 DATA5 */
sys_writel(g_reg_iocfg_base2 + 0x0024, 0x1022); /* BT.1120 DATA6 */
sys_writel(g_reg_iocfg_base2 + 0x0038, 0x1012); /* BT.1120 DATA7 */
sys_writel(g_reg_iocfg_base2 + 0x0050, 0x1012); /* BT.1120 DATA8 */
sys_writel(g_reg_iocfg_base2 + 0x004C, 0x1012); /* BT.1120 DATA9 */
sys_writel(g_reg_iocfg_base2 + 0x0044, 0x1112); /* BT.1120 DATA10 */
sys_writel(g_reg_iocfg_base2 + 0x0048, 0x1012); /* BT.1120 DATA11 */
sys_writel(g_reg_iocfg_base2 + 0x000C, 0x1052); /* BT.1120 DATA12 */
sys_writel(g_reg_iocfg_base2 + 0x0010, 0x1052); /* BT.1120 DATA13 */
sys_writel(g_reg_iocfg_base2 + 0x0014, 0x1052); /* BT.1120 DATA14 */
sys_writel(g_reg_iocfg_base2 + 0x0028, 0x1022); /* BT.1120 DATA15 */
}
#endif
static void vo_bt656_mode_ss524v100(void)
{
sys_writel(g_reg_iocfg_base2 + 0x0008, 0x1052); /* BT.1120 CLK (pin) -> BT.656 CLK(signal) */
sys_writel(g_reg_iocfg_base2 + 0x0034, 0x1022); /* BT.1120 DATA0(pin) -> BT.656 DATA7(signal) */
sys_writel(g_reg_iocfg_base2 + 0x0018, 0x1052); /* BT.1120 DATA1(pin) -> BT.656 DATA6(signal) */
sys_writel(g_reg_iocfg_base2 + 0x001C, 0x1022); /* BT.1120 DATA2(pin) -> BT.656 DATA5(signal) */
sys_writel(g_reg_iocfg_base2 + 0x0020, 0x1012); /* BT.1120 DATA3(pin) -> BT.656 DATA4(signal) */
sys_writel(g_reg_iocfg_base2 + 0x0030, 0x1012); /* BT.1120 DATA4(pin) -> BT.656 DATA3(signal) */
sys_writel(g_reg_iocfg_base2 + 0x002C, 0x1012); /* BT.1120 DATA5(pin) -> BT.656 DATA2(signal) */
sys_writel(g_reg_iocfg_base2 + 0x0024, 0x1012); /* BT.1120 DATA6(pin) -> BT.656 DATA1(signal) */
sys_writel(g_reg_iocfg_base2 + 0x0038, 0x1022); /* BT.1120 DATA7(pin) -> BT.656 DATA0(signal) */
}
static void vo_bt656_mode_ss522v100(void)
{
sys_writel(g_reg_iocfg_base2 + 0x0008, 0x1052); /* BT.656 CLK */
sys_writel(g_reg_iocfg_base2 + 0x0034, 0x1022); /* BT.656 DATA0 */
sys_writel(g_reg_iocfg_base2 + 0x0018, 0x1052); /* BT.656 DATA1 */
sys_writel(g_reg_iocfg_base2 + 0x0020, 0x1013); /* BT.656 DATA2 */
sys_writel(g_reg_iocfg_base2 + 0x0030, 0x1013); /* BT.656 DATA3 */
sys_writel(g_reg_iocfg_base2 + 0x002C, 0x1013); /* BT.656 DATA4 */
sys_writel(g_reg_iocfg_base2 + 0x001C, 0x1013); /* BT.656 DATA5 */
sys_writel(g_reg_iocfg_base2 + 0x0038, 0x1013); /* BT.656 DATA6 */
sys_writel(g_reg_iocfg_base2 + 0x0024, 0x1023); /* BT.656 DATA7 */
}
#if VO_BT1120_EN
static void vo_bt656_mode_ss624v100(void)
{
sys_writel(g_reg_iocfg_base2 + 0x0008, 0x1052); /* BT.1120 CLK (pin) -> BT.656 CLK (signal) */
sys_writel(g_reg_iocfg_base2 + 0x0034, 0x1022); /* BT.1120 DATA0(pin) -> BT.656 DATA7(signal) */
sys_writel(g_reg_iocfg_base2 + 0x0018, 0x1052); /* BT.1120 DATA1(pin) -> BT.656 DATA6(signal) */
sys_writel(g_reg_iocfg_base2 + 0x001C, 0x1022); /* BT.1120 DATA2(pin) -> BT.656 DATA5(signal) */
sys_writel(g_reg_iocfg_base2 + 0x0020, 0x1012); /* BT.1120 DATA3(pin) -> BT.656 DATA4(signal) */
sys_writel(g_reg_iocfg_base2 + 0x0030, 0x1012); /* BT.1120 DATA4(pin) -> BT.656 DATA3(signal) */
sys_writel(g_reg_iocfg_base2 + 0x002C, 0x1012); /* BT.1120 DATA5(pin) -> BT.656 DATA2(signal) */
sys_writel(g_reg_iocfg_base2 + 0x0024, 0x1012); /* BT.1120 DATA6(pin) -> BT.656 DATA1(signal) */
sys_writel(g_reg_iocfg_base2 + 0x0038, 0x1022); /* BT.1120 DATA7(pin) -> BT.656 DATA0(signal) */
}
#endif
/* spi1 -> lcd */
static void spi1_pin_mux_ss522v100(void)
{
sys_writel(g_reg_crg_base + 0x4488, 0x10); /* spi1 clk */
sys_writel(g_reg_iocfg_base1 + 0x010C, 0x1023); /* sck */
sys_writel(g_reg_iocfg_base1 + 0x0110, 0x1023); /* csn */
sys_writel(g_reg_iocfg_base1 + 0x0114, 0x1023); /* mosi */
sys_writel(g_reg_iocfg_base1 + 0x0118, 0x1023); /* miso */
}
static void vo_rgb_mode_ss522v100(int vo_digital_mode)
{
sys_writel(g_reg_iocfg_base2 + 0x0008, 0x1045); /* LCD_CLK */
sys_writel(g_reg_iocfg_base2 + 0x0024, 0x1025); /* LCD_DE */
sys_writel(g_reg_iocfg_base2 + 0x001C, 0x1015); /* LCD_HS */
sys_writel(g_reg_iocfg_base2 + 0x0038, 0x1035); /* LCD_VS */
sys_writel(g_reg_iocfg_base2 + 0x0068, 0x1015); /* LCD_DATA0 */
sys_writel(g_reg_iocfg_base2 + 0x005C, 0x1015); /* LCD_DATA1 */
sys_writel(g_reg_iocfg_base2 + 0x0060, 0x1015); /* LCD_DATA2 */
sys_writel(g_reg_iocfg_base2 + 0x0050, 0x1025); /* LCD_DATA3 */
sys_writel(g_reg_iocfg_base2 + 0x004C, 0x1015); /* LCD_DATA4 */
sys_writel(g_reg_iocfg_base2 + 0x0044, 0x1015); /* LCD_DATA5 */
sys_writel(g_reg_iocfg_base2 + 0x0048, 0x1025); /* LCD_DATA6 */
sys_writel(g_reg_iocfg_base2 + 0x000C, 0x1055); /* LCD_DATA7 */
sys_writel(g_reg_iocfg_base2 + 0x0010, 0x1055); /* LCD_DATA8 */
sys_writel(g_reg_iocfg_base2 + 0x0014, 0x1055); /* LCD_DATA9 */
sys_writel(g_reg_iocfg_base2 + 0x0028, 0x1015); /* LCD_DATA10 */
sys_writel(g_reg_iocfg_base2 + 0x0034, 0x1015); /* LCD_DATA11 */
sys_writel(g_reg_iocfg_base2 + 0x0018, 0x1065); /* LCD_DATA12 */
sys_writel(g_reg_iocfg_base2 + 0x0020, 0x1035); /* LCD_DATA13 */
sys_writel(g_reg_iocfg_base2 + 0x0030, 0x1015); /* LCD_DATA14 */
sys_writel(g_reg_iocfg_base2 + 0x002C, 0x1015); /* LCD_DATA15 */
if (vo_digital_mode == VO_RGB_16BIT_MODE) {
return;
}
sys_writel(g_reg_iocfg_base2 + 0x0064, 0x1015); /* LCD_DATA16 */
sys_writel(g_reg_iocfg_base2 + 0x006C, 0x1015); /* LCD_DATA17 */
if (vo_digital_mode == VO_RGB_18BIT_MODE) {
return;
}
sys_writel(g_reg_iocfg_base2 + 0x007C, 0x1055); /* LCD_DATA18 */
sys_writel(g_reg_iocfg_base2 + 0x0074, 0x1015); /* LCD_DATA19 */
sys_writel(g_reg_iocfg_base2 + 0x0070, 0x1025); /* LCD_DATA20 */
sys_writel(g_reg_iocfg_base2 + 0x0078, 0x1065); /* LCD_DATA21 */
sys_writel(g_reg_iocfg_base + 0x0004, 0x1025); /* LCD_DATA22 */
sys_writel(g_reg_iocfg_base + 0x0000, 0x1025); /* LCD_DATA23 */
}
static void vo_vga_mode(void)
{
sys_writel(g_reg_iocfg_base2 + 0x0078, 0x1051); /* VGA_HS */
sys_writel(g_reg_iocfg_base2 + 0x007C, 0x1051); /* VGA_VS */
}
/*
* HDMI_HOTPLUG 0x102F006C : 0x1431
* HDMI_SDA 0x102F0070 : 0x1431
* HDMI_SCL 0x102F0074 : 0x1431
*/
static void hdmi_pin_mux(void)
{
sys_writel(g_reg_iocfg_base2 + 0x006C, 0x1431);
sys_writel(g_reg_iocfg_base2 + 0x0070, 0x1431);
sys_writel(g_reg_iocfg_base2 + 0x0074, 0x1431);
}
static void i2s0_pin_mux(void)
{
sys_writel(g_reg_iocfg_base + 0x0000, 0x1431); /* I2S0_BCLK, E22 */
sys_writel(g_reg_iocfg_base + 0x0004, 0x1431); /* I2S0_WS, D21 */
sys_writel(g_reg_iocfg_base + 0x0008, 0x1421); /* I2S0_MCLK, E23 */
sys_writel(g_reg_iocfg_base + 0x000C, 0x1431); /* I2S0_SD_TX, F20 */
sys_writel(g_reg_iocfg_base + 0x0010, 0x1431); /* I2S0_SD_RX, E21 */
}
static void i2s1_pin_mux(void)
{
sys_writel(g_reg_iocfg_base1 + 0x0010, 0x1421); /* I2S1_BCLK, J19 */
sys_writel(g_reg_iocfg_base1 + 0x0014, 0x1421); /* I2S1_WS, J21 */
sys_writel(g_reg_iocfg_base1 + 0x0018, 0x1421); /* I2S1_SD_RX, J20 */
}
static void ir_pin_mux(void)
{
sys_writel(g_reg_iocfg_base1 + 0x010c, 0x1201); /* IR_IN */
}
static void mipi_pin_mux_rx0(void)
{
sys_writel(g_reg_iocfg_base1 + 0x0024, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0028, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x002C, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0030, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0034, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0038, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x003C, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0040, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0044, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0048, 0x1200);
}
static void mipi_pin_mux_rx1(void)
{
sys_writel(g_reg_iocfg_base1 + 0x004C, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0050, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0054, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0058, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x005C, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0060, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0064, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0068, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x006C, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0070, 0x1200);
}
static void mipi_pin_mux_rx2(void)
{
sys_writel(g_reg_iocfg_base1 + 0x0074, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0078, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x007C, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0080, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0084, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0088, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x008C, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0090, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0094, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0098, 0x1200);
}
static void mipi_pin_mux_rx3(void)
{
sys_writel(g_reg_iocfg_base1 + 0x009C, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x00A0, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x00A4, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x00A8, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x00AC, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x00B0, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x00B4, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x00B8, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x00BC, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x00C0, 0x1200);
}
static void mipi_pin_mux_rx_ss524v100(void)
{
mipi_pin_mux_rx0();
mipi_pin_mux_rx1();
mipi_pin_mux_rx2();
mipi_pin_mux_rx3();
}
static void mipi_pin_mux_rx_ss522v100(void)
{
/* mipi_rx phy0 */
sys_writel(g_reg_iocfg_base1 + 0x0024, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0028, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x002C, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0030, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0034, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0038, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x003C, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0040, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0044, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0048, 0x1200);
/* mipi_rx phy0 */
sys_writel(g_reg_iocfg_base1 + 0x004C, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0050, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0054, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0058, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x005C, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0060, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0064, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0068, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x006C, 0x1200);
sys_writel(g_reg_iocfg_base1 + 0x0070, 0x1200);
}
void mipi_pin_mux(int chip)
{
if (chip == CHIP_SS524V100) {
mipi_pin_mux_rx_ss524v100();
} else if (chip == CHIP_SS522V100) {
mipi_pin_mux_rx_ss522v100();
} else {
printk("chip err!!\n");
}
}
static void cmos_pin_mux_rx0(void)
{
sys_writel(g_reg_iocfg_base1 + 0x0024, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0028, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x002C, 0x1201); /* clk */
sys_writel(g_reg_iocfg_base1 + 0x0030, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0034, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0038, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x003C, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0040, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0044, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0048, 0x1201); /* clk */
}
static void cmos_pin_mux_rx1(void)
{
sys_writel(g_reg_iocfg_base1 + 0x004C, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0050, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0054, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0058, 0x1201); /* clk */
sys_writel(g_reg_iocfg_base1 + 0x005C, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0060, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0064, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0068, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x006C, 0x1201); /* clk */
sys_writel(g_reg_iocfg_base1 + 0x0070, 0x1201);
}
static void cmos_pin_mux_rx2(void)
{
sys_writel(g_reg_iocfg_base1 + 0x0074, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0078, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x007C, 0x1201); /* clk */
sys_writel(g_reg_iocfg_base1 + 0x0080, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0084, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0088, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x008C, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0090, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0094, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0098, 0x1201); /* clk */
}
static void cmos_pin_mux_rx3(void)
{
sys_writel(g_reg_iocfg_base1 + 0x009C, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x00A0, 0x1201); /* clk */
sys_writel(g_reg_iocfg_base1 + 0x00A4, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x00A8, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x00AC, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x00B0, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x00B4, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x00B8, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x00BC, 0x1201); /* clk */
sys_writel(g_reg_iocfg_base1 + 0x00C0, 0x1201);
}
static void cmos_pin_mux_rx_ss524v100(void)
{
cmos_pin_mux_rx0();
cmos_pin_mux_rx1();
cmos_pin_mux_rx2();
cmos_pin_mux_rx3();
}
static void cmos_pin_mux_rx_ss522v100(void)
{
/* bt.656 dev0 */
sys_writel(g_reg_iocfg_base1 + 0x0024, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0028, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x002C, 0x1201); /* clk */
sys_writel(g_reg_iocfg_base1 + 0x0030, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0034, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0038, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x003C, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0040, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0044, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0048, 0x1201); /* clk */
/* bt.656 dev1 */
sys_writel(g_reg_iocfg_base1 + 0x004C, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0050, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0054, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0058, 0x1201); /* clk */
sys_writel(g_reg_iocfg_base1 + 0x005C, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0060, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0064, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x0068, 0x1201);
sys_writel(g_reg_iocfg_base1 + 0x006C, 0x1201); /* clk */
sys_writel(g_reg_iocfg_base1 + 0x0070, 0x1201);
}
static void cmos_pin_mux(int chip)
{
if (chip == CHIP_SS524V100) {
cmos_pin_mux_rx_ss524v100();
} else if (chip == CHIP_SS522V100) {
cmos_pin_mux_rx_ss522v100();
} else {
printk("chip err!!\n");
}
}
static void ad_ref_pin_mux_ss524v100(void)
{
sys_writel(g_reg_iocfg_base1 + 0x001C, 0x1001);
sys_writel(g_reg_iocfg_base1 + 0x0020, 0x1001);
}
static void ad_ref_pin_mux_ss522v100(void)
{
sys_writel(g_reg_iocfg_base1 + 0x001C, 0x1001);
}
static void vo_pin_mux(int chip, int vo_digital_mode)
{
/*
* i2c0 -> adv7179.
* i2c1 -> lt8618sx.
*/
if (vo_digital_mode == VO_BT1120_MODE) {
/* bt.1120 */
if (chip == CHIP_SS524V100) {
vo_bt1120_mode_ss524v100();
} else if (chip == CHIP_SS522V100) {
vo_bt1120_mode_ss522v100();
} else if (chip == CHIP_SS624V100) {
#if VO_BT1120_EN
vo_bt1120_mode_ss624v100();
#endif
}
} else if (vo_digital_mode == VO_BT656_MODE) {
/* bt.656 */
if (chip == CHIP_SS524V100) {
vo_bt656_mode_ss524v100();
} else if (chip == CHIP_SS522V100) {
vo_bt656_mode_ss522v100();
} else if (chip == CHIP_SS624V100) {
#if VO_BT1120_EN
vo_bt656_mode_ss624v100();
#endif
}
} else if ((vo_digital_mode == VO_RGB_16BIT_MODE) ||
(vo_digital_mode == VO_RGB_18BIT_MODE) ||
(vo_digital_mode == VO_RGB_24BIT_MODE)) {
/* rgb */
if (chip == CHIP_SS522V100) {
/* spi1 -> lcd(16bit ST7701S, 18bit ST7789V2, 24bit ST7272A) */
spi1_pin_mux_ss522v100();
/* rgb24bit */
vo_rgb_mode_ss522v100(vo_digital_mode);
}
}
if (vo_digital_mode != VO_RGB_24BIT_MODE) {
/* vga */
vo_vga_mode();
}
}
static int pinmux_ss524v100(int chip, int vo_digital_mode)
{
/* ad */
i2c0_pin_mux();
/* lt8618sx */
i2c1_pin_mux();
/* ad ref */
if (chip == CHIP_SS524V100) {
ad_ref_pin_mux_ss524v100();
} else if (chip == CHIP_SS522V100) {
ad_ref_pin_mux_ss522v100();
}
/* mipi/cmos */
if (g_board_type == OT_BOARD_MIPI) {
mipi_pin_mux(chip);
} else {
cmos_pin_mux(chip);
}
/* vo */
vo_pin_mux(chip, vo_digital_mode);
if ((vo_digital_mode != VO_RGB_18BIT_MODE) &&
(vo_digital_mode != VO_RGB_24BIT_MODE)) {
/* HDMI */
hdmi_pin_mux();
}
if (vo_digital_mode != VO_RGB_24BIT_MODE) {
/* audio */
i2s0_pin_mux();
}
i2s1_pin_mux();
/* SPI1(for rgb) or IR */
if ((vo_digital_mode != VO_RGB_24BIT_MODE) &&
(vo_digital_mode != VO_RGB_18BIT_MODE) &&
(vo_digital_mode != VO_RGB_16BIT_MODE)) {
/* IR */
ir_pin_mux();
}
return 0;
}
static int pinmux_ss624v100(int chip, int vo_digital_mode)
{
i2c0_pin_mux();
i2c1_pin_mux();
/* vo */
vo_pin_mux(chip, vo_digital_mode);
if ((vo_digital_mode != VO_RGB_18BIT_MODE) &&
(vo_digital_mode != VO_RGB_24BIT_MODE)) {
/* HDMI */
hdmi_pin_mux();
}
if (vo_digital_mode != VO_RGB_24BIT_MODE) {
/* audio */
i2s0_pin_mux();
}
i2s1_pin_mux();
/* SPI1(for rgb) or IR */
if ((vo_digital_mode != VO_RGB_24BIT_MODE) &&
(vo_digital_mode != VO_RGB_18BIT_MODE) &&
(vo_digital_mode != VO_RGB_16BIT_MODE)) {
/* IR */
ir_pin_mux();
}
return 0;
}
static int sysconfig_init(void)
{
g_reg_crg_base = (void*)ioremap(0x11010000, 0x10000);
if (g_reg_crg_base == NULL) {
return 1;
}
g_reg_sys_base = (void*)ioremap(0x11020000, 0x4000);
if (g_reg_sys_base == NULL) {
return 1;
}
g_reg_misc_base = (void*)ioremap(0x11024000, 0x5000);
if (g_reg_misc_base == NULL) {
return 1;
}
g_reg_iocfg_base = (void*)ioremap(0x170F0000, 0x10000);
if (g_reg_iocfg_base == NULL) {
return 1;
}
g_reg_iocfg_base1 = (void*)ioremap(0x10ff0000, 0x10000);
if (g_reg_iocfg_base1 == NULL) {
return 1;
}
g_reg_iocfg_base2 = (void*)ioremap(0x102f0000, 0x10000);
if (g_reg_iocfg_base2 == NULL) {
return 1;
}
g_reg_gpio_base = (void*)ioremap(0x11090000, 0x1A000);
if (g_reg_gpio_base == NULL) {
return 1;
}
g_reg_aio_base = (void*)ioremap(0x17C00000, 0x10000);
if (g_reg_aio_base == NULL) {
return 1;
}
g_reg_mipi_base = (void*)ioremap(0x173C0000, 0x10000);
if (g_reg_mipi_base == NULL) {
return 1;
}
return 0;
}
static void sysconfig_exit(void)
{
if (g_reg_mipi_base != NULL) {
iounmap(g_reg_mipi_base);
g_reg_mipi_base = NULL;
}
if (g_reg_crg_base != NULL) {
iounmap(g_reg_crg_base);
g_reg_crg_base = NULL;
}
if (g_reg_sys_base != NULL) {
iounmap(g_reg_sys_base);
g_reg_sys_base = NULL;
}
if (g_reg_misc_base != NULL) {
iounmap(g_reg_misc_base);
g_reg_misc_base = NULL;
}
if (g_reg_iocfg_base != NULL) {
iounmap(g_reg_iocfg_base);
g_reg_iocfg_base = NULL;
}
if (g_reg_iocfg_base1 != NULL) {
iounmap(g_reg_iocfg_base1);
g_reg_iocfg_base1 = NULL;
}
if (g_reg_iocfg_base2 != NULL) {
iounmap(g_reg_iocfg_base2);
g_reg_iocfg_base2 = NULL;
}
if (g_reg_gpio_base != NULL) {
iounmap(g_reg_gpio_base);
g_reg_gpio_base = NULL;
}
if (g_reg_aio_base != NULL) {
iounmap(g_reg_aio_base);
g_reg_aio_base = NULL;
}
}
static int is_name_equal(const char *intf_name)
{
return (strncmp(intf_name, g_vo_digital_mode, strlen(intf_name)) == 0) ? 1 : 0;
}
static int ot_vo_get_digital_mode(int chip)
{
int vo_digital_mode = VO_BT1120_MODE;
char vo_bt1120_name[2][VO_DIGITAL_NAME_LEN] = {"bt.1120", "bt1120"}; /* 2 name */
char vo_bt656_name[2][VO_DIGITAL_NAME_LEN] = {"bt.656", "bt656"}; /* 2 name */
char vo_rgb_16bit_name[2][VO_DIGITAL_NAME_LEN] = {"rgb_16bit", "rgb16bit"}; /* 2 name */
char vo_rgb_18bit_name[2][VO_DIGITAL_NAME_LEN] = {"rgb_18bit", "rgb18bit"}; /* 2 name */
char vo_rgb_24bit_name[2][VO_DIGITAL_NAME_LEN] = {"rgb_24bit", "rgb24bit"}; /* 2 name */
if (is_name_equal(vo_bt1120_name[0]) || is_name_equal(vo_bt1120_name[1])) {
vo_digital_mode = VO_BT1120_MODE;
} else if (is_name_equal(vo_bt656_name[0]) || is_name_equal(vo_bt656_name[1])) {
vo_digital_mode = VO_BT656_MODE;
}
if (chip == CHIP_SS522V100) {
if (is_name_equal(vo_rgb_16bit_name[0]) || is_name_equal(vo_rgb_16bit_name[1])) {
vo_digital_mode = VO_RGB_16BIT_MODE;
} else if (is_name_equal(vo_rgb_18bit_name[0]) || is_name_equal(vo_rgb_18bit_name[1])) {
vo_digital_mode = VO_RGB_18BIT_MODE;
} else if (is_name_equal(vo_rgb_24bit_name[0]) || is_name_equal(vo_rgb_24bit_name[1])) {
vo_digital_mode = VO_RGB_24BIT_MODE;
}
}
printk("vo_digital_mode: %d\n", vo_digital_mode);
return vo_digital_mode;
}
static int __init ot_sysconfig_init(void)
{
int chip = CHIP_SS524V100;
int vo_digital_mode = VO_BT1120_MODE;
if (sysconfig_init() != 0) {
goto out;
}
sysctl();
if (strncmp("ss524v100", g_chip_list, strlen("ss524v100")) == 0) {
chip = CHIP_SS524V100;
} else if (strncmp("ss522v100", g_chip_list, strlen("ss522v100")) == 0) {
chip = CHIP_SS522V100;
} else if (strncmp("ss624v100", g_chip_list, strlen("ss624v100")) == 0) {
chip = CHIP_SS624V100;
}
vo_digital_mode = ot_vo_get_digital_mode(chip);
clkcfg(chip);
if (chip == CHIP_SS624V100) {
pinmux_ss624v100(chip, vo_digital_mode);
} else {
pinmux_ss524v100(chip, vo_digital_mode);
vi_port_mode_ctl();
}
return 0;
out:
sysconfig_exit();
return 0;
}
static void __exit ot_sysconfig_exit(void)
{
sysconfig_exit();
return;
}
module_init(ot_sysconfig_init);
module_exit(ot_sysconfig_exit);
EXPORT_SYMBOL(mipi_pin_mux);
MODULE_LICENSE("GPL");
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